/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-atomic/lamport.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-21b0908 [2022-07-22 11:39:48,668 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-22 11:39:48,672 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-22 11:39:48,741 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-22 11:39:48,770 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-22 11:39:48,773 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-22 11:39:48,774 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-22 11:39:48,780 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-22 11:39:48,781 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-22 11:39:48,782 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-22 11:39:48,788 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-22 11:39:48,798 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-22 11:39:48,802 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-22 11:39:48,803 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-22 11:39:48,805 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-22 11:39:48,806 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-22 11:39:48,810 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-22 11:39:48,817 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-07-22 11:39:48,831 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-22 11:39:48,833 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-22 11:39:48,835 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-22 11:39:48,843 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-22 11:39:48,892 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-22 11:39:48,892 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-22 11:39:48,893 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-22 11:39:48,893 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-22 11:39:48,895 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-22 11:39:48,895 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-22 11:39:48,896 INFO L138 SettingsManager]: * Use SBE=true [2022-07-22 11:39:48,896 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-22 11:39:48,896 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-22 11:39:48,897 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-22 11:39:48,897 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-22 11:39:48,898 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-22 11:39:48,898 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-22 11:39:48,898 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-22 11:39:48,898 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-22 11:39:48,899 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-22 11:39:48,899 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-22 11:39:48,899 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-22 11:39:48,899 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-22 11:39:48,899 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-22 11:39:48,899 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-22 11:39:48,900 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-22 11:39:48,900 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-22 11:39:48,900 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-22 11:39:48,900 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-22 11:39:48,900 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-22 11:39:48,901 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-22 11:39:48,901 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-22 11:39:48,901 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-22 11:39:48,902 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-22 11:39:48,902 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-22 11:39:48,902 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-22 11:39:48,905 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-22 11:39:48,905 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-22 11:39:49,286 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-22 11:39:49,313 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-22 11:39:49,316 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-22 11:39:49,318 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-22 11:39:49,319 INFO L275 PluginConnector]: CDTParser initialized [2022-07-22 11:39:49,320 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/lamport.i [2022-07-22 11:39:49,411 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/40ff2fd0a/79c96efdcb864cb7943ff4fcf092ed17/FLAG82981dae7 [2022-07-22 11:39:50,251 INFO L306 CDTParser]: Found 1 translation units. [2022-07-22 11:39:50,252 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i [2022-07-22 11:39:50,276 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/40ff2fd0a/79c96efdcb864cb7943ff4fcf092ed17/FLAG82981dae7 [2022-07-22 11:39:50,465 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/40ff2fd0a/79c96efdcb864cb7943ff4fcf092ed17 [2022-07-22 11:39:50,468 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-22 11:39:50,473 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-22 11:39:50,475 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-22 11:39:50,476 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-22 11:39:50,483 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-22 11:39:50,484 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 11:39:50" (1/1) ... [2022-07-22 11:39:50,486 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e9beb14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:50, skipping insertion in model container [2022-07-22 11:39:50,486 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.07 11:39:50" (1/1) ... [2022-07-22 11:39:50,497 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-22 11:39:50,544 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-22 11:39:50,735 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-22 11:39:51,068 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32156,32169] [2022-07-22 11:39:51,078 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[34083,34096] [2022-07-22 11:39:51,091 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 11:39:51,111 INFO L203 MainTranslator]: Completed pre-run [2022-07-22 11:39:51,147 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-22 11:39:51,201 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32156,32169] [2022-07-22 11:39:51,213 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[34083,34096] [2022-07-22 11:39:51,224 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-22 11:39:51,287 INFO L208 MainTranslator]: Completed translation [2022-07-22 11:39:51,288 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51 WrapperNode [2022-07-22 11:39:51,288 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-22 11:39:51,291 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-22 11:39:51,291 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-22 11:39:51,291 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-22 11:39:51,301 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,346 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,384 INFO L137 Inliner]: procedures = 171, calls = 83, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 44 [2022-07-22 11:39:51,384 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-22 11:39:51,386 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-22 11:39:51,386 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-22 11:39:51,387 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-22 11:39:51,399 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,400 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,420 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,424 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,440 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,452 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,458 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,467 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-22 11:39:51,469 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-22 11:39:51,469 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-22 11:39:51,469 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-22 11:39:51,472 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (1/1) ... [2022-07-22 11:39:51,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-22 11:39:51,498 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-22 11:39:51,516 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-22 11:39:51,545 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-22 11:39:51,602 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-22 11:39:51,604 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-22 11:39:51,605 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-22 11:39:51,605 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-22 11:39:51,605 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-22 11:39:51,605 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-22 11:39:51,605 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2022-07-22 11:39:51,606 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-22 11:39:51,606 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-22 11:39:51,606 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-22 11:39:51,606 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-22 11:39:51,606 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2022-07-22 11:39:51,606 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-22 11:39:51,607 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-22 11:39:51,609 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-22 11:39:51,922 INFO L234 CfgBuilder]: Building ICFG [2022-07-22 11:39:51,928 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-22 11:39:52,164 INFO L275 CfgBuilder]: Performing block encoding [2022-07-22 11:39:52,174 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-22 11:39:52,174 INFO L299 CfgBuilder]: Removed 8 assume(true) statements. [2022-07-22 11:39:52,177 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 11:39:52 BoogieIcfgContainer [2022-07-22 11:39:52,178 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-22 11:39:52,179 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-22 11:39:52,179 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-22 11:39:52,185 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-22 11:39:52,186 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 11:39:52,186 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 22.07 11:39:50" (1/3) ... [2022-07-22 11:39:52,187 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7789b809 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 11:39:52, skipping insertion in model container [2022-07-22 11:39:52,187 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 11:39:52,188 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.07 11:39:51" (2/3) ... [2022-07-22 11:39:52,188 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7789b809 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 22.07 11:39:52, skipping insertion in model container [2022-07-22 11:39:52,188 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-22 11:39:52,188 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.07 11:39:52" (3/3) ... [2022-07-22 11:39:52,191 INFO L322 chiAutomizerObserver]: Analyzing ICFG lamport.i [2022-07-22 11:39:52,296 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-22 11:39:52,344 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 114 places, 133 transitions, 282 flow [2022-07-22 11:39:52,429 INFO L129 PetriNetUnfolder]: 24/129 cut-off events. [2022-07-22 11:39:52,429 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-22 11:39:52,437 INFO L84 FinitePrefix]: Finished finitePrefix Result has 138 conditions, 129 events. 24/129 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 243 event pairs, 0 based on Foata normal form. 0/105 useless extension candidates. Maximal degree in co-relation 95. Up to 5 conditions per place. [2022-07-22 11:39:52,438 INFO L82 GeneralOperation]: Start removeDead. Operand has 114 places, 133 transitions, 282 flow [2022-07-22 11:39:52,463 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 112 places, 129 transitions, 270 flow [2022-07-22 11:39:52,483 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2022-07-22 11:39:52,483 INFO L301 stractBuchiCegarLoop]: Hoare is false [2022-07-22 11:39:52,483 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-22 11:39:52,483 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-22 11:39:52,483 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-22 11:39:52,484 INFO L305 stractBuchiCegarLoop]: Difference is false [2022-07-22 11:39:52,484 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-22 11:39:52,485 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-22 11:39:52,487 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-22 11:39:53,092 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 3633 [2022-07-22 11:39:53,093 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:53,093 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:53,103 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:53,104 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:53,104 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-22 11:39:53,104 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 4155 states, but on-demand construction may add more states [2022-07-22 11:39:53,256 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 3633 [2022-07-22 11:39:53,256 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:53,256 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:53,258 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:53,258 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:53,268 INFO L748 eck$LassoCheckResult]: Stem: 117#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 120#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 122#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 124#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 126#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 128#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 130#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 132#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 134#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 136#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 138#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 140#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 142#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 144#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 146#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 148#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 150#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 152#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 154#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 156#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 158#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 160#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 162#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 164#[thr1ENTRY, L845-3]don't care [402] thr1ENTRY-->L704loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 166#[L704loopEntry, L845-3]don't care [403] L704loopEntry-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 170#[L753-1, L845-3]don't care [2022-07-22 11:39:53,269 INFO L750 eck$LassoCheckResult]: Loop: 170#[L753-1, L845-3]don't care [406] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 178#[L845-3, L705]don't care [408] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 192#[L845-3, L707]don't care [411] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 212#[L710, L845-3]don't care [414] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 236#[L845-3, L713]don't care [416] L713-->L715: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_3 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} AuxVars[] AssignedVars[] 264#[L845-3, L715]don't care [419] L715-->L717: Formula: (= v_~b1~0_5 0) InVars {} OutVars{~b1~0=v_~b1~0_5} AuxVars[] AssignedVars[~b1~0] 302#[L717, L845-3]don't care [422] L717-->L724: Formula: (= v_~y~0_13 v_thr1Thread1of1ForFork1_~y1~0_7) InVars {~y~0=v_~y~0_13} OutVars{~y~0=v_~y~0_13, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 352#[L724, L845-3]don't care [424] L724-->L753-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] 170#[L753-1, L845-3]don't care [2022-07-22 11:39:53,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:53,282 INFO L85 PathProgramCache]: Analyzing trace with hash -2049050784, now seen corresponding path program 1 times [2022-07-22 11:39:53,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:53,294 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024989846] [2022-07-22 11:39:53,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:53,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:53,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:53,479 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:53,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:53,590 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:53,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:53,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1999980075, now seen corresponding path program 1 times [2022-07-22 11:39:53,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:53,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772893390] [2022-07-22 11:39:53,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:53,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:53,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:53,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:53,695 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:53,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772893390] [2022-07-22 11:39:53,696 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772893390] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:53,696 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:53,696 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-07-22 11:39:53,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [496777994] [2022-07-22 11:39:53,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:53,706 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-07-22 11:39:53,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:53,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-07-22 11:39:53,752 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-07-22 11:39:53,756 INFO L87 Difference]: Start difference. First operand currently 4155 states, but on-demand construction may add more states Second operand has 2 states, 1 states have (on average 8.0) internal successors, (8), 2 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:53,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:53,868 INFO L93 Difference]: Finished difference Result 4156 states and 12447 transitions. [2022-07-22 11:39:53,870 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4156 states and 12447 transitions. [2022-07-22 11:39:53,954 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 3633 [2022-07-22 11:39:54,037 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4156 states to 3866 states and 11618 transitions. [2022-07-22 11:39:54,038 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3866 [2022-07-22 11:39:54,051 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3866 [2022-07-22 11:39:54,052 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3866 states and 11618 transitions. [2022-07-22 11:39:54,076 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:54,076 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3866 states and 11618 transitions. [2022-07-22 11:39:54,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3866 states and 11618 transitions. [2022-07-22 11:39:54,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3866 to 3866. [2022-07-22 11:39:54,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3866 states, 3866 states have (on average 3.0051733057423693) internal successors, (11618), 3865 states have internal predecessors, (11618), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:54,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3866 states to 3866 states and 11618 transitions. [2022-07-22 11:39:54,493 INFO L242 hiAutomatonCegarLoop]: Abstraction has 3866 states and 11618 transitions. [2022-07-22 11:39:54,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-07-22 11:39:54,500 INFO L425 stractBuchiCegarLoop]: Abstraction has 3866 states and 11618 transitions. [2022-07-22 11:39:54,501 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-22 11:39:54,501 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3866 states and 11618 transitions. [2022-07-22 11:39:54,546 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 3633 [2022-07-22 11:39:54,546 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:54,547 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:54,548 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:54,548 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:54,549 INFO L748 eck$LassoCheckResult]: Stem: 20163#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 20165#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 15741#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 15743#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 20285#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 18653#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 18655#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 18069#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 18071#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 17119#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 17121#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 20311#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 16485#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 16487#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 16891#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 19783#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 19979#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 19981#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 16023#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 16025#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 16719#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 18753#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 18755#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 18935#[thr1ENTRY, L845-3]don't care [402] thr1ENTRY-->L704loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 20257#[L704loopEntry, L845-3]don't care [403] L704loopEntry-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 18327#[L753-1, L845-3]don't care [2022-07-22 11:39:54,550 INFO L750 eck$LassoCheckResult]: Loop: 18327#[L753-1, L845-3]don't care [406] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 18329#[L845-3, L705]don't care [408] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 17321#[L845-3, L707]don't care [411] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 16365#[L710, L845-3]don't care [414] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 16367#[L845-3, L713]don't care [416] L713-->L715: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_3 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} AuxVars[] AssignedVars[] 17445#[L845-3, L715]don't care [419] L715-->L717: Formula: (= v_~b1~0_5 0) InVars {} OutVars{~b1~0=v_~b1~0_5} AuxVars[] AssignedVars[~b1~0] 19919#[L717, L845-3]don't care [422] L717-->L724: Formula: (= v_~y~0_13 v_thr1Thread1of1ForFork1_~y1~0_7) InVars {~y~0=v_~y~0_13} OutVars{~y~0=v_~y~0_13, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 19873#[L724, L845-3]don't care [425] L724-->L753-1: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_9 0) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_9} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_9} AuxVars[] AssignedVars[] 18327#[L753-1, L845-3]don't care [2022-07-22 11:39:54,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:54,551 INFO L85 PathProgramCache]: Analyzing trace with hash -2049050784, now seen corresponding path program 2 times [2022-07-22 11:39:54,551 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:54,552 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386800663] [2022-07-22 11:39:54,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:54,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:54,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:54,582 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:54,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:54,606 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:54,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:54,607 INFO L85 PathProgramCache]: Analyzing trace with hash 1999980076, now seen corresponding path program 1 times [2022-07-22 11:39:54,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:54,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347273162] [2022-07-22 11:39:54,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:54,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:54,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:54,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:54,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:54,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347273162] [2022-07-22 11:39:54,686 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [347273162] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:54,687 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:54,687 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 11:39:54,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [434392472] [2022-07-22 11:39:54,687 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:54,688 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-07-22 11:39:54,688 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:54,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-22 11:39:54,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-07-22 11:39:54,689 INFO L87 Difference]: Start difference. First operand 3866 states and 11618 transitions. cyclomatic complexity: 7845 Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:55,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:55,133 INFO L93 Difference]: Finished difference Result 7589 states and 21892 transitions. [2022-07-22 11:39:55,133 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7589 states and 21892 transitions. [2022-07-22 11:39:55,357 INFO L131 ngComponentsAnalysis]: Automaton has 562 accepting balls. 5380 [2022-07-22 11:39:55,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7589 states to 7589 states and 21892 transitions. [2022-07-22 11:39:55,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7589 [2022-07-22 11:39:55,496 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7589 [2022-07-22 11:39:55,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7589 states and 21892 transitions. [2022-07-22 11:39:55,520 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:55,521 INFO L220 hiAutomatonCegarLoop]: Abstraction has 7589 states and 21892 transitions. [2022-07-22 11:39:55,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7589 states and 21892 transitions. [2022-07-22 11:39:55,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7589 to 4510. [2022-07-22 11:39:55,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4510 states, 4510 states have (on average 2.924390243902439) internal successors, (13189), 4509 states have internal predecessors, (13189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:55,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4510 states to 4510 states and 13189 transitions. [2022-07-22 11:39:55,808 INFO L242 hiAutomatonCegarLoop]: Abstraction has 4510 states and 13189 transitions. [2022-07-22 11:39:55,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-22 11:39:55,810 INFO L425 stractBuchiCegarLoop]: Abstraction has 4510 states and 13189 transitions. [2022-07-22 11:39:55,810 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-22 11:39:55,810 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4510 states and 13189 transitions. [2022-07-22 11:39:55,852 INFO L131 ngComponentsAnalysis]: Automaton has 297 accepting balls. 3275 [2022-07-22 11:39:55,852 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:55,852 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:55,854 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:55,854 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:55,856 INFO L748 eck$LassoCheckResult]: Stem: 35732#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 35734#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 31046#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 31048#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 35916#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 34028#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 34030#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 33420#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 33422#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 32434#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 32436#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 35996#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 31794#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 31796#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 32206#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 35282#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 35504#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 35506#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 31330#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 31332#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 32028#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 34140#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 34142#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 34330#[thr1ENTRY, L845-3]don't care [328] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 36002#[thr1ENTRY, L845-4]don't care [259] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 34946#[L846, thr1ENTRY]don't care [243] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 34948#[thr1ENTRY, L846-1]don't care [234] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 35500#[thr1ENTRY, L846-2]don't care [258] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 34546#[thr1ENTRY, L846-3]don't care [446] L846-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 34186#[L846-4, thr1ENTRY, thr2ENTRY]don't care [360] thr2ENTRY-->L774loopEntry: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 34190#[thr1ENTRY, L846-4, L774loopEntry]don't care [361] L774loopEntry-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 34358#[L846-4, thr1ENTRY, L823-1]don't care [2022-07-22 11:39:55,856 INFO L750 eck$LassoCheckResult]: Loop: 34358#[L846-4, thr1ENTRY, L823-1]don't care [364] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 35902#[thr1ENTRY, L846-4, L775]don't care [366] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 36768#[L846-4, thr1ENTRY, L777]don't care [369] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 36764#[thr1ENTRY, L846-4, L780]don't care [372] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 31824#[L846-4, thr1ENTRY, L783]don't care [374] L783-->L785: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_3 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} AuxVars[] AssignedVars[] 31828#[thr1ENTRY, L846-4, L785]don't care [377] L785-->L787: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0] 30818#[L846-4, thr1ENTRY, L787]don't care [380] L787-->L794: Formula: (= v_~y~0_3 v_thr2Thread1of1ForFork0_~y2~0_7) InVars {~y~0=v_~y~0_3} OutVars{~y~0=v_~y~0_3, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 30824#[thr1ENTRY, L846-4, L794]don't care [383] L794-->L823-1: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_9 0) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_9} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_9} AuxVars[] AssignedVars[] 34358#[L846-4, thr1ENTRY, L823-1]don't care [2022-07-22 11:39:55,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,857 INFO L85 PathProgramCache]: Analyzing trace with hash -921846738, now seen corresponding path program 1 times [2022-07-22 11:39:55,857 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,858 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29621661] [2022-07-22 11:39:55,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,889 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:55,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:55,944 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:55,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:55,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1953435948, now seen corresponding path program 1 times [2022-07-22 11:39:55,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:55,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875653300] [2022-07-22 11:39:55,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:55,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:55,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:56,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:56,015 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:56,015 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875653300] [2022-07-22 11:39:56,016 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1875653300] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:56,016 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:56,016 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 11:39:56,016 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206241352] [2022-07-22 11:39:56,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:56,017 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-07-22 11:39:56,017 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:56,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-07-22 11:39:56,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-07-22 11:39:56,021 INFO L87 Difference]: Start difference. First operand 4510 states and 13189 transitions. cyclomatic complexity: 8976 Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:56,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:56,302 INFO L93 Difference]: Finished difference Result 6560 states and 18538 transitions. [2022-07-22 11:39:56,302 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6560 states and 18538 transitions. [2022-07-22 11:39:56,510 INFO L131 ngComponentsAnalysis]: Automaton has 954 accepting balls. 1980 [2022-07-22 11:39:56,591 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6560 states to 6560 states and 18538 transitions. [2022-07-22 11:39:56,591 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6560 [2022-07-22 11:39:56,607 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6560 [2022-07-22 11:39:56,608 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6560 states and 18538 transitions. [2022-07-22 11:39:56,626 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:56,626 INFO L220 hiAutomatonCegarLoop]: Abstraction has 6560 states and 18538 transitions. [2022-07-22 11:39:56,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6560 states and 18538 transitions. [2022-07-22 11:39:56,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6560 to 4651. [2022-07-22 11:39:56,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4651 states, 4651 states have (on average 2.8449795742851) internal successors, (13232), 4650 states have internal predecessors, (13232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:56,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4651 states to 4651 states and 13232 transitions. [2022-07-22 11:39:56,926 INFO L242 hiAutomatonCegarLoop]: Abstraction has 4651 states and 13232 transitions. [2022-07-22 11:39:56,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-07-22 11:39:56,927 INFO L425 stractBuchiCegarLoop]: Abstraction has 4651 states and 13232 transitions. [2022-07-22 11:39:56,927 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-22 11:39:56,928 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4651 states and 13232 transitions. [2022-07-22 11:39:56,978 INFO L131 ngComponentsAnalysis]: Automaton has 714 accepting balls. 1500 [2022-07-22 11:39:56,978 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:56,978 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:56,980 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:56,980 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-22 11:39:56,981 INFO L748 eck$LassoCheckResult]: Stem: 51328#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 51330#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 46562#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 46564#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 51532#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 49576#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 49578#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 48924#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 48926#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 47922#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 47924#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 51600#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 47290#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 47292#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 47696#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 50860#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 51090#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 51092#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 46838#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 46840#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 47524#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 49692#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 49694#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 49882#[thr1ENTRY, L845-3]don't care [402] thr1ENTRY-->L704loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 51482#[L704loopEntry, L845-3]don't care [403] L704loopEntry-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 49216#[L753-1, L845-3]don't care [406] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 49218#[L845-3, L705]don't care [408] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 48134#[L845-3, L707]don't care [411] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 47168#[L710, L845-3]don't care [414] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 47170#[L845-3, L713]don't care [416] L713-->L715: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_3 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} AuxVars[] AssignedVars[] 48252#[L845-3, L715]don't care [419] L715-->L717: Formula: (= v_~b1~0_5 0) InVars {} OutVars{~b1~0=v_~b1~0_5} AuxVars[] AssignedVars[~b1~0] 51022#[L717, L845-3]don't care [422] L717-->L724: Formula: (= v_~y~0_13 v_thr1Thread1of1ForFork1_~y1~0_7) InVars {~y~0=v_~y~0_13} OutVars{~y~0=v_~y~0_13, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 50972#[L724, L845-3]don't care [2022-07-22 11:39:56,982 INFO L750 eck$LassoCheckResult]: Loop: 50972#[L724, L845-3]don't care [426] L724-->L722: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_11 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_11} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_11} AuxVars[] AssignedVars[] 50968#[L845-3, L722]don't care [429] L722-->L724: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_13 v_~y~0_15) InVars {~y~0=v_~y~0_15} OutVars{~y~0=v_~y~0_15, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_13} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 50972#[L724, L845-3]don't care [2022-07-22 11:39:56,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:56,983 INFO L85 PathProgramCache]: Analyzing trace with hash -2097385762, now seen corresponding path program 1 times [2022-07-22 11:39:56,984 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:56,984 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933505309] [2022-07-22 11:39:56,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:56,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:57,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:57,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:57,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:57,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933505309] [2022-07-22 11:39:57,076 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1933505309] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:57,077 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:57,077 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 11:39:57,077 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764127360] [2022-07-22 11:39:57,077 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:57,079 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:57,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:57,080 INFO L85 PathProgramCache]: Analyzing trace with hash 14596, now seen corresponding path program 1 times [2022-07-22 11:39:57,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:57,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075069568] [2022-07-22 11:39:57,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:57,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:57,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:57,092 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:57,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:57,110 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:57,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:57,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-22 11:39:57,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-22 11:39:57,139 INFO L87 Difference]: Start difference. First operand 4651 states and 13232 transitions. cyclomatic complexity: 9295 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:57,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:57,292 INFO L93 Difference]: Finished difference Result 5773 states and 15950 transitions. [2022-07-22 11:39:57,292 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5773 states and 15950 transitions. [2022-07-22 11:39:57,373 INFO L131 ngComponentsAnalysis]: Automaton has 802 accepting balls. 1668 [2022-07-22 11:39:57,433 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5773 states to 5773 states and 15950 transitions. [2022-07-22 11:39:57,434 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5773 [2022-07-22 11:39:57,451 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5773 [2022-07-22 11:39:57,451 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5773 states and 15950 transitions. [2022-07-22 11:39:57,471 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:57,472 INFO L220 hiAutomatonCegarLoop]: Abstraction has 5773 states and 15950 transitions. [2022-07-22 11:39:57,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5773 states and 15950 transitions. [2022-07-22 11:39:57,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5773 to 4355. [2022-07-22 11:39:57,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4355 states, 4355 states have (on average 2.815614236509759) internal successors, (12262), 4354 states have internal predecessors, (12262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:57,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4355 states to 4355 states and 12262 transitions. [2022-07-22 11:39:57,808 INFO L242 hiAutomatonCegarLoop]: Abstraction has 4355 states and 12262 transitions. [2022-07-22 11:39:57,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-22 11:39:57,811 INFO L425 stractBuchiCegarLoop]: Abstraction has 4355 states and 12262 transitions. [2022-07-22 11:39:57,811 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-22 11:39:57,811 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4355 states and 12262 transitions. [2022-07-22 11:39:57,855 INFO L131 ngComponentsAnalysis]: Automaton has 640 accepting balls. 1344 [2022-07-22 11:39:57,855 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:57,855 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:57,858 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:57,858 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-22 11:39:57,861 INFO L748 eck$LassoCheckResult]: Stem: 66038#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 66040#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 61476#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 61478#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 66242#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 64300#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 64302#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 63678#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 63680#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 62728#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 62730#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 66318#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 62136#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 62138#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 62506#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 65534#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 65780#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 65782#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 61724#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 61726#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 62346#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 64406#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 64408#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 64596#[thr1ENTRY, L845-3]don't care [402] thr1ENTRY-->L704loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 66190#[L704loopEntry, L845-3]don't care [403] L704loopEntry-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 63952#[L753-1, L845-3]don't care [406] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 63954#[L845-3, L705]don't care [408] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 62924#[L845-3, L707]don't care [411] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 62026#[L710, L845-3]don't care [414] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 62028#[L845-3, L713]don't care [417] L713-->L728: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_5 0) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} AuxVars[] AssignedVars[] 63044#[L728, L845-3]don't care [420] L728-->L730: Formula: (= v_~y~0_16 1) InVars {} OutVars{~y~0=v_~y~0_16} AuxVars[] AssignedVars[~y~0] 62598#[L730, L845-3]don't care [423] L730-->L733: Formula: (= v_thr1Thread1of1ForFork1_~x1~0_1 v_~x~0_4) InVars {~x~0=v_~x~0_4} OutVars{~x~0=v_~x~0_4, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~x1~0] 62600#[L845-3, L733]don't care [427] L733-->L735: Formula: (not (= v_thr1Thread1of1ForFork1_~x1~0_3 1)) InVars {thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_3} OutVars{thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_3} AuxVars[] AssignedVars[] 65364#[L845-3, L735]don't care [430] L735-->L737: Formula: (= v_~b1~0_3 0) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 65366#[L737, L845-3]don't care [431] L737-->L744: Formula: (= v_~b2~0_5 v_thr1Thread1of1ForFork1_~b21~0_1) InVars {~b2~0=v_~b2~0_5} OutVars{~b2~0=v_~b2~0_5, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~b21~0] 64046#[L845-3, L744]don't care [2022-07-22 11:39:57,862 INFO L750 eck$LassoCheckResult]: Loop: 64046#[L845-3, L744]don't care [434] L744-->L742: Formula: (<= 1 v_thr1Thread1of1ForFork1_~b21~0_5) InVars {thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_5} OutVars{thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_5} AuxVars[] AssignedVars[] 64050#[L845-3, L742]don't care [436] L742-->L744: Formula: (= v_~b2~0_6 v_thr1Thread1of1ForFork1_~b21~0_7) InVars {~b2~0=v_~b2~0_6} OutVars{~b2~0=v_~b2~0_6, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~b21~0] 64046#[L845-3, L744]don't care [2022-07-22 11:39:57,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:57,863 INFO L85 PathProgramCache]: Analyzing trace with hash -5006963, now seen corresponding path program 1 times [2022-07-22 11:39:57,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:57,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584120248] [2022-07-22 11:39:57,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:57,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:57,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:57,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:57,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:57,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584120248] [2022-07-22 11:39:57,958 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1584120248] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:57,958 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:57,958 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 11:39:57,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1433909963] [2022-07-22 11:39:57,960 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:57,960 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:57,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:57,961 INFO L85 PathProgramCache]: Analyzing trace with hash 14851, now seen corresponding path program 1 times [2022-07-22 11:39:57,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:57,966 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486823760] [2022-07-22 11:39:57,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:57,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:57,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:57,973 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:57,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:57,981 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:57,995 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:57,996 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-22 11:39:57,996 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-22 11:39:57,997 INFO L87 Difference]: Start difference. First operand 4355 states and 12262 transitions. cyclomatic complexity: 8547 Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:58,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:58,086 INFO L93 Difference]: Finished difference Result 7277 states and 20080 transitions. [2022-07-22 11:39:58,086 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7277 states and 20080 transitions. [2022-07-22 11:39:58,251 INFO L131 ngComponentsAnalysis]: Automaton has 976 accepting balls. 2032 [2022-07-22 11:39:58,309 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7277 states to 6685 states and 18500 transitions. [2022-07-22 11:39:58,310 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6685 [2022-07-22 11:39:58,324 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6685 [2022-07-22 11:39:58,324 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6685 states and 18500 transitions. [2022-07-22 11:39:58,340 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:58,340 INFO L220 hiAutomatonCegarLoop]: Abstraction has 6685 states and 18500 transitions. [2022-07-22 11:39:58,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6685 states and 18500 transitions. [2022-07-22 11:39:58,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6685 to 4217. [2022-07-22 11:39:58,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4217 states, 4217 states have (on average 2.8183542802940478) internal successors, (11885), 4216 states have internal predecessors, (11885), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:58,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4217 states to 4217 states and 11885 transitions. [2022-07-22 11:39:58,523 INFO L242 hiAutomatonCegarLoop]: Abstraction has 4217 states and 11885 transitions. [2022-07-22 11:39:58,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-22 11:39:58,525 INFO L425 stractBuchiCegarLoop]: Abstraction has 4217 states and 11885 transitions. [2022-07-22 11:39:58,525 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-07-22 11:39:58,525 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4217 states and 11885 transitions. [2022-07-22 11:39:58,562 INFO L131 ngComponentsAnalysis]: Automaton has 644 accepting balls. 1352 [2022-07-22 11:39:58,563 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:58,563 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:58,564 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:58,564 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-22 11:39:58,566 INFO L748 eck$LassoCheckResult]: Stem: 81114#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 81116#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 77106#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 77108#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 81278#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 79596#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 79598#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 79040#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 79042#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 78198#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 78200#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 81332#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 77682#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 77684#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 78004#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 80690#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 80900#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 80902#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 77322#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 77324#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 77852#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 79688#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 79690#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 79860#[thr1ENTRY, L845-3]don't care [328] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 81340#[thr1ENTRY, L845-4]don't care [259] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 80422#[L846, thr1ENTRY]don't care [243] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 80424#[thr1ENTRY, L846-1]don't care [234] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 80896#[thr1ENTRY, L846-2]don't care [258] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 80058#[thr1ENTRY, L846-3]don't care [446] L846-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 79726#[L846-4, thr1ENTRY, thr2ENTRY]don't care [360] thr2ENTRY-->L774loopEntry: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 79730#[thr1ENTRY, L846-4, L774loopEntry]don't care [361] L774loopEntry-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 81262#[L846-4, thr1ENTRY, L823-1]don't care [364] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 80564#[thr1ENTRY, L846-4, L775]don't care [366] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 80568#[L846-4, thr1ENTRY, L777]don't care [369] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 76582#[thr1ENTRY, L846-4, L780]don't care [372] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 76586#[L846-4, thr1ENTRY, L783]don't care [374] L783-->L785: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_3 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} AuxVars[] AssignedVars[] 77712#[thr1ENTRY, L846-4, L785]don't care [377] L785-->L787: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0] 76928#[L846-4, thr1ENTRY, L787]don't care [380] L787-->L794: Formula: (= v_~y~0_3 v_thr2Thread1of1ForFork0_~y2~0_7) InVars {~y~0=v_~y~0_3} OutVars{~y~0=v_~y~0_3, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 76934#[thr1ENTRY, L846-4, L794]don't care [2022-07-22 11:39:58,566 INFO L750 eck$LassoCheckResult]: Loop: 76934#[thr1ENTRY, L846-4, L794]don't care [384] L794-->L792: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_11 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_11} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_11} AuxVars[] AssignedVars[] 79888#[L846-4, thr1ENTRY, L792]don't care [387] L792-->L794: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_13 v_~y~0_5) InVars {~y~0=v_~y~0_5} OutVars{~y~0=v_~y~0_5, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_13} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 76934#[thr1ENTRY, L846-4, L794]don't care [2022-07-22 11:39:58,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:58,568 INFO L85 PathProgramCache]: Analyzing trace with hash 581266918, now seen corresponding path program 1 times [2022-07-22 11:39:58,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:58,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076575838] [2022-07-22 11:39:58,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:58,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:58,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:58,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:58,733 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:58,734 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076575838] [2022-07-22 11:39:58,734 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2076575838] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:58,734 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:58,734 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 11:39:58,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146796628] [2022-07-22 11:39:58,735 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:58,735 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:58,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:58,736 INFO L85 PathProgramCache]: Analyzing trace with hash 13252, now seen corresponding path program 1 times [2022-07-22 11:39:58,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:58,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740870226] [2022-07-22 11:39:58,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:58,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:58,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:58,742 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:58,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:58,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:58,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:58,759 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-22 11:39:58,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-22 11:39:58,760 INFO L87 Difference]: Start difference. First operand 4217 states and 11885 transitions. cyclomatic complexity: 8312 Second operand has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:58,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:58,869 INFO L93 Difference]: Finished difference Result 4795 states and 13166 transitions. [2022-07-22 11:39:58,869 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4795 states and 13166 transitions. [2022-07-22 11:39:58,919 INFO L131 ngComponentsAnalysis]: Automaton has 677 accepting balls. 1418 [2022-07-22 11:39:58,957 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4795 states to 4795 states and 13166 transitions. [2022-07-22 11:39:58,957 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4795 [2022-07-22 11:39:58,966 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4795 [2022-07-22 11:39:58,967 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4795 states and 13166 transitions. [2022-07-22 11:39:58,976 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:58,976 INFO L220 hiAutomatonCegarLoop]: Abstraction has 4795 states and 13166 transitions. [2022-07-22 11:39:58,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4795 states and 13166 transitions. [2022-07-22 11:39:59,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4795 to 3946. [2022-07-22 11:39:59,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3946 states, 3946 states have (on average 2.7833248859604662) internal successors, (10983), 3945 states have internal predecessors, (10983), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:59,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3946 states to 3946 states and 10983 transitions. [2022-07-22 11:39:59,123 INFO L242 hiAutomatonCegarLoop]: Abstraction has 3946 states and 10983 transitions. [2022-07-22 11:39:59,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-22 11:39:59,124 INFO L425 stractBuchiCegarLoop]: Abstraction has 3946 states and 10983 transitions. [2022-07-22 11:39:59,124 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-07-22 11:39:59,124 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3946 states and 10983 transitions. [2022-07-22 11:39:59,154 INFO L131 ngComponentsAnalysis]: Automaton has 581 accepting balls. 1226 [2022-07-22 11:39:59,155 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:59,155 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:59,156 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:59,156 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-22 11:39:59,158 INFO L748 eck$LassoCheckResult]: Stem: 94320#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 94322#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 90248#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 90250#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 94522#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 92730#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 92732#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 92202#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 92204#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 91374#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 91376#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 94616#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 90842#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 90844#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 91164#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 93846#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 94082#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 94084#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 90468#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 90470#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 90994#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 92824#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 92826#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 93008#[thr1ENTRY, L845-3]don't care [328] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 94634#[thr1ENTRY, L845-4]don't care [259] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 93568#[L846, thr1ENTRY]don't care [243] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 93570#[thr1ENTRY, L846-1]don't care [234] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 94070#[thr1ENTRY, L846-2]don't care [258] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 93196#[thr1ENTRY, L846-3]don't care [446] L846-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 92856#[L846-4, thr1ENTRY, thr2ENTRY]don't care [360] thr2ENTRY-->L774loopEntry: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 92860#[thr1ENTRY, L846-4, L774loopEntry]don't care [361] L774loopEntry-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 94502#[L846-4, thr1ENTRY, L823-1]don't care [364] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 93704#[thr1ENTRY, L846-4, L775]don't care [366] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 93708#[L846-4, thr1ENTRY, L777]don't care [369] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 89740#[thr1ENTRY, L846-4, L780]don't care [372] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 89744#[L846-4, thr1ENTRY, L783]don't care [375] L783-->L798: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_5 0) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_5} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_5} AuxVars[] AssignedVars[] 90870#[thr1ENTRY, L846-4, L798]don't care [378] L798-->L800: Formula: (= 2 v_~y~0_6) InVars {} OutVars{~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y~0] 94314#[L846-4, thr1ENTRY, L800]don't care [381] L800-->L803: Formula: (= v_~x~0_2 v_thr2Thread1of1ForFork0_~x2~0_1) InVars {~x~0=v_~x~0_2} OutVars{thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_1, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~x2~0] 94250#[thr1ENTRY, L846-4, L803]don't care [385] L803-->L805: Formula: (not (= 2 v_thr2Thread1of1ForFork0_~x2~0_3)) InVars {thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_3} OutVars{thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_3} AuxVars[] AssignedVars[] 94252#[L846-4, thr1ENTRY, L805]don't care [388] L805-->L807: Formula: (= v_~b2~0_4 0) InVars {} OutVars{~b2~0=v_~b2~0_4} AuxVars[] AssignedVars[~b2~0] 90204#[thr1ENTRY, L846-4, L807]don't care [389] L807-->L814: Formula: (= v_~b1~0_1 v_thr2Thread1of1ForFork0_~b12~0_1) InVars {~b1~0=v_~b1~0_1} OutVars{~b1~0=v_~b1~0_1, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~b12~0] 89268#[L846-4, thr1ENTRY, L814]don't care [2022-07-22 11:39:59,158 INFO L750 eck$LassoCheckResult]: Loop: 89268#[L846-4, thr1ENTRY, L814]don't care [392] L814-->L812: Formula: (<= 1 v_thr2Thread1of1ForFork0_~b12~0_5) InVars {thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_5} OutVars{thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_5} AuxVars[] AssignedVars[] 89276#[thr1ENTRY, L846-4, L812]don't care [394] L812-->L814: Formula: (= v_~b1~0_2 v_thr2Thread1of1ForFork0_~b12~0_7) InVars {~b1~0=v_~b1~0_2} OutVars{~b1~0=v_~b1~0_2, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~b12~0] 89268#[L846-4, thr1ENTRY, L814]don't care [2022-07-22 11:39:59,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:59,158 INFO L85 PathProgramCache]: Analyzing trace with hash -755418469, now seen corresponding path program 1 times [2022-07-22 11:39:59,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:59,159 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337424145] [2022-07-22 11:39:59,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:59,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:59,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-22 11:39:59,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-22 11:39:59,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-22 11:39:59,201 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337424145] [2022-07-22 11:39:59,201 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1337424145] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-22 11:39:59,201 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-22 11:39:59,202 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-22 11:39:59,202 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [755053260] [2022-07-22 11:39:59,202 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-22 11:39:59,202 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-07-22 11:39:59,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:59,203 INFO L85 PathProgramCache]: Analyzing trace with hash 13507, now seen corresponding path program 1 times [2022-07-22 11:39:59,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:59,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304487869] [2022-07-22 11:39:59,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:59,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:59,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,209 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:59,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,213 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:59,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-22 11:39:59,227 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-22 11:39:59,227 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-22 11:39:59,228 INFO L87 Difference]: Start difference. First operand 3946 states and 10983 transitions. cyclomatic complexity: 7618 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:59,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-22 11:39:59,288 INFO L93 Difference]: Finished difference Result 4006 states and 10610 transitions. [2022-07-22 11:39:59,288 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4006 states and 10610 transitions. [2022-07-22 11:39:59,406 INFO L131 ngComponentsAnalysis]: Automaton has 473 accepting balls. 978 [2022-07-22 11:39:59,432 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4006 states to 3291 states and 8787 transitions. [2022-07-22 11:39:59,433 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3291 [2022-07-22 11:39:59,438 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3291 [2022-07-22 11:39:59,439 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3291 states and 8787 transitions. [2022-07-22 11:39:59,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-22 11:39:59,446 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3291 states and 8787 transitions. [2022-07-22 11:39:59,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states and 8787 transitions. [2022-07-22 11:39:59,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 2987. [2022-07-22 11:39:59,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2987 states, 2987 states have (on average 2.6859725477067293) internal successors, (8023), 2986 states have internal predecessors, (8023), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-22 11:39:59,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2987 states to 2987 states and 8023 transitions. [2022-07-22 11:39:59,553 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2987 states and 8023 transitions. [2022-07-22 11:39:59,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-22 11:39:59,555 INFO L425 stractBuchiCegarLoop]: Abstraction has 2987 states and 8023 transitions. [2022-07-22 11:39:59,555 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-07-22 11:39:59,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2987 states and 8023 transitions. [2022-07-22 11:39:59,580 INFO L131 ngComponentsAnalysis]: Automaton has 417 accepting balls. 866 [2022-07-22 11:39:59,580 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-22 11:39:59,580 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-22 11:39:59,581 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-22 11:39:59,581 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-22 11:39:59,583 INFO L748 eck$LassoCheckResult]: Stem: 102953#[ULTIMATE.startENTRY]don't care [341] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 102955#[L-1]don't care [266] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 102985#[L-1-1]don't care [350] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 102987#[L-1-2]don't care [352] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 104297#[L12]don't care [305] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 104623#[L12-1]don't care [320] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 103341#[L12-2]don't care [319] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 103343#[L12-3]don't care [343] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 102301#[L12-4]don't care [336] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 102303#[L700]don't care [280] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 103935#[L701]don't care [348] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 104681#[L701-1]don't care [247] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 103523#[L702]don't care [251] L702-->L-1-3: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 103525#[L-1-3]don't care [353] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 100131#[L-1-4]don't care [272] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 100133#[L-1-5]don't care [242] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 101521#[L-1-6]don't care [335] L-1-6-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 101523#[L844]don't care [293] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 103207#[L844-1]don't care [279] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 103209#[L844-2]don't care [313] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 102343#[L845]don't care [340] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 102345#[L845-1]don't care [244] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 104675#[L845-2]don't care [449] L845-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 104743#[thr1ENTRY, L845-3]don't care [402] thr1ENTRY-->L704loopEntry: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 103957#[L704loopEntry, L845-3]don't care [403] L704loopEntry-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 103959#[L753-1, L845-3]don't care [406] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 104511#[L845-3, L705]don't care [328] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 101769#[L845-4, L705]don't care [259] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 101771#[L846, L705]don't care [243] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 104037#[L846-1, L705]don't care [408] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 100953#[L707, L846-1]don't care [234] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 100955#[L846-2, L707]don't care [258] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 100513#[L846-3, L707]don't care [411] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 100515#[L710, L846-3]don't care [414] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 104403#[L846-3, L713]don't care [417] L713-->L728: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_5 0) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} AuxVars[] AssignedVars[] 103837#[L728, L846-3]don't care [420] L728-->L730: Formula: (= v_~y~0_16 1) InVars {} OutVars{~y~0=v_~y~0_16} AuxVars[] AssignedVars[~y~0] 104247#[L730, L846-3]don't care [446] L846-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 104225#[thr2ENTRY, L846-4, L730]don't care [360] thr2ENTRY-->L774loopEntry: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 102981#[L846-4, L730, L774loopEntry]don't care [361] L774loopEntry-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 102945#[L846-4, L730, L823-1]don't care [364] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 102269#[L775, L846-4, L730]don't care [366] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 102271#[L846-4, L730, L777]don't care [369] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 104301#[L846-4, L730, L780]don't care [372] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 105475#[L846-4, L783, L730]don't care [374] L783-->L785: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_3 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} AuxVars[] AssignedVars[] 105477#[L846-4, L730, L785]don't care [377] L785-->L787: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0] 105597#[L846-4, L730, L787]don't care [380] L787-->L794: Formula: (= v_~y~0_3 v_thr2Thread1of1ForFork0_~y2~0_7) InVars {~y~0=v_~y~0_3} OutVars{~y~0=v_~y~0_3, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 105599#[L846-4, L730, L794]don't care [2022-07-22 11:39:59,583 INFO L750 eck$LassoCheckResult]: Loop: 105599#[L846-4, L730, L794]don't care [384] L794-->L792: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_11 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_11} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_11} AuxVars[] AssignedVars[] 105601#[L792, L846-4, L730]don't care [387] L792-->L794: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_13 v_~y~0_5) InVars {~y~0=v_~y~0_5} OutVars{~y~0=v_~y~0_5, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_13} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 105599#[L846-4, L730, L794]don't care [2022-07-22 11:39:59,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:59,584 INFO L85 PathProgramCache]: Analyzing trace with hash 1620938889, now seen corresponding path program 1 times [2022-07-22 11:39:59,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:59,585 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184216839] [2022-07-22 11:39:59,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:59,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:59,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,605 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:59,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,630 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:59,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:59,631 INFO L85 PathProgramCache]: Analyzing trace with hash 13252, now seen corresponding path program 2 times [2022-07-22 11:39:59,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:59,632 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614346460] [2022-07-22 11:39:59,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:59,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:59,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,637 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:59,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,649 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:39:59,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-22 11:39:59,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1350843828, now seen corresponding path program 1 times [2022-07-22 11:39:59,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-22 11:39:59,650 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180926542] [2022-07-22 11:39:59,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-22 11:39:59,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-22 11:39:59,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,674 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-22 11:39:59,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-22 11:39:59,700 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-22 11:40:01,058 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 22.07 11:40:01 BoogieIcfgContainer [2022-07-22 11:40:01,058 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-22 11:40:01,059 INFO L158 Benchmark]: Toolchain (without parser) took 10589.52ms. Allocated memory was 156.2MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 129.3MB in the beginning and 1.0GB in the end (delta: -904.0MB). Peak memory consumption was 321.7MB. Max. memory is 8.0GB. [2022-07-22 11:40:01,060 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 156.2MB. Free memory was 125.8MB in the beginning and 125.7MB in the end (delta: 73.4kB). There was no memory consumed. Max. memory is 8.0GB. [2022-07-22 11:40:01,061 INFO L158 Benchmark]: CACSL2BoogieTranslator took 813.49ms. Allocated memory is still 156.2MB. Free memory was 129.1MB in the beginning and 108.7MB in the end (delta: 20.4MB). Peak memory consumption was 19.9MB. Max. memory is 8.0GB. [2022-07-22 11:40:01,061 INFO L158 Benchmark]: Boogie Procedure Inliner took 93.99ms. Allocated memory is still 156.2MB. Free memory was 108.5MB in the beginning and 106.7MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-22 11:40:01,062 INFO L158 Benchmark]: Boogie Preprocessor took 80.95ms. Allocated memory is still 156.2MB. Free memory was 106.7MB in the beginning and 105.0MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-22 11:40:01,063 INFO L158 Benchmark]: RCFGBuilder took 709.02ms. Allocated memory is still 156.2MB. Free memory was 105.0MB in the beginning and 128.4MB in the end (delta: -23.4MB). Peak memory consumption was 8.3MB. Max. memory is 8.0GB. [2022-07-22 11:40:01,063 INFO L158 Benchmark]: BuchiAutomizer took 8879.40ms. Allocated memory was 156.2MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 128.4MB in the beginning and 1.0GB in the end (delta: -905.0MB). Peak memory consumption was 320.8MB. Max. memory is 8.0GB. [2022-07-22 11:40:01,067 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 156.2MB. Free memory was 125.8MB in the beginning and 125.7MB in the end (delta: 73.4kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 813.49ms. Allocated memory is still 156.2MB. Free memory was 129.1MB in the beginning and 108.7MB in the end (delta: 20.4MB). Peak memory consumption was 19.9MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 93.99ms. Allocated memory is still 156.2MB. Free memory was 108.5MB in the beginning and 106.7MB in the end (delta: 1.8MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 80.95ms. Allocated memory is still 156.2MB. Free memory was 106.7MB in the beginning and 105.0MB in the end (delta: 1.7MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 709.02ms. Allocated memory is still 156.2MB. Free memory was 105.0MB in the beginning and 128.4MB in the end (delta: -23.4MB). Peak memory consumption was 8.3MB. Max. memory is 8.0GB. * BuchiAutomizer took 8879.40ms. Allocated memory was 156.2MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 128.4MB in the beginning and 1.0GB in the end (delta: -905.0MB). Peak memory consumption was 320.8MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 7 terminating modules (7 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.7 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 2987 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 8.6s and 8 iterations. TraceHistogramMax:1. Analysis of lassos took 2.7s. Construction of modules took 0.4s. Büchi inclusion checks took 4.2s. Highest rank in rank-based complementation 0. Minimization of det autom 7. Minimization of nondet autom 0. Automata minimization 1.8s AutomataMinimizationTime, 7 MinimizatonAttempts, 10027 StatesRemovedByMinimization, 6 NontrivialMinimizations. Non-live state removal took 1.3s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1158 SdHoareTripleChecker+Valid, 0.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1158 mSDsluCounter, 2820 SdHoareTripleChecker+Invalid, 0.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1730 mSDsCounter, 120 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 476 IncrementalHoareTripleChecker+Invalid, 596 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 120 mSolverCounterUnsat, 1141 mSDtfsCounter, 476 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc0 concLT0 SILN4 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.1s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 791]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result={0:0}, \result={0:0}, \result=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b12=0, b2=0, b21=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6ed08118 in0,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7475c771 in31847,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@5a13ed8a=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@7ab8349b=0, t1={8926:0}, t2={8925:0}, X=0, x=2, x1=0, x2=0, y=1, y1=0, y2=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 791]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L700] 0 int x, y; [L701] 0 int b1, b2; [L702] 0 int X; [L844] 0 pthread_t t1, t2; [L845] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) [L704] COND TRUE 1 1 [L706] 1 b1 = 1 [L709] 1 x = 1 [L712] 1 int y1 = y; [L714] COND FALSE 1 !(y1 != 0) [L729] 1 y = 1 [L846] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) [L774] COND TRUE 2 1 [L776] 2 b2 = 1 [L779] 2 x = 2 [L782] 2 int y2 = y; [L784] COND TRUE 2 y2 != 0 [L786] 2 b2 = 0 [L789] 2 y2 = y Loop: [L791] COND TRUE y2 != 0 [L793] y2 = y End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-22 11:40:01,141 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...