/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf --buchiautomizer.automaton.type.for.concurrent.programs BUCHI_AUTOMATON -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-atomic/szymanski.i -------------------------------------------------------------------------------- This is Ultimate 0.2.3-?-9ecb849-m [2024-02-09 23:12:36,050 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-02-09 23:12:36,142 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf [2024-02-09 23:12:36,148 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-02-09 23:12:36,148 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-02-09 23:12:36,149 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.Only consider context switches at boundaries of atomic blocks [2024-02-09 23:12:36,231 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-02-09 23:12:36,232 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-02-09 23:12:36,233 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-02-09 23:12:36,237 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-02-09 23:12:36,237 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-02-09 23:12:36,237 INFO L153 SettingsManager]: * Use SBE=true [2024-02-09 23:12:36,260 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-02-09 23:12:36,260 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-02-09 23:12:36,261 INFO L153 SettingsManager]: * Use old map elimination=false [2024-02-09 23:12:36,261 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-02-09 23:12:36,261 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-02-09 23:12:36,261 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-02-09 23:12:36,262 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-02-09 23:12:36,262 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-02-09 23:12:36,262 INFO L153 SettingsManager]: * sizeof long=4 [2024-02-09 23:12:36,262 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-02-09 23:12:36,263 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-02-09 23:12:36,263 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-02-09 23:12:36,263 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-02-09 23:12:36,263 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-02-09 23:12:36,263 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-02-09 23:12:36,264 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-02-09 23:12:36,264 INFO L153 SettingsManager]: * sizeof long double=12 [2024-02-09 23:12:36,264 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-02-09 23:12:36,265 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-02-09 23:12:36,265 INFO L153 SettingsManager]: * Use constant arrays=true [2024-02-09 23:12:36,265 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-02-09 23:12:36,266 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-02-09 23:12:36,266 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-02-09 23:12:36,266 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-02-09 23:12:36,266 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-02-09 23:12:36,267 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-02-09 23:12:36,267 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: Automaton type for concurrent programs -> BUCHI_AUTOMATON [2024-02-09 23:12:36,575 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-02-09 23:12:36,601 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-02-09 23:12:36,605 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-02-09 23:12:36,606 INFO L270 PluginConnector]: Initializing CDTParser... [2024-02-09 23:12:36,606 INFO L274 PluginConnector]: CDTParser initialized [2024-02-09 23:12:36,607 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/szymanski.i [2024-02-09 23:12:37,779 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-02-09 23:12:38,019 INFO L384 CDTParser]: Found 1 translation units. [2024-02-09 23:12:38,019 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/szymanski.i [2024-02-09 23:12:38,033 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c99d95585/b83d4b7f5b6344fa9a47227aec1dc27c/FLAGc2f2b47fe [2024-02-09 23:12:38,050 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c99d95585/b83d4b7f5b6344fa9a47227aec1dc27c [2024-02-09 23:12:38,053 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-02-09 23:12:38,055 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-02-09 23:12:38,058 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-02-09 23:12:38,058 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-02-09 23:12:38,064 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-02-09 23:12:38,065 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,066 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c092773 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38, skipping insertion in model container [2024-02-09 23:12:38,066 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,125 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-02-09 23:12:38,301 WARN L635 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2024-02-09 23:12:38,474 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-02-09 23:12:38,487 INFO L202 MainTranslator]: Completed pre-run [2024-02-09 23:12:38,511 WARN L635 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2024-02-09 23:12:38,542 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-02-09 23:12:38,569 WARN L672 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-02-09 23:12:38,569 WARN L672 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-02-09 23:12:38,569 WARN L672 CHandler]: The function __builtin_bswap16 is called, but not defined or handled by StandardFunctionHandler. [2024-02-09 23:12:38,575 INFO L206 MainTranslator]: Completed translation [2024-02-09 23:12:38,576 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38 WrapperNode [2024-02-09 23:12:38,576 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-02-09 23:12:38,577 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-02-09 23:12:38,577 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-02-09 23:12:38,577 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-02-09 23:12:38,583 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,593 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,621 INFO L138 Inliner]: procedures = 171, calls = 77, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 179 [2024-02-09 23:12:38,621 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-02-09 23:12:38,622 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-02-09 23:12:38,622 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-02-09 23:12:38,622 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-02-09 23:12:38,631 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,632 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,635 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,635 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,639 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,643 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,645 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,646 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,649 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-02-09 23:12:38,649 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-02-09 23:12:38,649 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-02-09 23:12:38,649 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-02-09 23:12:38,650 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (1/1) ... [2024-02-09 23:12:38,655 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-02-09 23:12:38,672 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-02-09 23:12:38,687 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-02-09 23:12:38,692 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-02-09 23:12:38,721 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2024-02-09 23:12:38,722 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2024-02-09 23:12:38,722 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-02-09 23:12:38,722 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-02-09 23:12:38,723 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-02-09 23:12:38,723 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-02-09 23:12:38,725 WARN L210 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-02-09 23:12:38,844 INFO L236 CfgBuilder]: Building ICFG [2024-02-09 23:12:38,846 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2024-02-09 23:12:39,034 INFO L277 CfgBuilder]: Performing block encoding [2024-02-09 23:12:39,040 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-02-09 23:12:39,040 INFO L302 CfgBuilder]: Removed 8 assume(true) statements. [2024-02-09 23:12:39,050 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.02 11:12:39 BoogieIcfgContainer [2024-02-09 23:12:39,051 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-02-09 23:12:39,052 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-02-09 23:12:39,052 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-02-09 23:12:39,055 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-02-09 23:12:39,056 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-02-09 23:12:39,056 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.02 11:12:38" (1/3) ... [2024-02-09 23:12:39,057 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3f5c0d59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.02 11:12:39, skipping insertion in model container [2024-02-09 23:12:39,057 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-02-09 23:12:39,057 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.02 11:12:38" (2/3) ... [2024-02-09 23:12:39,057 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3f5c0d59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.02 11:12:39, skipping insertion in model container [2024-02-09 23:12:39,058 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-02-09 23:12:39,058 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.02 11:12:39" (3/3) ... [2024-02-09 23:12:39,059 INFO L332 chiAutomizerObserver]: Analyzing ICFG szymanski.i [2024-02-09 23:12:39,164 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2024-02-09 23:12:39,199 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 106 places, 123 transitions, 260 flow [2024-02-09 23:12:39,266 INFO L124 PetriNetUnfolderBase]: 22/119 cut-off events. [2024-02-09 23:12:39,266 INFO L125 PetriNetUnfolderBase]: For 2/2 co-relation queries the response was YES. [2024-02-09 23:12:39,272 INFO L83 FinitePrefix]: Finished finitePrefix Result has 128 conditions, 119 events. 22/119 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 182 event pairs, 0 based on Foata normal form. 0/97 useless extension candidates. Maximal degree in co-relation 91. Up to 3 conditions per place. [2024-02-09 23:12:39,272 INFO L82 GeneralOperation]: Start removeDead. Operand has 106 places, 123 transitions, 260 flow [2024-02-09 23:12:39,283 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 104 places, 119 transitions, 250 flow [2024-02-09 23:12:39,295 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2024-02-09 23:12:39,295 INFO L304 stractBuchiCegarLoop]: Hoare is false [2024-02-09 23:12:39,295 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-02-09 23:12:39,295 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-02-09 23:12:39,295 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-02-09 23:12:39,295 INFO L308 stractBuchiCegarLoop]: Difference is false [2024-02-09 23:12:39,295 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-02-09 23:12:39,296 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-02-09 23:12:39,298 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2024-02-09 23:12:39,748 INFO L131 ngComponentsAnalysis]: Automaton has 804 accepting balls. 1736 [2024-02-09 23:12:39,749 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-02-09 23:12:39,749 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-02-09 23:12:39,755 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-02-09 23:12:39,755 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-02-09 23:12:39,756 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-02-09 23:12:39,756 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 3896 states, but on-demand construction may add more states [2024-02-09 23:12:39,836 INFO L131 ngComponentsAnalysis]: Automaton has 804 accepting balls. 1736 [2024-02-09 23:12:39,836 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-02-09 23:12:39,836 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-02-09 23:12:39,837 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-02-09 23:12:39,838 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-02-09 23:12:39,850 INFO L748 eck$LassoCheckResult]: Stem: 109#[$Ultimate##0]don't care [243] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 112#[L-1]don't care [249] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 114#[L12]don't care [286] L12-->L12-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 116#[L12-1]don't care [304] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 118#[L12-2]don't care [303] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 120#[L12-3]don't care [320] L12-3-->L12-4: Formula: (and (= (select |v_#length_6| 2) 12) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 122#[L12-4]don't care [314] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 124#[L700]don't care [270] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 126#[L701]don't care [323] L701-->L-1-1: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 128#[L-1-1]don't care [328] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 130#[L-1-2]don't care [329] L-1-2-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_5|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_3|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_3|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 132#[L817]don't care [268] L817-->L817-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_7| 0)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_7| 0) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 4) |v_#length_7|) (= |v_#valid_12| (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 1)) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_7|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_7|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_7|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 134#[L817-1]don't care [283] L817-1-->L817-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_7|) (= 0 (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7|)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_7|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 1) |v_#valid_14|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_7| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_7|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_7|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 136#[L817-2]don't care [221] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 138#[L818]don't care [287] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 140#[L818-1]don't care [291] L818-1-->L818-2: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 142#[L818-2]don't care [420] L818-2-->$Ultimate##0: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_4| 0) (= |v_ULTIMATE.start_main_#t~pre4#1_7| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_#1.base_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_4|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_4|, thr1Thread1of1ForFork0_#res#1.offset=|v_thr1Thread1of1ForFork0_#res#1.offset_4|, thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_40|, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset_8|, thr1Thread1of1ForFork0_#res#1.base=|v_thr1Thread1of1ForFork0_#res#1.base_4|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_4|, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base_8|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_#in~_#1.base, thr1Thread1of1ForFork0_#res#1.offset, thr1Thread1of1ForFork0_~f21~0#1, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset, thr1Thread1of1ForFork0_#res#1.base, thr1Thread1of1ForFork0_~_#1.base, thr1Thread1of1ForFork0_#in~_#1.offset, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base] 144#[$Ultimate##0, L818-3]don't care [378] $Ultimate##0-->L703: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.base_1| |v_thr1Thread1of1ForFork0_~_#1.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_1| |v_thr1Thread1of1ForFork0_~_#1.offset_1|)) InVars {thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_1|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_~_#1.base] 146#[L703, L818-3]don't care [379] L703-->L705: Formula: (= v_~flag1~0_11 1) InVars {} OutVars{~flag1~0=v_~flag1~0_11} AuxVars[] AssignedVars[~flag1~0] 150#[L705, L818-3]don't care [380] L705-->L712: Formula: (= |v_thr1Thread1of1ForFork0_~f21~0#1_1| v_~flag2~0_8) InVars {~flag2~0=v_~flag2~0_8} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_1|, ~flag2~0=v_~flag2~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0#1] 156#[L712, L818-3]don't care [2024-02-09 23:12:39,854 INFO L750 eck$LassoCheckResult]: Loop: 156#[L712, L818-3]don't care [381] L712-->L710: Formula: (<= 3 |v_thr1Thread1of1ForFork0_~f21~0#1_3|) InVars {thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_3|} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_3|} AuxVars[] AssignedVars[] 164#[L710, L818-3]don't care [384] L710-->L712: Formula: (= |v_thr1Thread1of1ForFork0_~f21~0#1_7| v_~flag2~0_10) InVars {~flag2~0=v_~flag2~0_10} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_7|, ~flag2~0=v_~flag2~0_10} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0#1] 156#[L712, L818-3]don't care [2024-02-09 23:12:39,863 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:39,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1613535555, now seen corresponding path program 1 times [2024-02-09 23:12:39,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:39,872 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544461105] [2024-02-09 23:12:39,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:39,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:39,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:39,994 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:40,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:40,035 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:40,038 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:40,038 INFO L85 PathProgramCache]: Analyzing trace with hash 13156, now seen corresponding path program 1 times [2024-02-09 23:12:40,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:40,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699695539] [2024-02-09 23:12:40,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:40,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:40,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:40,057 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:40,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:40,062 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:40,063 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:40,063 INFO L85 PathProgramCache]: Analyzing trace with hash 124486694, now seen corresponding path program 1 times [2024-02-09 23:12:40,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:40,064 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037846370] [2024-02-09 23:12:40,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:40,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:40,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-02-09 23:12:40,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-02-09 23:12:40,272 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-02-09 23:12:40,272 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1037846370] [2024-02-09 23:12:40,272 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1037846370] provided 1 perfect and 0 imperfect interpolant sequences [2024-02-09 23:12:40,273 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-02-09 23:12:40,274 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-02-09 23:12:40,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151659744] [2024-02-09 23:12:40,275 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-02-09 23:12:40,308 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-02-09 23:12:40,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-02-09 23:12:40,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-02-09 23:12:40,350 INFO L87 Difference]: Start difference. First operand currently 3896 states, but on-demand construction may add more states Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:40,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-02-09 23:12:40,594 INFO L93 Difference]: Finished difference Result 5301 states and 15347 transitions. [2024-02-09 23:12:40,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5301 states and 15347 transitions. [2024-02-09 23:12:40,666 INFO L131 ngComponentsAnalysis]: Automaton has 948 accepting balls. 2024 [2024-02-09 23:12:40,736 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5301 states to 4507 states and 13210 transitions. [2024-02-09 23:12:40,738 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4507 [2024-02-09 23:12:40,749 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4507 [2024-02-09 23:12:40,750 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4507 states and 13210 transitions. [2024-02-09 23:12:40,771 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-02-09 23:12:40,771 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4507 states and 13210 transitions. [2024-02-09 23:12:40,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4507 states and 13210 transitions. [2024-02-09 23:12:41,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4507 to 3250. [2024-02-09 23:12:41,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3250 states, 3250 states have (on average 2.9673846153846153) internal successors, (9644), 3249 states have internal predecessors, (9644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:41,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3250 states to 3250 states and 9644 transitions. [2024-02-09 23:12:41,060 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3250 states and 9644 transitions. [2024-02-09 23:12:41,061 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-02-09 23:12:41,066 INFO L428 stractBuchiCegarLoop]: Abstraction has 3250 states and 9644 transitions. [2024-02-09 23:12:41,066 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-02-09 23:12:41,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3250 states and 9644 transitions. [2024-02-09 23:12:41,091 INFO L131 ngComponentsAnalysis]: Automaton has 712 accepting balls. 1552 [2024-02-09 23:12:41,092 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-02-09 23:12:41,092 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-02-09 23:12:41,093 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-02-09 23:12:41,093 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-02-09 23:12:41,094 INFO L748 eck$LassoCheckResult]: Stem: 14798#[$Ultimate##0]don't care [243] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 14800#[L-1]don't care [249] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 19410#[L12]don't care [286] L12-->L12-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 19412#[L12-1]don't care [304] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 17642#[L12-2]don't care [303] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 17644#[L12-3]don't care [320] L12-3-->L12-4: Formula: (and (= (select |v_#length_6| 2) 12) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 16280#[L12-4]don't care [314] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 16282#[L700]don't care [270] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 18406#[L701]don't care [323] L701-->L-1-1: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 17120#[L-1-1]don't care [328] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 17122#[L-1-2]don't care [329] L-1-2-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_5|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_3|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_3|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 13788#[L817]don't care [268] L817-->L817-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_7| 0)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_7| 0) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 4) |v_#length_7|) (= |v_#valid_12| (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 1)) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_7|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_7|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_7|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 13790#[L817-1]don't care [283] L817-1-->L817-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_7|) (= 0 (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7|)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_7|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 1) |v_#valid_14|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_7| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_7|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_7|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 19506#[L817-2]don't care [221] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 18462#[L818]don't care [287] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 18464#[L818-1]don't care [291] L818-1-->L818-2: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 13466#[L818-2]don't care [420] L818-2-->$Ultimate##0: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_4| 0) (= |v_ULTIMATE.start_main_#t~pre4#1_7| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_#1.base_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_4|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_4|, thr1Thread1of1ForFork0_#res#1.offset=|v_thr1Thread1of1ForFork0_#res#1.offset_4|, thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_40|, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset_8|, thr1Thread1of1ForFork0_#res#1.base=|v_thr1Thread1of1ForFork0_#res#1.base_4|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_4|, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base_8|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_#in~_#1.base, thr1Thread1of1ForFork0_#res#1.offset, thr1Thread1of1ForFork0_~f21~0#1, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset, thr1Thread1of1ForFork0_#res#1.base, thr1Thread1of1ForFork0_~_#1.base, thr1Thread1of1ForFork0_#in~_#1.offset, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base] 13468#[$Ultimate##0, L818-3]don't care [317] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 13864#[$Ultimate##0, L818-4]don't care [248] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 13866#[$Ultimate##0, L819]don't care [258] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_1| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 19340#[$Ultimate##0, L819-1]don't care [227] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 14294#[$Ultimate##0, L819-2]don't care [306] L819-2-->L819-3: Formula: (and (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre6#1_2|)))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_4|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_3|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 14296#[$Ultimate##0, L819-3]don't care [423] L819-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_7| v_thr2Thread1of1ForFork1_thidvar0_2) (= |v_thr2Thread1of1ForFork1_#in~_#1.base_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_thr2Thread1of1ForFork1_#in~_#1.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|, thr2Thread1of1ForFork1_#res#1.offset=|v_thr2Thread1of1ForFork1_#res#1.offset_4|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset_8|, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_40|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_4|, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_4|, thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base_8|, thr2Thread1of1ForFork1_#res#1.base=|v_thr2Thread1of1ForFork1_#res#1.base_4|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_#res#1.offset, thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset, thr2Thread1of1ForFork1_#in~_#1.base, thr2Thread1of1ForFork1_~_#1.offset, thr2Thread1of1ForFork1_~f12~0#1, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base, thr2Thread1of1ForFork1_#res#1.base, thr2Thread1of1ForFork1_#in~_#1.offset] 14312#[L819-4, $Ultimate##0, $Ultimate##0]don't care [338] $Ultimate##0-->L760: Formula: (and (= |v_thr2Thread1of1ForFork1_~_#1.base_1| |v_thr2Thread1of1ForFork1_#in~_#1.base_1|) (= |v_thr2Thread1of1ForFork1_~_#1.offset_1| |v_thr2Thread1of1ForFork1_#in~_#1.offset_1|)) InVars {thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} OutVars{thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_1|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_1|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_~_#1.offset] 19446#[L819-4, $Ultimate##0, L760]don't care [339] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 18158#[L819-4, $Ultimate##0, L762]don't care [340] L762-->L769: Formula: (= v_~flag1~0_1 |v_thr2Thread1of1ForFork1_~f12~0#1_1|) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0#1] 16184#[L819-4, L769, $Ultimate##0]don't care [2024-02-09 23:12:41,094 INFO L750 eck$LassoCheckResult]: Loop: 16184#[L819-4, L769, $Ultimate##0]don't care [341] L769-->L767: Formula: (<= 3 |v_thr2Thread1of1ForFork1_~f12~0#1_3|) InVars {thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_3|} OutVars{thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_3|} AuxVars[] AssignedVars[] 16182#[L819-4, L767, $Ultimate##0]don't care [344] L767-->L769: Formula: (= v_~flag1~0_3 |v_thr2Thread1of1ForFork1_~f12~0#1_7|) InVars {~flag1~0=v_~flag1~0_3} OutVars{~flag1~0=v_~flag1~0_3, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_7|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0#1] 16184#[L819-4, L769, $Ultimate##0]don't care [2024-02-09 23:12:41,095 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:41,095 INFO L85 PathProgramCache]: Analyzing trace with hash -477083126, now seen corresponding path program 1 times [2024-02-09 23:12:41,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:41,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610793717] [2024-02-09 23:12:41,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:41,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:41,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:41,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,155 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:41,156 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:41,156 INFO L85 PathProgramCache]: Analyzing trace with hash 11876, now seen corresponding path program 1 times [2024-02-09 23:12:41,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:41,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572955044] [2024-02-09 23:12:41,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:41,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:41,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:41,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,254 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:41,255 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:41,255 INFO L85 PathProgramCache]: Analyzing trace with hash 1084627501, now seen corresponding path program 1 times [2024-02-09 23:12:41,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:41,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446248478] [2024-02-09 23:12:41,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:41,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:41,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-02-09 23:12:41,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-02-09 23:12:41,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-02-09 23:12:41,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446248478] [2024-02-09 23:12:41,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446248478] provided 1 perfect and 0 imperfect interpolant sequences [2024-02-09 23:12:41,400 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-02-09 23:12:41,400 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-02-09 23:12:41,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439642446] [2024-02-09 23:12:41,401 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-02-09 23:12:41,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-02-09 23:12:41,416 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-02-09 23:12:41,416 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-02-09 23:12:41,417 INFO L87 Difference]: Start difference. First operand 3250 states and 9644 transitions. cyclomatic complexity: 7106 Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:41,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-02-09 23:12:41,564 INFO L93 Difference]: Finished difference Result 4765 states and 13866 transitions. [2024-02-09 23:12:41,564 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4765 states and 13866 transitions. [2024-02-09 23:12:41,611 INFO L131 ngComponentsAnalysis]: Automaton has 887 accepting balls. 1902 [2024-02-09 23:12:41,653 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4765 states to 4326 states and 12704 transitions. [2024-02-09 23:12:41,653 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4326 [2024-02-09 23:12:41,661 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4326 [2024-02-09 23:12:41,662 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4326 states and 12704 transitions. [2024-02-09 23:12:41,670 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-02-09 23:12:41,670 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4326 states and 12704 transitions. [2024-02-09 23:12:41,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4326 states and 12704 transitions. [2024-02-09 23:12:41,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4326 to 3288. [2024-02-09 23:12:41,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3288 states, 3288 states have (on average 2.968978102189781) internal successors, (9762), 3287 states have internal predecessors, (9762), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:41,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3288 states to 3288 states and 9762 transitions. [2024-02-09 23:12:41,837 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3288 states and 9762 transitions. [2024-02-09 23:12:41,838 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-02-09 23:12:41,838 INFO L428 stractBuchiCegarLoop]: Abstraction has 3288 states and 9762 transitions. [2024-02-09 23:12:41,838 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-02-09 23:12:41,839 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3288 states and 9762 transitions. [2024-02-09 23:12:41,858 INFO L131 ngComponentsAnalysis]: Automaton has 699 accepting balls. 1526 [2024-02-09 23:12:41,859 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-02-09 23:12:41,859 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-02-09 23:12:41,859 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-02-09 23:12:41,859 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-02-09 23:12:41,860 INFO L748 eck$LassoCheckResult]: Stem: 25848#[$Ultimate##0]don't care [243] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 25850#[L-1]don't care [249] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 30366#[L12]don't care [286] L12-->L12-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 30368#[L12-1]don't care [304] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 28488#[L12-2]don't care [303] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 28490#[L12-3]don't care [320] L12-3-->L12-4: Formula: (and (= (select |v_#length_6| 2) 12) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 27202#[L12-4]don't care [314] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 27204#[L700]don't care [270] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 29256#[L701]don't care [323] L701-->L-1-1: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 27990#[L-1-1]don't care [328] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 27992#[L-1-2]don't care [329] L-1-2-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_5|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_3|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_3|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 25020#[L817]don't care [268] L817-->L817-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_7| 0)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_7| 0) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 4) |v_#length_7|) (= |v_#valid_12| (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 1)) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_7|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_7|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_7|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 25022#[L817-1]don't care [283] L817-1-->L817-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_7|) (= 0 (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7|)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_7|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 1) |v_#valid_14|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_7| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_7|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_7|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 30472#[L817-2]don't care [221] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 29314#[L818]don't care [287] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 29316#[L818-1]don't care [291] L818-1-->L818-2: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 24722#[L818-2]don't care [420] L818-2-->$Ultimate##0: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_4| 0) (= |v_ULTIMATE.start_main_#t~pre4#1_7| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_#1.base_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_4|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_4|, thr1Thread1of1ForFork0_#res#1.offset=|v_thr1Thread1of1ForFork0_#res#1.offset_4|, thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_40|, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset_8|, thr1Thread1of1ForFork0_#res#1.base=|v_thr1Thread1of1ForFork0_#res#1.base_4|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_4|, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base_8|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_#in~_#1.base, thr1Thread1of1ForFork0_#res#1.offset, thr1Thread1of1ForFork0_~f21~0#1, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset, thr1Thread1of1ForFork0_#res#1.base, thr1Thread1of1ForFork0_~_#1.base, thr1Thread1of1ForFork0_#in~_#1.offset, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base] 24724#[$Ultimate##0, L818-3]don't care [378] $Ultimate##0-->L703: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.base_1| |v_thr1Thread1of1ForFork0_~_#1.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_1| |v_thr1Thread1of1ForFork0_~_#1.offset_1|)) InVars {thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_1|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_~_#1.base] 29632#[L703, L818-3]don't care [379] L703-->L705: Formula: (= v_~flag1~0_11 1) InVars {} OutVars{~flag1~0=v_~flag1~0_11} AuxVars[] AssignedVars[~flag1~0] 29634#[L705, L818-3]don't care [317] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 28448#[L818-4, L705]don't care [248] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 29652#[L819, L705]don't care [258] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_1| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 27600#[L819-1, L705]don't care [227] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 29230#[L819-2, L705]don't care [306] L819-2-->L819-3: Formula: (and (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre6#1_2|)))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_4|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_3|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 27154#[L819-3, L705]don't care [423] L819-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_7| v_thr2Thread1of1ForFork1_thidvar0_2) (= |v_thr2Thread1of1ForFork1_#in~_#1.base_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_thr2Thread1of1ForFork1_#in~_#1.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|, thr2Thread1of1ForFork1_#res#1.offset=|v_thr2Thread1of1ForFork1_#res#1.offset_4|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset_8|, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_40|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_4|, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_4|, thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base_8|, thr2Thread1of1ForFork1_#res#1.base=|v_thr2Thread1of1ForFork1_#res#1.base_4|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_#res#1.offset, thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset, thr2Thread1of1ForFork1_#in~_#1.base, thr2Thread1of1ForFork1_~_#1.offset, thr2Thread1of1ForFork1_~f12~0#1, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base, thr2Thread1of1ForFork1_#res#1.base, thr2Thread1of1ForFork1_#in~_#1.offset] 30430#[L819-4, $Ultimate##0, L705]don't care [338] $Ultimate##0-->L760: Formula: (and (= |v_thr2Thread1of1ForFork1_~_#1.base_1| |v_thr2Thread1of1ForFork1_#in~_#1.base_1|) (= |v_thr2Thread1of1ForFork1_~_#1.offset_1| |v_thr2Thread1of1ForFork1_#in~_#1.offset_1|)) InVars {thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} OutVars{thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_1|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_1|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_~_#1.offset] 25820#[L819-4, L705, L760]don't care [339] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 24808#[L819-4, L705, L762]don't care [340] L762-->L769: Formula: (= v_~flag1~0_1 |v_thr2Thread1of1ForFork1_~f12~0#1_1|) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0#1] 24810#[L819-4, L769, L705]don't care [2024-02-09 23:12:41,861 INFO L750 eck$LassoCheckResult]: Loop: 24810#[L819-4, L769, L705]don't care [341] L769-->L767: Formula: (<= 3 |v_thr2Thread1of1ForFork1_~f12~0#1_3|) InVars {thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_3|} OutVars{thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_3|} AuxVars[] AssignedVars[] 29104#[L819-4, L767, L705]don't care [344] L767-->L769: Formula: (= v_~flag1~0_3 |v_thr2Thread1of1ForFork1_~f12~0#1_7|) InVars {~flag1~0=v_~flag1~0_3} OutVars{~flag1~0=v_~flag1~0_3, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_7|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0#1] 24810#[L819-4, L769, L705]don't care [2024-02-09 23:12:41,861 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:41,861 INFO L85 PathProgramCache]: Analyzing trace with hash 851057129, now seen corresponding path program 1 times [2024-02-09 23:12:41,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:41,862 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730981201] [2024-02-09 23:12:41,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:41,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:41,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,885 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:41,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,903 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:41,904 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:41,904 INFO L85 PathProgramCache]: Analyzing trace with hash 11876, now seen corresponding path program 2 times [2024-02-09 23:12:41,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:41,904 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557703140] [2024-02-09 23:12:41,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:41,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:41,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,909 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:41,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:41,914 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:41,915 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:41,915 INFO L85 PathProgramCache]: Analyzing trace with hash 1822125644, now seen corresponding path program 1 times [2024-02-09 23:12:41,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:41,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932087221] [2024-02-09 23:12:41,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:41,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:41,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-02-09 23:12:42,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-02-09 23:12:42,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-02-09 23:12:42,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932087221] [2024-02-09 23:12:42,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [932087221] provided 1 perfect and 0 imperfect interpolant sequences [2024-02-09 23:12:42,014 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-02-09 23:12:42,014 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-02-09 23:12:42,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [541239568] [2024-02-09 23:12:42,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-02-09 23:12:42,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-02-09 23:12:42,027 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-02-09 23:12:42,027 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-02-09 23:12:42,027 INFO L87 Difference]: Start difference. First operand 3288 states and 9762 transitions. cyclomatic complexity: 7173 Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 4 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:42,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-02-09 23:12:42,194 INFO L93 Difference]: Finished difference Result 4509 states and 13129 transitions. [2024-02-09 23:12:42,195 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4509 states and 13129 transitions. [2024-02-09 23:12:42,241 INFO L131 ngComponentsAnalysis]: Automaton has 891 accepting balls. 1886 [2024-02-09 23:12:42,286 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4509 states to 4493 states and 13101 transitions. [2024-02-09 23:12:42,286 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4493 [2024-02-09 23:12:42,294 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4493 [2024-02-09 23:12:42,294 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4493 states and 13101 transitions. [2024-02-09 23:12:42,305 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-02-09 23:12:42,305 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4493 states and 13101 transitions. [2024-02-09 23:12:42,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4493 states and 13101 transitions. [2024-02-09 23:12:42,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4493 to 3288. [2024-02-09 23:12:42,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3288 states, 3288 states have (on average 2.942214111922141) internal successors, (9674), 3287 states have internal predecessors, (9674), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:42,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3288 states to 3288 states and 9674 transitions. [2024-02-09 23:12:42,426 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3288 states and 9674 transitions. [2024-02-09 23:12:42,427 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-02-09 23:12:42,428 INFO L428 stractBuchiCegarLoop]: Abstraction has 3288 states and 9674 transitions. [2024-02-09 23:12:42,428 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-02-09 23:12:42,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3288 states and 9674 transitions. [2024-02-09 23:12:42,491 INFO L131 ngComponentsAnalysis]: Automaton has 675 accepting balls. 1454 [2024-02-09 23:12:42,491 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-02-09 23:12:42,491 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-02-09 23:12:42,492 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-02-09 23:12:42,492 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-02-09 23:12:42,493 INFO L748 eck$LassoCheckResult]: Stem: 36912#[$Ultimate##0]don't care [243] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 36914#[L-1]don't care [249] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 41432#[L12]don't care [286] L12-->L12-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 41434#[L12-1]don't care [304] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 39512#[L12-2]don't care [303] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 39514#[L12-3]don't care [320] L12-3-->L12-4: Formula: (and (= (select |v_#length_6| 2) 12) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 38252#[L12-4]don't care [314] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 38254#[L700]don't care [270] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 40242#[L701]don't care [323] L701-->L-1-1: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 39012#[L-1-1]don't care [328] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 39014#[L-1-2]don't care [329] L-1-2-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_5|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_3|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_3|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 36094#[L817]don't care [268] L817-->L817-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_7| 0)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_7| 0) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 4) |v_#length_7|) (= |v_#valid_12| (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 1)) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_7|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_7|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_7|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 36096#[L817-1]don't care [283] L817-1-->L817-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_7|) (= 0 (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7|)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_7|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 1) |v_#valid_14|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_7| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_7|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_7|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 41542#[L817-2]don't care [221] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 40304#[L818]don't care [287] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 40306#[L818-1]don't care [291] L818-1-->L818-2: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 35816#[L818-2]don't care [420] L818-2-->$Ultimate##0: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_4| 0) (= |v_ULTIMATE.start_main_#t~pre4#1_7| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_#1.base_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_4|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_4|, thr1Thread1of1ForFork0_#res#1.offset=|v_thr1Thread1of1ForFork0_#res#1.offset_4|, thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_40|, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset_8|, thr1Thread1of1ForFork0_#res#1.base=|v_thr1Thread1of1ForFork0_#res#1.base_4|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_4|, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base_8|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_#in~_#1.base, thr1Thread1of1ForFork0_#res#1.offset, thr1Thread1of1ForFork0_~f21~0#1, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset, thr1Thread1of1ForFork0_#res#1.base, thr1Thread1of1ForFork0_~_#1.base, thr1Thread1of1ForFork0_#in~_#1.offset, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base] 35818#[$Ultimate##0, L818-3]don't care [378] $Ultimate##0-->L703: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.base_1| |v_thr1Thread1of1ForFork0_~_#1.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_1| |v_thr1Thread1of1ForFork0_~_#1.offset_1|)) InVars {thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_1|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_~_#1.base] 40650#[L703, L818-3]don't care [379] L703-->L705: Formula: (= v_~flag1~0_11 1) InVars {} OutVars{~flag1~0=v_~flag1~0_11} AuxVars[] AssignedVars[~flag1~0] 40652#[L705, L818-3]don't care [317] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 39462#[L818-4, L705]don't care [248] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 40670#[L819, L705]don't care [258] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_1| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 38650#[L819-1, L705]don't care [227] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 40216#[L819-2, L705]don't care [306] L819-2-->L819-3: Formula: (and (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre6#1_2|)))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_4|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_3|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 38206#[L819-3, L705]don't care [423] L819-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_7| v_thr2Thread1of1ForFork1_thidvar0_2) (= |v_thr2Thread1of1ForFork1_#in~_#1.base_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_thr2Thread1of1ForFork1_#in~_#1.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|, thr2Thread1of1ForFork1_#res#1.offset=|v_thr2Thread1of1ForFork1_#res#1.offset_4|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset_8|, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_40|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_4|, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_4|, thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base_8|, thr2Thread1of1ForFork1_#res#1.base=|v_thr2Thread1of1ForFork1_#res#1.base_4|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_#res#1.offset, thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset, thr2Thread1of1ForFork1_#in~_#1.base, thr2Thread1of1ForFork1_~_#1.offset, thr2Thread1of1ForFork1_~f12~0#1, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base, thr2Thread1of1ForFork1_#res#1.base, thr2Thread1of1ForFork1_#in~_#1.offset] 41498#[L819-4, $Ultimate##0, L705]don't care [338] $Ultimate##0-->L760: Formula: (and (= |v_thr2Thread1of1ForFork1_~_#1.base_1| |v_thr2Thread1of1ForFork1_#in~_#1.base_1|) (= |v_thr2Thread1of1ForFork1_~_#1.offset_1| |v_thr2Thread1of1ForFork1_#in~_#1.offset_1|)) InVars {thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} OutVars{thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_1|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_1|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_~_#1.offset] 36884#[L819-4, L705, L760]don't care [339] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 35900#[L819-4, L705, L762]don't care [380] L705-->L712: Formula: (= |v_thr1Thread1of1ForFork0_~f21~0#1_1| v_~flag2~0_8) InVars {~flag2~0=v_~flag2~0_8} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_1|, ~flag2~0=v_~flag2~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0#1] 35904#[L819-4, L712, L762]don't care [2024-02-09 23:12:42,494 INFO L750 eck$LassoCheckResult]: Loop: 35904#[L819-4, L712, L762]don't care [381] L712-->L710: Formula: (<= 3 |v_thr1Thread1of1ForFork0_~f21~0#1_3|) InVars {thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_3|} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_3|} AuxVars[] AssignedVars[] 41258#[L819-4, L762, L710]don't care [384] L710-->L712: Formula: (= |v_thr1Thread1of1ForFork0_~f21~0#1_7| v_~flag2~0_10) InVars {~flag2~0=v_~flag2~0_10} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_7|, ~flag2~0=v_~flag2~0_10} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0#1] 35904#[L819-4, L712, L762]don't care [2024-02-09 23:12:42,494 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:42,494 INFO L85 PathProgramCache]: Analyzing trace with hash 851057169, now seen corresponding path program 1 times [2024-02-09 23:12:42,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:42,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851679575] [2024-02-09 23:12:42,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:42,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:42,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,520 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:42,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,537 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:42,537 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:42,538 INFO L85 PathProgramCache]: Analyzing trace with hash 13156, now seen corresponding path program 2 times [2024-02-09 23:12:42,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:42,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582928809] [2024-02-09 23:12:42,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:42,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:42,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:42,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,544 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:42,545 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:42,545 INFO L85 PathProgramCache]: Analyzing trace with hash 1822165364, now seen corresponding path program 1 times [2024-02-09 23:12:42,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:42,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130012592] [2024-02-09 23:12:42,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:42,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:42,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-02-09 23:12:42,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-02-09 23:12:42,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-02-09 23:12:42,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130012592] [2024-02-09 23:12:42,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2130012592] provided 1 perfect and 0 imperfect interpolant sequences [2024-02-09 23:12:42,589 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-02-09 23:12:42,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-02-09 23:12:42,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631100476] [2024-02-09 23:12:42,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-02-09 23:12:42,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-02-09 23:12:42,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-02-09 23:12:42,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-02-09 23:12:42,602 INFO L87 Difference]: Start difference. First operand 3288 states and 9674 transitions. cyclomatic complexity: 7061 Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 4 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:42,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-02-09 23:12:42,699 INFO L93 Difference]: Finished difference Result 4427 states and 12795 transitions. [2024-02-09 23:12:42,700 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4427 states and 12795 transitions. [2024-02-09 23:12:42,738 INFO L131 ngComponentsAnalysis]: Automaton has 850 accepting balls. 1788 [2024-02-09 23:12:42,782 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4427 states to 4411 states and 12767 transitions. [2024-02-09 23:12:42,783 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4411 [2024-02-09 23:12:42,789 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4411 [2024-02-09 23:12:42,790 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4411 states and 12767 transitions. [2024-02-09 23:12:42,797 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-02-09 23:12:42,797 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4411 states and 12767 transitions. [2024-02-09 23:12:42,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4411 states and 12767 transitions. [2024-02-09 23:12:42,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4411 to 3300. [2024-02-09 23:12:42,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3300 states, 3300 states have (on average 2.91969696969697) internal successors, (9635), 3299 states have internal predecessors, (9635), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-02-09 23:12:42,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3300 states to 3300 states and 9635 transitions. [2024-02-09 23:12:42,896 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3300 states and 9635 transitions. [2024-02-09 23:12:42,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-02-09 23:12:42,898 INFO L428 stractBuchiCegarLoop]: Abstraction has 3300 states and 9635 transitions. [2024-02-09 23:12:42,898 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-02-09 23:12:42,899 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3300 states and 9635 transitions. [2024-02-09 23:12:42,946 INFO L131 ngComponentsAnalysis]: Automaton has 655 accepting balls. 1398 [2024-02-09 23:12:42,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-02-09 23:12:42,946 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-02-09 23:12:42,948 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-02-09 23:12:42,948 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-02-09 23:12:42,950 INFO L748 eck$LassoCheckResult]: Stem: 47884#[$Ultimate##0]don't care [243] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 47886#[L-1]don't care [249] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 52350#[L12]don't care [286] L12-->L12-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 52352#[L12-1]don't care [304] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 50442#[L12-2]don't care [303] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 50444#[L12-3]don't care [320] L12-3-->L12-4: Formula: (and (= (select |v_#length_6| 2) 12) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 49186#[L12-4]don't care [314] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 49188#[L700]don't care [270] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 51166#[L701]don't care [323] L701-->L-1-1: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 49922#[L-1-1]don't care [328] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 49924#[L-1-2]don't care [329] L-1-2-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_5|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_3|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_3|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 47092#[L817]don't care [268] L817-->L817-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_7| 0)) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_7| 0) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 4) |v_#length_7|) (= |v_#valid_12| (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7| 1)) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_7|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_7|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_7|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_7|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 47094#[L817-1]don't care [283] L817-1-->L817-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_7|) (= 0 (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7|)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_7|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_7| 1) |v_#valid_14|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_7| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_7|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_7|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 52494#[L817-2]don't care [221] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 51220#[L818]don't care [287] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 51222#[L818-1]don't care [291] L818-1-->L818-2: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 46824#[L818-2]don't care [420] L818-2-->$Ultimate##0: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_4| 0) (= |v_ULTIMATE.start_main_#t~pre4#1_7| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_#1.base_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_4|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_4|, thr1Thread1of1ForFork0_#res#1.offset=|v_thr1Thread1of1ForFork0_#res#1.offset_4|, thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_40|, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset_8|, thr1Thread1of1ForFork0_#res#1.base=|v_thr1Thread1of1ForFork0_#res#1.base_4|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_7|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_4|, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base=|v_thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base_8|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_#in~_#1.base, thr1Thread1of1ForFork0_#res#1.offset, thr1Thread1of1ForFork0_~f21~0#1, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.offset, thr1Thread1of1ForFork0_#res#1.base, thr1Thread1of1ForFork0_~_#1.base, thr1Thread1of1ForFork0_#in~_#1.offset, thr1Thread1of1ForFork0_reach_error_#t~nondet0#1.base] 46826#[$Ultimate##0, L818-3]don't care [378] $Ultimate##0-->L703: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~_#1.base_1| |v_thr1Thread1of1ForFork0_~_#1.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_#1.offset_1| |v_thr1Thread1of1ForFork0_~_#1.offset_1|)) InVars {thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|} OutVars{thr1Thread1of1ForFork0_~_#1.offset=|v_thr1Thread1of1ForFork0_~_#1.offset_1|, thr1Thread1of1ForFork0_#in~_#1.base=|v_thr1Thread1of1ForFork0_#in~_#1.base_1|, thr1Thread1of1ForFork0_~_#1.base=|v_thr1Thread1of1ForFork0_~_#1.base_1|, thr1Thread1of1ForFork0_#in~_#1.offset=|v_thr1Thread1of1ForFork0_#in~_#1.offset_1|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_#1.offset, thr1Thread1of1ForFork0_~_#1.base] 51570#[L703, L818-3]don't care [379] L703-->L705: Formula: (= v_~flag1~0_11 1) InVars {} OutVars{~flag1~0=v_~flag1~0_11} AuxVars[] AssignedVars[~flag1~0] 51572#[L705, L818-3]don't care [380] L705-->L712: Formula: (= |v_thr1Thread1of1ForFork0_~f21~0#1_1| v_~flag2~0_8) InVars {~flag2~0=v_~flag2~0_8} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_1|, ~flag2~0=v_~flag2~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0#1] 52420#[L712, L818-3]don't care [317] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 52572#[L818-4, L712]don't care [248] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 51588#[L819, L712]don't care [258] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_1| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 50160#[L819-1, L712]don't care [227] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 50162#[L819-2, L712]don't care [306] L819-2-->L819-3: Formula: (and (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre6#1_2|)))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_4|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_3|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 49166#[L819-3, L712]don't care [423] L819-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_7| v_thr2Thread1of1ForFork1_thidvar0_2) (= |v_thr2Thread1of1ForFork1_#in~_#1.base_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_thr2Thread1of1ForFork1_#in~_#1.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_7|, thr2Thread1of1ForFork1_#res#1.offset=|v_thr2Thread1of1ForFork1_#res#1.offset_4|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset_8|, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_40|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_4|, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_4|, thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_4|, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base=|v_thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base_8|, thr2Thread1of1ForFork1_#res#1.base=|v_thr2Thread1of1ForFork1_#res#1.base_4|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_#res#1.offset, thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.offset, thr2Thread1of1ForFork1_#in~_#1.base, thr2Thread1of1ForFork1_~_#1.offset, thr2Thread1of1ForFork1_~f12~0#1, thr2Thread1of1ForFork1_reach_error_#t~nondet0#1.base, thr2Thread1of1ForFork1_#res#1.base, thr2Thread1of1ForFork1_#in~_#1.offset] 49168#[L819-4, L712, $Ultimate##0]don't care [338] $Ultimate##0-->L760: Formula: (and (= |v_thr2Thread1of1ForFork1_~_#1.base_1| |v_thr2Thread1of1ForFork1_#in~_#1.base_1|) (= |v_thr2Thread1of1ForFork1_~_#1.offset_1| |v_thr2Thread1of1ForFork1_#in~_#1.offset_1|)) InVars {thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} OutVars{thr2Thread1of1ForFork1_~_#1.offset=|v_thr2Thread1of1ForFork1_~_#1.offset_1|, thr2Thread1of1ForFork1_~_#1.base=|v_thr2Thread1of1ForFork1_~_#1.base_1|, thr2Thread1of1ForFork1_#in~_#1.offset=|v_thr2Thread1of1ForFork1_#in~_#1.offset_1|, thr2Thread1of1ForFork1_#in~_#1.base=|v_thr2Thread1of1ForFork1_#in~_#1.base_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_#1.base, thr2Thread1of1ForFork1_~_#1.offset] 47858#[L819-4, L712, L760]don't care [339] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 46918#[L819-4, L712, L762]don't care [382] L712-->L709-1: Formula: (< |v_thr1Thread1of1ForFork0_~f21~0#1_5| 3) InVars {thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_5|} OutVars{thr1Thread1of1ForFork0_~f21~0#1=|v_thr1Thread1of1ForFork0_~f21~0#1_5|} AuxVars[] AssignedVars[] 52200#[L819-4, L709-1, L762]don't care [385] L709-1-->L716: Formula: (= v_~flag1~0_12 3) InVars {} OutVars{~flag1~0=v_~flag1~0_12} AuxVars[] AssignedVars[~flag1~0] 48376#[L819-4, L762, L716]don't care [340] L762-->L769: Formula: (= v_~flag1~0_1 |v_thr2Thread1of1ForFork1_~f12~0#1_1|) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_1|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0#1] 48380#[L819-4, L769, L716]don't care [2024-02-09 23:12:42,951 INFO L750 eck$LassoCheckResult]: Loop: 48380#[L819-4, L769, L716]don't care [341] L769-->L767: Formula: (<= 3 |v_thr2Thread1of1ForFork1_~f12~0#1_3|) InVars {thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_3|} OutVars{thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_3|} AuxVars[] AssignedVars[] 51332#[L819-4, L767, L716]don't care [344] L767-->L769: Formula: (= v_~flag1~0_3 |v_thr2Thread1of1ForFork1_~f12~0#1_7|) InVars {~flag1~0=v_~flag1~0_3} OutVars{~flag1~0=v_~flag1~0_3, thr2Thread1of1ForFork1_~f12~0#1=|v_thr2Thread1of1ForFork1_~f12~0#1_7|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0#1] 48380#[L819-4, L769, L716]don't care [2024-02-09 23:12:42,952 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:42,952 INFO L85 PathProgramCache]: Analyzing trace with hash -337554148, now seen corresponding path program 1 times [2024-02-09 23:12:42,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:42,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492022176] [2024-02-09 23:12:42,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:42,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,973 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:42,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,991 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:42,992 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:42,992 INFO L85 PathProgramCache]: Analyzing trace with hash 11876, now seen corresponding path program 3 times [2024-02-09 23:12:42,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:42,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92398735] [2024-02-09 23:12:42,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:42,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:42,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:42,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:42,998 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:42,999 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2024-02-09 23:12:42,999 INFO L85 PathProgramCache]: Analyzing trace with hash 2027989183, now seen corresponding path program 1 times [2024-02-09 23:12:42,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-02-09 23:12:42,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112846998] [2024-02-09 23:12:42,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-02-09 23:12:43,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-02-09 23:12:43,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:43,018 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:43,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:43,033 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-02-09 23:12:43,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:43,881 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-02-09 23:12:43,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-02-09 23:12:43,959 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.02 11:12:43 BoogieIcfgContainer [2024-02-09 23:12:43,959 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2024-02-09 23:12:43,960 INFO L158 Benchmark]: Toolchain (without parser) took 5905.37ms. Allocated memory was 166.7MB in the beginning and 654.3MB in the end (delta: 487.6MB). Free memory was 84.3MB in the beginning and 428.3MB in the end (delta: -344.0MB). Peak memory consumption was 144.7MB. Max. memory is 8.0GB. [2024-02-09 23:12:43,960 INFO L158 Benchmark]: CDTParser took 0.83ms. Allocated memory is still 166.7MB. Free memory is still 131.1MB. There was no memory consumed. Max. memory is 8.0GB. [2024-02-09 23:12:43,961 INFO L158 Benchmark]: CACSL2BoogieTranslator took 518.49ms. Allocated memory is still 166.7MB. Free memory was 84.3MB in the beginning and 122.9MB in the end (delta: -38.6MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2024-02-09 23:12:43,961 INFO L158 Benchmark]: Boogie Procedure Inliner took 44.49ms. Allocated memory is still 166.7MB. Free memory was 122.9MB in the beginning and 120.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-02-09 23:12:43,962 INFO L158 Benchmark]: Boogie Preprocessor took 26.61ms. Allocated memory is still 166.7MB. Free memory was 120.8MB in the beginning and 119.2MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-02-09 23:12:43,962 INFO L158 Benchmark]: RCFGBuilder took 401.56ms. Allocated memory is still 166.7MB. Free memory was 119.2MB in the beginning and 103.5MB in the end (delta: 15.7MB). Peak memory consumption was 15.7MB. Max. memory is 8.0GB. [2024-02-09 23:12:43,963 INFO L158 Benchmark]: BuchiAutomizer took 4907.76ms. Allocated memory was 166.7MB in the beginning and 654.3MB in the end (delta: 487.6MB). Free memory was 103.5MB in the beginning and 428.3MB in the end (delta: -324.9MB). Peak memory consumption was 164.3MB. Max. memory is 8.0GB. [2024-02-09 23:12:43,965 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.83ms. Allocated memory is still 166.7MB. Free memory is still 131.1MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 518.49ms. Allocated memory is still 166.7MB. Free memory was 84.3MB in the beginning and 122.9MB in the end (delta: -38.6MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 44.49ms. Allocated memory is still 166.7MB. Free memory was 122.9MB in the beginning and 120.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 26.61ms. Allocated memory is still 166.7MB. Free memory was 120.8MB in the beginning and 119.2MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 401.56ms. Allocated memory is still 166.7MB. Free memory was 119.2MB in the beginning and 103.5MB in the end (delta: 15.7MB). Peak memory consumption was 15.7MB. Max. memory is 8.0GB. * BuchiAutomizer took 4907.76ms. Allocated memory was 166.7MB in the beginning and 654.3MB in the end (delta: 487.6MB). Free memory was 103.5MB in the beginning and 428.3MB in the end (delta: -324.9MB). Peak memory consumption was 164.3MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 4 terminating modules (4 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.4 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 3300 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.7s and 5 iterations. TraceHistogramMax:1. Analysis of lassos took 2.0s. Construction of modules took 0.2s. Büchi inclusion checks took 1.6s. Highest rank in rank-based complementation 0. Minimization of det autom 4. Minimization of nondet autom 0. Automata minimization 0.7s AutomataMinimizationTime, 4 MinimizatonAttempts, 4611 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.4s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 485 SdHoareTripleChecker+Valid, 0.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 485 mSDsluCounter, 1292 SdHoareTripleChecker+Invalid, 0.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 741 mSDsCounter, 70 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 305 IncrementalHoareTripleChecker+Invalid, 375 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 70 mSolverCounterUnsat, 551 mSDtfsCounter, 305 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc4 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.1s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 766]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L700] 0 int flag1 = 0, flag2 = 0; VAL [flag1=0, flag2=0] [L701] 0 int x; VAL [flag1=0, flag2=0, x=0] [L817] 0 pthread_t t1, t2; VAL [flag1=0, flag2=0, t1={23033:0}, t2={23034:0}, x=0] [L818] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [flag1=0, flag2=0, pthread_create(&t1, 0, thr1, 0)=18696, t1={23033:0}, t2={23034:0}, x=0] [L704] 1 flag1 = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=0, x=0] [L707] 1 int f21 = flag2; VAL [_={0:0}, _={0:0}, f21=0, flag1=1, flag2=0, x=0] [L819] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [flag1=1, flag2=0, pthread_create(&t2, 0, thr2, 0)=18697, t1={23033:0}, t2={23034:0}, x=0] [L761] 2 flag2 = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=1, x=0] [L709] COND FALSE 1 !(f21 >= 3) VAL [_={0:0}, _={0:0}, f21=0, flag1=1, flag2=1, x=0] [L715] 1 flag1 = 3 VAL [_={0:0}, _={0:0}, f21=0, flag1=3, flag2=1, x=0] [L764] 2 int f12 = flag1; VAL [_={0:0}, _={0:0}, f12=3, flag1=3, flag2=1, x=0] Loop: [L766] COND TRUE f12 >= 3 [L768] f12 = flag1 End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 766]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L700] 0 int flag1 = 0, flag2 = 0; VAL [flag1=0, flag2=0] [L701] 0 int x; VAL [flag1=0, flag2=0, x=0] [L817] 0 pthread_t t1, t2; VAL [flag1=0, flag2=0, t1={23033:0}, t2={23034:0}, x=0] [L818] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [flag1=0, flag2=0, pthread_create(&t1, 0, thr1, 0)=18696, t1={23033:0}, t2={23034:0}, x=0] [L704] 1 flag1 = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=0, x=0] [L707] 1 int f21 = flag2; VAL [_={0:0}, _={0:0}, f21=0, flag1=1, flag2=0, x=0] [L819] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [flag1=1, flag2=0, pthread_create(&t2, 0, thr2, 0)=18697, t1={23033:0}, t2={23034:0}, x=0] [L761] 2 flag2 = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=1, x=0] [L709] COND FALSE 1 !(f21 >= 3) VAL [_={0:0}, _={0:0}, f21=0, flag1=1, flag2=1, x=0] [L715] 1 flag1 = 3 VAL [_={0:0}, _={0:0}, f21=0, flag1=3, flag2=1, x=0] [L764] 2 int f12 = flag1; VAL [_={0:0}, _={0:0}, f12=3, flag1=3, flag2=1, x=0] Loop: [L766] COND TRUE f12 >= 3 [L768] f12 = flag1 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2024-02-09 23:12:44,046 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...