/root/.sdkman/candidates/java/21.0.5-tem/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -i ../../../trunk/examples/svcomp/ldv-races/race-4_1-thread_local_vars.i -------------------------------------------------------------------------------- This is Ultimate 0.3.0-wip.dk.ample-buchi-a4216cd-m [2025-04-26 16:03:31,909 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-04-26 16:03:31,949 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2025-04-26 16:03:31,956 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-04-26 16:03:31,956 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-04-26 16:03:31,976 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-04-26 16:03:31,977 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-04-26 16:03:31,977 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * Use SBE=true [2025-04-26 16:03:31,977 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * Use old map elimination=false [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-04-26 16:03:31,977 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-04-26 16:03:31,978 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * sizeof long=4 [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * sizeof long double=12 [2025-04-26 16:03:31,978 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-04-26 16:03:31,980 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-04-26 16:03:31,980 INFO L153 SettingsManager]: * Use constant arrays=true [2025-04-26 16:03:31,980 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-04-26 16:03:31,980 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-26 16:03:31,980 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-04-26 16:03:31,980 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-04-26 16:03:31,980 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-04-26 16:03:31,980 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR [2025-04-26 16:03:32,201 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-04-26 16:03:32,207 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-04-26 16:03:32,209 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-04-26 16:03:32,209 INFO L270 PluginConnector]: Initializing CDTParser... [2025-04-26 16:03:32,209 INFO L274 PluginConnector]: CDTParser initialized [2025-04-26 16:03:32,210 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/ldv-races/race-4_1-thread_local_vars.i [2025-04-26 16:03:33,455 INFO L538 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/90e8fc39a/d7c53da475d241578a9fec7a980591d8/FLAGbc13cf214 [2025-04-26 16:03:33,720 INFO L389 CDTParser]: Found 1 translation units. [2025-04-26 16:03:33,721 INFO L178 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-races/race-4_1-thread_local_vars.i [2025-04-26 16:03:33,743 INFO L432 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/90e8fc39a/d7c53da475d241578a9fec7a980591d8/FLAGbc13cf214 [2025-04-26 16:03:34,456 INFO L440 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/90e8fc39a/d7c53da475d241578a9fec7a980591d8 [2025-04-26 16:03:34,458 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-04-26 16:03:34,459 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2025-04-26 16:03:34,459 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-04-26 16:03:34,459 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-04-26 16:03:34,463 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-04-26 16:03:34,464 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.04 04:03:34" (1/1) ... [2025-04-26 16:03:34,464 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1ea8f09e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:34, skipping insertion in model container [2025-04-26 16:03:34,464 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.04 04:03:34" (1/1) ... [2025-04-26 16:03:34,496 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-04-26 16:03:34,983 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-26 16:03:34,997 INFO L200 MainTranslator]: Completed pre-run [2025-04-26 16:03:35,066 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-26 16:03:35,139 INFO L204 MainTranslator]: Completed translation [2025-04-26 16:03:35,139 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35 WrapperNode [2025-04-26 16:03:35,140 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-04-26 16:03:35,140 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-04-26 16:03:35,140 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-04-26 16:03:35,140 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-04-26 16:03:35,146 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,176 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,199 INFO L138 Inliner]: procedures = 487, calls = 37, calls flagged for inlining = 16, calls inlined = 21, statements flattened = 202 [2025-04-26 16:03:35,199 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-04-26 16:03:35,199 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-04-26 16:03:35,199 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-04-26 16:03:35,199 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-04-26 16:03:35,203 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,203 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,206 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,207 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,216 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,218 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,220 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,222 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,223 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,232 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-04-26 16:03:35,233 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-04-26 16:03:35,233 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-04-26 16:03:35,233 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-04-26 16:03:35,234 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (1/1) ... [2025-04-26 16:03:35,241 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-04-26 16:03:35,253 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-26 16:03:35,265 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-04-26 16:03:35,268 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure thread_usb [2025-04-26 16:03:35,283 INFO L138 BoogieDeclarations]: Found implementation of procedure thread_usb [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure thread_ath9k [2025-04-26 16:03:35,283 INFO L138 BoogieDeclarations]: Found implementation of procedure thread_ath9k [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-04-26 16:03:35,283 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexUnlock [2025-04-26 16:03:35,283 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2025-04-26 16:03:35,284 WARN L203 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2025-04-26 16:03:35,463 INFO L234 CfgBuilder]: Building ICFG [2025-04-26 16:03:35,464 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-04-26 16:03:35,627 INFO L279 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2025-04-26 16:03:35,628 INFO L283 CfgBuilder]: Performing block encoding [2025-04-26 16:03:35,663 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-04-26 16:03:35,663 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2025-04-26 16:03:35,664 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.04 04:03:35 BoogieIcfgContainer [2025-04-26 16:03:35,664 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-04-26 16:03:35,664 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-04-26 16:03:35,664 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-04-26 16:03:35,671 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-04-26 16:03:35,671 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-04-26 16:03:35,671 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.04 04:03:34" (1/3) ... [2025-04-26 16:03:35,672 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@24716083 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.04 04:03:35, skipping insertion in model container [2025-04-26 16:03:35,672 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-04-26 16:03:35,672 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 04:03:35" (2/3) ... [2025-04-26 16:03:35,672 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@24716083 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.04 04:03:35, skipping insertion in model container [2025-04-26 16:03:35,672 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-04-26 16:03:35,672 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.04 04:03:35" (3/3) ... [2025-04-26 16:03:35,673 INFO L376 chiAutomizerObserver]: Analyzing ICFG race-4_1-thread_local_vars.i [2025-04-26 16:03:35,748 INFO L143 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2025-04-26 16:03:35,775 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 289 places, 327 transitions, 681 flow [2025-04-26 16:03:35,846 INFO L116 PetriNetUnfolderBase]: 39/333 cut-off events. [2025-04-26 16:03:35,849 INFO L117 PetriNetUnfolderBase]: For 3/3 co-relation queries the response was YES. [2025-04-26 16:03:35,855 INFO L83 FinitePrefix]: Finished finitePrefix Result has 344 conditions, 333 events. 39/333 cut-off events. For 3/3 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 899 event pairs, 0 based on Foata normal form. 0/290 useless extension candidates. Maximal degree in co-relation 221. Up to 11 conditions per place. [2025-04-26 16:03:35,855 INFO L82 GeneralOperation]: Start removeDead. Operand has 289 places, 327 transitions, 681 flow [2025-04-26 16:03:35,862 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 207 places, 229 transitions, 474 flow [2025-04-26 16:03:35,862 INFO L84 lAbstractionProvider]: Constructed initial Petri net abstraction that has has 207 places, 229 transitions, 474 flow [2025-04-26 16:03:35,872 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-04-26 16:03:35,872 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-04-26 16:03:35,872 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-04-26 16:03:35,872 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-04-26 16:03:35,872 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-04-26 16:03:35,872 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-04-26 16:03:35,872 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-04-26 16:03:35,872 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-04-26 16:03:35,873 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2025-04-26 16:03:37,212 INFO L131 ngComponentsAnalysis]: Automaton has 438 accepting balls. 31506 [2025-04-26 16:03:37,212 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 16:03:37,212 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 16:03:37,218 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 16:03:37,218 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 16:03:37,218 INFO L340 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-04-26 16:03:37,218 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 33294 states, but on-demand construction may add more states [2025-04-26 16:03:37,625 INFO L131 ngComponentsAnalysis]: Automaton has 438 accepting balls. 31506 [2025-04-26 16:03:37,625 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 16:03:37,625 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 16:03:37,626 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 16:03:37,626 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 16:03:37,631 INFO L752 eck$LassoCheckResult]: Stem: "[496] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[]" "[510] L-1-->L1691: Formula: (< 0 |v_#StackHeapBarrier_2|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|} AuxVars[] AssignedVars[]" "[486] L1691-->L1691-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_7| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[]" "[562] L1691-1-->L1691-2: Formula: (= (select (select |v_#memory_int_3| 1) 0) 48) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[]" "[363] L1691-2-->L1691-3: Formula: (= (select (select |v_#memory_int_4| 1) 1) 0) InVars {#memory_int=|v_#memory_int_4|} OutVars{#memory_int=|v_#memory_int_4|} AuxVars[] AssignedVars[]" "[419] L1691-3-->L1691-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 29 (select |v_#length_5| 2))) InVars {#length=|v_#length_5|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[]" "[432] L1691-4-->L1694: Formula: (= v_~t1~0_1 0) InVars {} OutVars{~t1~0=v_~t1~0_1} AuxVars[] AssignedVars[~t1~0]" "[569] L1694-->L1695: Formula: (= v_~t2~0_1 0) InVars {} OutVars{~t2~0=v_~t2~0_1} AuxVars[] AssignedVars[~t2~0]" "[450] L1695-->L1695-1: Formula: (and (= (select |v_#length_6| 3) 24) (= (select |v_#valid_9| 3) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[]" "[358] L1695-1-->L1695-2: Formula: (and (= 3 |v_~#mutex~0.base_3|) (= |v_~#mutex~0.offset_3| 0)) InVars {} OutVars{~#mutex~0.base=|v_~#mutex~0.base_3|, ~#mutex~0.offset=|v_~#mutex~0.offset_3|} AuxVars[] AssignedVars[~#mutex~0.base, ~#mutex~0.offset]" "[474] L1695-2-->L1695-3: Formula: (= (select (select |v_#memory_int_5| |v_~#mutex~0.base_4|) |v_~#mutex~0.offset_4|) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_4|, ~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_5|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_4|, ~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[]" "[538] L1695-3-->L1695-4: Formula: (= (select (select |v_#memory_int_6| |v_~#mutex~0.base_5|) (+ |v_~#mutex~0.offset_5| 4)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_5|, ~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_6|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_5|, ~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[]" "[509] L1695-4-->L1695-5: Formula: (= (select (select |v_#memory_int_7| |v_~#mutex~0.base_6|) (+ |v_~#mutex~0.offset_6| 8)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_6|, ~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_7|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_6|, ~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[]" "[501] L1695-5-->L1695-6: Formula: (= (select (select |v_#memory_int_8| |v_~#mutex~0.base_7|) (+ |v_~#mutex~0.offset_7| 12)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_7|, ~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_8|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_7|, ~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[]" "[572] L1695-6-->L1695-7: Formula: (= (select (select |v_#memory_int_9| |v_~#mutex~0.base_8|) (+ |v_~#mutex~0.offset_8| 16)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_8|, ~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_9|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_8|, ~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_9|} AuxVars[] AssignedVars[]" "[530] L1695-7-->L1741: Formula: (= v_~pdev~0_5 0) InVars {} OutVars{~pdev~0=v_~pdev~0_5} AuxVars[] AssignedVars[~pdev~0]" "[546] L1741-->L-1-1: Formula: (= v_~ldv_usb_state~0_1 0) InVars {} OutVars{~ldv_usb_state~0=v_~ldv_usb_state~0_1} AuxVars[] AssignedVars[~ldv_usb_state~0]" "[576] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[580] L-1-2-->L1796: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ret47#1=|v_ULTIMATE.start_main_#t~ret47#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret47#1]" "[374] L1796-->L1796-1: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#res#1=|v_ULTIMATE.start_module_init_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#res#1]" "[571] L1796-1-->L1776: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_2|, ULTIMATE.start_module_init_#t~nondet45#1=|v_ULTIMATE.start_module_init_#t~nondet45#1_2|, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet43#1, ULTIMATE.start_module_init_#t~pre44#1, ULTIMATE.start_module_init_#t~nondet45#1]" "[537] L1776-->L1777: Formula: (= |v_#pthreadsMutex_5| (store |v_#pthreadsMutex_6| |v_~#mutex~0.base_9| (store (select |v_#pthreadsMutex_6| |v_~#mutex~0.base_9|) |v_~#mutex~0.offset_9| 0))) InVars {~#mutex~0.base=|v_~#mutex~0.base_9|, ~#mutex~0.offset=|v_~#mutex~0.offset_9|, #pthreadsMutex=|v_#pthreadsMutex_6|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_9|, ~#mutex~0.offset=|v_~#mutex~0.offset_9|, #pthreadsMutex=|v_#pthreadsMutex_5|} AuxVars[] AssignedVars[#pthreadsMutex]" "[365] L1777-->L1778: Formula: (= v_~pdev~0_6 1) InVars {} OutVars{~pdev~0=v_~pdev~0_6} AuxVars[] AssignedVars[~pdev~0]" "[494] L1778-->L1778-1: Formula: (= (ite (= v_~pdev~0_7 1) 1 0) |v_ULTIMATE.start_ldv_assert_#in~expression#1_5|) InVars {~pdev~0=v_~pdev~0_7} OutVars{~pdev~0=v_~pdev~0_7, ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression#1]" "[387] L1778-1-->L1693: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_9|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression#1]" "[451] L1693-->L1693-1: Formula: (= |v_ULTIMATE.start_ldv_assert_~expression#1_10| |v_ULTIMATE.start_ldv_assert_#in~expression#1_6|) InVars {ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_6|} OutVars{ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_6|, ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_10|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression#1]" "[461] L1693-1-->L1693-5: Formula: (not (= |v_ULTIMATE.start_ldv_assert_~expression#1_12| 0)) InVars {ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_12|} OutVars{ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_12|} AuxVars[] AssignedVars[]" "[368] L1693-5-->L1778-2: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_13|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression#1]" "[471] L1778-2-->L1779: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression#1]" "[409] L1779-->L1779-1: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet43#1]" "[477] L1779-1-->L1779-2: Formula: (not (= |v_ULTIMATE.start_module_init_#t~nondet43#1_4| 0)) InVars {ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_4|} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_4|} AuxVars[] AssignedVars[]" "[378] L1779-2-->L1780: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet43#1]" "[551] L1780-->L1780-1: Formula: (= |v_ULTIMATE.start_module_init_#t~pre44#1_3| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~pre44#1]" "[577] L1780-1-->L1780-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[514] L1780-2-->L1780-3: Formula: (= |v_ULTIMATE.start_module_init_#t~pre44#1_4| v_~t1~0_2) InVars {ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_4|} OutVars{~t1~0=v_~t1~0_2, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_4|} AuxVars[] AssignedVars[~t1~0]" "[720] L1780-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_module_init_#t~pre44#1_7| v_thread_usbThread1of1ForFork1_thidvar0_2) (= |v_thread_usbThread1of1ForFork1_#in~arg#1.offset_4| 0) (= v_thread_usbThread1of1ForFork1_thidvar2_2 0) (= v_thread_usbThread1of1ForFork1_thidvar1_2 0) (= |v_thread_usbThread1of1ForFork1_#in~arg#1.base_4| 0)) InVars {ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_7|} OutVars{thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.offset=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.offset_12|, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.offset=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.offset_10|, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_7|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#res#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#res#1_10|, thread_usbThread1of1ForFork1_#res#1.base=|v_thread_usbThread1of1ForFork1_#res#1.base_4|, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.base=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.base_14|, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.base=|v_thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.base_10|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet37#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet37#1_8|, thread_usbThread1of1ForFork1_thidvar0=v_thread_usbThread1of1ForFork1_thidvar0_2, thread_usbThread1of1ForFork1_#in~arg#1.base=|v_thread_usbThread1of1ForFork1_#in~arg#1.base_4|, thread_usbThread1of1ForFork1_thidvar2=v_thread_usbThread1of1ForFork1_thidvar2_2, thread_usbThread1of1ForFork1_#t~ret42#1=|v_thread_usbThread1of1ForFork1_#t~ret42#1_8|, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.offset=|v_thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.offset_10|, thread_usbThread1of1ForFork1_ldv_assert_~expression#1=|v_thread_usbThread1of1ForFork1_ldv_assert_~expression#1_22|, thread_usbThread1of1ForFork1_~arg#1.base=|v_thread_usbThread1of1ForFork1_~arg#1.base_4|, thread_usbThread1of1ForFork1_ldv_assert_#in~expression#1=|v_thread_usbThread1of1ForFork1_ldv_assert_#in~expression#1_14|, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.base=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.base_10|, thread_usbThread1of1ForFork1_ath_ahb_probe_~error~0#1=|v_thread_usbThread1of1ForFork1_ath_ahb_probe_~error~0#1_14|, thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_14|, thread_usbThread1of1ForFork1_ath_ahb_probe_#t~ret39#1=|v_thread_usbThread1of1ForFork1_ath_ahb_probe_#t~ret39#1_12|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~pre36#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~pre36#1_12|, thread_usbThread1of1ForFork1_thidvar1=v_thread_usbThread1of1ForFork1_thidvar1_2, thread_usbThread1of1ForFork1_#res#1.offset=|v_thread_usbThread1of1ForFork1_#res#1.offset_4|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet35#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet35#1_16|, thread_usbThread1of1ForFork1_ath_ahb_probe_#res#1=|v_thread_usbThread1of1ForFork1_ath_ahb_probe_#res#1_10|, thread_usbThread1of1ForFork1_~probe_ret~0#1=|v_thread_usbThread1of1ForFork1_~probe_ret~0#1_10|, thread_usbThread1of1ForFork1_~arg#1.offset=|v_thread_usbThread1of1ForFork1_~arg#1.offset_4|, thread_usbThread1of1ForFork1_#in~arg#1.offset=|v_thread_usbThread1of1ForFork1_#in~arg#1.offset_4|, thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_28|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.offset, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.offset, thread_usbThread1of1ForFork1_ieee80211_register_hw_#res#1, thread_usbThread1of1ForFork1_#res#1.base, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.base, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.base, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet37#1, thread_usbThread1of1ForFork1_thidvar0, thread_usbThread1of1ForFork1_#in~arg#1.base, thread_usbThread1of1ForFork1_thidvar2, thread_usbThread1of1ForFork1_#t~ret42#1, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.offset, thread_usbThread1of1ForFork1_ldv_assert_~expression#1, thread_usbThread1of1ForFork1_~arg#1.base, thread_usbThread1of1ForFork1_ldv_assert_#in~expression#1, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.base, thread_usbThread1of1ForFork1_ath_ahb_probe_~error~0#1, thread_usbThread1of1ForFork1_#t~nondet40#1, thread_usbThread1of1ForFork1_ath_ahb_probe_#t~ret39#1, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~pre36#1, thread_usbThread1of1ForFork1_thidvar1, thread_usbThread1of1ForFork1_#res#1.offset, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet35#1, thread_usbThread1of1ForFork1_ath_ahb_probe_#res#1, thread_usbThread1of1ForFork1_~probe_ret~0#1, thread_usbThread1of1ForFork1_~arg#1.offset, thread_usbThread1of1ForFork1_#in~arg#1.offset, thread_usbThread1of1ForFork1_#t~switch41#1]" "[619] $Ultimate##0-->L1743: Formula: (and (= |v_thread_usbThread1of1ForFork1_~arg#1.base_1| |v_thread_usbThread1of1ForFork1_#in~arg#1.base_1|) (= |v_thread_usbThread1of1ForFork1_#in~arg#1.offset_1| |v_thread_usbThread1of1ForFork1_~arg#1.offset_1|)) InVars {thread_usbThread1of1ForFork1_#in~arg#1.base=|v_thread_usbThread1of1ForFork1_#in~arg#1.base_1|, thread_usbThread1of1ForFork1_#in~arg#1.offset=|v_thread_usbThread1of1ForFork1_#in~arg#1.offset_1|} OutVars{thread_usbThread1of1ForFork1_#in~arg#1.base=|v_thread_usbThread1of1ForFork1_#in~arg#1.base_1|, thread_usbThread1of1ForFork1_~arg#1.offset=|v_thread_usbThread1of1ForFork1_~arg#1.offset_1|, thread_usbThread1of1ForFork1_#in~arg#1.offset=|v_thread_usbThread1of1ForFork1_#in~arg#1.offset_1|, thread_usbThread1of1ForFork1_~arg#1.base=|v_thread_usbThread1of1ForFork1_~arg#1.base_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_~arg#1.offset, thread_usbThread1of1ForFork1_~arg#1.base]" "[620] L1743-->L1744: Formula: (= v_~ldv_usb_state~0_9 0) InVars {} OutVars{~ldv_usb_state~0=v_~ldv_usb_state~0_9} AuxVars[] AssignedVars[~ldv_usb_state~0]" "[621] L1744-->L1745-1: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_~probe_ret~0#1=|v_thread_usbThread1of1ForFork1_~probe_ret~0#1_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_~probe_ret~0#1]" [2025-04-26 16:03:37,632 INFO L754 eck$LassoCheckResult]: Loop: "[623] L1745-1-->L1747: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~nondet40#1]" "[625] L1747-->L1747-1: Formula: (let ((.cse0 (= |v_thread_usbThread1of1ForFork1_#t~nondet40#1_3| 0))) (or (and .cse0 |v_thread_usbThread1of1ForFork1_#t~switch41#1_1|) (and (not .cse0) (not |v_thread_usbThread1of1ForFork1_#t~switch41#1_1|)))) InVars {thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_3|} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_3|, thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" "[627] L1747-1-->L1747-2: Formula: |v_thread_usbThread1of1ForFork1_#t~switch41#1_3| InVars {thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_3|} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_3|} AuxVars[] AssignedVars[]" "[631] L1747-2-->L1746: Formula: (not (= v_~ldv_usb_state~0_3 0)) InVars {~ldv_usb_state~0=v_~ldv_usb_state~0_3} OutVars{~ldv_usb_state~0=v_~ldv_usb_state~0_3} AuxVars[] AssignedVars[]" "[635] L1746-->L1746-1: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_7|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~nondet40#1]" "[641] L1746-1-->L1746-2: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_15|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" "[648] L1746-2-->L1746-3: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_11|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~nondet40#1]" "[656] L1746-3-->L1745-1: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_25|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" [2025-04-26 16:03:37,635 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 16:03:37,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1276157317, now seen corresponding path program 1 times [2025-04-26 16:03:37,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 16:03:37,642 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643720343] [2025-04-26 16:03:37,642 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 16:03:37,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 16:03:37,756 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-04-26 16:03:37,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-04-26 16:03:37,785 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:37,785 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:37,786 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 16:03:37,792 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-04-26 16:03:37,803 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-04-26 16:03:37,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:37,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:37,826 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 16:03:37,830 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 16:03:37,830 INFO L85 PathProgramCache]: Analyzing trace with hash -651417931, now seen corresponding path program 1 times [2025-04-26 16:03:37,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 16:03:37,830 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646473518] [2025-04-26 16:03:37,831 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 16:03:37,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 16:03:37,875 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-04-26 16:03:37,876 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-04-26 16:03:37,876 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:37,876 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:37,876 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 16:03:37,881 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-04-26 16:03:37,884 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-04-26 16:03:37,888 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:37,889 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:37,891 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 16:03:37,895 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 16:03:37,895 INFO L85 PathProgramCache]: Analyzing trace with hash -2137456583, now seen corresponding path program 1 times [2025-04-26 16:03:37,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 16:03:37,895 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116011669] [2025-04-26 16:03:37,895 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 16:03:37,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 16:03:37,916 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-04-26 16:03:37,921 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-04-26 16:03:37,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:37,921 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-26 16:03:38,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-26 16:03:38,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-26 16:03:38,045 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [116011669] [2025-04-26 16:03:38,046 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [116011669] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-26 16:03:38,046 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-26 16:03:38,046 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-26 16:03:38,047 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1887574021] [2025-04-26 16:03:38,047 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-26 16:03:38,096 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-26 16:03:38,114 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-26 16:03:38,115 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-26 16:03:38,117 INFO L87 Difference]: Start difference. First operand currently 33294 states, but on-demand construction may add more states Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (in total 47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 16:03:38,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-04-26 16:03:38,501 INFO L93 Difference]: Finished difference Result 30403 states and 91609 transitions. [2025-04-26 16:03:38,502 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30403 states and 91609 transitions. [2025-04-26 16:03:38,729 INFO L131 ngComponentsAnalysis]: Automaton has 500 accepting balls. 27512 [2025-04-26 16:03:39,098 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30403 states to 28528 states and 86488 transitions. [2025-04-26 16:03:39,099 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28528 [2025-04-26 16:03:39,143 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28528 [2025-04-26 16:03:39,144 INFO L74 IsDeterministic]: Start isDeterministic. Operand 28528 states and 86488 transitions. [2025-04-26 16:03:39,216 INFO L81 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-04-26 16:03:39,217 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28528 states and 86488 transitions. [2025-04-26 16:03:39,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28528 states and 86488 transitions. [2025-04-26 16:03:39,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28528 to 28528. [2025-04-26 16:03:39,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28528 states, 28528 states have (on average 3.031688166012339) internal successors, (in total 86488), 28527 states have internal predecessors, (86488), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 16:03:40,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28528 states to 28528 states and 86488 transitions. [2025-04-26 16:03:40,039 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28528 states and 86488 transitions. [2025-04-26 16:03:40,040 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-26 16:03:40,044 INFO L438 stractBuchiCegarLoop]: Abstraction has 28528 states and 86488 transitions. [2025-04-26 16:03:40,044 INFO L340 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-04-26 16:03:40,044 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28528 states and 86488 transitions. [2025-04-26 16:03:40,274 INFO L131 ngComponentsAnalysis]: Automaton has 500 accepting balls. 27512 [2025-04-26 16:03:40,275 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 16:03:40,275 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 16:03:40,278 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 16:03:40,278 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 16:03:40,279 INFO L752 eck$LassoCheckResult]: Stem: "[496] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[]" "[510] L-1-->L1691: Formula: (< 0 |v_#StackHeapBarrier_2|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|} AuxVars[] AssignedVars[]" "[486] L1691-->L1691-1: Formula: (and (= 2 (select |v_#length_4| 1)) (= (select |v_#valid_7| 1) 1)) InVars {#length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_4|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[]" "[562] L1691-1-->L1691-2: Formula: (= (select (select |v_#memory_int_3| 1) 0) 48) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[]" "[363] L1691-2-->L1691-3: Formula: (= (select (select |v_#memory_int_4| 1) 1) 0) InVars {#memory_int=|v_#memory_int_4|} OutVars{#memory_int=|v_#memory_int_4|} AuxVars[] AssignedVars[]" "[419] L1691-3-->L1691-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 29 (select |v_#length_5| 2))) InVars {#length=|v_#length_5|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[]" "[432] L1691-4-->L1694: Formula: (= v_~t1~0_1 0) InVars {} OutVars{~t1~0=v_~t1~0_1} AuxVars[] AssignedVars[~t1~0]" "[569] L1694-->L1695: Formula: (= v_~t2~0_1 0) InVars {} OutVars{~t2~0=v_~t2~0_1} AuxVars[] AssignedVars[~t2~0]" "[450] L1695-->L1695-1: Formula: (and (= (select |v_#length_6| 3) 24) (= (select |v_#valid_9| 3) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_9|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[]" "[358] L1695-1-->L1695-2: Formula: (and (= 3 |v_~#mutex~0.base_3|) (= |v_~#mutex~0.offset_3| 0)) InVars {} OutVars{~#mutex~0.base=|v_~#mutex~0.base_3|, ~#mutex~0.offset=|v_~#mutex~0.offset_3|} AuxVars[] AssignedVars[~#mutex~0.base, ~#mutex~0.offset]" "[474] L1695-2-->L1695-3: Formula: (= (select (select |v_#memory_int_5| |v_~#mutex~0.base_4|) |v_~#mutex~0.offset_4|) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_4|, ~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_5|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_4|, ~#mutex~0.offset=|v_~#mutex~0.offset_4|, #memory_int=|v_#memory_int_5|} AuxVars[] AssignedVars[]" "[538] L1695-3-->L1695-4: Formula: (= (select (select |v_#memory_int_6| |v_~#mutex~0.base_5|) (+ |v_~#mutex~0.offset_5| 4)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_5|, ~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_6|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_5|, ~#mutex~0.offset=|v_~#mutex~0.offset_5|, #memory_int=|v_#memory_int_6|} AuxVars[] AssignedVars[]" "[509] L1695-4-->L1695-5: Formula: (= (select (select |v_#memory_int_7| |v_~#mutex~0.base_6|) (+ |v_~#mutex~0.offset_6| 8)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_6|, ~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_7|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_6|, ~#mutex~0.offset=|v_~#mutex~0.offset_6|, #memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[]" "[501] L1695-5-->L1695-6: Formula: (= (select (select |v_#memory_int_8| |v_~#mutex~0.base_7|) (+ |v_~#mutex~0.offset_7| 12)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_7|, ~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_8|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_7|, ~#mutex~0.offset=|v_~#mutex~0.offset_7|, #memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[]" "[572] L1695-6-->L1695-7: Formula: (= (select (select |v_#memory_int_9| |v_~#mutex~0.base_8|) (+ |v_~#mutex~0.offset_8| 16)) 0) InVars {~#mutex~0.base=|v_~#mutex~0.base_8|, ~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_9|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_8|, ~#mutex~0.offset=|v_~#mutex~0.offset_8|, #memory_int=|v_#memory_int_9|} AuxVars[] AssignedVars[]" "[530] L1695-7-->L1741: Formula: (= v_~pdev~0_5 0) InVars {} OutVars{~pdev~0=v_~pdev~0_5} AuxVars[] AssignedVars[~pdev~0]" "[546] L1741-->L-1-1: Formula: (= v_~ldv_usb_state~0_1 0) InVars {} OutVars{~ldv_usb_state~0=v_~ldv_usb_state~0_1} AuxVars[] AssignedVars[~ldv_usb_state~0]" "[576] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[580] L-1-2-->L1796: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~ret47#1=|v_ULTIMATE.start_main_#t~ret47#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ret47#1]" "[374] L1796-->L1796-1: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#res#1=|v_ULTIMATE.start_module_init_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#res#1]" "[571] L1796-1-->L1776: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_2|, ULTIMATE.start_module_init_#t~nondet45#1=|v_ULTIMATE.start_module_init_#t~nondet45#1_2|, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet43#1, ULTIMATE.start_module_init_#t~pre44#1, ULTIMATE.start_module_init_#t~nondet45#1]" "[537] L1776-->L1777: Formula: (= |v_#pthreadsMutex_5| (store |v_#pthreadsMutex_6| |v_~#mutex~0.base_9| (store (select |v_#pthreadsMutex_6| |v_~#mutex~0.base_9|) |v_~#mutex~0.offset_9| 0))) InVars {~#mutex~0.base=|v_~#mutex~0.base_9|, ~#mutex~0.offset=|v_~#mutex~0.offset_9|, #pthreadsMutex=|v_#pthreadsMutex_6|} OutVars{~#mutex~0.base=|v_~#mutex~0.base_9|, ~#mutex~0.offset=|v_~#mutex~0.offset_9|, #pthreadsMutex=|v_#pthreadsMutex_5|} AuxVars[] AssignedVars[#pthreadsMutex]" "[365] L1777-->L1778: Formula: (= v_~pdev~0_6 1) InVars {} OutVars{~pdev~0=v_~pdev~0_6} AuxVars[] AssignedVars[~pdev~0]" "[494] L1778-->L1778-1: Formula: (= (ite (= v_~pdev~0_7 1) 1 0) |v_ULTIMATE.start_ldv_assert_#in~expression#1_5|) InVars {~pdev~0=v_~pdev~0_7} OutVars{~pdev~0=v_~pdev~0_7, ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression#1]" "[387] L1778-1-->L1693: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_9|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression#1]" "[451] L1693-->L1693-1: Formula: (= |v_ULTIMATE.start_ldv_assert_~expression#1_10| |v_ULTIMATE.start_ldv_assert_#in~expression#1_6|) InVars {ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_6|} OutVars{ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_6|, ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_10|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression#1]" "[461] L1693-1-->L1693-5: Formula: (not (= |v_ULTIMATE.start_ldv_assert_~expression#1_12| 0)) InVars {ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_12|} OutVars{ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_12|} AuxVars[] AssignedVars[]" "[368] L1693-5-->L1778-2: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_~expression#1=|v_ULTIMATE.start_ldv_assert_~expression#1_13|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_~expression#1]" "[471] L1778-2-->L1779: Formula: true InVars {} OutVars{ULTIMATE.start_ldv_assert_#in~expression#1=|v_ULTIMATE.start_ldv_assert_#in~expression#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_ldv_assert_#in~expression#1]" "[409] L1779-->L1779-1: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet43#1]" "[477] L1779-1-->L1779-2: Formula: (not (= |v_ULTIMATE.start_module_init_#t~nondet43#1_4| 0)) InVars {ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_4|} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_4|} AuxVars[] AssignedVars[]" "[378] L1779-2-->L1780: Formula: true InVars {} OutVars{ULTIMATE.start_module_init_#t~nondet43#1=|v_ULTIMATE.start_module_init_#t~nondet43#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~nondet43#1]" "[551] L1780-->L1780-1: Formula: (= |v_ULTIMATE.start_module_init_#t~pre44#1_3| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_module_init_#t~pre44#1]" "[577] L1780-1-->L1780-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[514] L1780-2-->L1780-3: Formula: (= |v_ULTIMATE.start_module_init_#t~pre44#1_4| v_~t1~0_2) InVars {ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_4|} OutVars{~t1~0=v_~t1~0_2, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_4|} AuxVars[] AssignedVars[~t1~0]" "[720] L1780-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_module_init_#t~pre44#1_7| v_thread_usbThread1of1ForFork1_thidvar0_2) (= |v_thread_usbThread1of1ForFork1_#in~arg#1.offset_4| 0) (= v_thread_usbThread1of1ForFork1_thidvar2_2 0) (= v_thread_usbThread1of1ForFork1_thidvar1_2 0) (= |v_thread_usbThread1of1ForFork1_#in~arg#1.base_4| 0)) InVars {ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_7|} OutVars{thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.offset=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.offset_12|, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.offset=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.offset_10|, ULTIMATE.start_module_init_#t~pre44#1=|v_ULTIMATE.start_module_init_#t~pre44#1_7|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#res#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#res#1_10|, thread_usbThread1of1ForFork1_#res#1.base=|v_thread_usbThread1of1ForFork1_#res#1.base_4|, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.base=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.base_14|, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.base=|v_thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.base_10|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet37#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet37#1_8|, thread_usbThread1of1ForFork1_thidvar0=v_thread_usbThread1of1ForFork1_thidvar0_2, thread_usbThread1of1ForFork1_#in~arg#1.base=|v_thread_usbThread1of1ForFork1_#in~arg#1.base_4|, thread_usbThread1of1ForFork1_thidvar2=v_thread_usbThread1of1ForFork1_thidvar2_2, thread_usbThread1of1ForFork1_#t~ret42#1=|v_thread_usbThread1of1ForFork1_#t~ret42#1_8|, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.offset=|v_thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.offset_10|, thread_usbThread1of1ForFork1_ldv_assert_~expression#1=|v_thread_usbThread1of1ForFork1_ldv_assert_~expression#1_22|, thread_usbThread1of1ForFork1_~arg#1.base=|v_thread_usbThread1of1ForFork1_~arg#1.base_4|, thread_usbThread1of1ForFork1_ldv_assert_#in~expression#1=|v_thread_usbThread1of1ForFork1_ldv_assert_#in~expression#1_14|, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.base=|v_thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.base_10|, thread_usbThread1of1ForFork1_ath_ahb_probe_~error~0#1=|v_thread_usbThread1of1ForFork1_ath_ahb_probe_~error~0#1_14|, thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_14|, thread_usbThread1of1ForFork1_ath_ahb_probe_#t~ret39#1=|v_thread_usbThread1of1ForFork1_ath_ahb_probe_#t~ret39#1_12|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~pre36#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~pre36#1_12|, thread_usbThread1of1ForFork1_thidvar1=v_thread_usbThread1of1ForFork1_thidvar1_2, thread_usbThread1of1ForFork1_#res#1.offset=|v_thread_usbThread1of1ForFork1_#res#1.offset_4|, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet35#1=|v_thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet35#1_16|, thread_usbThread1of1ForFork1_ath_ahb_probe_#res#1=|v_thread_usbThread1of1ForFork1_ath_ahb_probe_#res#1_10|, thread_usbThread1of1ForFork1_~probe_ret~0#1=|v_thread_usbThread1of1ForFork1_~probe_ret~0#1_10|, thread_usbThread1of1ForFork1_~arg#1.offset=|v_thread_usbThread1of1ForFork1_~arg#1.offset_4|, thread_usbThread1of1ForFork1_#in~arg#1.offset=|v_thread_usbThread1of1ForFork1_#in~arg#1.offset_4|, thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_28|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.offset, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.offset, thread_usbThread1of1ForFork1_ieee80211_register_hw_#res#1, thread_usbThread1of1ForFork1_#res#1.base, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_~#status~0#1.base, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.base, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet37#1, thread_usbThread1of1ForFork1_thidvar0, thread_usbThread1of1ForFork1_#in~arg#1.base, thread_usbThread1of1ForFork1_thidvar2, thread_usbThread1of1ForFork1_#t~ret42#1, thread_usbThread1of1ForFork1_reach_error_#t~nondet30#1.offset, thread_usbThread1of1ForFork1_ldv_assert_~expression#1, thread_usbThread1of1ForFork1_~arg#1.base, thread_usbThread1of1ForFork1_ldv_assert_#in~expression#1, thread_usbThread1of1ForFork1_ieee80211_deregister_hw_#t~ret38#1.base, thread_usbThread1of1ForFork1_ath_ahb_probe_~error~0#1, thread_usbThread1of1ForFork1_#t~nondet40#1, thread_usbThread1of1ForFork1_ath_ahb_probe_#t~ret39#1, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~pre36#1, thread_usbThread1of1ForFork1_thidvar1, thread_usbThread1of1ForFork1_#res#1.offset, thread_usbThread1of1ForFork1_ieee80211_register_hw_#t~nondet35#1, thread_usbThread1of1ForFork1_ath_ahb_probe_#res#1, thread_usbThread1of1ForFork1_~probe_ret~0#1, thread_usbThread1of1ForFork1_~arg#1.offset, thread_usbThread1of1ForFork1_#in~arg#1.offset, thread_usbThread1of1ForFork1_#t~switch41#1]" "[619] $Ultimate##0-->L1743: Formula: (and (= |v_thread_usbThread1of1ForFork1_~arg#1.base_1| |v_thread_usbThread1of1ForFork1_#in~arg#1.base_1|) (= |v_thread_usbThread1of1ForFork1_#in~arg#1.offset_1| |v_thread_usbThread1of1ForFork1_~arg#1.offset_1|)) InVars {thread_usbThread1of1ForFork1_#in~arg#1.base=|v_thread_usbThread1of1ForFork1_#in~arg#1.base_1|, thread_usbThread1of1ForFork1_#in~arg#1.offset=|v_thread_usbThread1of1ForFork1_#in~arg#1.offset_1|} OutVars{thread_usbThread1of1ForFork1_#in~arg#1.base=|v_thread_usbThread1of1ForFork1_#in~arg#1.base_1|, thread_usbThread1of1ForFork1_~arg#1.offset=|v_thread_usbThread1of1ForFork1_~arg#1.offset_1|, thread_usbThread1of1ForFork1_#in~arg#1.offset=|v_thread_usbThread1of1ForFork1_#in~arg#1.offset_1|, thread_usbThread1of1ForFork1_~arg#1.base=|v_thread_usbThread1of1ForFork1_~arg#1.base_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_~arg#1.offset, thread_usbThread1of1ForFork1_~arg#1.base]" "[620] L1743-->L1744: Formula: (= v_~ldv_usb_state~0_9 0) InVars {} OutVars{~ldv_usb_state~0=v_~ldv_usb_state~0_9} AuxVars[] AssignedVars[~ldv_usb_state~0]" "[621] L1744-->L1745-1: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_~probe_ret~0#1=|v_thread_usbThread1of1ForFork1_~probe_ret~0#1_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_~probe_ret~0#1]" [2025-04-26 16:03:40,280 INFO L754 eck$LassoCheckResult]: Loop: "[623] L1745-1-->L1747: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~nondet40#1]" "[625] L1747-->L1747-1: Formula: (let ((.cse0 (= |v_thread_usbThread1of1ForFork1_#t~nondet40#1_3| 0))) (or (and .cse0 |v_thread_usbThread1of1ForFork1_#t~switch41#1_1|) (and (not .cse0) (not |v_thread_usbThread1of1ForFork1_#t~switch41#1_1|)))) InVars {thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_3|} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_3|, thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_1|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" "[628] L1747-1-->L1755: Formula: (not |v_thread_usbThread1of1ForFork1_#t~switch41#1_5|) InVars {thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_5|} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_5|} AuxVars[] AssignedVars[]" "[632] L1755-->L1755-1: Formula: (let ((.cse0 (= |v_thread_usbThread1of1ForFork1_#t~nondet40#1_5| 1))) (or (and |v_thread_usbThread1of1ForFork1_#t~switch41#1_8| (or |v_thread_usbThread1of1ForFork1_#t~switch41#1_7| .cse0)) (and (not |v_thread_usbThread1of1ForFork1_#t~switch41#1_8|) (not .cse0) (not |v_thread_usbThread1of1ForFork1_#t~switch41#1_7|)))) InVars {thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_5|, thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_7|} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_5|, thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_8|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" "[636] L1755-1-->L1755-2: Formula: |v_thread_usbThread1of1ForFork1_#t~switch41#1_11| InVars {thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_11|} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_11|} AuxVars[] AssignedVars[]" "[643] L1755-2-->L1746: Formula: (not (= v_~ldv_usb_state~0_6 1)) InVars {~ldv_usb_state~0=v_~ldv_usb_state~0_6} OutVars{~ldv_usb_state~0=v_~ldv_usb_state~0_6} AuxVars[] AssignedVars[]" "[635] L1746-->L1746-1: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_7|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~nondet40#1]" "[641] L1746-1-->L1746-2: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_15|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" "[648] L1746-2-->L1746-3: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~nondet40#1=|v_thread_usbThread1of1ForFork1_#t~nondet40#1_11|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~nondet40#1]" "[656] L1746-3-->L1745-1: Formula: true InVars {} OutVars{thread_usbThread1of1ForFork1_#t~switch41#1=|v_thread_usbThread1of1ForFork1_#t~switch41#1_25|} AuxVars[] AssignedVars[thread_usbThread1of1ForFork1_#t~switch41#1]" [2025-04-26 16:03:40,280 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 16:03:40,280 INFO L85 PathProgramCache]: Analyzing trace with hash 1276157317, now seen corresponding path program 2 times [2025-04-26 16:03:40,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 16:03:40,280 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938211812] [2025-04-26 16:03:40,280 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-26 16:03:40,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 16:03:40,298 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 39 statements into 1 equivalence classes. [2025-04-26 16:03:40,306 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-04-26 16:03:40,306 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-04-26 16:03:40,306 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,306 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 16:03:40,309 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-04-26 16:03:40,313 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-04-26 16:03:40,313 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,314 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,322 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 16:03:40,322 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 16:03:40,322 INFO L85 PathProgramCache]: Analyzing trace with hash -581964516, now seen corresponding path program 1 times [2025-04-26 16:03:40,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 16:03:40,322 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436562399] [2025-04-26 16:03:40,322 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 16:03:40,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 16:03:40,333 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-04-26 16:03:40,334 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-04-26 16:03:40,334 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,334 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,334 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 16:03:40,335 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-04-26 16:03:40,339 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-04-26 16:03:40,340 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,340 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,344 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 16:03:40,344 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 16:03:40,344 INFO L85 PathProgramCache]: Analyzing trace with hash 1559000480, now seen corresponding path program 1 times [2025-04-26 16:03:40,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 16:03:40,345 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954490328] [2025-04-26 16:03:40,345 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 16:03:40,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 16:03:40,364 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-04-26 16:03:40,370 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-04-26 16:03:40,370 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,370 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,370 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 16:03:40,373 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-04-26 16:03:40,380 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-04-26 16:03:40,380 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,380 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,393 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 16:03:40,916 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-04-26 16:03:40,921 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-04-26 16:03:40,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,921 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:40,921 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 16:03:40,930 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-04-26 16:03:40,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-04-26 16:03:40,938 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 16:03:40,938 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 16:03:41,010 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.04 04:03:41 BoogieIcfgContainer [2025-04-26 16:03:41,011 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-04-26 16:03:41,012 INFO L158 Benchmark]: Toolchain (without parser) took 6553.40ms. Allocated memory was 167.8MB in the beginning and 1.0GB in the end (delta: 880.8MB). Free memory was 115.2MB in the beginning and 621.0MB in the end (delta: -505.8MB). Peak memory consumption was 377.2MB. Max. memory is 8.0GB. [2025-04-26 16:03:41,012 INFO L158 Benchmark]: CDTParser took 0.16ms. Allocated memory is still 163.6MB. Free memory is still 92.0MB. There was no memory consumed. Max. memory is 8.0GB. [2025-04-26 16:03:41,012 INFO L158 Benchmark]: CACSL2BoogieTranslator took 680.46ms. Allocated memory is still 167.8MB. Free memory was 115.2MB in the beginning and 57.2MB in the end (delta: 58.0MB). Peak memory consumption was 58.7MB. Max. memory is 8.0GB. [2025-04-26 16:03:41,013 INFO L158 Benchmark]: Boogie Procedure Inliner took 58.76ms. Allocated memory is still 167.8MB. Free memory was 57.2MB in the beginning and 53.6MB in the end (delta: 3.6MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2025-04-26 16:03:41,013 INFO L158 Benchmark]: Boogie Preprocessor took 33.30ms. Allocated memory is still 167.8MB. Free memory was 53.6MB in the beginning and 51.0MB in the end (delta: 2.6MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2025-04-26 16:03:41,013 INFO L158 Benchmark]: RCFGBuilder took 430.66ms. Allocated memory is still 167.8MB. Free memory was 51.0MB in the beginning and 113.4MB in the end (delta: -62.4MB). Peak memory consumption was 33.8MB. Max. memory is 8.0GB. [2025-04-26 16:03:41,013 INFO L158 Benchmark]: BuchiAutomizer took 5346.99ms. Allocated memory was 167.8MB in the beginning and 1.0GB in the end (delta: 880.8MB). Free memory was 113.4MB in the beginning and 621.0MB in the end (delta: -507.5MB). Peak memory consumption was 372.8MB. Max. memory is 8.0GB. [2025-04-26 16:03:41,015 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16ms. Allocated memory is still 163.6MB. Free memory is still 92.0MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 680.46ms. Allocated memory is still 167.8MB. Free memory was 115.2MB in the beginning and 57.2MB in the end (delta: 58.0MB). Peak memory consumption was 58.7MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 58.76ms. Allocated memory is still 167.8MB. Free memory was 57.2MB in the beginning and 53.6MB in the end (delta: 3.6MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * Boogie Preprocessor took 33.30ms. Allocated memory is still 167.8MB. Free memory was 53.6MB in the beginning and 51.0MB in the end (delta: 2.6MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * RCFGBuilder took 430.66ms. Allocated memory is still 167.8MB. Free memory was 51.0MB in the beginning and 113.4MB in the end (delta: -62.4MB). Peak memory consumption was 33.8MB. Max. memory is 8.0GB. * BuchiAutomizer took 5346.99ms. Allocated memory was 167.8MB in the beginning and 1.0GB in the end (delta: 880.8MB). Free memory was 113.4MB in the beginning and 621.0MB in the end (delta: -507.5MB). Peak memory consumption was 372.8MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 5.1s and 2 iterations. TraceHistogramMax:1. Analysis of lassos took 1.1s. Construction of modules took 0.0s. Büchi inclusion checks took 1.9s. Highest rank in rank-based complementation 0. Minimization of det autom 1. Minimization of nondet autom 0. Automata minimization 0.8s AutomataMinimizationTime, 1 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 167 SdHoareTripleChecker+Valid, 0.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 167 mSDsluCounter, 273 SdHoareTripleChecker+Invalid, 0.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 80 mSDsCounter, 6 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 19 IncrementalHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 6 mSolverCounterUnsat, 193 mSDtfsCounter, 19 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc1 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.1s InitialAbstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 1 terminating modules (1 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.1 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 28528 locations. - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 1745]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L1694] 0 pthread_t t1, t2; VAL [t1=0, t2=0] [L1695] 0 pthread_mutex_t mutex; VAL [mutex={3:0}, t1=0, t2=0] [L1696] 0 int pdev; VAL [mutex={3:0}, pdev=0, t1=0, t2=0] [L1741] 0 int ldv_usb_state; VAL [ldv_usb_state=0, mutex={3:0}, pdev=0, t1=0, t2=0] [L1796] CALL 0 module_init() [L1777] 0 pdev = 1 [L1778] CALL 0 ldv_assert(pdev==1) [L1693] COND FALSE 0 !(!expression) VAL [\at(expression, Pre)=1, expression=1, ldv_usb_state=0, mutex={3:0}, pdev=1, t1=0, t2=0] [L1778] RET 0 ldv_assert(pdev==1) [L1779] COND TRUE 0 __VERIFIER_nondet_int() VAL [ldv_usb_state=0, mutex={3:0}, pdev=1, t1=0, t2=0] [L1780] FCALL, FORK 0 pthread_create(&t1, ((void *)0), thread_usb, ((void *)0)) VAL [ldv_usb_state=0, mutex={3:0}, pdev=1, t1=-1, t2=0] [L1743] 1 ldv_usb_state = 0 VAL [\at(arg, Pre)={0:0}, arg={0:0}, ldv_usb_state=0, mutex={3:0}, pdev=1, t1=-1, t2=0] [L1744] 1 int probe_ret; VAL [\at(arg, Pre)={0:0}, arg={0:0}, ldv_usb_state=0, mutex={3:0}, pdev=1, t1=-1, t2=0] Loop: [L1747] case 0: [L1755] case 1: End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 1745]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L1694] 0 pthread_t t1, t2; VAL [t1=0, t2=0] [L1695] 0 pthread_mutex_t mutex; VAL [mutex={3:0}, t1=0, t2=0] [L1696] 0 int pdev; VAL [mutex={3:0}, pdev=0, t1=0, t2=0] [L1741] 0 int ldv_usb_state; VAL [ldv_usb_state=0, mutex={3:0}, pdev=0, t1=0, t2=0] [L1796] CALL 0 module_init() [L1777] 0 pdev = 1 [L1778] CALL 0 ldv_assert(pdev==1) [L1693] COND FALSE 0 !(!expression) VAL [\at(expression, Pre)=1, expression=1, ldv_usb_state=0, mutex={3:0}, pdev=1, t1=0, t2=0] [L1778] RET 0 ldv_assert(pdev==1) [L1779] COND TRUE 0 __VERIFIER_nondet_int() VAL [ldv_usb_state=0, mutex={3:0}, pdev=1, t1=0, t2=0] [L1780] FCALL, FORK 0 pthread_create(&t1, ((void *)0), thread_usb, ((void *)0)) VAL [ldv_usb_state=0, mutex={3:0}, pdev=1, t1=-1, t2=0] [L1743] 1 ldv_usb_state = 0 VAL [\at(arg, Pre)={0:0}, arg={0:0}, ldv_usb_state=0, mutex={3:0}, pdev=1, t1=-1, t2=0] [L1744] 1 int probe_ret; VAL [\at(arg, Pre)={0:0}, arg={0:0}, ldv_usb_state=0, mutex={3:0}, pdev=1, t1=-1, t2=0] Loop: [L1747] case 0: [L1755] case 1: End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-04-26 16:03:41,030 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...