/root/.sdkman/candidates/java/21.0.5-tem/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/gemcutter/Termination.epf -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-atomic/lamport.i -------------------------------------------------------------------------------- This is Ultimate 0.3.0-wip.dk.ample-buchi-a4216cd-m [2025-04-26 18:17:22,043 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-04-26 18:17:22,097 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/settings/gemcutter/Termination.epf [2025-04-26 18:17:22,100 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-04-26 18:17:22,101 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-04-26 18:17:22,101 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.Check unreachability of error function in SV-COMP mode [2025-04-26 18:17:22,101 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.Translation Mode: [2025-04-26 18:17:22,122 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-04-26 18:17:22,122 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-04-26 18:17:22,122 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-04-26 18:17:22,122 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-04-26 18:17:22,122 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-04-26 18:17:22,122 INFO L153 SettingsManager]: * Use SBE=true [2025-04-26 18:17:22,123 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Use old map elimination=false [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Automaton type for concurrent programs=PARTIAL_ORDER_BA [2025-04-26 18:17:22,123 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * sizeof long=4 [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * sizeof long double=12 [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-04-26 18:17:22,123 INFO L153 SettingsManager]: * Use constant arrays=true [2025-04-26 18:17:22,124 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -smt2 -in -t:4000 [2025-04-26 18:17:22,124 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * Use conditional POR in concurrent analysis=false [2025-04-26 18:17:22,124 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-04-26 18:17:22,124 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR [2025-04-26 18:17:22,360 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-04-26 18:17:22,367 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-04-26 18:17:22,369 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-04-26 18:17:22,370 INFO L270 PluginConnector]: Initializing CDTParser... [2025-04-26 18:17:22,370 INFO L274 PluginConnector]: CDTParser initialized [2025-04-26 18:17:22,372 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-atomic/lamport.i [2025-04-26 18:17:23,715 INFO L538 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/c719a8709/465e84bfca1446b48891c18a9e3312ce/FLAG5fea14407 [2025-04-26 18:17:23,946 INFO L389 CDTParser]: Found 1 translation units. [2025-04-26 18:17:23,946 INFO L178 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i [2025-04-26 18:17:23,956 INFO L432 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/c719a8709/465e84bfca1446b48891c18a9e3312ce/FLAG5fea14407 [2025-04-26 18:17:24,715 INFO L440 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/c719a8709/465e84bfca1446b48891c18a9e3312ce [2025-04-26 18:17:24,717 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-04-26 18:17:24,718 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2025-04-26 18:17:24,719 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-04-26 18:17:24,719 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-04-26 18:17:24,722 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-04-26 18:17:24,722 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.04 06:17:24" (1/1) ... [2025-04-26 18:17:24,723 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4439a4e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:24, skipping insertion in model container [2025-04-26 18:17:24,723 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.04 06:17:24" (1/1) ... [2025-04-26 18:17:24,747 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-04-26 18:17:25,019 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32541,32554] [2025-04-26 18:17:25,026 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32909,32922] [2025-04-26 18:17:25,032 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-26 18:17:25,041 INFO L200 MainTranslator]: Completed pre-run [2025-04-26 18:17:25,096 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32541,32554] [2025-04-26 18:17:25,098 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32909,32922] [2025-04-26 18:17:25,103 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-26 18:17:25,126 INFO L204 MainTranslator]: Completed translation [2025-04-26 18:17:25,128 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25 WrapperNode [2025-04-26 18:17:25,128 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-04-26 18:17:25,129 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-04-26 18:17:25,129 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-04-26 18:17:25,129 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-04-26 18:17:25,133 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,143 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,155 INFO L138 Inliner]: procedures = 166, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 31 [2025-04-26 18:17:25,155 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-04-26 18:17:25,157 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-04-26 18:17:25,157 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-04-26 18:17:25,157 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-04-26 18:17:25,161 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,161 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,165 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,166 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,172 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,173 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,180 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,180 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,181 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,189 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-04-26 18:17:25,190 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-04-26 18:17:25,190 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-04-26 18:17:25,190 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-04-26 18:17:25,191 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (1/1) ... [2025-04-26 18:17:25,194 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -smt2 -in -t:4000 [2025-04-26 18:17:25,204 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-26 18:17:25,216 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-04-26 18:17:25,219 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-04-26 18:17:25,234 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2025-04-26 18:17:25,234 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2025-04-26 18:17:25,234 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2025-04-26 18:17:25,234 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2025-04-26 18:17:25,234 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-04-26 18:17:25,234 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2025-04-26 18:17:25,235 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-04-26 18:17:25,235 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-04-26 18:17:25,235 WARN L203 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2025-04-26 18:17:25,329 INFO L234 CfgBuilder]: Building ICFG [2025-04-26 18:17:25,331 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-04-26 18:17:25,466 INFO L279 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2025-04-26 18:17:25,466 INFO L283 CfgBuilder]: Performing block encoding [2025-04-26 18:17:25,474 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-04-26 18:17:25,474 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2025-04-26 18:17:25,474 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.04 06:17:25 BoogieIcfgContainer [2025-04-26 18:17:25,475 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-04-26 18:17:25,476 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-04-26 18:17:25,476 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-04-26 18:17:25,480 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-04-26 18:17:25,481 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-04-26 18:17:25,481 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.04 06:17:24" (1/3) ... [2025-04-26 18:17:25,481 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@d47d589 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.04 06:17:25, skipping insertion in model container [2025-04-26 18:17:25,481 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-04-26 18:17:25,481 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.04 06:17:25" (2/3) ... [2025-04-26 18:17:25,482 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@d47d589 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.04 06:17:25, skipping insertion in model container [2025-04-26 18:17:25,482 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-04-26 18:17:25,482 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.04 06:17:25" (3/3) ... [2025-04-26 18:17:25,483 INFO L376 chiAutomizerObserver]: Analyzing ICFG lamport.i [2025-04-26 18:17:25,547 INFO L143 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2025-04-26 18:17:25,580 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-26 18:17:25,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2025-04-26 18:17:25,580 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-26 18:17:25,584 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2025-04-26 18:17:25,585 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2025-04-26 18:17:25,648 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 84 places, 95 transitions, 204 flow [2025-04-26 18:17:25,674 INFO L116 PetriNetUnfolderBase]: 16/91 cut-off events. [2025-04-26 18:17:25,679 INFO L117 PetriNetUnfolderBase]: For 2/2 co-relation queries the response was YES. [2025-04-26 18:17:25,684 INFO L83 FinitePrefix]: Finished finitePrefix Result has 100 conditions, 91 events. 16/91 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 170 event pairs, 0 based on Foata normal form. 0/73 useless extension candidates. Maximal degree in co-relation 68. Up to 3 conditions per place. [2025-04-26 18:17:25,684 INFO L82 GeneralOperation]: Start removeDead. Operand has 84 places, 95 transitions, 204 flow [2025-04-26 18:17:25,689 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 82 places, 91 transitions, 194 flow [2025-04-26 18:17:25,689 INFO L84 lAbstractionProvider]: Constructed initial Petri net abstraction that has has 82 places, 91 transitions, 194 flow [2025-04-26 18:17:25,689 INFO L113 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions, 194 flow [2025-04-26 18:17:25,793 INFO L135 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 1630 states, 1626 states have (on average 3.1838868388683887) internal successors, (in total 5177), 1629 states have internal predecessors, (5177), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:25,796 INFO L171 actionProvider$Eager]: Constructed initial Büchi automaton abstraction (from Petri net) that has 1630 states, 1626 states have (on average 3.1838868388683887) internal successors, (in total 5177), 1629 states have internal predecessors, (5177), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:25,798 INFO L135 AmpleReduction]: Starting ample reduction [2025-04-26 18:17:25,862 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2573#[L789-5, L772, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]true [2025-04-26 18:17:25,862 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2007#[L789-5, L766, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]true [2025-04-26 18:17:25,864 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2309#[L789-4, L772, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]true [2025-04-26 18:17:25,879 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3311#[L790, thr1EXIT, L774-1]true [2025-04-26 18:17:25,880 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3225#[L790, L772, thr1EXIT]true [2025-04-26 18:17:25,881 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2999#[L766, L790, thr1EXIT]true [2025-04-26 18:17:25,882 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3147#[L789-5, L772, thr1EXIT]true [2025-04-26 18:17:25,882 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2839#[L789-5, L766, thr1EXIT]true [2025-04-26 18:17:25,883 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3027#[L789-4, L772, thr1EXIT]true [2025-04-26 18:17:25,894 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3153#[L756, L790, L774-1]true [2025-04-26 18:17:25,896 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3135#[thr1FINAL, L790, L772]true [2025-04-26 18:17:25,896 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3277#[thr1FINAL, L790, L774-1]true [2025-04-26 18:17:25,897 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2383#[L766, L756, L790]true [2025-04-26 18:17:25,900 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3229#[L789-5, thr1FINAL, L774-1]true [2025-04-26 18:17:25,905 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3017#[L789-5, thr1FINAL, L772]true [2025-04-26 18:17:25,905 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2617#[L789-5, L766, thr1FINAL]true [2025-04-26 18:17:25,906 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2647#[L789-5, L756, L772]true [2025-04-26 18:17:25,907 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2093#[L789-5, L766, L756]true [2025-04-26 18:17:25,908 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2853#[thr1FINAL, L789-4, L772]true [2025-04-26 18:17:25,908 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2371#[L766, thr1FINAL, L789-4]true [2025-04-26 18:17:25,910 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2393#[L756, L789-4, L772]true [2025-04-26 18:17:25,929 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2401#[L755-3, L789-5, L772]true [2025-04-26 18:17:25,929 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1799#[L755-3, L789-5, L766]true [2025-04-26 18:17:25,930 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2113#[L755-3, L789-4, L772]true [2025-04-26 18:17:25,938 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2121#[L789-5, L755, L772]true [2025-04-26 18:17:25,939 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1507#[L789-5, L766, L755]true [2025-04-26 18:17:25,940 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1819#[L755, L789-4, L772]true [2025-04-26 18:17:25,963 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1827#[L735-1, L789-5, L772]true [2025-04-26 18:17:25,963 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1237#[L735-1, L789-5, L766]true [2025-04-26 18:17:25,963 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1527#[L735-1, L789-4, L772]true [2025-04-26 18:17:25,985 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3071#[L789-5, L748-1, thr2Err0ASSERT_VIOLATIONERROR_FUNCTION]true [2025-04-26 18:17:25,986 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2711#[L789-5, L746, thr2Err0ASSERT_VIOLATIONERROR_FUNCTION]true [2025-04-26 18:17:25,986 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2139#[L789-5, L740, thr2Err0ASSERT_VIOLATIONERROR_FUNCTION]true [2025-04-26 18:17:25,987 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2487#[L746, thr2Err0ASSERT_VIOLATIONERROR_FUNCTION, L789-4]true [2025-04-26 18:17:25,987 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1841#[L740, thr2Err0ASSERT_VIOLATIONERROR_FUNCTION, L789-4]true [2025-04-26 18:17:25,997 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3165#[L746, thr2FINAL, L790]true [2025-04-26 18:17:25,997 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2665#[L740, L790, L783]true [2025-04-26 18:17:25,998 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3241#[L748-1, L790, L783]true [2025-04-26 18:17:25,999 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3053#[L746, L790, L783]true [2025-04-26 18:17:25,999 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2419#[L740, L790, L782]true [2025-04-26 18:17:26,001 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3169#[L748-1, L790, L782]true [2025-04-26 18:17:26,004 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3183#[L789-5, L746, thr2EXIT]true [2025-04-26 18:17:26,004 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2875#[L789-5, L740, thr2EXIT]true [2025-04-26 18:17:26,005 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3075#[L789-5, L746, thr2FINAL]true [2025-04-26 18:17:26,005 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2425#[L789-5, L740, L783]true [2025-04-26 18:17:26,005 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3187#[L789-5, L748-1, L783]true [2025-04-26 18:17:26,006 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2919#[L789-5, L746, L783]true [2025-04-26 18:17:26,006 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3079#[L789-5, L748-1, L782]true [2025-04-26 18:17:26,007 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2717#[L789-5, L746, L782]true [2025-04-26 18:17:26,007 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2141#[L789-5, L740, L782]true [2025-04-26 18:17:26,009 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3093#[L746, L789-4, thr2EXIT]true [2025-04-26 18:17:26,009 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2675#[L740, L789-4, thr2EXIT]true [2025-04-26 18:17:26,010 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2941#[L746, thr2FINAL, L789-4]true [2025-04-26 18:17:26,010 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2147#[L740, L789-4, L783]true [2025-04-26 18:17:26,011 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3097#[L748-1, L789-4, L783]true [2025-04-26 18:17:26,012 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2741#[L746, L789-4, L783]true [2025-04-26 18:17:26,012 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2493#[L746, L789-4, L782]true [2025-04-26 18:17:26,012 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1843#[L740, L789-4, L782]true [2025-04-26 18:17:26,025 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2923#[L789-5, L781-3, L748-1]true [2025-04-26 18:17:26,025 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2471#[L789-5, L781-3, L746]true [2025-04-26 18:17:26,025 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1837#[L789-5, L781-3, L740]true [2025-04-26 18:17:26,026 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2205#[L781-3, L746, L789-4]true [2025-04-26 18:17:26,026 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1539#[L781-3, L740, L789-4]true [2025-04-26 18:17:26,029 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2721#[L789-5, L781, L748-1]true [2025-04-26 18:17:26,029 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2187#[L789-5, L781, L746]true [2025-04-26 18:17:26,029 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1533#[L789-5, L781, L740]true [2025-04-26 18:17:26,030 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1893#[L781, L746, L789-4]true [2025-04-26 18:17:26,030 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1251#[L781, L740, L789-4]true [2025-04-26 18:17:26,032 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2475#[L789-5, L748-1, L761-1]true [2025-04-26 18:17:26,032 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1879#[L789-5, L746, L761-1]true [2025-04-26 18:17:26,032 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1247#[L789-5, L740, L761-1]true [2025-04-26 18:17:26,033 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1575#[L746, L761-1, L789-4]true [2025-04-26 18:17:26,033 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 995#[L740, L761-1, L789-4]true [2025-04-26 18:17:26,095 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2563#[L789-5, Loop~11, L774-1]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3045#[L789-5, L739, L774-1]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3157#[L789-5, L740, L774-1]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3039#[L789-5, L740, L773]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2685#[L789-5, L739, L772]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2877#[L789-5, L740, L772]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2673#[L789-5, L740, L771]true [2025-04-26 18:17:26,097 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2429#[L789-5, L740, L769-1]true [2025-04-26 18:17:26,098 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2145#[L789-5, L740, L769]true [2025-04-26 18:17:26,098 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2163#[L789-5, L766, L739]true [2025-04-26 18:17:26,099 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3119#[L789-5, L743, L774-1]true [2025-04-26 18:17:26,100 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3299#[L789-5, L746, L774-1]true [2025-04-26 18:17:26,101 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3325#[L789-5, L748-1, L773]true [2025-04-26 18:17:26,101 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3303#[L789-5, L748-1, L772]true [2025-04-26 18:17:26,101 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3263#[L789-5, L748-1, L771]true [2025-04-26 18:17:26,101 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3197#[L789-5, L748-1, L769-1]true [2025-04-26 18:17:26,101 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3091#[L789-5, L748-1, L769]true [2025-04-26 18:17:26,102 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2935#[L789-5, L748-1, L763]true [2025-04-26 18:17:26,102 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2733#[L789-5, L748-1, L762]true [2025-04-26 18:17:26,102 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2485#[L789-5, L748-1, Loop~12]true [2025-04-26 18:17:26,102 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3189#[L789-5, L766, L748-1]true [2025-04-26 18:17:26,102 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3261#[L789-5, L747, L772]true [2025-04-26 18:17:26,102 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3323#[L789-5, L747, L774-1]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3259#[L789-5, L746, L773]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3193#[L789-5, L746, L772]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3087#[L789-5, L746, L771]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2931#[L789-5, L746, L769-1]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2729#[L789-5, L746, L769]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2193#[L789-5, L746, L762]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1883#[L789-5, L746, Loop~12]true [2025-04-26 18:17:26,103 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2925#[L789-5, L766, L746]true [2025-04-26 18:17:26,104 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2725#[L789-5, L746, L765]true [2025-04-26 18:17:26,104 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3085#[L789-5, L745, L772]true [2025-04-26 18:17:26,104 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2723#[L789-5, L766, L745]true [2025-04-26 18:17:26,105 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2965#[L789-5, L743-1, L772]true [2025-04-26 18:17:26,105 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3213#[L789-5, L743-1, L774-1]true [2025-04-26 18:17:26,105 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2779#[L789-5, L743, L772]true [2025-04-26 18:17:26,105 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2251#[L789-5, L766, L743]true [2025-04-26 18:17:26,106 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2549#[L789-5, L737, L772]true [2025-04-26 18:17:26,106 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1953#[L789-5, L766, L737]true [2025-04-26 18:17:26,106 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2279#[L789-5, L736, L772]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2793#[L789-5, L736, L774-1]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1981#[L789-5, Loop~11, L772]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1357#[L789-5, L766, Loop~11]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1839#[L789-5, L740, L763]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1535#[L789-5, L740, L762]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1249#[L789-5, L740, Loop~12]true [2025-04-26 18:17:26,107 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2427#[L789-5, L766, L740]true [2025-04-26 18:17:26,108 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2559#[L736, L789-4, L774-1]true [2025-04-26 18:17:26,109 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3041#[L740, L789-4, L774-1]true [2025-04-26 18:17:26,109 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2289#[Loop~11, L789-4, L774-1]true [2025-04-26 18:17:26,111 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2879#[L740, L789-4, L773]true [2025-04-26 18:17:26,111 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2447#[L739, L789-4, L772]true [2025-04-26 18:17:26,111 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2677#[L740, L789-4, L772]true [2025-04-26 18:17:26,111 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1667#[Loop~11, L789-4, L772]true [2025-04-26 18:17:26,111 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2433#[L740, L789-4, L771]true [2025-04-26 18:17:26,111 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2151#[L740, L789-4, L769-1]true [2025-04-26 18:17:26,112 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1847#[L740, L789-4, L769]true [2025-04-26 18:17:26,112 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1865#[L766, L739, L789-4]true [2025-04-26 18:17:26,113 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3115#[L743-1, L789-4, L774-1]true [2025-04-26 18:17:26,114 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3305#[L747, L789-4, L774-1]true [2025-04-26 18:17:26,115 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2949#[L748-1, L789-4, L765]true [2025-04-26 18:17:26,115 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3271#[L748-1, L789-4, L772]true [2025-04-26 18:17:26,115 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3209#[L748-1, L789-4, L771]true [2025-04-26 18:17:26,115 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3107#[L748-1, L789-4, L769-1]true [2025-04-26 18:17:26,115 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2957#[L748-1, L789-4, L769]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2757#[L748-1, L789-4, L763]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2509#[L748-1, L762, L789-4]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2219#[L748-1, Loop~12, L789-4]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3327#[L748-1, L789-4, L774-1]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3207#[L747, L789-4, L772]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2947#[L747, L766, L789-4]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3205#[L746, L789-4, L773]true [2025-04-26 18:17:26,116 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3103#[L746, L789-4, L772]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2953#[L746, L789-4, L771]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2753#[L746, L789-4, L769-1]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2505#[L746, L789-4, L769]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2215#[L746, L789-4, L763]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1899#[L746, L762, L789-4]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1579#[L746, Loop~12, L789-4]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2747#[L766, L746, L789-4]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2951#[L789-4, L745, L772]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 3203#[L789-4, L745, L774-1]true [2025-04-26 18:17:26,117 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2771#[L743-1, L789-4, L772]true [2025-04-26 18:17:26,118 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2237#[L766, L743-1, L789-4]true [2025-04-26 18:17:26,118 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2541#[L743, L789-4, L772]true [2025-04-26 18:17:26,118 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1939#[L766, L743, L789-4]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2271#[L737, L789-4, L772]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 2789#[L737, L789-4, L774-1]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1973#[L736, L789-4, L772]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1343#[L736, L766, L789-4]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1085#[L766, Loop~11, L789-4]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1845#[L740, L789-4, L765]true [2025-04-26 18:17:26,119 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1541#[L740, L789-4, L763]true [2025-04-26 18:17:26,120 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 1253#[L740, L762, L789-4]true [2025-04-26 18:17:26,120 WARN L275 AmpleReduction]: Non-loop node is now a loop node: 997#[L740, Loop~12, L789-4]true [2025-04-26 18:17:26,143 WARN L140 AmpleReduction]: Number of pruned transitions: 1276 [2025-04-26 18:17:26,143 WARN L141 AmpleReduction]: Loop nodes with "changing loop node status": 169 [2025-04-26 18:17:26,143 WARN L142 AmpleReduction]: Number of trivial sets caused by loops: 261 [2025-04-26 18:17:26,143 WARN L143 AmpleReduction]: Number of not loop caused trivial ample sets:373 [2025-04-26 18:17:26,143 WARN L144 AmpleReduction]: Number of initially assigned non-trivial ample sets:878 [2025-04-26 18:17:26,145 WARN L145 AmpleReduction]: Times succ was already a loop node:93 [2025-04-26 18:17:26,145 WARN L146 AmpleReduction]: Times some other node on the cycle already had a trivial ample set:313 [2025-04-26 18:17:26,145 INFO L149 AmpleReduction]: Finished ample reduction [2025-04-26 18:17:26,148 INFO L136 dAbstractionProvider]: Constructed initial ample set-reduced NBA abstraction that has 1344 states, 1340 states have (on average 2.185820895522388) internal successors, (in total 2929), 1343 states have internal predecessors, (2929), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,154 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-04-26 18:17:26,155 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-04-26 18:17:26,155 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-04-26 18:17:26,155 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-04-26 18:17:26,155 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-04-26 18:17:26,155 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-04-26 18:17:26,155 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-04-26 18:17:26,155 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-04-26 18:17:26,158 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1344 states, 1340 states have (on average 2.185820895522388) internal successors, (in total 2929), 1343 states have internal predecessors, (2929), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,200 INFO L131 ngComponentsAnalysis]: Automaton has 59 accepting balls. 919 [2025-04-26 18:17:26,200 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 18:17:26,200 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 18:17:26,206 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 18:17:26,206 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2025-04-26 18:17:26,206 INFO L340 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-04-26 18:17:26,208 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1344 states, 1340 states have (on average 2.185820895522388) internal successors, (in total 2929), 1343 states have internal predecessors, (2929), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,223 INFO L131 ngComponentsAnalysis]: Automaton has 59 accepting balls. 919 [2025-04-26 18:17:26,223 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 18:17:26,223 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 18:17:26,224 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 18:17:26,224 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2025-04-26 18:17:26,228 INFO L752 eck$LassoCheckResult]: Stem: "[189] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[]" "[209] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[]" "[170] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[]" "[204] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[]" "[202] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[]" "[224] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 10) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[]" "[214] L12-4-->L731: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0]" "[188] L731-->L732: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0]" "[186] L732-->L732-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0]" "[237] L732-1-->L733: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0]" "[187] L733-->L-1-1: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0]" "[234] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[238] L-1-2-->L787: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_1|, ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_1|, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_1|, ULTIMATE.start_main_#t~nondet12#1=|v_ULTIMATE.start_main_#t~nondet12#1_1|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1, ULTIMATE.start_main_#t~nondet10#1, ULTIMATE.start_main_#t~pre11#1, ULTIMATE.start_main_#t~pre9#1, ULTIMATE.start_main_#t~nondet12#1, ULTIMATE.start_main_~t2~0#1]" "[222] L787-->L787-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[241] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[242] L788-->L788-1: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[190] L788-1-->L788-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[157] L788-2-->L788-3: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_3| |v_ULTIMATE.start_main_~t1~0#1_3|) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_3|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[311] L788-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre9#1_7| v_thr1Thread1of1ForFork1_thidvar0_2) (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0]" "[277] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset]" "[279] $Ultimate##3-->Loop~11: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" [2025-04-26 18:17:26,229 INFO L754 eck$LassoCheckResult]: Loop: "[281] Loop~11-->L736: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0]" "[284] L736-->L737: Formula: (= v_~x~0_4 1) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0]" "[288] L737-->L739: Formula: (not (= v_~y~0_11 0)) InVars {~y~0=v_~y~0_11} OutVars{~y~0=v_~y~0_11} AuxVars[] AssignedVars[]" "[291] L739-->L740: Formula: (= v_~b1~0_4 0) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0]" "[294] L740-->Loop~11: Formula: (= v_~y~0_13 0) InVars {~y~0=v_~y~0_13} OutVars{~y~0=v_~y~0_13} AuxVars[] AssignedVars[]" [2025-04-26 18:17:26,233 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,233 INFO L85 PathProgramCache]: Analyzing trace with hash 35603764, now seen corresponding path program 1 times [2025-04-26 18:17:26,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,238 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695639281] [2025-04-26 18:17:26,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,287 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-04-26 18:17:26,296 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-04-26 18:17:26,296 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,296 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,297 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:26,302 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-04-26 18:17:26,311 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-04-26 18:17:26,311 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,311 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,323 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:26,324 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,325 INFO L85 PathProgramCache]: Analyzing trace with hash 296885279, now seen corresponding path program 1 times [2025-04-26 18:17:26,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,325 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291015669] [2025-04-26 18:17:26,325 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,331 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-04-26 18:17:26,334 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-04-26 18:17:26,334 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,334 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-26 18:17:26,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-26 18:17:26,392 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-26 18:17:26,392 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291015669] [2025-04-26 18:17:26,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1291015669] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-26 18:17:26,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-26 18:17:26,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-26 18:17:26,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505666810] [2025-04-26 18:17:26,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-26 18:17:26,395 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-04-26 18:17:26,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-26 18:17:26,409 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-26 18:17:26,409 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-26 18:17:26,414 INFO L87 Difference]: Start difference. First operand has 1344 states, 1340 states have (on average 2.185820895522388) internal successors, (in total 2929), 1343 states have internal predecessors, (2929), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.5) internal successors, (in total 5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-04-26 18:17:26,505 INFO L93 Difference]: Finished difference Result 1296 states and 2449 transitions. [2025-04-26 18:17:26,505 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1296 states and 2449 transitions. [2025-04-26 18:17:26,518 INFO L131 ngComponentsAnalysis]: Automaton has 316 accepting balls. 316 [2025-04-26 18:17:26,534 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1296 states to 1023 states and 2032 transitions. [2025-04-26 18:17:26,535 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1023 [2025-04-26 18:17:26,536 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1023 [2025-04-26 18:17:26,539 INFO L74 IsDeterministic]: Start isDeterministic. Operand 1023 states and 2032 transitions. [2025-04-26 18:17:26,543 INFO L81 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-04-26 18:17:26,543 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1023 states and 2032 transitions. [2025-04-26 18:17:26,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1023 states and 2032 transitions. [2025-04-26 18:17:26,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1023 to 1023. [2025-04-26 18:17:26,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1023 states, 1023 states have (on average 1.986314760508309) internal successors, (in total 2032), 1022 states have internal predecessors, (2032), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1023 states to 1023 states and 2032 transitions. [2025-04-26 18:17:26,603 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1023 states and 2032 transitions. [2025-04-26 18:17:26,604 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-26 18:17:26,607 INFO L438 stractBuchiCegarLoop]: Abstraction has 1023 states and 2032 transitions. [2025-04-26 18:17:26,607 INFO L340 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-04-26 18:17:26,607 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1023 states and 2032 transitions. [2025-04-26 18:17:26,613 INFO L131 ngComponentsAnalysis]: Automaton has 316 accepting balls. 316 [2025-04-26 18:17:26,613 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 18:17:26,613 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 18:17:26,614 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 18:17:26,614 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-04-26 18:17:26,616 INFO L752 eck$LassoCheckResult]: Stem: "[189] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[]" "[209] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[]" "[170] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[]" "[204] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[]" "[202] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[]" "[224] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 10) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[]" "[214] L12-4-->L731: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0]" "[188] L731-->L732: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0]" "[186] L732-->L732-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0]" "[237] L732-1-->L733: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0]" "[187] L733-->L-1-1: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0]" "[234] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[238] L-1-2-->L787: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_1|, ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_1|, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_1|, ULTIMATE.start_main_#t~nondet12#1=|v_ULTIMATE.start_main_#t~nondet12#1_1|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1, ULTIMATE.start_main_#t~nondet10#1, ULTIMATE.start_main_#t~pre11#1, ULTIMATE.start_main_#t~pre9#1, ULTIMATE.start_main_#t~nondet12#1, ULTIMATE.start_main_~t2~0#1]" "[222] L787-->L787-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[241] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[242] L788-->L788-1: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[190] L788-1-->L788-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[157] L788-2-->L788-3: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_3| |v_ULTIMATE.start_main_~t1~0#1_3|) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_3|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[311] L788-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre9#1_7| v_thr1Thread1of1ForFork1_thidvar0_2) (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0]" "[277] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset]" "[279] $Ultimate##3-->Loop~11: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" "[281] Loop~11-->L736: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0]" "[284] L736-->L737: Formula: (= v_~x~0_4 1) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0]" "[288] L737-->L739: Formula: (not (= v_~y~0_11 0)) InVars {~y~0=v_~y~0_11} OutVars{~y~0=v_~y~0_11} AuxVars[] AssignedVars[]" "[291] L739-->L740: Formula: (= v_~b1~0_4 0) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0]" [2025-04-26 18:17:26,616 INFO L754 eck$LassoCheckResult]: Loop: "[295] L740-->L740: Formula: (not (= v_~y~0_12 0)) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12} AuxVars[] AssignedVars[]" [2025-04-26 18:17:26,616 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,617 INFO L85 PathProgramCache]: Analyzing trace with hash -1437231718, now seen corresponding path program 1 times [2025-04-26 18:17:26,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,617 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888111582] [2025-04-26 18:17:26,617 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,628 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 25 statements into 1 equivalence classes. [2025-04-26 18:17:26,635 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 25 of 25 statements. [2025-04-26 18:17:26,635 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,635 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-26 18:17:26,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-26 18:17:26,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-26 18:17:26,692 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888111582] [2025-04-26 18:17:26,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1888111582] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-26 18:17:26,692 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-26 18:17:26,692 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-26 18:17:26,692 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861734224] [2025-04-26 18:17:26,692 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-26 18:17:26,692 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-04-26 18:17:26,692 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,692 INFO L85 PathProgramCache]: Analyzing trace with hash 326, now seen corresponding path program 1 times [2025-04-26 18:17:26,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,692 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853532715] [2025-04-26 18:17:26,692 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,699 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:26,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:26,699 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,699 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,699 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:26,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:26,700 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:26,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:26,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-26 18:17:26,720 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-26 18:17:26,720 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-26 18:17:26,720 INFO L87 Difference]: Start difference. First operand 1023 states and 2032 transitions. cyclomatic complexity: 1325 Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (in total 25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-04-26 18:17:26,779 INFO L93 Difference]: Finished difference Result 915 states and 1767 transitions. [2025-04-26 18:17:26,779 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 915 states and 1767 transitions. [2025-04-26 18:17:26,785 INFO L131 ngComponentsAnalysis]: Automaton has 261 accepting balls. 261 [2025-04-26 18:17:26,792 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 915 states to 915 states and 1767 transitions. [2025-04-26 18:17:26,792 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 915 [2025-04-26 18:17:26,794 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 915 [2025-04-26 18:17:26,794 INFO L74 IsDeterministic]: Start isDeterministic. Operand 915 states and 1767 transitions. [2025-04-26 18:17:26,796 INFO L81 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-04-26 18:17:26,796 INFO L218 hiAutomatonCegarLoop]: Abstraction has 915 states and 1767 transitions. [2025-04-26 18:17:26,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 915 states and 1767 transitions. [2025-04-26 18:17:26,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 915 to 915. [2025-04-26 18:17:26,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 915 states, 915 states have (on average 1.9311475409836065) internal successors, (in total 1767), 914 states have internal predecessors, (1767), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 915 states to 915 states and 1767 transitions. [2025-04-26 18:17:26,813 INFO L240 hiAutomatonCegarLoop]: Abstraction has 915 states and 1767 transitions. [2025-04-26 18:17:26,813 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-26 18:17:26,814 INFO L438 stractBuchiCegarLoop]: Abstraction has 915 states and 1767 transitions. [2025-04-26 18:17:26,814 INFO L340 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-04-26 18:17:26,814 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand 915 states and 1767 transitions. [2025-04-26 18:17:26,818 INFO L131 ngComponentsAnalysis]: Automaton has 261 accepting balls. 261 [2025-04-26 18:17:26,818 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 18:17:26,818 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 18:17:26,819 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 18:17:26,819 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-04-26 18:17:26,819 INFO L752 eck$LassoCheckResult]: Stem: "[189] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[]" "[209] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[]" "[170] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[]" "[204] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[]" "[202] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[]" "[224] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 10) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[]" "[214] L12-4-->L731: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0]" "[188] L731-->L732: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0]" "[186] L732-->L732-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0]" "[237] L732-1-->L733: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0]" "[187] L733-->L-1-1: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0]" "[234] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[238] L-1-2-->L787: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_1|, ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_1|, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_1|, ULTIMATE.start_main_#t~nondet12#1=|v_ULTIMATE.start_main_#t~nondet12#1_1|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1, ULTIMATE.start_main_#t~nondet10#1, ULTIMATE.start_main_#t~pre11#1, ULTIMATE.start_main_#t~pre9#1, ULTIMATE.start_main_#t~nondet12#1, ULTIMATE.start_main_~t2~0#1]" "[222] L787-->L787-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[241] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[242] L788-->L788-1: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[190] L788-1-->L788-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[157] L788-2-->L788-3: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_3| |v_ULTIMATE.start_main_~t1~0#1_3|) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_3|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[311] L788-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre9#1_7| v_thr1Thread1of1ForFork1_thidvar0_2) (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0]" "[277] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset]" "[279] $Ultimate##3-->Loop~11: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" "[281] Loop~11-->L736: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0]" "[284] L736-->L737: Formula: (= v_~x~0_4 1) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0]" "[289] L737-->L743: Formula: (= v_~y~0_14 0) InVars {~y~0=v_~y~0_14} OutVars{~y~0=v_~y~0_14} AuxVars[] AssignedVars[]" "[292] L743-->L743-1: Formula: (= v_~y~0_15 1) InVars {} OutVars{~y~0=v_~y~0_15} AuxVars[] AssignedVars[~y~0]" "[296] L743-1-->L745: Formula: (not (= v_~x~0_5 1)) InVars {~x~0=v_~x~0_5} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[]" "[299] L745-->L746: Formula: (= v_~b1~0_5 0) InVars {} OutVars{~b1~0=v_~b1~0_5} AuxVars[] AssignedVars[~b1~0]" [2025-04-26 18:17:26,819 INFO L754 eck$LassoCheckResult]: Loop: "[301] L746-->L746: Formula: (<= 1 v_~b2~0_5) InVars {~b2~0=v_~b2~0_5} OutVars{~b2~0=v_~b2~0_5} AuxVars[] AssignedVars[]" [2025-04-26 18:17:26,820 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,820 INFO L85 PathProgramCache]: Analyzing trace with hash 1799828541, now seen corresponding path program 1 times [2025-04-26 18:17:26,820 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,820 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293456034] [2025-04-26 18:17:26,820 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,828 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 27 statements into 1 equivalence classes. [2025-04-26 18:17:26,833 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 27 of 27 statements. [2025-04-26 18:17:26,833 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,833 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-26 18:17:26,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-26 18:17:26,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-26 18:17:26,860 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293456034] [2025-04-26 18:17:26,860 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [293456034] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-26 18:17:26,860 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-26 18:17:26,860 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-26 18:17:26,860 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [787301180] [2025-04-26 18:17:26,860 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-26 18:17:26,860 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-04-26 18:17:26,861 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,861 INFO L85 PathProgramCache]: Analyzing trace with hash 332, now seen corresponding path program 1 times [2025-04-26 18:17:26,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,861 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972043820] [2025-04-26 18:17:26,861 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,866 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:26,867 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:26,867 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,867 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,867 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:26,868 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:26,868 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:26,868 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,868 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,875 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:26,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-26 18:17:26,881 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-26 18:17:26,881 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-26 18:17:26,881 INFO L87 Difference]: Start difference. First operand 915 states and 1767 transitions. cyclomatic complexity: 1113 Second operand has 3 states, 3 states have (on average 9.0) internal successors, (in total 27), 3 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-04-26 18:17:26,907 INFO L93 Difference]: Finished difference Result 1134 states and 2050 transitions. [2025-04-26 18:17:26,908 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1134 states and 2050 transitions. [2025-04-26 18:17:26,914 INFO L131 ngComponentsAnalysis]: Automaton has 297 accepting balls. 297 [2025-04-26 18:17:26,920 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1134 states to 1039 states and 1925 transitions. [2025-04-26 18:17:26,920 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1039 [2025-04-26 18:17:26,921 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1039 [2025-04-26 18:17:26,921 INFO L74 IsDeterministic]: Start isDeterministic. Operand 1039 states and 1925 transitions. [2025-04-26 18:17:26,925 INFO L81 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-04-26 18:17:26,925 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1039 states and 1925 transitions. [2025-04-26 18:17:26,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1039 states and 1925 transitions. [2025-04-26 18:17:26,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1039 to 785. [2025-04-26 18:17:26,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 785 states, 785 states have (on average 1.8980891719745223) internal successors, (in total 1490), 784 states have internal predecessors, (1490), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:26,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 785 states to 785 states and 1490 transitions. [2025-04-26 18:17:26,939 INFO L240 hiAutomatonCegarLoop]: Abstraction has 785 states and 1490 transitions. [2025-04-26 18:17:26,939 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-26 18:17:26,940 INFO L438 stractBuchiCegarLoop]: Abstraction has 785 states and 1490 transitions. [2025-04-26 18:17:26,940 INFO L340 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-04-26 18:17:26,940 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand 785 states and 1490 transitions. [2025-04-26 18:17:26,943 INFO L131 ngComponentsAnalysis]: Automaton has 220 accepting balls. 220 [2025-04-26 18:17:26,943 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 18:17:26,943 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 18:17:26,944 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 18:17:26,944 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-04-26 18:17:26,945 INFO L752 eck$LassoCheckResult]: Stem: "[189] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[]" "[209] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[]" "[170] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[]" "[204] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[]" "[202] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[]" "[224] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 10) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[]" "[214] L12-4-->L731: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0]" "[188] L731-->L732: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0]" "[186] L732-->L732-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0]" "[237] L732-1-->L733: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0]" "[187] L733-->L-1-1: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0]" "[234] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[238] L-1-2-->L787: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_1|, ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_1|, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_1|, ULTIMATE.start_main_#t~nondet12#1=|v_ULTIMATE.start_main_#t~nondet12#1_1|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1, ULTIMATE.start_main_#t~nondet10#1, ULTIMATE.start_main_#t~pre11#1, ULTIMATE.start_main_#t~pre9#1, ULTIMATE.start_main_#t~nondet12#1, ULTIMATE.start_main_~t2~0#1]" "[222] L787-->L787-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[241] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[242] L788-->L788-1: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[190] L788-1-->L788-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[157] L788-2-->L788-3: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_3| |v_ULTIMATE.start_main_~t1~0#1_3|) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_3|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[311] L788-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre9#1_7| v_thr1Thread1of1ForFork1_thidvar0_2) (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0]" "[277] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset]" "[279] $Ultimate##3-->Loop~11: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" "[215] L788-4-->L788-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[183] L788-5-->L789: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet10#1]" "[158] L789-->L789-1: Formula: (= |v_ULTIMATE.start_main_#t~pre11#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_2|, #pthreadsForks=|v_#pthreadsForks_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre11#1]" "[229] L789-1-->L789-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks]" "[216] L789-2-->L789-3: Formula: (= |v_ULTIMATE.start_main_~t2~0#1_3| |v_ULTIMATE.start_main_#t~pre11#1_3|) InVars {ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_3|} OutVars{ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_3|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[308] L789-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0) (= v_thr2Thread1of1ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre11#1_7|)) InVars {ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_7|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_7|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base]" "[248] $Ultimate##0-->$Ultimate##3: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base]" "[250] $Ultimate##3-->Loop~12: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" "[252] Loop~12-->L762: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0]" "[255] L762-->L763: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0]" "[260] L763-->L769: Formula: (= v_~y~0_4 0) InVars {~y~0=v_~y~0_4} OutVars{~y~0=v_~y~0_4} AuxVars[] AssignedVars[]" "[263] L769-->L769-1: Formula: (= 2 v_~y~0_5) InVars {} OutVars{~y~0=v_~y~0_5} AuxVars[] AssignedVars[~y~0]" "[267] L769-1-->L771: Formula: (not (= 2 v_~x~0_2)) InVars {~x~0=v_~x~0_2} OutVars{~x~0=v_~x~0_2} AuxVars[] AssignedVars[]" "[270] L771-->L772: Formula: (= v_~b2~0_3 0) InVars {} OutVars{~b2~0=v_~b2~0_3} AuxVars[] AssignedVars[~b2~0]" [2025-04-26 18:17:26,945 INFO L754 eck$LassoCheckResult]: Loop: "[272] L772-->L772: Formula: (<= 1 v_~b1~0_1) InVars {~b1~0=v_~b1~0_1} OutVars{~b1~0=v_~b1~0_1} AuxVars[] AssignedVars[]" [2025-04-26 18:17:26,945 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1829319746, now seen corresponding path program 1 times [2025-04-26 18:17:26,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,945 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533425440] [2025-04-26 18:17:26,946 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,952 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-04-26 18:17:26,956 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-04-26 18:17:26,956 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,956 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-26 18:17:26,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-26 18:17:26,993 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-26 18:17:26,993 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533425440] [2025-04-26 18:17:26,993 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [533425440] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-26 18:17:26,993 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-26 18:17:26,993 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-26 18:17:26,993 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561823721] [2025-04-26 18:17:26,993 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-26 18:17:26,993 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-04-26 18:17:26,993 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:26,994 INFO L85 PathProgramCache]: Analyzing trace with hash 303, now seen corresponding path program 1 times [2025-04-26 18:17:26,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:26,994 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523605977] [2025-04-26 18:17:26,994 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:26,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:26,996 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:26,997 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:26,997 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,997 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,997 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:26,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:26,998 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:26,998 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:26,998 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:26,999 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:27,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-26 18:17:27,005 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-26 18:17:27,005 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-26 18:17:27,005 INFO L87 Difference]: Start difference. First operand 785 states and 1490 transitions. cyclomatic complexity: 925 Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (in total 35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:27,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-04-26 18:17:27,024 INFO L93 Difference]: Finished difference Result 788 states and 1365 transitions. [2025-04-26 18:17:27,024 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 788 states and 1365 transitions. [2025-04-26 18:17:27,028 INFO L131 ngComponentsAnalysis]: Automaton has 185 accepting balls. 185 [2025-04-26 18:17:27,031 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 788 states to 623 states and 1130 transitions. [2025-04-26 18:17:27,031 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 623 [2025-04-26 18:17:27,032 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 623 [2025-04-26 18:17:27,032 INFO L74 IsDeterministic]: Start isDeterministic. Operand 623 states and 1130 transitions. [2025-04-26 18:17:27,033 INFO L81 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-04-26 18:17:27,033 INFO L218 hiAutomatonCegarLoop]: Abstraction has 623 states and 1130 transitions. [2025-04-26 18:17:27,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 623 states and 1130 transitions. [2025-04-26 18:17:27,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 623 to 568. [2025-04-26 18:17:27,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 568 states, 568 states have (on average 1.8345070422535212) internal successors, (in total 1042), 567 states have internal predecessors, (1042), 0 states have call successors, (0), 0 states have call predecessors, (in total 0), 0 states have return successors, (0), 0 states have call predecessors, ( in total0), 0 states have call successors, (0) [2025-04-26 18:17:27,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 568 states to 568 states and 1042 transitions. [2025-04-26 18:17:27,055 INFO L240 hiAutomatonCegarLoop]: Abstraction has 568 states and 1042 transitions. [2025-04-26 18:17:27,055 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-26 18:17:27,056 INFO L438 stractBuchiCegarLoop]: Abstraction has 568 states and 1042 transitions. [2025-04-26 18:17:27,056 INFO L340 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-04-26 18:17:27,056 INFO L73 BuchiIsEmpty]: Start buchiIsEmpty. Operand 568 states and 1042 transitions. [2025-04-26 18:17:27,058 INFO L131 ngComponentsAnalysis]: Automaton has 165 accepting balls. 165 [2025-04-26 18:17:27,058 INFO L88 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-04-26 18:17:27,058 INFO L120 BuchiIsEmpty]: Starting construction of run [2025-04-26 18:17:27,059 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-04-26 18:17:27,059 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-04-26 18:17:27,060 INFO L752 eck$LassoCheckResult]: Stem: "[189] $Ultimate##0-->L-1: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[]" "[209] L-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[]" "[170] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[]" "[204] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[]" "[202] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[]" "[224] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 10) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[]" "[214] L12-4-->L731: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0]" "[188] L731-->L732: Formula: (= v_~y~0_21 0) InVars {} OutVars{~y~0=v_~y~0_21} AuxVars[] AssignedVars[~y~0]" "[186] L732-->L732-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0]" "[237] L732-1-->L733: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0]" "[187] L733-->L-1-1: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0]" "[234] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1]" "[238] L-1-2-->L787: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_1|, ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_1|, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_1|, ULTIMATE.start_main_#t~nondet12#1=|v_ULTIMATE.start_main_#t~nondet12#1_1|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1, ULTIMATE.start_main_#t~nondet10#1, ULTIMATE.start_main_#t~pre11#1, ULTIMATE.start_main_#t~pre9#1, ULTIMATE.start_main_#t~nondet12#1, ULTIMATE.start_main_~t2~0#1]" "[222] L787-->L787-1: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[241] L787-1-->L788: Formula: true InVars {} OutVars{ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[242] L788-->L788-1: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[190] L788-1-->L788-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks]" "[157] L788-2-->L788-3: Formula: (= |v_ULTIMATE.start_main_#t~pre9#1_3| |v_ULTIMATE.start_main_~t1~0#1_3|) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} OutVars{ULTIMATE.start_main_~t1~0#1=|v_ULTIMATE.start_main_~t1~0#1_3|, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t1~0#1]" "[311] L788-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre9#1_7| v_thr1Thread1of1ForFork1_thidvar0_2) (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_7|, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0]" "[277] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset]" "[279] $Ultimate##3-->Loop~11: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" "[215] L788-4-->L788-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre9#1=|v_ULTIMATE.start_main_#t~pre9#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre9#1]" "[183] L788-5-->L789: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet10#1=|v_ULTIMATE.start_main_#t~nondet10#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet10#1]" "[281] Loop~11-->L736: Formula: (= v_~b1~0_3 1) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0]" "[284] L736-->L737: Formula: (= v_~x~0_4 1) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0]" "[289] L737-->L743: Formula: (= v_~y~0_14 0) InVars {~y~0=v_~y~0_14} OutVars{~y~0=v_~y~0_14} AuxVars[] AssignedVars[]" "[292] L743-->L743-1: Formula: (= v_~y~0_15 1) InVars {} OutVars{~y~0=v_~y~0_15} AuxVars[] AssignedVars[~y~0]" "[158] L789-->L789-1: Formula: (= |v_ULTIMATE.start_main_#t~pre11#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_2|, #pthreadsForks=|v_#pthreadsForks_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre11#1]" "[229] L789-1-->L789-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks]" "[216] L789-2-->L789-3: Formula: (= |v_ULTIMATE.start_main_~t2~0#1_3| |v_ULTIMATE.start_main_#t~pre11#1_3|) InVars {ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_3|} OutVars{ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_3|, ULTIMATE.start_main_~t2~0#1=|v_ULTIMATE.start_main_~t2~0#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~t2~0#1]" "[308] L789-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0) (= v_thr2Thread1of1ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre11#1_7|)) InVars {ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_7|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, ULTIMATE.start_main_#t~pre11#1=|v_ULTIMATE.start_main_#t~pre11#1_7|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base]" "[248] $Ultimate##0-->$Ultimate##3: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base]" "[250] $Ultimate##3-->Loop~12: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]" "[252] Loop~12-->L762: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0]" "[255] L762-->L763: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0]" "[259] L763-->L765: Formula: (not (= v_~y~0_1 0)) InVars {~y~0=v_~y~0_1} OutVars{~y~0=v_~y~0_1} AuxVars[] AssignedVars[]" "[262] L765-->L766: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0]" [2025-04-26 18:17:27,060 INFO L754 eck$LassoCheckResult]: Loop: "[266] L766-->L766: Formula: (not (= v_~y~0_2 0)) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2} AuxVars[] AssignedVars[]" [2025-04-26 18:17:27,060 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:27,060 INFO L85 PathProgramCache]: Analyzing trace with hash 771309445, now seen corresponding path program 1 times [2025-04-26 18:17:27,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:27,060 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918622594] [2025-04-26 18:17:27,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:27,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:27,068 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-04-26 18:17:27,071 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-04-26 18:17:27,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,071 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,071 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:27,074 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-04-26 18:17:27,078 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-04-26 18:17:27,078 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,078 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,084 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:27,084 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:27,085 INFO L85 PathProgramCache]: Analyzing trace with hash 297, now seen corresponding path program 1 times [2025-04-26 18:17:27,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:27,085 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864089700] [2025-04-26 18:17:27,085 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:27,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:27,089 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:27,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:27,089 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,089 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:27,090 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-04-26 18:17:27,090 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-04-26 18:17:27,090 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,090 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,093 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:27,094 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-26 18:17:27,094 INFO L85 PathProgramCache]: Analyzing trace with hash -1859210715, now seen corresponding path program 1 times [2025-04-26 18:17:27,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-26 18:17:27,094 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685174286] [2025-04-26 18:17:27,094 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-26 18:17:27,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-26 18:17:27,099 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 38 statements into 1 equivalence classes. [2025-04-26 18:17:27,102 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 38 of 38 statements. [2025-04-26 18:17:27,102 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,104 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,104 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:27,106 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 38 statements into 1 equivalence classes. [2025-04-26 18:17:27,109 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 38 of 38 statements. [2025-04-26 18:17:27,109 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,109 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,112 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-26 18:17:27,563 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-04-26 18:17:27,567 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-04-26 18:17:27,567 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,567 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,567 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-26 18:17:27,572 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-04-26 18:17:27,576 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-04-26 18:17:27,576 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-26 18:17:27,576 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-26 18:17:27,606 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2025-04-26 18:17:27,662 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.04 06:17:27 BoogieIcfgContainer [2025-04-26 18:17:27,662 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-04-26 18:17:27,665 INFO L158 Benchmark]: Toolchain (without parser) took 2946.18ms. Allocated memory was 125.8MB in the beginning and 264.2MB in the end (delta: 138.4MB). Free memory was 84.1MB in the beginning and 188.3MB in the end (delta: -104.2MB). Peak memory consumption was 33.8MB. Max. memory is 8.0GB. [2025-04-26 18:17:27,665 INFO L158 Benchmark]: CDTParser took 0.70ms. Allocated memory is still 159.4MB. Free memory is still 87.4MB. There was no memory consumed. Max. memory is 8.0GB. [2025-04-26 18:17:27,665 INFO L158 Benchmark]: CACSL2BoogieTranslator took 409.24ms. Allocated memory is still 125.8MB. Free memory was 84.1MB in the beginning and 62.1MB in the end (delta: 22.1MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. [2025-04-26 18:17:27,666 INFO L158 Benchmark]: Boogie Procedure Inliner took 27.55ms. Allocated memory is still 125.8MB. Free memory was 62.1MB in the beginning and 60.1MB in the end (delta: 1.9MB). There was no memory consumed. Max. memory is 8.0GB. [2025-04-26 18:17:27,666 INFO L158 Benchmark]: Boogie Preprocessor took 32.43ms. Allocated memory is still 125.8MB. Free memory was 60.1MB in the beginning and 58.8MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 8.0GB. [2025-04-26 18:17:27,666 INFO L158 Benchmark]: RCFGBuilder took 285.29ms. Allocated memory is still 125.8MB. Free memory was 58.8MB in the beginning and 45.9MB in the end (delta: 12.9MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2025-04-26 18:17:27,667 INFO L158 Benchmark]: BuchiAutomizer took 2186.30ms. Allocated memory was 125.8MB in the beginning and 264.2MB in the end (delta: 138.4MB). Free memory was 45.9MB in the beginning and 188.3MB in the end (delta: -142.4MB). There was no memory consumed. Max. memory is 8.0GB. [2025-04-26 18:17:27,668 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.70ms. Allocated memory is still 159.4MB. Free memory is still 87.4MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 409.24ms. Allocated memory is still 125.8MB. Free memory was 84.1MB in the beginning and 62.1MB in the end (delta: 22.1MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 27.55ms. Allocated memory is still 125.8MB. Free memory was 62.1MB in the beginning and 60.1MB in the end (delta: 1.9MB). There was no memory consumed. Max. memory is 8.0GB. * Boogie Preprocessor took 32.43ms. Allocated memory is still 125.8MB. Free memory was 60.1MB in the beginning and 58.8MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 8.0GB. * RCFGBuilder took 285.29ms. Allocated memory is still 125.8MB. Free memory was 58.8MB in the beginning and 45.9MB in the end (delta: 12.9MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * BuchiAutomizer took 2186.30ms. Allocated memory was 125.8MB in the beginning and 264.2MB in the end (delta: 138.4MB). Free memory was 45.9MB in the beginning and 188.3MB in the end (delta: -142.4MB). There was no memory consumed. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.0s and 5 iterations. TraceHistogramMax:1. Analysis of lassos took 0.9s. Construction of modules took 0.0s. Büchi inclusion checks took 0.3s. Highest rank in rank-based complementation 0. Minimization of det autom 4. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 4 MinimizatonAttempts, 309 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 163 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 163 mSDsluCounter, 602 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 228 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 85 IncrementalHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 374 mSDtfsCounter, 85 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI1 SFLT0 conc0 concLT0 SILN3 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.5s InitialAbstraction: Time to compute Ample Reduction [ms]: 568, Number of transitions in reduction automaton: 2929, Number of states in reduction automaton: 1344, Underlying: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 4 terminating modules (4 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.4 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 568 locations. - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 766]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L731] 0 atomic_int x, y; VAL [x=0, y=0] [L732] 0 atomic_int b1, b2; VAL [b1=0, b2=0, x=0, y=0] [L733] 0 int X; VAL [X=0, b1=0, b2=0, x=0, y=0] [L787] 0 pthread_t t1, t2; VAL [X=0, b1=0, b2=0, x=0, y=0] [L788] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [X=0, \at(_, Pre)={0:0}, b1=0, b2=0, t1=-1, x=0, y=0] [L736] 1 b1 = 1 VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=0, y=0] [L737] 1 x = 1 VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=1, y=0] [L738] COND FALSE 1 !(y != 0) VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=1, y=0] [L743] 1 y = 1 VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=1, y=1] [L789] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, t1=-1, t2=0, x=1, y=1] [L762] 2 b2 = 1 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=1, y=1] [L763] 2 x = 2 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y=1] [L764] COND TRUE 2 y != 0 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y=1] [L765] 2 b2 = 0 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=2, y=1] Loop: [L766] COND TRUE y != 0 End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 766]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L731] 0 atomic_int x, y; VAL [x=0, y=0] [L732] 0 atomic_int b1, b2; VAL [b1=0, b2=0, x=0, y=0] [L733] 0 int X; VAL [X=0, b1=0, b2=0, x=0, y=0] [L787] 0 pthread_t t1, t2; VAL [X=0, b1=0, b2=0, x=0, y=0] [L788] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [X=0, \at(_, Pre)={0:0}, b1=0, b2=0, t1=-1, x=0, y=0] [L736] 1 b1 = 1 VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=0, y=0] [L737] 1 x = 1 VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=1, y=0] [L738] COND FALSE 1 !(y != 0) VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=1, y=0] [L743] 1 y = 1 VAL [X=0, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, x=1, y=1] [L789] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, b1=1, b2=0, t1=-1, t2=0, x=1, y=1] [L762] 2 b2 = 1 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=1, y=1] [L763] 2 x = 2 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y=1] [L764] COND TRUE 2 y != 0 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y=1] [L765] 2 b2 = 0 VAL [X=0, \at(_, Pre)={0:0}, \at(_, Pre)={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=2, y=1] Loop: [L766] COND TRUE y != 0 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-04-26 18:17:27,681 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request...