./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/pthread-ext/25_stack-pthread.i --full-output --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b86fb0b7 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../../../trunk/examples/svcomp/pthread-ext/25_stack-pthread.i -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6ceb3f3e6275485c63fced12b91c17e53ff4ff51a32d000ec6d2fb8f40929150 --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.conditional-comm-b86fb0b-m [2024-10-18 18:31:53,279 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-18 18:31:53,328 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2024-10-18 18:31:53,333 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-18 18:31:53,334 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-18 18:31:53,352 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-18 18:31:53,354 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-18 18:31:53,354 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-18 18:31:53,355 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-18 18:31:53,356 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-18 18:31:53,356 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-18 18:31:53,357 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-18 18:31:53,357 INFO L153 SettingsManager]: * Use SBE=true [2024-10-18 18:31:53,357 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-18 18:31:53,358 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-18 18:31:53,358 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-18 18:31:53,359 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-18 18:31:53,359 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-18 18:31:53,359 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-18 18:31:53,359 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-18 18:31:53,359 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-18 18:31:53,361 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-18 18:31:53,361 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-18 18:31:53,362 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-18 18:31:53,362 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-18 18:31:53,362 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-18 18:31:53,362 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-18 18:31:53,362 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-18 18:31:53,363 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-18 18:31:53,363 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-18 18:31:53,363 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 18:31:53,363 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-18 18:31:53,363 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-18 18:31:53,363 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-10-18 18:31:53,364 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2024-10-18 18:31:53,365 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6ceb3f3e6275485c63fced12b91c17e53ff4ff51a32d000ec6d2fb8f40929150 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 5 [2024-10-18 18:31:53,574 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-18 18:31:53,595 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-18 18:31:53,597 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-18 18:31:53,598 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-18 18:31:53,598 INFO L274 PluginConnector]: CDTParser initialized [2024-10-18 18:31:53,599 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-ext/25_stack-pthread.i [2024-10-18 18:31:54,830 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-18 18:31:55,043 INFO L384 CDTParser]: Found 1 translation units. [2024-10-18 18:31:55,045 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack-pthread.i [2024-10-18 18:31:55,062 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/126a9d46a/d340b70338154aec903cff974db3c7b2/FLAG0d5d71c21 [2024-10-18 18:31:55,075 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/126a9d46a/d340b70338154aec903cff974db3c7b2 [2024-10-18 18:31:55,078 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-18 18:31:55,079 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-18 18:31:55,081 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-18 18:31:55,082 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-18 18:31:55,086 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-18 18:31:55,087 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,088 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ad1aa71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55, skipping insertion in model container [2024-10-18 18:31:55,088 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,129 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-18 18:31:55,465 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack-pthread.i[31344,31357] [2024-10-18 18:31:55,478 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 18:31:55,490 INFO L200 MainTranslator]: Completed pre-run [2024-10-18 18:31:55,543 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack-pthread.i[31344,31357] [2024-10-18 18:31:55,547 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 18:31:55,586 INFO L204 MainTranslator]: Completed translation [2024-10-18 18:31:55,586 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55 WrapperNode [2024-10-18 18:31:55,586 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-18 18:31:55,588 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-18 18:31:55,588 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-18 18:31:55,588 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-18 18:31:55,594 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,609 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,630 INFO L138 Inliner]: procedures = 171, calls = 35, calls flagged for inlining = 9, calls inlined = 8, statements flattened = 133 [2024-10-18 18:31:55,630 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-18 18:31:55,631 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-18 18:31:55,631 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-18 18:31:55,631 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-18 18:31:55,638 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,638 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,640 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,641 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,649 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,655 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,656 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,661 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,663 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-18 18:31:55,663 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-18 18:31:55,663 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-18 18:31:55,663 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-18 18:31:55,664 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (1/1) ... [2024-10-18 18:31:55,672 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 18:31:55,684 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:31:55,697 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-10-18 18:31:55,704 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-10-18 18:31:55,744 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2024-10-18 18:31:55,745 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2024-10-18 18:31:55,745 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2024-10-18 18:31:55,745 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-10-18 18:31:55,746 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-18 18:31:55,746 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-10-18 18:31:55,746 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-10-18 18:31:55,746 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexUnlock [2024-10-18 18:31:55,746 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-18 18:31:55,746 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-18 18:31:55,748 WARN L207 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2024-10-18 18:31:55,873 INFO L238 CfgBuilder]: Building ICFG [2024-10-18 18:31:55,875 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-18 18:31:56,096 INFO L283 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2024-10-18 18:31:56,098 INFO L287 CfgBuilder]: Performing block encoding [2024-10-18 18:31:56,247 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-18 18:31:56,247 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-18 18:31:56,248 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 06:31:56 BoogieIcfgContainer [2024-10-18 18:31:56,248 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-18 18:31:56,251 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-18 18:31:56,251 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-18 18:31:56,254 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-18 18:31:56,254 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.10 06:31:55" (1/3) ... [2024-10-18 18:31:56,255 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21131a7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 06:31:56, skipping insertion in model container [2024-10-18 18:31:56,255 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:31:55" (2/3) ... [2024-10-18 18:31:56,255 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21131a7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 06:31:56, skipping insertion in model container [2024-10-18 18:31:56,255 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 06:31:56" (3/3) ... [2024-10-18 18:31:56,257 INFO L112 eAbstractionObserver]: Analyzing ICFG 25_stack-pthread.i [2024-10-18 18:31:56,271 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-18 18:31:56,271 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-18 18:31:56,272 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-10-18 18:31:56,326 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:31:56,364 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:31:56,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:31:56,364 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:31:56,365 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:31:56,366 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-10-18 18:31:56,428 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:31:56,443 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:56,446 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread1of1ForFork0 ======== [2024-10-18 18:31:56,452 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@36ea969a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:31:56,453 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:31:57,153 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:31:57,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:57,156 INFO L85 PathProgramCache]: Analyzing trace with hash -1921419239, now seen corresponding path program 1 times [2024-10-18 18:31:57,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:57,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815130255] [2024-10-18 18:31:57,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:57,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:57,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:31:57,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:31:57,402 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:31:57,402 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815130255] [2024-10-18 18:31:57,402 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815130255] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:31:57,402 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:31:57,402 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:31:57,403 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104955902] [2024-10-18 18:31:57,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:31:57,409 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:31:57,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:31:57,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:31:57,427 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:31:57,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:57,429 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:31:57,429 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 2 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:31:57,429 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:57,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:57,491 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-18 18:31:57,491 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:31:57,491 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:57,491 INFO L85 PathProgramCache]: Analyzing trace with hash -1004362886, now seen corresponding path program 1 times [2024-10-18 18:31:57,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:57,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046811130] [2024-10-18 18:31:57,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:57,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:57,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:31:57,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:31:57,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:31:57,611 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046811130] [2024-10-18 18:31:57,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2046811130] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:31:57,612 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:31:57,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:31:57,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411130433] [2024-10-18 18:31:57,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:31:57,613 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:31:57,613 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:31:57,614 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:31:57,614 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:31:57,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:57,615 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:31:57,615 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:31:57,616 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:57,616 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:57,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:57,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:31:57,804 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-10-18 18:31:57,804 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:31:57,805 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:57,806 INFO L85 PathProgramCache]: Analyzing trace with hash 753684577, now seen corresponding path program 1 times [2024-10-18 18:31:57,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:57,806 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637895359] [2024-10-18 18:31:57,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:57,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:57,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:31:58,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:31:58,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:31:58,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637895359] [2024-10-18 18:31:58,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [637895359] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:31:58,026 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:31:58,027 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-18 18:31:58,027 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24688918] [2024-10-18 18:31:58,027 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:31:58,027 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:31:58,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:31:58,028 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:31:58,030 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:31:58,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:58,032 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:31:58,032 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:31:58,032 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:58,032 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:31:58,032 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:58,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:58,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:31:58,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-10-18 18:31:58,919 INFO L782 garLoopResultBuilder]: Registering result SAFE for location thr1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-10-18 18:31:58,920 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-10-18 18:31:58,925 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1] [2024-10-18 18:31:58,926 INFO L312 ceAbstractionStarter]: Result for error location thr1Thread1of1ForFork0 was SAFE (1/2) [2024-10-18 18:31:58,929 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:31:58,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:31:58,929 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:31:58,931 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:31:58,932 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Waiting until timeout for monitored process [2024-10-18 18:31:58,958 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:31:58,959 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:58,959 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 18:31:58,960 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@36ea969a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:31:58,960 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:31:59,372 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:31:59,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:59,373 INFO L85 PathProgramCache]: Analyzing trace with hash 352059429, now seen corresponding path program 1 times [2024-10-18 18:31:59,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:59,374 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120851036] [2024-10-18 18:31:59,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:59,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:59,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:31:59,404 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:31:59,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:31:59,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120851036] [2024-10-18 18:31:59,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2120851036] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:31:59,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:31:59,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:31:59,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797762824] [2024-10-18 18:31:59,406 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:31:59,407 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:31:59,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:31:59,408 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:31:59,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:31:59,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:59,409 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:31:59,409 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 2 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:31:59,409 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:59,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:59,469 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-10-18 18:31:59,469 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:31:59,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:59,470 INFO L85 PathProgramCache]: Analyzing trace with hash 1174918982, now seen corresponding path program 1 times [2024-10-18 18:31:59,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:59,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105968683] [2024-10-18 18:31:59,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:59,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:59,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:31:59,531 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:31:59,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:31:59,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105968683] [2024-10-18 18:31:59,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1105968683] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:31:59,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:31:59,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:31:59,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1718178744] [2024-10-18 18:31:59,532 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:31:59,533 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:31:59,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:31:59,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:31:59,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:31:59,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:59,534 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:31:59,534 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.4) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:31:59,534 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:59,534 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:59,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:59,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:31:59,669 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-10-18 18:31:59,669 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:31:59,669 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:59,669 INFO L85 PathProgramCache]: Analyzing trace with hash -1558583699, now seen corresponding path program 1 times [2024-10-18 18:31:59,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:59,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545800703] [2024-10-18 18:31:59,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:59,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:59,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:31:59,858 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:31:59,859 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:31:59,859 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [545800703] [2024-10-18 18:31:59,859 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [545800703] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:31:59,859 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:31:59,859 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-18 18:31:59,859 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828364389] [2024-10-18 18:31:59,859 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:31:59,859 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:31:59,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:31:59,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:31:59,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:31:59,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:59,860 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:31:59,860 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.0) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:31:59,860 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:59,860 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:31:59,860 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:31:59,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:31:59,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:31:59,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:31:59,982 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-10-18 18:31:59,982 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:31:59,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:31:59,983 INFO L85 PathProgramCache]: Analyzing trace with hash -1558582738, now seen corresponding path program 1 times [2024-10-18 18:31:59,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:31:59,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892937376] [2024-10-18 18:31:59,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:31:59,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:31:59,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:31:59,998 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 18:32:00,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:00,041 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 18:32:00,041 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 18:32:00,042 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2024-10-18 18:32:00,042 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-10-18 18:32:00,044 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1] [2024-10-18 18:32:00,044 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (2/2) [2024-10-18 18:32:00,045 WARN L239 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 18:32:00,045 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2024-10-18 18:32:00,069 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:00,071 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:00,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:00,072 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:00,073 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:00,075 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Waiting until timeout for monitored process [2024-10-18 18:32:00,107 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:00,108 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:00,108 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 18:32:00,108 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@36ea969a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:00,108 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:01,209 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:01,209 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:01,209 INFO L85 PathProgramCache]: Analyzing trace with hash -476372807, now seen corresponding path program 1 times [2024-10-18 18:32:01,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:01,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088237286] [2024-10-18 18:32:01,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:01,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:01,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:01,266 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:01,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:01,267 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088237286] [2024-10-18 18:32:01,267 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2088237286] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:01,267 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:01,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:01,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241790168] [2024-10-18 18:32:01,268 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:01,268 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:01,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:01,269 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:01,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:01,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:01,270 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:01,271 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 2 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:01,272 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:01,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:01,346 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-10-18 18:32:01,346 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:01,346 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:01,346 INFO L85 PathProgramCache]: Analyzing trace with hash 261524472, now seen corresponding path program 1 times [2024-10-18 18:32:01,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:01,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21092405] [2024-10-18 18:32:01,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:01,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:01,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:01,426 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:01,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:01,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21092405] [2024-10-18 18:32:01,427 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21092405] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:01,427 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:01,427 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:01,427 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [748567621] [2024-10-18 18:32:01,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:01,427 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:01,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:01,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:01,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:01,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:01,428 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:01,429 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:01,429 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:01,429 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:01,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:01,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:01,770 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-10-18 18:32:01,770 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:01,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:01,770 INFO L85 PathProgramCache]: Analyzing trace with hash -185061823, now seen corresponding path program 1 times [2024-10-18 18:32:01,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:01,770 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339296748] [2024-10-18 18:32:01,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:01,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:01,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:01,843 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:01,843 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:01,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339296748] [2024-10-18 18:32:01,843 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339296748] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:01,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [971794590] [2024-10-18 18:32:01,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:01,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:01,844 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:01,846 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:01,847 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-18 18:32:01,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:01,944 INFO L255 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-18 18:32:01,946 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:02,021 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:02,022 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:02,068 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:02,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [971794590] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:02,068 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:02,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-10-18 18:32:02,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792018304] [2024-10-18 18:32:02,068 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:02,069 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:02,069 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:02,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:02,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:02,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:02,070 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:02,070 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.0) internal successors, (98), 6 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:02,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:02,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:02,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:02,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,161 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:02,344 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:02,345 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:02,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:02,345 INFO L85 PathProgramCache]: Analyzing trace with hash 637797730, now seen corresponding path program 1 times [2024-10-18 18:32:02,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:02,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529862930] [2024-10-18 18:32:02,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:02,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:02,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:02,417 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:02,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:02,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529862930] [2024-10-18 18:32:02,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529862930] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:02,418 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:02,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:02,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1193884090] [2024-10-18 18:32:02,418 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:02,418 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:02,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:02,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:02,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:02,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:02,419 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:02,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:02,419 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:02,419 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,420 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,420 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:02,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:02,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,522 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-10-18 18:32:02,522 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:02,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:02,522 INFO L85 PathProgramCache]: Analyzing trace with hash 637798691, now seen corresponding path program 1 times [2024-10-18 18:32:02,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:02,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520232663] [2024-10-18 18:32:02,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:02,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:02,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:02,605 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:02,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:02,605 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520232663] [2024-10-18 18:32:02,606 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [520232663] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:02,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1781397681] [2024-10-18 18:32:02,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:02,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:02,606 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:02,608 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:02,608 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-18 18:32:02,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:02,698 INFO L255 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:02,700 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:02,743 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:02,743 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:02,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1781397681] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:02,743 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:02,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2024-10-18 18:32:02,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646866017] [2024-10-18 18:32:02,744 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:02,744 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:02,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:02,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:02,745 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:02,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:02,745 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:02,745 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.666666666666667) internal successors, (46), 5 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:02,745 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:02,745 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,745 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,745 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,745 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:02,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:02,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:02,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:02,970 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:03,160 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-10-18 18:32:03,161 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:03,161 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:03,161 INFO L85 PathProgramCache]: Analyzing trace with hash -396656028, now seen corresponding path program 1 times [2024-10-18 18:32:03,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:03,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [976475459] [2024-10-18 18:32:03,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:03,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:03,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:03,362 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:03,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:03,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [976475459] [2024-10-18 18:32:03,363 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [976475459] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:03,363 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:03,363 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-18 18:32:03,363 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357107738] [2024-10-18 18:32:03,363 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:03,364 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:03,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:03,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:03,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:03,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:03,364 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:03,365 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 5.555555555555555) internal successors, (50), 8 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:03,365 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:03,365 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,365 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,365 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,365 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:03,365 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:03,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:03,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:03,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:03,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:03,781 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-10-18 18:32:03,781 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:03,781 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:03,781 INFO L85 PathProgramCache]: Analyzing trace with hash -917399844, now seen corresponding path program 1 times [2024-10-18 18:32:03,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:03,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684792224] [2024-10-18 18:32:03,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:03,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:03,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:03,865 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:32:03,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:03,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684792224] [2024-10-18 18:32:03,865 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684792224] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:03,865 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:03,866 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:03,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2030117390] [2024-10-18 18:32:03,868 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:03,869 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:03,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:03,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:03,870 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:03,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:03,870 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:03,870 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:03,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:03,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:03,871 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:03,871 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:03,871 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:03,871 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:04,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:04,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:04,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:04,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:04,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,085 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-10-18 18:32:04,085 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:04,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:04,085 INFO L85 PathProgramCache]: Analyzing trace with hash -1914472197, now seen corresponding path program 1 times [2024-10-18 18:32:04,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:04,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [189777583] [2024-10-18 18:32:04,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:04,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:04,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:04,166 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:04,167 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:04,167 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [189777583] [2024-10-18 18:32:04,167 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [189777583] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:04,167 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [554684637] [2024-10-18 18:32:04,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:04,168 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:04,168 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:04,169 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:04,170 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-18 18:32:04,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:04,276 INFO L255 TraceCheckSpWp]: Trace formula consists of 343 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:04,278 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:04,319 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:04,319 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:04,378 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:04,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [554684637] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:04,379 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:04,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2024-10-18 18:32:04,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1025915825] [2024-10-18 18:32:04,379 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:04,379 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-10-18 18:32:04,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:04,380 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-10-18 18:32:04,380 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-10-18 18:32:04,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:04,380 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:04,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 11.2) internal successors, (112), 9 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,380 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:04,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:04,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:04,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:04,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:04,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:04,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:04,651 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-10-18 18:32:04,841 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2024-10-18 18:32:04,842 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:04,842 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:04,842 INFO L85 PathProgramCache]: Analyzing trace with hash -1207726502, now seen corresponding path program 1 times [2024-10-18 18:32:04,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:04,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021641426] [2024-10-18 18:32:04,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:04,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:04,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:05,002 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:32:05,003 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:05,003 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021641426] [2024-10-18 18:32:05,003 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2021641426] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:05,003 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:05,003 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:05,004 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1000244398] [2024-10-18 18:32:05,004 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:05,004 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:05,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:05,005 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:05,005 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:05,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:05,005 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:05,006 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:05,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:05,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:05,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:05,007 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:05,007 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,007 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:05,007 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:05,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:05,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:05,088 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-10-18 18:32:05,088 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:05,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:05,088 INFO L85 PathProgramCache]: Analyzing trace with hash -1207725541, now seen corresponding path program 1 times [2024-10-18 18:32:05,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:05,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151518028] [2024-10-18 18:32:05,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:05,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:05,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:05,112 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 18:32:05,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:05,151 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 18:32:05,151 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 18:32:05,152 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2024-10-18 18:32:05,152 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-10-18 18:32:05,154 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-18 18:32:05,154 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (1/3) [2024-10-18 18:32:05,154 WARN L239 ceAbstractionStarter]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 18:32:05,154 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 3 thread instances. [2024-10-18 18:32:05,186 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:05,188 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:05,188 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:05,189 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:05,190 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:05,191 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (8)] Waiting until timeout for monitored process [2024-10-18 18:32:05,230 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:05,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:05,230 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread3of3ForFork0 ======== [2024-10-18 18:32:05,231 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@36ea969a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:05,231 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:07,186 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:07,187 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:07,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1964417026, now seen corresponding path program 1 times [2024-10-18 18:32:07,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:07,187 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [768692453] [2024-10-18 18:32:07,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:07,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:07,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:07,227 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:07,227 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:07,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [768692453] [2024-10-18 18:32:07,227 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [768692453] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:07,227 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:07,228 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:07,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [530404370] [2024-10-18 18:32:07,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:07,228 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:07,228 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:07,228 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:07,228 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:07,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:07,229 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:07,229 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 2 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:07,229 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:07,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:07,334 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-10-18 18:32:07,334 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:07,334 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:07,334 INFO L85 PathProgramCache]: Analyzing trace with hash -843580769, now seen corresponding path program 1 times [2024-10-18 18:32:07,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:07,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713946411] [2024-10-18 18:32:07,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:07,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:07,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:07,417 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:07,418 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:07,418 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713946411] [2024-10-18 18:32:07,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [713946411] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:07,418 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:07,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:07,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098510505] [2024-10-18 18:32:07,418 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:07,419 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:07,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:07,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:07,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:07,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:07,419 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:07,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 4 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:07,419 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:07,419 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:07,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:07,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:07,921 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-10-18 18:32:07,921 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:07,921 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:07,921 INFO L85 PathProgramCache]: Analyzing trace with hash -984220833, now seen corresponding path program 1 times [2024-10-18 18:32:07,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:07,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665861671] [2024-10-18 18:32:07,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:07,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:07,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:07,995 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:07,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:07,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665861671] [2024-10-18 18:32:07,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1665861671] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:07,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1859882173] [2024-10-18 18:32:07,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:07,997 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:07,997 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:07,998 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:08,000 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-18 18:32:08,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:08,134 INFO L255 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-18 18:32:08,136 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:08,177 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:08,178 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:08,218 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:08,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1859882173] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:08,218 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:08,218 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-10-18 18:32:08,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1907937308] [2024-10-18 18:32:08,219 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:08,219 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:08,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:08,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:08,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:08,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:08,220 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:08,220 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 6 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:08,220 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:08,220 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:08,220 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:08,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:08,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:08,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:08,364 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-10-18 18:32:08,551 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:08,552 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:08,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:08,552 INFO L85 PathProgramCache]: Analyzing trace with hash 2114606527, now seen corresponding path program 1 times [2024-10-18 18:32:08,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:08,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472103120] [2024-10-18 18:32:08,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:08,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:08,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:08,620 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:08,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:08,621 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472103120] [2024-10-18 18:32:08,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472103120] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:08,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:08,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:08,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637355595] [2024-10-18 18:32:08,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:08,622 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:08,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:08,622 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:08,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:08,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:08,622 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:08,622 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:08,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:08,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:08,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:08,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:09,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:09,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:09,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,008 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-10-18 18:32:09,008 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:09,009 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:09,009 INFO L85 PathProgramCache]: Analyzing trace with hash -1300592888, now seen corresponding path program 1 times [2024-10-18 18:32:09,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:09,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236472476] [2024-10-18 18:32:09,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:09,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:09,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:09,127 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-10-18 18:32:09,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:09,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236472476] [2024-10-18 18:32:09,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [236472476] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:09,128 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:09,128 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:09,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864691791] [2024-10-18 18:32:09,128 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:09,128 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:09,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:09,129 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:09,129 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:09,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:09,129 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:09,129 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 19.666666666666668) internal successors, (59), 4 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:09,129 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:09,129 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,129 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:09,130 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,130 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:09,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:09,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:09,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-10-18 18:32:09,616 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:09,616 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:09,616 INFO L85 PathProgramCache]: Analyzing trace with hash 308452227, now seen corresponding path program 1 times [2024-10-18 18:32:09,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:09,616 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722039863] [2024-10-18 18:32:09,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:09,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:09,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:09,722 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 18:32:09,722 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:09,722 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722039863] [2024-10-18 18:32:09,723 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722039863] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:09,723 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:09,723 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-10-18 18:32:09,723 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073181994] [2024-10-18 18:32:09,723 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:09,723 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:09,723 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:09,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:09,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-10-18 18:32:09,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:09,724 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:09,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.5) internal successors, (93), 6 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:09,724 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:09,724 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,724 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:09,724 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,724 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:09,724 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:10,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:10,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:10,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:10,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:10,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:10,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:10,258 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-10-18 18:32:10,259 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:10,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:10,259 INFO L85 PathProgramCache]: Analyzing trace with hash 503507777, now seen corresponding path program 1 times [2024-10-18 18:32:10,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:10,259 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453703670] [2024-10-18 18:32:10,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:10,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:10,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:10,398 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 39 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:10,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:10,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1453703670] [2024-10-18 18:32:10,399 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1453703670] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:10,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [562680675] [2024-10-18 18:32:10,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:10,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:10,399 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:10,400 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:10,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-18 18:32:10,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:10,568 INFO L255 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:10,570 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:10,632 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 18:32:10,634 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:10,635 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [562680675] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:10,635 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:10,635 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2024-10-18 18:32:10,635 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1398761893] [2024-10-18 18:32:10,635 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:10,635 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:10,635 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:10,636 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:10,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2024-10-18 18:32:10,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:10,636 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:10,636 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:10,636 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:11,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:11,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:11,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:11,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:11,042 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:11,228 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:11,229 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:11,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:11,230 INFO L85 PathProgramCache]: Analyzing trace with hash 2045647571, now seen corresponding path program 1 times [2024-10-18 18:32:11,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:11,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291637026] [2024-10-18 18:32:11,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:11,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:11,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:11,330 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 17 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:11,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:11,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291637026] [2024-10-18 18:32:11,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [291637026] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:11,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [141443600] [2024-10-18 18:32:11,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:11,331 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:11,331 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:11,332 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:11,333 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-10-18 18:32:11,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:11,493 INFO L255 TraceCheckSpWp]: Trace formula consists of 463 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-18 18:32:11,494 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:11,552 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:11,553 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:11,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [141443600] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:11,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:11,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 7 [2024-10-18 18:32:11,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1477300069] [2024-10-18 18:32:11,553 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:11,553 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:11,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:11,554 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:11,554 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-10-18 18:32:11,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:11,554 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:11,554 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.0) internal successors, (84), 6 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:11,554 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:11,554 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,554 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:11,555 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,555 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,555 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:11,555 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:11,555 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:11,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:11,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:11,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:11,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:11,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:11,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:11,783 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:11,970 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2024-10-18 18:32:11,971 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:11,971 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:11,971 INFO L85 PathProgramCache]: Analyzing trace with hash 1474719939, now seen corresponding path program 1 times [2024-10-18 18:32:11,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:11,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155689437] [2024-10-18 18:32:11,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:11,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:11,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:12,083 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:32:12,084 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:12,084 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155689437] [2024-10-18 18:32:12,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155689437] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:12,084 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:12,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:12,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310345294] [2024-10-18 18:32:12,084 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:12,085 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:12,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:12,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:12,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:12,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:12,085 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:12,085 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 23.0) internal successors, (69), 4 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:12,086 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:12,794 INFO L85 PathProgramCache]: Analyzing trace with hash -1207850224, now seen corresponding path program 1 times [2024-10-18 18:32:12,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:12,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:12,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:12,917 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 142 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 18:32:12,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:12,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:12,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:13,070 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 142 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 18:32:13,071 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:13,071 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:14,504 INFO L85 PathProgramCache]: Analyzing trace with hash -1683489689, now seen corresponding path program 1 times [2024-10-18 18:32:14,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:14,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:14,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:14,607 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-10-18 18:32:14,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:14,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:14,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:14,702 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-10-18 18:32:14,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:14,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:15,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:15,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:15,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:15,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:15,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:15,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-10-18 18:32:15,682 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:15,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:15,683 INFO L85 PathProgramCache]: Analyzing trace with hash 997038134, now seen corresponding path program 1 times [2024-10-18 18:32:15,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:15,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526897106] [2024-10-18 18:32:15,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:15,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:15,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:15,881 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:32:15,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:15,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526897106] [2024-10-18 18:32:15,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [526897106] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:15,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:15,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:15,882 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022679897] [2024-10-18 18:32:15,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:15,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:15,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:15,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:15,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:15,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:15,883 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:15,883 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:15,883 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:15,884 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:16,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:32:16,607 INFO L85 PathProgramCache]: Analyzing trace with hash -1648041374, now seen corresponding path program 1 times [2024-10-18 18:32:16,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:16,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:16,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:16,926 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:16,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:16,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:16,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:17,176 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:17,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:17,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2024-10-18 18:32:19,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 884 treesize of output 836 [2024-10-18 18:32:19,084 INFO L85 PathProgramCache]: Analyzing trace with hash 2111150371, now seen corresponding path program 1 times [2024-10-18 18:32:19,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:19,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:19,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:19,221 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:32:19,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:19,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:19,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:19,394 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:32:19,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:19,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=318, Unknown=0, NotChecked=0, Total=380 [2024-10-18 18:32:20,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:32:20,962 INFO L85 PathProgramCache]: Analyzing trace with hash 1856527907, now seen corresponding path program 1 times [2024-10-18 18:32:20,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:20,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:20,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:21,146 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:32:21,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:21,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:21,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:21,250 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:32:21,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:32:21,984 INFO L85 PathProgramCache]: Analyzing trace with hash 1030814471, now seen corresponding path program 1 times [2024-10-18 18:32:21,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:21,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:22,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:22,132 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2024-10-18 18:32:22,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:22,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:22,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:22,292 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2024-10-18 18:32:22,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:22,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1212, Unknown=0, NotChecked=0, Total=1406 [2024-10-18 18:32:23,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:32:23,981 INFO L85 PathProgramCache]: Analyzing trace with hash 445445431, now seen corresponding path program 1 times [2024-10-18 18:32:23,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:23,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:24,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:24,227 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:24,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:24,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:24,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:24,469 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:25,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:32:25,104 INFO L85 PathProgramCache]: Analyzing trace with hash -1038048111, now seen corresponding path program 1 times [2024-10-18 18:32:25,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:25,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:25,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:25,440 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:25,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:25,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:25,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:25,619 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:25,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:32:25,727 INFO L85 PathProgramCache]: Analyzing trace with hash -971558923, now seen corresponding path program 1 times [2024-10-18 18:32:25,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:25,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:25,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:25,912 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:32:25,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:25,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:26,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:26,166 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:32:26,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:32:26,501 INFO L85 PathProgramCache]: Analyzing trace with hash -1008494444, now seen corresponding path program 1 times [2024-10-18 18:32:26,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:26,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:26,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:26,697 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:32:26,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:26,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:26,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:26,889 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:32:27,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:32:27,039 INFO L85 PathProgramCache]: Analyzing trace with hash -814361452, now seen corresponding path program 1 times [2024-10-18 18:32:27,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:27,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:27,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:27,664 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 75 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:27,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:27,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:27,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:28,061 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 75 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:28,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 434 treesize of output 410 [2024-10-18 18:32:28,189 INFO L85 PathProgramCache]: Analyzing trace with hash 418603338, now seen corresponding path program 1 times [2024-10-18 18:32:28,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:28,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:28,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:28,550 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 107 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 18:32:28,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:28,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:28,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:29,053 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 107 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 18:32:29,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:32:29,222 INFO L85 PathProgramCache]: Analyzing trace with hash 1151118497, now seen corresponding path program 1 times [2024-10-18 18:32:29,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:29,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:29,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:29,614 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 112 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 18:32:29,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:29,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:29,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:30,241 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 112 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 18:32:30,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:32:30,359 INFO L85 PathProgramCache]: Analyzing trace with hash 720943090, now seen corresponding path program 1 times [2024-10-18 18:32:30,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:30,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:30,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:30,890 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 97 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:30,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:30,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:30,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:31,509 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 97 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:31,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:32:31,601 INFO L85 PathProgramCache]: Analyzing trace with hash 768005697, now seen corresponding path program 1 times [2024-10-18 18:32:31,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:31,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:31,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:32,253 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:32,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:32,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:32,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:32,714 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:32,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:32:32,779 INFO L85 PathProgramCache]: Analyzing trace with hash -681876766, now seen corresponding path program 1 times [2024-10-18 18:32:32,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:32,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:32,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:33,347 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:33,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:33,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:33,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:33,809 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:33,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:32:33,909 INFO L85 PathProgramCache]: Analyzing trace with hash -1464064513, now seen corresponding path program 1 times [2024-10-18 18:32:33,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:33,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:33,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:34,471 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 129 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:34,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:34,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:34,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:34,947 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 129 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:34,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:32:35,010 INFO L85 PathProgramCache]: Analyzing trace with hash -2063206068, now seen corresponding path program 1 times [2024-10-18 18:32:35,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:35,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:35,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:35,762 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 158 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:35,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:35,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:35,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:36,534 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 158 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:36,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:32:36,694 INFO L85 PathProgramCache]: Analyzing trace with hash -869805099, now seen corresponding path program 1 times [2024-10-18 18:32:36,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:36,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:36,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:37,035 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 18:32:37,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:37,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:37,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:37,365 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 18:32:48,501 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:32:48,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:32:48,546 INFO L85 PathProgramCache]: Analyzing trace with hash -504101081, now seen corresponding path program 1 times [2024-10-18 18:32:48,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:48,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:48,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:48,617 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:48,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:48,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:48,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:48,684 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:49,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1030 treesize of output 934 [2024-10-18 18:32:49,428 INFO L85 PathProgramCache]: Analyzing trace with hash -1241547536, now seen corresponding path program 1 times [2024-10-18 18:32:49,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:49,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:49,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:49,559 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:49,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:49,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:49,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:49,654 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,601 INFO L85 PathProgramCache]: Analyzing trace with hash -1050976845, now seen corresponding path program 1 times [2024-10-18 18:32:50,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:50,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,811 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:50,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,945 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1779398664, now seen corresponding path program 1 times [2024-10-18 18:32:50,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,287 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:51,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:51,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,457 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:52,316 INFO L85 PathProgramCache]: Analyzing trace with hash 568092831, now seen corresponding path program 1 times [2024-10-18 18:32:52,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:52,674 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:52,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:52,995 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:53,022 INFO L85 PathProgramCache]: Analyzing trace with hash 430949326, now seen corresponding path program 1 times [2024-10-18 18:32:53,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,289 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:53,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,571 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:53,646 INFO L85 PathProgramCache]: Analyzing trace with hash 383685806, now seen corresponding path program 1 times [2024-10-18 18:32:53,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,941 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 141 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:32:53,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:54,196 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 141 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:32:54,208 INFO L85 PathProgramCache]: Analyzing trace with hash -990701577, now seen corresponding path program 1 times [2024-10-18 18:32:54,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:54,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:54,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:54,615 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 142 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:32:54,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:54,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:54,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,028 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 142 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:32:55,125 INFO L85 PathProgramCache]: Analyzing trace with hash -1050328970, now seen corresponding path program 1 times [2024-10-18 18:32:55,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:55,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,390 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:32:55,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:55,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,654 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:32:55,677 INFO L85 PathProgramCache]: Analyzing trace with hash 1799479428, now seen corresponding path program 1 times [2024-10-18 18:32:55,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:55,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,945 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 79 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:32:55,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,213 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 79 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:32:56,380 INFO L85 PathProgramCache]: Analyzing trace with hash 482550337, now seen corresponding path program 1 times [2024-10-18 18:32:56,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,639 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 73 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:32:56,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,950 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 73 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:32:56,958 INFO L85 PathProgramCache]: Analyzing trace with hash 2074097085, now seen corresponding path program 1 times [2024-10-18 18:32:56,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:57,122 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:32:57,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:57,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:57,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:57,290 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:32:57,342 INFO L85 PathProgramCache]: Analyzing trace with hash 1399606698, now seen corresponding path program 1 times [2024-10-18 18:32:57,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:57,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:57,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:57,609 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 147 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:32:57,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:57,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:57,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:57,880 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 147 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:32:58,106 INFO L85 PathProgramCache]: Analyzing trace with hash 219450895, now seen corresponding path program 1 times [2024-10-18 18:32:58,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,285 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:32:58,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,465 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:32:58,551 INFO L85 PathProgramCache]: Analyzing trace with hash 1639520898, now seen corresponding path program 1 times [2024-10-18 18:32:58,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,733 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-10-18 18:32:58,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,914 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-10-18 18:32:58,944 INFO L85 PathProgramCache]: Analyzing trace with hash 219420250, now seen corresponding path program 1 times [2024-10-18 18:32:58,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:59,119 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:32:59,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:59,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:59,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:59,292 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:32:59,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1366327670, now seen corresponding path program 1 times [2024-10-18 18:32:59,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:59,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:59,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:59,617 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-18 18:32:59,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:59,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:59,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:59,785 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-18 18:33:02,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 542 treesize of output 494 [2024-10-18 18:33:02,922 INFO L85 PathProgramCache]: Analyzing trace with hash -483798231, now seen corresponding path program 1 times [2024-10-18 18:33:02,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:02,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:02,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:02,979 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:02,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:02,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,147 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:03,182 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:03,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 550 treesize of output 502 [2024-10-18 18:33:03,205 INFO L85 PathProgramCache]: Analyzing trace with hash 1849570434, now seen corresponding path program 1 times [2024-10-18 18:33:03,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,272 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:03,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,341 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:03,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:33:03,426 INFO L85 PathProgramCache]: Analyzing trace with hash 1068944954, now seen corresponding path program 1 times [2024-10-18 18:33:03,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,508 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:03,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,593 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:03,635 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:03,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 288 treesize of output 264 [2024-10-18 18:33:03,663 INFO L85 PathProgramCache]: Analyzing trace with hash 439918756, now seen corresponding path program 1 times [2024-10-18 18:33:03,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,751 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:03,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:03,842 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:03,888 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:03,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1038 treesize of output 942 [2024-10-18 18:33:03,944 INFO L85 PathProgramCache]: Analyzing trace with hash 2016404171, now seen corresponding path program 1 times [2024-10-18 18:33:03,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:03,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:03,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:04,076 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:04,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:04,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:04,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:04,211 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:04,256 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:04,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 514 treesize of output 466 [2024-10-18 18:33:04,300 INFO L85 PathProgramCache]: Analyzing trace with hash -2040824938, now seen corresponding path program 1 times [2024-10-18 18:33:04,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:04,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:04,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:04,410 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:33:04,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:04,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:04,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:04,519 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:33:08,934 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:08,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 514 treesize of output 466 [2024-10-18 18:33:08,971 INFO L85 PathProgramCache]: Analyzing trace with hash 375399544, now seen corresponding path program 1 times [2024-10-18 18:33:08,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:08,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:08,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:09,066 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:09,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:09,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:09,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:09,163 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:09,209 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:09,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 550 treesize of output 502 [2024-10-18 18:33:09,286 INFO L85 PathProgramCache]: Analyzing trace with hash 1619653265, now seen corresponding path program 1 times [2024-10-18 18:33:09,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:09,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:09,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:09,419 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:09,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:09,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:09,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:09,555 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:18,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1674476631, now seen corresponding path program 1 times [2024-10-18 18:33:18,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,529 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:18,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,598 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:18,724 INFO L85 PathProgramCache]: Analyzing trace with hash 369042366, now seen corresponding path program 1 times [2024-10-18 18:33:18,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,791 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:18,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,859 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:19,142 INFO L85 PathProgramCache]: Analyzing trace with hash -1607447249, now seen corresponding path program 1 times [2024-10-18 18:33:19,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:19,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:19,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:19,210 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:33:19,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:19,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:19,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:19,278 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:33:19,278 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:33:19,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=547, Invalid=5305, Unknown=0, NotChecked=0, Total=5852 [2024-10-18 18:33:59,236 INFO L85 PathProgramCache]: Analyzing trace with hash 1687307986, now seen corresponding path program 1 times [2024-10-18 18:33:59,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:59,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:59,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:59,345 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:59,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:59,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:59,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:59,458 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:59,779 INFO L85 PathProgramCache]: Analyzing trace with hash 1458921247, now seen corresponding path program 1 times [2024-10-18 18:33:59,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:59,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:00,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:00,086 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:00,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:00,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:00,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:00,193 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:01,173 INFO L85 PathProgramCache]: Analyzing trace with hash -1966416500, now seen corresponding path program 1 times [2024-10-18 18:34:01,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:01,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:01,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:01,279 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:01,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:01,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:01,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:01,385 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:01,603 INFO L85 PathProgramCache]: Analyzing trace with hash -829634287, now seen corresponding path program 1 times [2024-10-18 18:34:01,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:01,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:01,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:01,713 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:01,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:01,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:01,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:01,826 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:02,156 INFO L85 PathProgramCache]: Analyzing trace with hash 2144239990, now seen corresponding path program 1 times [2024-10-18 18:34:02,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:02,648 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-18 18:34:02,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:02,771 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:34:02,894 INFO L85 PathProgramCache]: Analyzing trace with hash 539126372, now seen corresponding path program 1 times [2024-10-18 18:34:02,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:03,006 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:03,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:03,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:03,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:03,115 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:05,486 INFO L85 PathProgramCache]: Analyzing trace with hash -412483577, now seen corresponding path program 1 times [2024-10-18 18:34:05,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:05,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:05,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:05,591 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:05,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:05,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:05,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:05,692 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:05,816 INFO L85 PathProgramCache]: Analyzing trace with hash 97638746, now seen corresponding path program 1 times [2024-10-18 18:34:05,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:05,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:05,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:05,922 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:05,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:05,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:05,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:06,027 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:08,754 INFO L85 PathProgramCache]: Analyzing trace with hash -1368669970, now seen corresponding path program 1 times [2024-10-18 18:34:08,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:08,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:08,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:08,856 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:08,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:08,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:08,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:08,959 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:09,079 INFO L85 PathProgramCache]: Analyzing trace with hash 520624675, now seen corresponding path program 1 times [2024-10-18 18:34:09,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:09,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:09,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:09,187 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:09,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:09,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:09,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:09,297 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:10,430 INFO L85 PathProgramCache]: Analyzing trace with hash 1630786700, now seen corresponding path program 1 times [2024-10-18 18:34:10,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:10,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:10,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:10,503 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:10,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:10,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:10,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:10,575 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:10,732 INFO L85 PathProgramCache]: Analyzing trace with hash -985501167, now seen corresponding path program 1 times [2024-10-18 18:34:10,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:10,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:10,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:10,974 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:10,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:10,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:11,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:11,048 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:13,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:13,574 INFO L85 PathProgramCache]: Analyzing trace with hash -671057266, now seen corresponding path program 1 times [2024-10-18 18:34:13,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:13,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:13,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:13,642 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:13,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:13,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:13,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:13,709 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:14,055 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:14,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:14,086 INFO L85 PathProgramCache]: Analyzing trace with hash -804887929, now seen corresponding path program 1 times [2024-10-18 18:34:14,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,188 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:34:14,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,287 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:34:14,361 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:14,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 532 treesize of output 484 [2024-10-18 18:34:14,398 INFO L85 PathProgramCache]: Analyzing trace with hash 1214869564, now seen corresponding path program 1 times [2024-10-18 18:34:14,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,504 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:34:14,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,612 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:34:14,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:14,694 INFO L85 PathProgramCache]: Analyzing trace with hash -1586598664, now seen corresponding path program 1 times [2024-10-18 18:34:14,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,794 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:14,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,897 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:14,987 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:14,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:15,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1671370634, now seen corresponding path program 1 times [2024-10-18 18:34:15,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,137 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 20 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:15,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,254 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 20 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:15,337 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:15,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:15,366 INFO L85 PathProgramCache]: Analyzing trace with hash -727267156, now seen corresponding path program 1 times [2024-10-18 18:34:15,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,445 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:15,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,527 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:15,594 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:15,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:15,628 INFO L85 PathProgramCache]: Analyzing trace with hash -1646531741, now seen corresponding path program 1 times [2024-10-18 18:34:15,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,712 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:15,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,799 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:15,853 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:15,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:15,898 INFO L85 PathProgramCache]: Analyzing trace with hash 515983135, now seen corresponding path program 1 times [2024-10-18 18:34:15,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,218 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:16,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,298 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:16,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:16,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1097129639, now seen corresponding path program 1 times [2024-10-18 18:34:16,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,467 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:16,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,551 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:16,635 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:16,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 288 treesize of output 264 [2024-10-18 18:34:16,669 INFO L85 PathProgramCache]: Analyzing trace with hash -1830465879, now seen corresponding path program 1 times [2024-10-18 18:34:16,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,745 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:16,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,824 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:16,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:16,934 INFO L85 PathProgramCache]: Analyzing trace with hash 1440872234, now seen corresponding path program 1 times [2024-10-18 18:34:16,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,044 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:17,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,154 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:17,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:17,252 INFO L85 PathProgramCache]: Analyzing trace with hash 904842726, now seen corresponding path program 1 times [2024-10-18 18:34:17,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,356 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:17,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,438 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:17,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:17,592 INFO L85 PathProgramCache]: Analyzing trace with hash 209751382, now seen corresponding path program 1 times [2024-10-18 18:34:17,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,644 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:17,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,697 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:18,037 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:18,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:18,058 INFO L85 PathProgramCache]: Analyzing trace with hash -536054927, now seen corresponding path program 1 times [2024-10-18 18:34:18,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:18,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:18,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:18,107 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:18,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:18,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:18,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:18,156 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:18,249 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:18,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:18,279 INFO L85 PathProgramCache]: Analyzing trace with hash 1035483098, now seen corresponding path program 1 times [2024-10-18 18:34:18,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:18,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:18,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:18,354 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:34:18,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:18,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:18,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:18,432 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:34:22,858 INFO L85 PathProgramCache]: Analyzing trace with hash 1342801101, now seen corresponding path program 1 times [2024-10-18 18:34:22,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:22,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:22,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:23,079 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:23,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:23,267 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:23,463 INFO L85 PathProgramCache]: Analyzing trace with hash 705194129, now seen corresponding path program 1 times [2024-10-18 18:34:23,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:23,839 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:23,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:24,301 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:42,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1482468660, now seen corresponding path program 1 times [2024-10-18 18:34:42,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:42,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:42,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:42,376 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 18:34:42,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:42,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:42,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:42,534 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 18:34:42,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:34:42,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=624, Invalid=6858, Unknown=0, NotChecked=0, Total=7482 [2024-10-18 18:35:35,217 INFO L85 PathProgramCache]: Analyzing trace with hash 1342808712, now seen corresponding path program 1 times [2024-10-18 18:35:35,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:35,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:35,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:35,509 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:35,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:35,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:35,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:35,690 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:35,847 INFO L85 PathProgramCache]: Analyzing trace with hash 705201734, now seen corresponding path program 1 times [2024-10-18 18:35:35,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:35,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:35,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:35,953 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-10-18 18:35:35,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:35,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:35,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:36,068 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-10-18 18:35:36,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:35:36,070 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=639, Invalid=7193, Unknown=0, NotChecked=0, Total=7832 [2024-10-18 18:35:37,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:35:37,454 INFO L85 PathProgramCache]: Analyzing trace with hash 890385437, now seen corresponding path program 1 times [2024-10-18 18:35:37,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:37,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:37,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:37,664 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:37,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:37,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:37,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:38,001 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:39,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 434 treesize of output 410 [2024-10-18 18:35:39,915 INFO L85 PathProgramCache]: Analyzing trace with hash 1217722750, now seen corresponding path program 1 times [2024-10-18 18:35:39,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:39,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:39,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:40,506 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 181 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 18:35:40,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:40,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:40,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:41,262 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 181 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 18:35:41,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:35:41,681 INFO L85 PathProgramCache]: Analyzing trace with hash -1377620250, now seen corresponding path program 1 times [2024-10-18 18:35:41,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:41,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:41,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:42,603 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 285 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:42,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:42,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:42,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:43,518 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 285 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:44,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:35:44,676 INFO L85 PathProgramCache]: Analyzing trace with hash -1552693968, now seen corresponding path program 1 times [2024-10-18 18:35:44,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:44,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:44,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:46,182 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 574 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:35:46,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:46,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:46,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:47,076 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 574 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:35:47,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:35:47,315 INFO L85 PathProgramCache]: Analyzing trace with hash -210140568, now seen corresponding path program 1 times [2024-10-18 18:35:47,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:47,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:47,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:48,391 INFO L134 CoverageAnalysis]: Checked inductivity of 693 backedges. 671 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 18:35:48,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:48,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:48,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:49,625 INFO L134 CoverageAnalysis]: Checked inductivity of 693 backedges. 671 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 18:35:49,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:35:49,872 INFO L85 PathProgramCache]: Analyzing trace with hash 1593976100, now seen corresponding path program 1 times [2024-10-18 18:35:49,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:49,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:49,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:51,263 INFO L134 CoverageAnalysis]: Checked inductivity of 829 backedges. 815 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:51,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:51,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:51,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:52,448 INFO L134 CoverageAnalysis]: Checked inductivity of 829 backedges. 815 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:52,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:35:52,617 INFO L85 PathProgramCache]: Analyzing trace with hash 1609583129, now seen corresponding path program 1 times [2024-10-18 18:35:52,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:52,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:52,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:54,197 INFO L134 CoverageAnalysis]: Checked inductivity of 853 backedges. 842 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:35:54,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:54,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:54,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:55,777 INFO L134 CoverageAnalysis]: Checked inductivity of 853 backedges. 842 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:35:56,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:35:56,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1835114209, now seen corresponding path program 1 times [2024-10-18 18:35:56,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:56,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:56,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:58,192 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 860 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:35:58,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:58,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:58,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:00,132 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 860 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:01,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:01,120 INFO L85 PathProgramCache]: Analyzing trace with hash -820342628, now seen corresponding path program 1 times [2024-10-18 18:36:01,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:01,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:01,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:03,403 INFO L134 CoverageAnalysis]: Checked inductivity of 947 backedges. 935 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:03,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:03,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:03,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:05,384 INFO L134 CoverageAnalysis]: Checked inductivity of 947 backedges. 935 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:06,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:36:06,421 INFO L85 PathProgramCache]: Analyzing trace with hash -800866407, now seen corresponding path program 1 times [2024-10-18 18:36:06,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:06,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:06,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:08,347 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 18:36:08,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:08,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:08,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:10,289 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 18:36:10,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:36:10,357 INFO L85 PathProgramCache]: Analyzing trace with hash -740169368, now seen corresponding path program 1 times [2024-10-18 18:36:10,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:10,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:10,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:12,901 INFO L134 CoverageAnalysis]: Checked inductivity of 970 backedges. 953 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:12,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:12,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:13,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:15,026 INFO L134 CoverageAnalysis]: Checked inductivity of 970 backedges. 953 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:15,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:36:15,072 INFO L85 PathProgramCache]: Analyzing trace with hash 1644399497, now seen corresponding path program 1 times [2024-10-18 18:36:15,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:15,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:15,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:17,203 INFO L134 CoverageAnalysis]: Checked inductivity of 973 backedges. 956 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:17,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:17,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:17,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:19,441 INFO L134 CoverageAnalysis]: Checked inductivity of 973 backedges. 956 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:19,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:36:19,613 INFO L85 PathProgramCache]: Analyzing trace with hash -2083407024, now seen corresponding path program 1 times [2024-10-18 18:36:19,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:19,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:19,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:22,091 INFO L134 CoverageAnalysis]: Checked inductivity of 1015 backedges. 988 proven. 17 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:36:22,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:22,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:22,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:23,832 INFO L134 CoverageAnalysis]: Checked inductivity of 1015 backedges. 988 proven. 17 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:36:23,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:23,873 INFO L85 PathProgramCache]: Analyzing trace with hash -716808719, now seen corresponding path program 1 times [2024-10-18 18:36:23,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:23,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:23,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:25,487 INFO L134 CoverageAnalysis]: Checked inductivity of 1020 backedges. 991 proven. 17 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:36:25,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:25,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:25,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:27,089 INFO L134 CoverageAnalysis]: Checked inductivity of 1020 backedges. 991 proven. 17 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:36:27,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:27,201 INFO L85 PathProgramCache]: Analyzing trace with hash -850875310, now seen corresponding path program 1 times [2024-10-18 18:36:27,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:27,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:27,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:28,583 INFO L134 CoverageAnalysis]: Checked inductivity of 944 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:36:28,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:28,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:28,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:29,999 INFO L134 CoverageAnalysis]: Checked inductivity of 944 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:36:56,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:56,789 INFO L85 PathProgramCache]: Analyzing trace with hash 681621139, now seen corresponding path program 1 times [2024-10-18 18:36:56,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:56,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:56,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:57,254 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-10-18 18:36:57,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:57,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:57,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:57,722 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-10-18 18:36:58,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:36:58,341 INFO L85 PathProgramCache]: Analyzing trace with hash -313532515, now seen corresponding path program 1 times [2024-10-18 18:36:58,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:58,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:58,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:58,833 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 6 proven. 63 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:36:58,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:58,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:58,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:59,230 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 6 proven. 63 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:36:59,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:36:59,304 INFO L85 PathProgramCache]: Analyzing trace with hash -1759873095, now seen corresponding path program 1 times [2024-10-18 18:36:59,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:59,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:59,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:59,730 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 11 proven. 63 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-10-18 18:36:59,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:59,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:00,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:00,357 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 11 proven. 63 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-10-18 18:37:00,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:37:00,537 INFO L85 PathProgramCache]: Analyzing trace with hash -120900360, now seen corresponding path program 1 times [2024-10-18 18:37:00,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:00,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:00,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:00,978 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 21 proven. 63 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-10-18 18:37:00,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:00,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:01,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:01,420 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 21 proven. 63 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-10-18 18:37:01,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:37:01,634 INFO L85 PathProgramCache]: Analyzing trace with hash 2096713938, now seen corresponding path program 1 times [2024-10-18 18:37:01,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:01,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:01,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:02,080 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 26 proven. 63 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2024-10-18 18:37:02,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:02,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:02,532 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 26 proven. 63 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2024-10-18 18:37:02,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:37:02,781 INFO L85 PathProgramCache]: Analyzing trace with hash -992542809, now seen corresponding path program 1 times [2024-10-18 18:37:02,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:02,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:02,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:03,190 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 6 proven. 61 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:37:03,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:03,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:03,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:03,760 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 6 proven. 61 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:37:03,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:03,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1552753975, now seen corresponding path program 1 times [2024-10-18 18:37:03,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:03,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:03,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:04,261 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:04,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:04,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:04,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:04,665 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:04,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:37:04,720 INFO L85 PathProgramCache]: Analyzing trace with hash 1823989624, now seen corresponding path program 1 times [2024-10-18 18:37:04,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:04,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:04,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:05,310 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:05,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:05,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:05,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:05,738 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:05,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:37:05,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1270696801, now seen corresponding path program 1 times [2024-10-18 18:37:05,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:05,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:05,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:06,261 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-10-18 18:37:06,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:06,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:06,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:06,879 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-10-18 18:37:06,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:37:06,945 INFO L85 PathProgramCache]: Analyzing trace with hash 495078445, now seen corresponding path program 1 times [2024-10-18 18:37:06,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:06,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:07,396 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-10-18 18:37:07,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:07,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:07,841 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-10-18 18:37:07,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:37:07,889 INFO L85 PathProgramCache]: Analyzing trace with hash -989927250, now seen corresponding path program 1 times [2024-10-18 18:37:07,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:07,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:08,446 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-10-18 18:37:08,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:08,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:08,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:08,883 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-10-18 18:37:08,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:37:08,941 INFO L85 PathProgramCache]: Analyzing trace with hash 1349973546, now seen corresponding path program 1 times [2024-10-18 18:37:08,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:08,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:09,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:09,396 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-10-18 18:37:09,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:09,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:09,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:09,921 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-10-18 18:37:09,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:10,000 INFO L85 PathProgramCache]: Analyzing trace with hash -991588501, now seen corresponding path program 1 times [2024-10-18 18:37:10,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:10,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:10,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:10,482 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-10-18 18:37:10,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:10,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:10,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:11,046 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. Killed by 15