./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/pthread-ext/25_stack_longer-2-pthread.i --full-output --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b86fb0b7 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../../../trunk/examples/svcomp/pthread-ext/25_stack_longer-2-pthread.i -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 182a6d766171f1265a35f12ab09c9f3211c84a0be4284400cfd02a0c04d0acfe --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.conditional-comm-b86fb0b-m [2024-10-18 18:32:15,266 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-18 18:32:15,336 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2024-10-18 18:32:15,342 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-18 18:32:15,342 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-18 18:32:15,363 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-18 18:32:15,364 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-18 18:32:15,364 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-18 18:32:15,364 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-18 18:32:15,365 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-18 18:32:15,365 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-18 18:32:15,365 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-18 18:32:15,365 INFO L153 SettingsManager]: * Use SBE=true [2024-10-18 18:32:15,366 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-18 18:32:15,366 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-18 18:32:15,366 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-18 18:32:15,368 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-18 18:32:15,370 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-18 18:32:15,370 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-18 18:32:15,370 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-18 18:32:15,371 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-18 18:32:15,374 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-18 18:32:15,374 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-18 18:32:15,375 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-18 18:32:15,375 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-18 18:32:15,375 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-18 18:32:15,375 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-18 18:32:15,375 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-18 18:32:15,376 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-18 18:32:15,376 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-18 18:32:15,376 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 18:32:15,376 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-18 18:32:15,376 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-18 18:32:15,376 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-10-18 18:32:15,377 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2024-10-18 18:32:15,378 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 182a6d766171f1265a35f12ab09c9f3211c84a0be4284400cfd02a0c04d0acfe Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 5 [2024-10-18 18:32:15,562 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-18 18:32:15,581 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-18 18:32:15,583 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-18 18:32:15,584 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-18 18:32:15,584 INFO L274 PluginConnector]: CDTParser initialized [2024-10-18 18:32:15,585 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-ext/25_stack_longer-2-pthread.i [2024-10-18 18:32:16,736 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-18 18:32:16,979 INFO L384 CDTParser]: Found 1 translation units. [2024-10-18 18:32:16,980 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack_longer-2-pthread.i [2024-10-18 18:32:16,995 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a05085d54/370b4a85fb854ef1a09adebc8f6b9798/FLAGafe3885b1 [2024-10-18 18:32:17,331 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a05085d54/370b4a85fb854ef1a09adebc8f6b9798 [2024-10-18 18:32:17,333 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-18 18:32:17,335 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-18 18:32:17,336 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-18 18:32:17,336 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-18 18:32:17,341 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-18 18:32:17,341 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,342 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@10cf294c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17, skipping insertion in model container [2024-10-18 18:32:17,342 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,377 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-18 18:32:17,641 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack_longer-2-pthread.i[31355,31368] [2024-10-18 18:32:17,655 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 18:32:17,663 INFO L200 MainTranslator]: Completed pre-run [2024-10-18 18:32:17,698 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack_longer-2-pthread.i[31355,31368] [2024-10-18 18:32:17,701 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 18:32:17,732 INFO L204 MainTranslator]: Completed translation [2024-10-18 18:32:17,732 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17 WrapperNode [2024-10-18 18:32:17,732 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-18 18:32:17,733 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-18 18:32:17,733 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-18 18:32:17,733 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-18 18:32:17,738 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,748 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,769 INFO L138 Inliner]: procedures = 171, calls = 35, calls flagged for inlining = 9, calls inlined = 8, statements flattened = 133 [2024-10-18 18:32:17,769 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-18 18:32:17,770 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-18 18:32:17,770 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-18 18:32:17,770 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-18 18:32:17,776 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,776 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,779 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,779 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,783 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,785 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,787 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,788 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,790 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-18 18:32:17,790 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-18 18:32:17,790 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-18 18:32:17,790 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-18 18:32:17,791 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (1/1) ... [2024-10-18 18:32:17,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 18:32:17,806 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:17,820 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:17,824 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-10-18 18:32:17,862 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2024-10-18 18:32:17,862 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexUnlock [2024-10-18 18:32:17,863 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-18 18:32:17,864 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-18 18:32:17,865 WARN L207 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2024-10-18 18:32:17,984 INFO L238 CfgBuilder]: Building ICFG [2024-10-18 18:32:17,987 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-18 18:32:18,175 INFO L283 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2024-10-18 18:32:18,175 INFO L287 CfgBuilder]: Performing block encoding [2024-10-18 18:32:18,321 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-18 18:32:18,322 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-18 18:32:18,322 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 06:32:18 BoogieIcfgContainer [2024-10-18 18:32:18,322 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-18 18:32:18,324 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-18 18:32:18,324 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-18 18:32:18,331 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-18 18:32:18,331 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.10 06:32:17" (1/3) ... [2024-10-18 18:32:18,336 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a2ddb37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 06:32:18, skipping insertion in model container [2024-10-18 18:32:18,336 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:17" (2/3) ... [2024-10-18 18:32:18,336 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a2ddb37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 06:32:18, skipping insertion in model container [2024-10-18 18:32:18,336 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 06:32:18" (3/3) ... [2024-10-18 18:32:18,337 INFO L112 eAbstractionObserver]: Analyzing ICFG 25_stack_longer-2-pthread.i [2024-10-18 18:32:18,349 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-18 18:32:18,349 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-18 18:32:18,349 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-10-18 18:32:18,396 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:18,437 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:18,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:18,437 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:18,439 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:18,440 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-10-18 18:32:18,507 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:18,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:18,521 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread1of1ForFork0 ======== [2024-10-18 18:32:18,526 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@e478dd6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:18,526 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:19,258 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:19,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:19,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1921419239, now seen corresponding path program 1 times [2024-10-18 18:32:19,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:19,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1965410060] [2024-10-18 18:32:19,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:19,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:19,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:19,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:19,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:19,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1965410060] [2024-10-18 18:32:19,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1965410060] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:19,534 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:19,534 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:19,535 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1536017871] [2024-10-18 18:32:19,536 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:19,540 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:19,540 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:19,560 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:19,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:19,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:19,563 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:19,564 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 2 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:19,565 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:19,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:19,640 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-18 18:32:19,641 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:19,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:19,641 INFO L85 PathProgramCache]: Analyzing trace with hash -1004362886, now seen corresponding path program 1 times [2024-10-18 18:32:19,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:19,642 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923656717] [2024-10-18 18:32:19,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:19,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:19,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:19,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:19,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:19,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923656717] [2024-10-18 18:32:19,759 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923656717] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:19,759 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:19,760 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:19,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939328303] [2024-10-18 18:32:19,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:19,761 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:19,762 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:19,762 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:19,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:19,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:19,763 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:19,764 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:19,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:19,764 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:19,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:19,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:19,990 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-10-18 18:32:19,990 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:19,991 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:19,991 INFO L85 PathProgramCache]: Analyzing trace with hash 753684577, now seen corresponding path program 1 times [2024-10-18 18:32:19,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:19,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172289644] [2024-10-18 18:32:19,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:19,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:20,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:20,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:20,263 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:20,263 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172289644] [2024-10-18 18:32:20,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [172289644] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:20,263 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:20,263 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-18 18:32:20,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446878527] [2024-10-18 18:32:20,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:20,264 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:20,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:20,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:20,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:20,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:20,265 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:20,265 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:20,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:20,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:20,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:21,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:21,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:21,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-10-18 18:32:21,123 INFO L782 garLoopResultBuilder]: Registering result SAFE for location thr1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-10-18 18:32:21,124 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-10-18 18:32:21,133 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1] [2024-10-18 18:32:21,136 INFO L312 ceAbstractionStarter]: Result for error location thr1Thread1of1ForFork0 was SAFE (1/2) [2024-10-18 18:32:21,140 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:21,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:21,141 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:21,143 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:21,145 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Waiting until timeout for monitored process [2024-10-18 18:32:21,176 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:21,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:21,177 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 18:32:21,177 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@e478dd6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:21,177 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:21,536 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:21,537 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:21,537 INFO L85 PathProgramCache]: Analyzing trace with hash 352059429, now seen corresponding path program 1 times [2024-10-18 18:32:21,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:21,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786932001] [2024-10-18 18:32:21,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:21,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:21,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:21,567 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:21,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:21,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786932001] [2024-10-18 18:32:21,568 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1786932001] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:21,568 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:21,568 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:21,568 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1382508578] [2024-10-18 18:32:21,568 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:21,569 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:21,569 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:21,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:21,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:21,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:21,569 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:21,569 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 2 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:21,570 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:21,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:21,614 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-10-18 18:32:21,615 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:21,615 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:21,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1174918982, now seen corresponding path program 1 times [2024-10-18 18:32:21,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:21,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849175006] [2024-10-18 18:32:21,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:21,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:21,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:21,661 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:21,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:21,661 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1849175006] [2024-10-18 18:32:21,661 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1849175006] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:21,661 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:21,661 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:21,661 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000622023] [2024-10-18 18:32:21,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:21,662 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:21,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:21,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:21,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:21,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:21,670 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:21,670 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.4) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:21,670 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:21,670 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:21,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:21,806 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:21,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-10-18 18:32:21,806 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:21,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:21,806 INFO L85 PathProgramCache]: Analyzing trace with hash -1558583699, now seen corresponding path program 1 times [2024-10-18 18:32:21,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:21,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [699688570] [2024-10-18 18:32:21,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:21,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:21,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:21,981 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:21,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:21,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [699688570] [2024-10-18 18:32:21,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [699688570] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:21,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:21,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-18 18:32:21,982 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534865417] [2024-10-18 18:32:21,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:21,983 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:21,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:21,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:21,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:21,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:21,983 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:21,984 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.0) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:21,984 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:21,984 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:21,984 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:22,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:22,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:22,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:22,129 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-10-18 18:32:22,129 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:22,129 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:22,130 INFO L85 PathProgramCache]: Analyzing trace with hash -1558582738, now seen corresponding path program 1 times [2024-10-18 18:32:22,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:22,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202843693] [2024-10-18 18:32:22,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:22,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:22,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:22,151 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 18:32:22,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:22,181 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 18:32:22,181 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 18:32:22,182 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2024-10-18 18:32:22,182 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-10-18 18:32:22,186 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1] [2024-10-18 18:32:22,186 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (2/2) [2024-10-18 18:32:22,186 WARN L239 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 18:32:22,186 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2024-10-18 18:32:22,209 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:22,211 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:22,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:22,212 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:22,213 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:22,215 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Waiting until timeout for monitored process [2024-10-18 18:32:22,249 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:22,250 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:22,250 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 18:32:22,250 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@e478dd6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:22,250 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:23,356 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:23,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:23,357 INFO L85 PathProgramCache]: Analyzing trace with hash -476372807, now seen corresponding path program 1 times [2024-10-18 18:32:23,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:23,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552148351] [2024-10-18 18:32:23,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:23,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:23,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:23,417 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:23,417 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:23,417 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552148351] [2024-10-18 18:32:23,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [552148351] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:23,417 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:23,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:23,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1678216312] [2024-10-18 18:32:23,418 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:23,418 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:23,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:23,418 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:23,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:23,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:23,419 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:23,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 2 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:23,419 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:23,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:23,494 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-10-18 18:32:23,495 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:23,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:23,495 INFO L85 PathProgramCache]: Analyzing trace with hash 261524472, now seen corresponding path program 1 times [2024-10-18 18:32:23,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:23,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612527762] [2024-10-18 18:32:23,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:23,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:23,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:23,555 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:23,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:23,555 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612527762] [2024-10-18 18:32:23,556 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [612527762] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:23,556 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:23,556 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:23,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1547067107] [2024-10-18 18:32:23,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:23,556 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:23,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:23,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:23,557 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:23,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:23,557 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:23,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:23,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:23,557 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:23,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:23,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:23,965 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-10-18 18:32:23,966 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:23,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:23,966 INFO L85 PathProgramCache]: Analyzing trace with hash -185061823, now seen corresponding path program 1 times [2024-10-18 18:32:23,966 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:23,966 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593016362] [2024-10-18 18:32:23,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:23,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:23,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:24,050 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:24,050 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:24,050 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593016362] [2024-10-18 18:32:24,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593016362] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:24,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [111794886] [2024-10-18 18:32:24,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:24,051 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:24,051 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:24,054 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:24,056 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-18 18:32:24,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:24,173 INFO L255 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-18 18:32:24,176 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:24,237 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:24,237 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:24,290 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:24,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [111794886] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:24,291 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:24,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-10-18 18:32:24,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267104503] [2024-10-18 18:32:24,291 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:24,292 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:24,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:24,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:24,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:24,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:24,293 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:24,293 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.0) internal successors, (98), 6 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:24,293 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:24,293 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,293 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:24,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:24,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,404 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-10-18 18:32:24,580 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:24,580 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:24,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:24,581 INFO L85 PathProgramCache]: Analyzing trace with hash 637797730, now seen corresponding path program 1 times [2024-10-18 18:32:24,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:24,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095155860] [2024-10-18 18:32:24,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:24,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:24,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:24,697 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:24,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:24,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095155860] [2024-10-18 18:32:24,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2095155860] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:24,697 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:24,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:24,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1729222542] [2024-10-18 18:32:24,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:24,698 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:24,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:24,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:24,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:24,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:24,698 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:24,698 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:24,698 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:24,698 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,699 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,699 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:24,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:24,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:24,788 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-10-18 18:32:24,788 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:24,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:24,789 INFO L85 PathProgramCache]: Analyzing trace with hash 637798691, now seen corresponding path program 1 times [2024-10-18 18:32:24,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:24,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881975500] [2024-10-18 18:32:24,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:24,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:24,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:24,875 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:24,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:24,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881975500] [2024-10-18 18:32:24,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1881975500] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:24,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1217255384] [2024-10-18 18:32:24,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:24,876 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:24,876 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:24,878 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:24,879 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-18 18:32:24,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:25,001 INFO L255 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:25,002 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:25,058 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:25,058 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:25,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1217255384] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:25,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:25,059 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2024-10-18 18:32:25,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701951128] [2024-10-18 18:32:25,059 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:25,059 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:25,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:25,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:25,060 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:25,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:25,060 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:25,060 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.666666666666667) internal successors, (46), 5 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:25,060 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:25,060 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,060 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,060 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,060 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:25,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:25,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,300 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:25,320 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-10-18 18:32:25,501 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-10-18 18:32:25,502 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:25,502 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:25,502 INFO L85 PathProgramCache]: Analyzing trace with hash -396656028, now seen corresponding path program 1 times [2024-10-18 18:32:25,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:25,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879285707] [2024-10-18 18:32:25,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:25,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:25,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:25,810 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:25,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:25,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [879285707] [2024-10-18 18:32:25,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [879285707] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:25,811 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:25,811 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-18 18:32:25,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896495229] [2024-10-18 18:32:25,811 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:25,812 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:25,812 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:25,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:25,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:25,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:25,813 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:25,813 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 5.555555555555555) internal successors, (50), 8 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:25,813 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:25,813 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,813 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,813 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:25,814 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:25,814 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:26,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:26,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:26,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:26,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:26,300 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-10-18 18:32:26,300 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:26,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:26,300 INFO L85 PathProgramCache]: Analyzing trace with hash -917399844, now seen corresponding path program 1 times [2024-10-18 18:32:26,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:26,301 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461562690] [2024-10-18 18:32:26,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:26,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:26,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:26,441 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:32:26,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:26,442 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461562690] [2024-10-18 18:32:26,442 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [461562690] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:26,442 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:26,443 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:26,443 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556279414] [2024-10-18 18:32:26,445 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:26,445 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:26,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:26,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:26,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:26,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:26,446 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:26,446 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:26,447 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:26,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:26,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:26,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:26,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:26,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:26,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-10-18 18:32:26,682 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:26,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:26,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1914472197, now seen corresponding path program 1 times [2024-10-18 18:32:26,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:26,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073945563] [2024-10-18 18:32:26,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:26,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:26,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:26,782 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:26,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:26,782 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073945563] [2024-10-18 18:32:26,782 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1073945563] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:26,782 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1342791775] [2024-10-18 18:32:26,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:26,783 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:26,783 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:26,785 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:26,788 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-18 18:32:26,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:26,905 INFO L255 TraceCheckSpWp]: Trace formula consists of 343 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:26,906 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:26,955 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:26,955 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:27,021 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:27,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1342791775] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:27,021 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:27,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2024-10-18 18:32:27,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948809632] [2024-10-18 18:32:27,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:27,022 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-10-18 18:32:27,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:27,022 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-10-18 18:32:27,022 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-10-18 18:32:27,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:27,022 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:27,023 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 11.2) internal successors, (112), 9 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,023 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:27,345 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:27,532 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2024-10-18 18:32:27,532 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:27,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:27,533 INFO L85 PathProgramCache]: Analyzing trace with hash -1207726502, now seen corresponding path program 1 times [2024-10-18 18:32:27,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:27,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413775651] [2024-10-18 18:32:27,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:27,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:27,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:27,713 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:32:27,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:27,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [413775651] [2024-10-18 18:32:27,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [413775651] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:27,714 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:27,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:27,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791483299] [2024-10-18 18:32:27,714 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:27,715 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:27,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:27,716 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:27,716 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:27,716 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:27,716 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:27,716 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:27,716 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:27,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:27,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:27,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:27,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:27,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:27,796 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-10-18 18:32:27,796 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:27,796 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:27,796 INFO L85 PathProgramCache]: Analyzing trace with hash -1207725541, now seen corresponding path program 1 times [2024-10-18 18:32:27,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:27,797 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87169896] [2024-10-18 18:32:27,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:27,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:27,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:27,821 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 18:32:27,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:27,865 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 18:32:27,865 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 18:32:27,866 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2024-10-18 18:32:27,866 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-10-18 18:32:27,867 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-18 18:32:27,868 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (1/3) [2024-10-18 18:32:27,868 WARN L239 ceAbstractionStarter]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 18:32:27,868 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 3 thread instances. [2024-10-18 18:32:27,901 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:27,905 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:27,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:27,906 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:27,910 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:27,912 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (8)] Waiting until timeout for monitored process [2024-10-18 18:32:27,956 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:27,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:27,957 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread3of3ForFork0 ======== [2024-10-18 18:32:27,957 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@e478dd6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:27,957 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:30,518 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:30,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:30,518 INFO L85 PathProgramCache]: Analyzing trace with hash -1964417026, now seen corresponding path program 1 times [2024-10-18 18:32:30,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:30,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576261002] [2024-10-18 18:32:30,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:30,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:30,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:30,591 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:30,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:30,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576261002] [2024-10-18 18:32:30,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1576261002] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:30,592 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:30,592 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:30,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931272842] [2024-10-18 18:32:30,592 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:30,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:30,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:30,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:30,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:30,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:30,593 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:30,593 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 2 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:30,593 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:30,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:30,739 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-10-18 18:32:30,739 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:30,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:30,740 INFO L85 PathProgramCache]: Analyzing trace with hash -843580769, now seen corresponding path program 1 times [2024-10-18 18:32:30,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:30,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [413061096] [2024-10-18 18:32:30,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:30,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:30,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:30,828 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:30,829 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:30,829 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [413061096] [2024-10-18 18:32:30,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [413061096] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:30,829 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:30,829 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:30,829 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685268820] [2024-10-18 18:32:30,829 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:30,830 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:30,830 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:30,830 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:30,830 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:30,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:30,830 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:30,831 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 4 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:30,831 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:30,831 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:31,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:31,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:31,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-10-18 18:32:31,394 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:31,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:31,394 INFO L85 PathProgramCache]: Analyzing trace with hash -984220833, now seen corresponding path program 1 times [2024-10-18 18:32:31,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:31,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720697732] [2024-10-18 18:32:31,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:31,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:31,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:31,502 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:31,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:31,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720697732] [2024-10-18 18:32:31,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720697732] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:31,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [211733588] [2024-10-18 18:32:31,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:31,503 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:31,504 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:31,505 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:31,506 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-18 18:32:31,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:31,639 INFO L255 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-18 18:32:31,641 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:31,681 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:31,682 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:31,725 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:31,725 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [211733588] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:31,725 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:31,725 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-10-18 18:32:31,725 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485378891] [2024-10-18 18:32:31,726 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:31,726 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:31,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:31,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:31,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:31,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:31,727 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:31,727 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 6 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:31,727 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:31,727 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:31,727 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:31,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:31,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:31,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:31,906 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:32,092 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:32,092 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:32,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:32,093 INFO L85 PathProgramCache]: Analyzing trace with hash 2114606527, now seen corresponding path program 1 times [2024-10-18 18:32:32,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:32,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294829091] [2024-10-18 18:32:32,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:32,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:32,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:32,180 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:32,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:32,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294829091] [2024-10-18 18:32:32,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [294829091] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:32,180 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:32,180 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:32,180 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1784233349] [2024-10-18 18:32:32,180 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:32,181 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:32,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:32,181 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:32,181 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:32,181 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:32,181 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:32,181 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:32,181 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:32,181 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:32,182 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:32,182 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:32,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:32,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:32,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:32,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:32,599 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-10-18 18:32:32,599 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:32,599 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:32,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1300592888, now seen corresponding path program 1 times [2024-10-18 18:32:32,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:32,600 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519977769] [2024-10-18 18:32:32,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:32,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:32,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:32,805 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-10-18 18:32:32,806 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:32,806 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519977769] [2024-10-18 18:32:32,806 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1519977769] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:32,806 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:32,806 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:32,806 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807419863] [2024-10-18 18:32:32,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:32,806 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:32,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:32,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:32,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:32,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:32,807 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:32,807 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 19.666666666666668) internal successors, (59), 4 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:32,807 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:32,807 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:32,807 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:32,807 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:32,807 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:33,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:33,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:33,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:33,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:33,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:33,337 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-10-18 18:32:33,337 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:33,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:33,337 INFO L85 PathProgramCache]: Analyzing trace with hash 308452227, now seen corresponding path program 1 times [2024-10-18 18:32:33,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:33,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751215052] [2024-10-18 18:32:33,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:33,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:33,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:33,469 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 18:32:33,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:33,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751215052] [2024-10-18 18:32:33,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1751215052] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:33,469 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:33,469 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-10-18 18:32:33,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458369723] [2024-10-18 18:32:33,469 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:33,470 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:33,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:33,470 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:33,470 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-10-18 18:32:33,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:33,470 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:33,470 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.5) internal successors, (93), 6 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:33,471 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:33,471 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:33,471 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:33,471 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:33,471 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:33,471 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:34,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:34,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:34,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:34,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:34,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:34,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:34,136 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-10-18 18:32:34,136 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:34,137 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:34,137 INFO L85 PathProgramCache]: Analyzing trace with hash 503507777, now seen corresponding path program 1 times [2024-10-18 18:32:34,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:34,137 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [94551285] [2024-10-18 18:32:34,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:34,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:34,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:34,328 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 39 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:34,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:34,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [94551285] [2024-10-18 18:32:34,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [94551285] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:34,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [606413261] [2024-10-18 18:32:34,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:34,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:34,329 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:34,333 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:34,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-18 18:32:34,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:34,558 INFO L255 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:34,561 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:34,628 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 18:32:34,628 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:34,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [606413261] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:34,628 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:34,628 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2024-10-18 18:32:34,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385103592] [2024-10-18 18:32:34,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:34,629 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:34,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:34,629 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:34,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2024-10-18 18:32:34,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:34,629 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:34,629 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:34,630 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:35,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:35,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:35,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:35,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:35,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:35,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:35,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:35,188 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-10-18 18:32:35,369 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:35,370 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:35,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:35,370 INFO L85 PathProgramCache]: Analyzing trace with hash 2045647571, now seen corresponding path program 1 times [2024-10-18 18:32:35,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:35,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550642858] [2024-10-18 18:32:35,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:35,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:35,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:35,523 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 17 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:35,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:35,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550642858] [2024-10-18 18:32:35,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1550642858] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:35,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159629853] [2024-10-18 18:32:35,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:35,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:35,525 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:35,527 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:35,534 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-10-18 18:32:35,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:35,717 INFO L255 TraceCheckSpWp]: Trace formula consists of 463 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-18 18:32:35,719 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:35,786 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:35,787 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:35,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [159629853] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:35,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:35,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 7 [2024-10-18 18:32:35,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25674937] [2024-10-18 18:32:35,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:35,787 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:35,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:35,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:35,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-10-18 18:32:35,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:35,788 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:35,788 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.0) internal successors, (84), 6 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:35,788 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:36,008 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:36,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:36,040 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-10-18 18:32:36,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2024-10-18 18:32:36,210 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:36,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:36,210 INFO L85 PathProgramCache]: Analyzing trace with hash 1474719939, now seen corresponding path program 1 times [2024-10-18 18:32:36,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:36,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204405849] [2024-10-18 18:32:36,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:36,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:36,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:36,323 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:32:36,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:36,324 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204405849] [2024-10-18 18:32:36,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [204405849] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:36,324 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:36,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:36,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055782681] [2024-10-18 18:32:36,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:36,325 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:36,325 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:36,325 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:36,325 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:36,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:36,325 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:36,325 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 23.0) internal successors, (69), 4 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:36,325 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:36,326 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:37,029 INFO L85 PathProgramCache]: Analyzing trace with hash -1207850224, now seen corresponding path program 1 times [2024-10-18 18:32:37,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:37,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:37,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:37,209 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 142 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 18:32:37,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:37,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:37,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:37,352 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 142 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 18:32:37,353 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:37,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:38,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1683489689, now seen corresponding path program 1 times [2024-10-18 18:32:38,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:38,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:39,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:39,073 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-10-18 18:32:39,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:39,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:39,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:39,167 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-10-18 18:32:39,169 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:39,169 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:40,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:40,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:40,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,320 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-10-18 18:32:40,320 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:40,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:40,321 INFO L85 PathProgramCache]: Analyzing trace with hash 997038134, now seen corresponding path program 1 times [2024-10-18 18:32:40,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:40,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018383197] [2024-10-18 18:32:40,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:40,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:40,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:40,456 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:32:40,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:40,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2018383197] [2024-10-18 18:32:40,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2018383197] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:40,457 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:40,457 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:40,457 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797217033] [2024-10-18 18:32:40,457 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:40,457 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:40,457 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:40,458 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:40,458 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:40,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:40,459 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:40,459 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:40,459 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:41,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:32:41,306 INFO L85 PathProgramCache]: Analyzing trace with hash -1648041374, now seen corresponding path program 1 times [2024-10-18 18:32:41,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:41,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:41,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:41,604 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:41,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:41,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:41,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:41,941 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:41,942 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:41,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2024-10-18 18:32:44,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 884 treesize of output 836 [2024-10-18 18:32:44,033 INFO L85 PathProgramCache]: Analyzing trace with hash 2111150371, now seen corresponding path program 1 times [2024-10-18 18:32:44,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:44,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:44,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:44,203 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:32:44,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:44,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:44,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:44,333 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:32:44,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:44,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=318, Unknown=0, NotChecked=0, Total=380 [2024-10-18 18:32:46,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:32:46,059 INFO L85 PathProgramCache]: Analyzing trace with hash 1856527907, now seen corresponding path program 1 times [2024-10-18 18:32:46,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:46,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:46,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:46,216 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:32:46,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:46,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:46,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:46,324 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:32:47,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:32:47,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1030814471, now seen corresponding path program 1 times [2024-10-18 18:32:47,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:47,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:47,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:47,264 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2024-10-18 18:32:47,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:47,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:47,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:47,402 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2024-10-18 18:32:47,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:47,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1212, Unknown=0, NotChecked=0, Total=1406 [2024-10-18 18:32:49,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:32:49,382 INFO L85 PathProgramCache]: Analyzing trace with hash 445445431, now seen corresponding path program 1 times [2024-10-18 18:32:49,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:49,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:49,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:49,716 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:49,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:49,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:49,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:49,889 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:32:50,482 INFO L85 PathProgramCache]: Analyzing trace with hash -1038048111, now seen corresponding path program 1 times [2024-10-18 18:32:50,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:50,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,749 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:50,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:50,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,899 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:32:50,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:32:50,998 INFO L85 PathProgramCache]: Analyzing trace with hash -971558923, now seen corresponding path program 1 times [2024-10-18 18:32:50,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,197 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:32:51,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:51,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,339 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:32:51,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:32:51,621 INFO L85 PathProgramCache]: Analyzing trace with hash -1008494444, now seen corresponding path program 1 times [2024-10-18 18:32:51,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:51,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,765 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:32:51,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:51,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,904 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:32:52,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:32:52,028 INFO L85 PathProgramCache]: Analyzing trace with hash -814361452, now seen corresponding path program 1 times [2024-10-18 18:32:52,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:52,474 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 75 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:52,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:52,713 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 75 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:52,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 434 treesize of output 410 [2024-10-18 18:32:52,818 INFO L85 PathProgramCache]: Analyzing trace with hash 418603338, now seen corresponding path program 1 times [2024-10-18 18:32:52,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,087 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 107 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 18:32:53,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,401 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 107 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 18:32:53,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:32:53,533 INFO L85 PathProgramCache]: Analyzing trace with hash 1151118497, now seen corresponding path program 1 times [2024-10-18 18:32:53,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,819 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 112 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 18:32:53,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:53,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:54,286 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 112 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 18:32:54,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:32:54,382 INFO L85 PathProgramCache]: Analyzing trace with hash 720943090, now seen corresponding path program 1 times [2024-10-18 18:32:54,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:54,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:54,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:54,787 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 97 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:54,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:54,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:54,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,147 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 97 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:55,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:32:55,216 INFO L85 PathProgramCache]: Analyzing trace with hash 768005697, now seen corresponding path program 1 times [2024-10-18 18:32:55,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:55,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,745 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:55,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:55,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,072 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:56,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:32:56,124 INFO L85 PathProgramCache]: Analyzing trace with hash -681876766, now seen corresponding path program 1 times [2024-10-18 18:32:56,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,445 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:56,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,818 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:56,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:32:56,911 INFO L85 PathProgramCache]: Analyzing trace with hash -1464064513, now seen corresponding path program 1 times [2024-10-18 18:32:56,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:57,247 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 129 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:57,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:57,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:57,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:57,551 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 129 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:32:57,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:32:57,603 INFO L85 PathProgramCache]: Analyzing trace with hash -2063206068, now seen corresponding path program 1 times [2024-10-18 18:32:57,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:57,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:57,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,081 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 158 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:58,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,427 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 158 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:58,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:32:58,522 INFO L85 PathProgramCache]: Analyzing trace with hash -869805099, now seen corresponding path program 1 times [2024-10-18 18:32:58,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,686 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 18:32:58,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,845 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 18:33:08,073 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:08,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:33:08,111 INFO L85 PathProgramCache]: Analyzing trace with hash -504101081, now seen corresponding path program 1 times [2024-10-18 18:33:08,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:08,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:08,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:08,171 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:08,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:08,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:08,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:08,222 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:08,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1030 treesize of output 934 [2024-10-18 18:33:08,934 INFO L85 PathProgramCache]: Analyzing trace with hash -1241547536, now seen corresponding path program 1 times [2024-10-18 18:33:08,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:08,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:08,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:09,050 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:09,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:09,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:09,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:09,122 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:09,988 INFO L85 PathProgramCache]: Analyzing trace with hash -1050976845, now seen corresponding path program 1 times [2024-10-18 18:33:09,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:09,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:10,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:10,300 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:10,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:10,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:10,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:10,421 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:10,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1779398664, now seen corresponding path program 1 times [2024-10-18 18:33:10,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:10,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:10,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:10,591 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:10,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:10,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:10,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:10,747 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:11,535 INFO L85 PathProgramCache]: Analyzing trace with hash 568092831, now seen corresponding path program 1 times [2024-10-18 18:33:11,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:11,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:11,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:11,814 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:11,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:11,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:11,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:12,060 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:12,085 INFO L85 PathProgramCache]: Analyzing trace with hash 430949326, now seen corresponding path program 1 times [2024-10-18 18:33:12,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:12,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:12,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:12,339 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:12,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:12,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:12,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:12,800 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:12,881 INFO L85 PathProgramCache]: Analyzing trace with hash 383685806, now seen corresponding path program 1 times [2024-10-18 18:33:12,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:12,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:12,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:13,292 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 141 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:33:13,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:13,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:13,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:13,682 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 141 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:33:13,692 INFO L85 PathProgramCache]: Analyzing trace with hash -990701577, now seen corresponding path program 1 times [2024-10-18 18:33:13,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:13,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:13,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:14,084 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 142 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:14,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:14,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:14,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:14,473 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 142 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:14,592 INFO L85 PathProgramCache]: Analyzing trace with hash -1050328970, now seen corresponding path program 1 times [2024-10-18 18:33:14,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:14,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:14,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:14,855 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:14,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:14,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:14,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,062 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:15,083 INFO L85 PathProgramCache]: Analyzing trace with hash 1799479428, now seen corresponding path program 1 times [2024-10-18 18:33:15,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:15,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,364 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 79 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:15,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:15,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,526 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 79 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:15,671 INFO L85 PathProgramCache]: Analyzing trace with hash 482550337, now seen corresponding path program 1 times [2024-10-18 18:33:15,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:15,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,825 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 73 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:15,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:15,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,982 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 73 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:15,990 INFO L85 PathProgramCache]: Analyzing trace with hash 2074097085, now seen corresponding path program 1 times [2024-10-18 18:33:15,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:16,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:16,146 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:16,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:16,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:16,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:16,301 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:16,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1399606698, now seen corresponding path program 1 times [2024-10-18 18:33:16,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:16,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:16,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:16,612 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 147 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:16,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:16,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:16,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:16,869 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 147 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:16,999 INFO L85 PathProgramCache]: Analyzing trace with hash 219450895, now seen corresponding path program 1 times [2024-10-18 18:33:16,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,301 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:17,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,471 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:17,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1639520898, now seen corresponding path program 1 times [2024-10-18 18:33:17,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,725 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-10-18 18:33:17,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,903 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-10-18 18:33:17,931 INFO L85 PathProgramCache]: Analyzing trace with hash 219420250, now seen corresponding path program 1 times [2024-10-18 18:33:17,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,098 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:18,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,261 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:18,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1366327670, now seen corresponding path program 1 times [2024-10-18 18:33:18,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,460 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-18 18:33:18,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,631 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-18 18:33:22,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 542 treesize of output 494 [2024-10-18 18:33:22,215 INFO L85 PathProgramCache]: Analyzing trace with hash -483798231, now seen corresponding path program 1 times [2024-10-18 18:33:22,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,277 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:22,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,337 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:22,377 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:22,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 550 treesize of output 502 [2024-10-18 18:33:22,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1849570434, now seen corresponding path program 1 times [2024-10-18 18:33:22,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,486 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:22,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,568 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:22,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:33:22,665 INFO L85 PathProgramCache]: Analyzing trace with hash 1068944954, now seen corresponding path program 1 times [2024-10-18 18:33:22,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,740 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:22,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,818 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:22,864 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:22,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 288 treesize of output 264 [2024-10-18 18:33:22,901 INFO L85 PathProgramCache]: Analyzing trace with hash 439918756, now seen corresponding path program 1 times [2024-10-18 18:33:22,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:22,971 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:22,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:22,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:22,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:23,041 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:23,081 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:23,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1038 treesize of output 942 [2024-10-18 18:33:23,112 INFO L85 PathProgramCache]: Analyzing trace with hash 2016404171, now seen corresponding path program 1 times [2024-10-18 18:33:23,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:23,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:23,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:23,237 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:23,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:23,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:23,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:23,335 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:23,378 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:23,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 514 treesize of output 466 [2024-10-18 18:33:23,413 INFO L85 PathProgramCache]: Analyzing trace with hash -2040824938, now seen corresponding path program 1 times [2024-10-18 18:33:23,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:23,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:23,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:23,493 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:33:23,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:23,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:23,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:23,574 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:33:27,990 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:27,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 514 treesize of output 466 [2024-10-18 18:33:28,018 INFO L85 PathProgramCache]: Analyzing trace with hash 375399544, now seen corresponding path program 1 times [2024-10-18 18:33:28,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:28,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:28,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:28,093 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:28,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:28,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:28,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:28,173 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:28,212 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:28,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 550 treesize of output 502 [2024-10-18 18:33:28,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1619653265, now seen corresponding path program 1 times [2024-10-18 18:33:28,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:28,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:28,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:28,370 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:28,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:28,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:28,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:28,477 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:36,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1674476631, now seen corresponding path program 1 times [2024-10-18 18:33:36,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,424 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:36,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,505 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:36,653 INFO L85 PathProgramCache]: Analyzing trace with hash 369042366, now seen corresponding path program 1 times [2024-10-18 18:33:36,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,723 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:36,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,791 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:37,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1607447249, now seen corresponding path program 1 times [2024-10-18 18:33:37,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:37,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:37,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:37,146 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:33:37,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:37,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:37,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:37,347 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:33:37,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:33:37,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=547, Invalid=5305, Unknown=0, NotChecked=0, Total=5852 [2024-10-18 18:34:14,260 INFO L85 PathProgramCache]: Analyzing trace with hash 1687307986, now seen corresponding path program 1 times [2024-10-18 18:34:14,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,354 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:14,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,523 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:14,810 INFO L85 PathProgramCache]: Analyzing trace with hash 1458921247, now seen corresponding path program 1 times [2024-10-18 18:34:14,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,895 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:14,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:14,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:14,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:14,986 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:15,866 INFO L85 PathProgramCache]: Analyzing trace with hash -1966416500, now seen corresponding path program 1 times [2024-10-18 18:34:15,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:15,966 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:15,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:15,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:15,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,046 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:16,244 INFO L85 PathProgramCache]: Analyzing trace with hash -829634287, now seen corresponding path program 1 times [2024-10-18 18:34:16,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,332 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:16,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:16,427 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:16,811 INFO L85 PathProgramCache]: Analyzing trace with hash 2144239990, now seen corresponding path program 1 times [2024-10-18 18:34:16,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:16,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:16,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,073 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-18 18:34:17,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,165 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:34:17,276 INFO L85 PathProgramCache]: Analyzing trace with hash 539126372, now seen corresponding path program 1 times [2024-10-18 18:34:17,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,366 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:17,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:17,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:17,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:17,454 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:19,471 INFO L85 PathProgramCache]: Analyzing trace with hash -412483577, now seen corresponding path program 1 times [2024-10-18 18:34:19,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:19,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:19,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:19,545 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:19,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:19,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:19,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:19,625 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:19,723 INFO L85 PathProgramCache]: Analyzing trace with hash 97638746, now seen corresponding path program 1 times [2024-10-18 18:34:19,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:19,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:19,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:19,799 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:19,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:19,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:19,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:19,877 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:22,161 INFO L85 PathProgramCache]: Analyzing trace with hash -1368669970, now seen corresponding path program 1 times [2024-10-18 18:34:22,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:22,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:22,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:22,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:22,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:22,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:22,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:22,327 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:22,433 INFO L85 PathProgramCache]: Analyzing trace with hash 520624675, now seen corresponding path program 1 times [2024-10-18 18:34:22,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:22,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:22,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:22,511 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:22,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:22,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:22,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:22,594 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:23,592 INFO L85 PathProgramCache]: Analyzing trace with hash 1630786700, now seen corresponding path program 1 times [2024-10-18 18:34:23,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:23,763 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:23,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:23,823 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:23,925 INFO L85 PathProgramCache]: Analyzing trace with hash -985501167, now seen corresponding path program 1 times [2024-10-18 18:34:23,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:23,979 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:23,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:23,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:23,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:24,030 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:25,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:26,065 INFO L85 PathProgramCache]: Analyzing trace with hash -671057266, now seen corresponding path program 1 times [2024-10-18 18:34:26,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,113 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:26,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,276 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:26,426 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:26,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:26,451 INFO L85 PathProgramCache]: Analyzing trace with hash -804887929, now seen corresponding path program 1 times [2024-10-18 18:34:26,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,523 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:34:26,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,595 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:34:26,652 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:26,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 532 treesize of output 484 [2024-10-18 18:34:26,684 INFO L85 PathProgramCache]: Analyzing trace with hash 1214869564, now seen corresponding path program 1 times [2024-10-18 18:34:26,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,760 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:34:26,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,833 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:34:26,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:26,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1586598664, now seen corresponding path program 1 times [2024-10-18 18:34:26,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:26,974 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:26,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:26,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:26,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,047 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:27,119 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:27,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:27,145 INFO L85 PathProgramCache]: Analyzing trace with hash -1671370634, now seen corresponding path program 1 times [2024-10-18 18:34:27,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:27,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:27,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,223 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 20 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:27,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:27,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:27,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,308 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 20 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:27,380 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:27,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:27,510 INFO L85 PathProgramCache]: Analyzing trace with hash -727267156, now seen corresponding path program 1 times [2024-10-18 18:34:27,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:27,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:27,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,583 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:27,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:27,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:27,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,654 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:27,712 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:27,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:27,741 INFO L85 PathProgramCache]: Analyzing trace with hash -1646531741, now seen corresponding path program 1 times [2024-10-18 18:34:27,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:27,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:27,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,818 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:27,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:27,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:27,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:27,896 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:27,950 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:27,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:29,979 INFO L85 PathProgramCache]: Analyzing trace with hash 515983135, now seen corresponding path program 1 times [2024-10-18 18:34:29,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:29,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,054 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:30,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,253 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:30,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:30,344 INFO L85 PathProgramCache]: Analyzing trace with hash -1097129639, now seen corresponding path program 1 times [2024-10-18 18:34:30,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,425 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:30,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,507 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:30,576 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:30,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 288 treesize of output 264 [2024-10-18 18:34:30,604 INFO L85 PathProgramCache]: Analyzing trace with hash -1830465879, now seen corresponding path program 1 times [2024-10-18 18:34:30,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,676 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:30,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,747 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:30,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:30,893 INFO L85 PathProgramCache]: Analyzing trace with hash 1440872234, now seen corresponding path program 1 times [2024-10-18 18:34:30,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:30,972 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:30,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:30,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:30,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,050 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:31,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:31,134 INFO L85 PathProgramCache]: Analyzing trace with hash 904842726, now seen corresponding path program 1 times [2024-10-18 18:34:31,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:31,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:31,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,210 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:31,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:31,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:31,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,282 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:31,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:31,421 INFO L85 PathProgramCache]: Analyzing trace with hash 209751382, now seen corresponding path program 1 times [2024-10-18 18:34:31,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:31,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:31,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,471 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:31,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:31,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:31,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,522 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:31,739 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:31,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:31,770 INFO L85 PathProgramCache]: Analyzing trace with hash -536054927, now seen corresponding path program 1 times [2024-10-18 18:34:31,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:31,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:31,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,821 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:31,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:31,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:31,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:31,871 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:31,972 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:31,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:32,000 INFO L85 PathProgramCache]: Analyzing trace with hash 1035483098, now seen corresponding path program 1 times [2024-10-18 18:34:32,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:32,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:32,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:32,076 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:34:32,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:32,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:32,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:32,328 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:34:36,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1342801101, now seen corresponding path program 1 times [2024-10-18 18:34:36,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:36,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:36,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:37,187 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:37,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:37,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:37,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:37,361 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:37,574 INFO L85 PathProgramCache]: Analyzing trace with hash 705194129, now seen corresponding path program 1 times [2024-10-18 18:34:37,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:37,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:37,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:37,866 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:37,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:37,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:37,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:38,167 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:57,111 INFO L85 PathProgramCache]: Analyzing trace with hash -1482468660, now seen corresponding path program 1 times [2024-10-18 18:34:57,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,282 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 18:34:57,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,479 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 18:34:57,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:34:57,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=624, Invalid=6858, Unknown=0, NotChecked=0, Total=7482 [2024-10-18 18:35:47,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1342808712, now seen corresponding path program 1 times [2024-10-18 18:35:47,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:47,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:47,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:48,163 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:48,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:48,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:48,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:48,335 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:48,490 INFO L85 PathProgramCache]: Analyzing trace with hash 705201734, now seen corresponding path program 1 times [2024-10-18 18:35:48,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:48,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:48,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:48,589 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-10-18 18:35:48,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:48,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:48,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:48,689 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-10-18 18:35:48,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:35:48,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=639, Invalid=7193, Unknown=0, NotChecked=0, Total=7832 [2024-10-18 18:35:50,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:35:50,051 INFO L85 PathProgramCache]: Analyzing trace with hash 890385437, now seen corresponding path program 1 times [2024-10-18 18:35:50,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:50,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:50,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:50,254 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:50,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:50,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:50,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:50,583 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:52,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 434 treesize of output 410 [2024-10-18 18:35:52,432 INFO L85 PathProgramCache]: Analyzing trace with hash 1217722750, now seen corresponding path program 1 times [2024-10-18 18:35:52,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:52,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:52,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:52,860 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 181 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 18:35:52,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:52,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:52,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:53,371 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 181 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 18:35:53,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:35:53,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1377620250, now seen corresponding path program 1 times [2024-10-18 18:35:53,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:53,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:53,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:54,378 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 285 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:54,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:54,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:54,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:54,892 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 285 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:56,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:35:56,063 INFO L85 PathProgramCache]: Analyzing trace with hash -1552693968, now seen corresponding path program 1 times [2024-10-18 18:35:56,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:56,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:56,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:57,220 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 574 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:35:57,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:57,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:57,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:58,233 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 574 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:35:58,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:35:58,513 INFO L85 PathProgramCache]: Analyzing trace with hash -210140568, now seen corresponding path program 1 times [2024-10-18 18:35:58,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:58,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:58,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:59,461 INFO L134 CoverageAnalysis]: Checked inductivity of 693 backedges. 671 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 18:35:59,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:59,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:59,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:00,549 INFO L134 CoverageAnalysis]: Checked inductivity of 693 backedges. 671 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 18:36:00,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:36:00,823 INFO L85 PathProgramCache]: Analyzing trace with hash 1593976100, now seen corresponding path program 1 times [2024-10-18 18:36:00,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:00,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:00,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:02,364 INFO L134 CoverageAnalysis]: Checked inductivity of 829 backedges. 815 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:02,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:02,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:02,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:03,534 INFO L134 CoverageAnalysis]: Checked inductivity of 829 backedges. 815 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:03,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:36:03,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1609583129, now seen corresponding path program 1 times [2024-10-18 18:36:03,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:03,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:03,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:05,321 INFO L134 CoverageAnalysis]: Checked inductivity of 853 backedges. 842 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:36:05,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:05,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:05,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:06,720 INFO L134 CoverageAnalysis]: Checked inductivity of 853 backedges. 842 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:36:07,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:36:07,152 INFO L85 PathProgramCache]: Analyzing trace with hash 1835114209, now seen corresponding path program 1 times [2024-10-18 18:36:07,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:07,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:07,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:08,637 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 860 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:08,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:08,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:08,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:10,106 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 860 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:10,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:10,985 INFO L85 PathProgramCache]: Analyzing trace with hash -820342628, now seen corresponding path program 1 times [2024-10-18 18:36:10,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:10,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:11,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:12,652 INFO L134 CoverageAnalysis]: Checked inductivity of 947 backedges. 935 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:12,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:12,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:12,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:14,181 INFO L134 CoverageAnalysis]: Checked inductivity of 947 backedges. 935 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:36:15,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:36:15,227 INFO L85 PathProgramCache]: Analyzing trace with hash -800866407, now seen corresponding path program 1 times [2024-10-18 18:36:15,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:15,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:15,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:16,597 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 18:36:16,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:16,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:16,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:18,477 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 18:36:18,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:36:18,539 INFO L85 PathProgramCache]: Analyzing trace with hash -740169368, now seen corresponding path program 1 times [2024-10-18 18:36:18,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:18,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:18,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:20,283 INFO L134 CoverageAnalysis]: Checked inductivity of 970 backedges. 953 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:20,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:20,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:20,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:21,804 INFO L134 CoverageAnalysis]: Checked inductivity of 970 backedges. 953 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:21,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:36:21,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1644399497, now seen corresponding path program 1 times [2024-10-18 18:36:21,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:21,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:22,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:23,461 INFO L134 CoverageAnalysis]: Checked inductivity of 973 backedges. 956 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:23,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:23,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:23,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:24,944 INFO L134 CoverageAnalysis]: Checked inductivity of 973 backedges. 956 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:25,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:36:25,070 INFO L85 PathProgramCache]: Analyzing trace with hash -2083407024, now seen corresponding path program 1 times [2024-10-18 18:36:25,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:25,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:25,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:26,522 INFO L134 CoverageAnalysis]: Checked inductivity of 1015 backedges. 988 proven. 17 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:36:26,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:26,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:26,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:28,090 INFO L134 CoverageAnalysis]: Checked inductivity of 1015 backedges. 988 proven. 17 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:36:28,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:28,128 INFO L85 PathProgramCache]: Analyzing trace with hash -716808719, now seen corresponding path program 1 times [2024-10-18 18:36:28,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:28,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:28,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:29,549 INFO L134 CoverageAnalysis]: Checked inductivity of 1020 backedges. 991 proven. 17 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:36:29,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:29,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:29,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:31,276 INFO L134 CoverageAnalysis]: Checked inductivity of 1020 backedges. 991 proven. 17 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:36:31,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:31,377 INFO L85 PathProgramCache]: Analyzing trace with hash -850875310, now seen corresponding path program 1 times [2024-10-18 18:36:31,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:31,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:31,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:32,708 INFO L134 CoverageAnalysis]: Checked inductivity of 944 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:36:32,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:32,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:32,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:34,106 INFO L134 CoverageAnalysis]: Checked inductivity of 944 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:36:58,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:36:58,871 INFO L85 PathProgramCache]: Analyzing trace with hash 681621139, now seen corresponding path program 1 times [2024-10-18 18:36:58,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:58,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:58,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:59,396 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-10-18 18:36:59,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:59,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:59,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:59,742 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-10-18 18:37:00,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:37:00,107 INFO L85 PathProgramCache]: Analyzing trace with hash -313532515, now seen corresponding path program 1 times [2024-10-18 18:37:00,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:00,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:00,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:00,490 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 6 proven. 63 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:37:00,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:00,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:00,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:00,794 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 6 proven. 63 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:37:00,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:37:00,855 INFO L85 PathProgramCache]: Analyzing trace with hash -1759873095, now seen corresponding path program 1 times [2024-10-18 18:37:00,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:00,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:01,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:01,339 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 11 proven. 63 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-10-18 18:37:01,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:01,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:01,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:01,662 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 11 proven. 63 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-10-18 18:37:01,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:37:01,823 INFO L85 PathProgramCache]: Analyzing trace with hash -120900360, now seen corresponding path program 1 times [2024-10-18 18:37:01,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:01,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:01,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:02,154 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 21 proven. 63 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-10-18 18:37:02,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:02,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:02,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:02,480 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 21 proven. 63 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-10-18 18:37:02,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:37:02,526 INFO L85 PathProgramCache]: Analyzing trace with hash 2096713938, now seen corresponding path program 1 times [2024-10-18 18:37:02,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:02,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:02,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:03,031 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 26 proven. 63 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2024-10-18 18:37:03,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:03,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:03,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:03,366 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 26 proven. 63 refuted. 0 times theorem prover too weak. 88 trivial. 0 not checked. [2024-10-18 18:37:03,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:37:03,572 INFO L85 PathProgramCache]: Analyzing trace with hash -992542809, now seen corresponding path program 1 times [2024-10-18 18:37:03,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:03,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:03,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:03,881 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 6 proven. 61 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:37:03,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:03,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:03,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:04,368 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 6 proven. 61 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-10-18 18:37:04,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:04,439 INFO L85 PathProgramCache]: Analyzing trace with hash 1552753975, now seen corresponding path program 1 times [2024-10-18 18:37:04,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:04,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:04,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:04,745 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:04,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:04,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:04,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:05,045 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:05,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:37:05,087 INFO L85 PathProgramCache]: Analyzing trace with hash 1823989624, now seen corresponding path program 1 times [2024-10-18 18:37:05,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:05,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:05,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:05,430 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:05,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:05,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:05,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:05,923 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 9 proven. 61 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-10-18 18:37:05,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:37:06,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1270696801, now seen corresponding path program 1 times [2024-10-18 18:37:06,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:06,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:06,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:06,318 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-10-18 18:37:06,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:06,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:06,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:06,642 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-10-18 18:37:06,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:37:06,697 INFO L85 PathProgramCache]: Analyzing trace with hash 495078445, now seen corresponding path program 1 times [2024-10-18 18:37:06,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:06,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:06,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:07,042 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-10-18 18:37:07,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:07,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:07,499 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2024-10-18 18:37:07,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:37:07,542 INFO L85 PathProgramCache]: Analyzing trace with hash -989927250, now seen corresponding path program 1 times [2024-10-18 18:37:07,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:07,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:07,876 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-10-18 18:37:07,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:07,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:08,222 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 15 proven. 61 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-10-18 18:37:08,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:37:08,272 INFO L85 PathProgramCache]: Analyzing trace with hash 1349973546, now seen corresponding path program 1 times [2024-10-18 18:37:08,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:08,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:08,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:08,597 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-10-18 18:37:08,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:08,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:08,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:09,063 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 12 proven. 61 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-10-18 18:37:09,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:09,129 INFO L85 PathProgramCache]: Analyzing trace with hash -991588501, now seen corresponding path program 1 times [2024-10-18 18:37:09,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:09,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:09,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:09,505 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-10-18 18:37:09,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:09,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:09,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:09,878 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 53 proven. 5 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. Killed by 15