./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/pthread-ext/25_stack_longest-1-pthread.i --full-output --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b86fb0b7 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../../../trunk/examples/svcomp/pthread-ext/25_stack_longest-1-pthread.i -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3e10ed02255b37a861fcd919e1a26aad90b67620d926f632b070967147a10b69 --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.conditional-comm-b86fb0b-m [2024-10-18 18:32:30,488 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-18 18:32:30,581 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2024-10-18 18:32:30,585 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-18 18:32:30,585 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-18 18:32:30,614 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-18 18:32:30,615 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-18 18:32:30,615 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-18 18:32:30,616 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-18 18:32:30,616 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-18 18:32:30,617 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-18 18:32:30,617 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-18 18:32:30,618 INFO L153 SettingsManager]: * Use SBE=true [2024-10-18 18:32:30,618 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-18 18:32:30,618 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-18 18:32:30,619 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-18 18:32:30,622 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-18 18:32:30,622 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-18 18:32:30,623 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-18 18:32:30,626 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-18 18:32:30,626 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-18 18:32:30,627 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-18 18:32:30,627 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-18 18:32:30,628 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-18 18:32:30,628 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-18 18:32:30,628 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-18 18:32:30,631 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-18 18:32:30,631 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-18 18:32:30,632 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-18 18:32:30,632 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-18 18:32:30,632 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 18:32:30,632 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-18 18:32:30,633 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-18 18:32:30,633 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2024-10-18 18:32:30,633 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-18 18:32:30,633 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-18 18:32:30,634 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2024-10-18 18:32:30,634 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-18 18:32:30,634 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-18 18:32:30,635 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-10-18 18:32:30,635 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2024-10-18 18:32:30,636 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3e10ed02255b37a861fcd919e1a26aad90b67620d926f632b070967147a10b69 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 5 [2024-10-18 18:32:30,858 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-18 18:32:30,884 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-18 18:32:30,889 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-18 18:32:30,890 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-18 18:32:30,890 INFO L274 PluginConnector]: CDTParser initialized [2024-10-18 18:32:30,891 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-ext/25_stack_longest-1-pthread.i [2024-10-18 18:32:32,398 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-18 18:32:32,657 INFO L384 CDTParser]: Found 1 translation units. [2024-10-18 18:32:32,658 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack_longest-1-pthread.i [2024-10-18 18:32:32,672 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/e2ad24c5a/060aa770389e418693a2970e8fb2dd7e/FLAGe67f8e9e9 [2024-10-18 18:32:32,685 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/e2ad24c5a/060aa770389e418693a2970e8fb2dd7e [2024-10-18 18:32:32,687 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-18 18:32:32,689 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-18 18:32:32,691 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-18 18:32:32,691 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-18 18:32:32,696 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-18 18:32:32,696 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 06:32:32" (1/1) ... [2024-10-18 18:32:32,699 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5de27835 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:32, skipping insertion in model container [2024-10-18 18:32:32,699 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 06:32:32" (1/1) ... [2024-10-18 18:32:32,738 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-18 18:32:33,106 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack_longest-1-pthread.i[31356,31369] [2024-10-18 18:32:33,123 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 18:32:33,137 INFO L200 MainTranslator]: Completed pre-run [2024-10-18 18:32:33,190 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/25_stack_longest-1-pthread.i[31356,31369] [2024-10-18 18:32:33,194 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 18:32:33,245 INFO L204 MainTranslator]: Completed translation [2024-10-18 18:32:33,246 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33 WrapperNode [2024-10-18 18:32:33,246 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-18 18:32:33,247 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-18 18:32:33,247 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-18 18:32:33,248 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-18 18:32:33,254 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,271 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,298 INFO L138 Inliner]: procedures = 171, calls = 35, calls flagged for inlining = 9, calls inlined = 8, statements flattened = 133 [2024-10-18 18:32:33,298 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-18 18:32:33,299 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-18 18:32:33,302 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-18 18:32:33,302 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-18 18:32:33,313 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,313 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,316 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,316 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,322 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,325 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,330 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,333 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,335 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-18 18:32:33,336 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-18 18:32:33,337 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-18 18:32:33,337 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-18 18:32:33,338 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (1/1) ... [2024-10-18 18:32:33,345 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 18:32:33,358 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:33,375 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:33,379 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-10-18 18:32:33,436 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2024-10-18 18:32:33,437 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2024-10-18 18:32:33,437 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2024-10-18 18:32:33,437 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-10-18 18:32:33,437 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-18 18:32:33,437 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-10-18 18:32:33,438 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-10-18 18:32:33,438 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexUnlock [2024-10-18 18:32:33,438 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-18 18:32:33,438 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-18 18:32:33,441 WARN L207 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2024-10-18 18:32:33,598 INFO L238 CfgBuilder]: Building ICFG [2024-10-18 18:32:33,601 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-18 18:32:33,831 INFO L283 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2024-10-18 18:32:33,832 INFO L287 CfgBuilder]: Performing block encoding [2024-10-18 18:32:34,023 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-18 18:32:34,024 INFO L314 CfgBuilder]: Removed 2 assume(true) statements. [2024-10-18 18:32:34,024 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 06:32:34 BoogieIcfgContainer [2024-10-18 18:32:34,026 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-18 18:32:34,029 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-18 18:32:34,030 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-18 18:32:34,033 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-18 18:32:34,033 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.10 06:32:32" (1/3) ... [2024-10-18 18:32:34,076 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69feeb7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 06:32:34, skipping insertion in model container [2024-10-18 18:32:34,076 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 06:32:33" (2/3) ... [2024-10-18 18:32:34,077 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69feeb7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 06:32:34, skipping insertion in model container [2024-10-18 18:32:34,077 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 06:32:34" (3/3) ... [2024-10-18 18:32:34,078 INFO L112 eAbstractionObserver]: Analyzing ICFG 25_stack_longest-1-pthread.i [2024-10-18 18:32:34,127 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-18 18:32:34,127 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-18 18:32:34,131 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-10-18 18:32:34,243 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:34,288 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:34,288 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:34,289 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:34,290 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:34,291 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-10-18 18:32:34,377 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:34,400 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:34,402 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread1of1ForFork0 ======== [2024-10-18 18:32:34,408 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1b1df86e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:34,409 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:35,409 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:35,411 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:35,412 INFO L85 PathProgramCache]: Analyzing trace with hash -1921419239, now seen corresponding path program 1 times [2024-10-18 18:32:35,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:35,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933278044] [2024-10-18 18:32:35,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:35,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:35,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:35,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:35,735 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:35,735 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933278044] [2024-10-18 18:32:35,735 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [933278044] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:35,736 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:35,736 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:35,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001373409] [2024-10-18 18:32:35,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:35,746 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:35,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:35,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:35,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:35,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:35,769 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:35,770 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 2 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:35,770 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:35,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:35,855 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-18 18:32:35,855 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:35,856 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:35,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1004362886, now seen corresponding path program 1 times [2024-10-18 18:32:35,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:35,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518180543] [2024-10-18 18:32:35,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:35,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:35,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:36,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:36,074 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:36,075 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518180543] [2024-10-18 18:32:36,075 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [518180543] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:36,075 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:36,075 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:36,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850958410] [2024-10-18 18:32:36,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:36,077 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:36,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:36,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:36,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:36,081 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:36,082 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:36,083 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:36,083 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:36,083 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:36,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:36,356 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,356 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-10-18 18:32:36,356 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:36,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:36,357 INFO L85 PathProgramCache]: Analyzing trace with hash 753684577, now seen corresponding path program 1 times [2024-10-18 18:32:36,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:36,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280182021] [2024-10-18 18:32:36,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:36,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:36,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:36,727 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:36,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:36,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280182021] [2024-10-18 18:32:36,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [280182021] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:36,729 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:36,729 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-10-18 18:32:36,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526507016] [2024-10-18 18:32:36,730 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:36,730 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:36,731 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:36,731 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:36,733 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:36,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:36,733 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:36,734 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 3.125) internal successors, (25), 8 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:36,734 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:36,734 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:36,734 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:37,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:37,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:37,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-10-18 18:32:37,898 INFO L782 garLoopResultBuilder]: Registering result SAFE for location thr1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-10-18 18:32:37,899 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-10-18 18:32:37,909 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1] [2024-10-18 18:32:37,912 INFO L312 ceAbstractionStarter]: Result for error location thr1Thread1of1ForFork0 was SAFE (1/2) [2024-10-18 18:32:37,915 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:37,915 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:37,915 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:37,937 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:37,939 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Waiting until timeout for monitored process [2024-10-18 18:32:37,976 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:37,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:37,977 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 18:32:37,978 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1b1df86e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:37,978 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:38,522 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:38,523 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:38,524 INFO L85 PathProgramCache]: Analyzing trace with hash 352059429, now seen corresponding path program 1 times [2024-10-18 18:32:38,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:38,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002332256] [2024-10-18 18:32:38,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:38,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:38,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:38,583 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:38,584 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:38,584 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1002332256] [2024-10-18 18:32:38,584 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1002332256] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:38,584 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:38,585 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:38,585 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047158805] [2024-10-18 18:32:38,586 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:38,586 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:38,586 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:38,587 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:38,587 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:38,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:38,590 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:38,590 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 2 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:38,590 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:38,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:38,650 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-10-18 18:32:38,650 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:38,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:38,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1174918982, now seen corresponding path program 1 times [2024-10-18 18:32:38,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:38,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724384748] [2024-10-18 18:32:38,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:38,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:38,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:38,720 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:38,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:38,721 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724384748] [2024-10-18 18:32:38,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [724384748] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:38,721 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:38,721 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:38,721 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765623748] [2024-10-18 18:32:38,721 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:38,722 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:38,722 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:38,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:38,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:38,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:38,723 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:38,723 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.4) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:38,723 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:38,723 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:38,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:38,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:38,946 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-10-18 18:32:38,946 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:38,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:38,947 INFO L85 PathProgramCache]: Analyzing trace with hash -1558583699, now seen corresponding path program 1 times [2024-10-18 18:32:38,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:38,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811937023] [2024-10-18 18:32:38,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:38,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:38,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:39,218 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:39,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:39,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811937023] [2024-10-18 18:32:39,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811937023] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:39,219 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:39,219 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-18 18:32:39,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438447013] [2024-10-18 18:32:39,219 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:39,219 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:39,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:39,220 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:39,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:39,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:39,220 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:39,220 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.0) internal successors, (27), 8 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:39,220 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:39,221 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:39,221 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:39,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:39,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:39,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:39,388 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-10-18 18:32:39,388 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:39,388 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:39,388 INFO L85 PathProgramCache]: Analyzing trace with hash -1558582738, now seen corresponding path program 1 times [2024-10-18 18:32:39,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:39,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571169703] [2024-10-18 18:32:39,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:39,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:39,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:39,418 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 18:32:39,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:39,484 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 18:32:39,485 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 18:32:39,485 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2024-10-18 18:32:39,485 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-10-18 18:32:39,487 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1] [2024-10-18 18:32:39,488 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (2/2) [2024-10-18 18:32:39,490 WARN L239 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 18:32:39,491 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2024-10-18 18:32:39,520 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:39,523 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:39,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:39,524 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:39,527 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:39,529 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Waiting until timeout for monitored process [2024-10-18 18:32:39,566 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:39,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:39,567 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 18:32:39,567 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1b1df86e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:39,567 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:41,096 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:41,097 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:41,097 INFO L85 PathProgramCache]: Analyzing trace with hash -476372807, now seen corresponding path program 1 times [2024-10-18 18:32:41,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:41,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279269912] [2024-10-18 18:32:41,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:41,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:41,158 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:41,159 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:41,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1279269912] [2024-10-18 18:32:41,160 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1279269912] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:41,160 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:41,160 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:41,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680900887] [2024-10-18 18:32:41,161 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:41,161 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:41,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:41,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:41,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:41,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:41,162 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:41,162 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 2 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:41,162 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:41,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:41,280 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-10-18 18:32:41,281 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:41,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:41,281 INFO L85 PathProgramCache]: Analyzing trace with hash 261524472, now seen corresponding path program 1 times [2024-10-18 18:32:41,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:41,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386649613] [2024-10-18 18:32:41,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:41,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:41,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:41,370 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:41,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:41,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386649613] [2024-10-18 18:32:41,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1386649613] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:41,373 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:41,373 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:41,373 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899432437] [2024-10-18 18:32:41,373 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:41,373 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:41,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:41,374 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:41,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:41,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:41,374 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:41,374 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:41,375 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:41,375 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:41,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:41,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:41,813 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-10-18 18:32:41,813 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:41,814 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:41,814 INFO L85 PathProgramCache]: Analyzing trace with hash -185061823, now seen corresponding path program 1 times [2024-10-18 18:32:41,814 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:41,814 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303117944] [2024-10-18 18:32:41,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:41,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:41,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:41,903 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:41,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:41,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303117944] [2024-10-18 18:32:41,904 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1303117944] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:41,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [540864979] [2024-10-18 18:32:41,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:41,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:41,905 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:41,908 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:41,909 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-18 18:32:42,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:42,035 INFO L255 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-18 18:32:42,038 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:42,107 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:42,109 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:42,165 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:42,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [540864979] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:42,166 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:42,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-10-18 18:32:42,166 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770286454] [2024-10-18 18:32:42,166 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:42,167 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:42,167 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:42,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:42,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:42,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:42,168 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:42,168 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.0) internal successors, (98), 6 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:42,168 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:42,168 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,168 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:42,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:42,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,315 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:42,496 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:42,497 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:42,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:42,497 INFO L85 PathProgramCache]: Analyzing trace with hash 637797730, now seen corresponding path program 1 times [2024-10-18 18:32:42,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:42,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420625701] [2024-10-18 18:32:42,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:42,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:42,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:42,623 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:42,624 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:42,625 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420625701] [2024-10-18 18:32:42,625 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [420625701] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:42,626 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:42,626 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:42,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349152175] [2024-10-18 18:32:42,626 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:42,627 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:42,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:42,627 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:42,627 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:42,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:42,628 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:42,628 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:42,628 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:42,628 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,628 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,628 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:42,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:42,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,771 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:42,771 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-10-18 18:32:42,771 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:42,772 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:42,772 INFO L85 PathProgramCache]: Analyzing trace with hash 637798691, now seen corresponding path program 1 times [2024-10-18 18:32:42,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:42,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588820104] [2024-10-18 18:32:42,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:42,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:42,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:42,901 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:42,901 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:42,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588820104] [2024-10-18 18:32:42,902 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1588820104] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:42,902 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1501767352] [2024-10-18 18:32:42,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:42,902 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:42,902 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:42,904 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:42,906 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-18 18:32:43,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:43,026 INFO L255 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:43,028 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:43,086 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:43,086 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:43,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1501767352] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:43,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:43,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2024-10-18 18:32:43,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807337249] [2024-10-18 18:32:43,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:43,087 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:43,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:43,088 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:43,088 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:43,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:43,088 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:43,088 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 7.666666666666667) internal successors, (46), 5 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:43,088 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:43,088 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,088 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,088 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,088 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:43,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:43,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:43,410 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-10-18 18:32:43,590 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2024-10-18 18:32:43,591 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:43,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:43,591 INFO L85 PathProgramCache]: Analyzing trace with hash -396656028, now seen corresponding path program 1 times [2024-10-18 18:32:43,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:43,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98193664] [2024-10-18 18:32:43,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:43,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:43,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:43,867 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:43,867 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:43,867 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98193664] [2024-10-18 18:32:43,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98193664] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:43,868 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:43,868 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-10-18 18:32:43,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [493982104] [2024-10-18 18:32:43,868 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:43,868 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-10-18 18:32:43,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:43,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:32:43,869 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-10-18 18:32:43,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:43,870 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:43,870 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 5.555555555555555) internal successors, (50), 8 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:43,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:43,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:43,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:43,870 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:44,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:44,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:44,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:44,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:44,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-10-18 18:32:44,448 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:44,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:44,448 INFO L85 PathProgramCache]: Analyzing trace with hash -917399844, now seen corresponding path program 1 times [2024-10-18 18:32:44,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:44,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392043630] [2024-10-18 18:32:44,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:44,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:44,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:44,615 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:32:44,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:44,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392043630] [2024-10-18 18:32:44,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392043630] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:44,616 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:44,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:44,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55877055] [2024-10-18 18:32:44,619 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:44,619 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:44,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:44,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:44,620 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:44,620 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:44,620 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:44,620 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:44,621 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:44,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:44,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:44,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:44,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:44,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:44,876 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-10-18 18:32:44,876 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:44,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:44,876 INFO L85 PathProgramCache]: Analyzing trace with hash -1914472197, now seen corresponding path program 1 times [2024-10-18 18:32:44,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:44,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694306927] [2024-10-18 18:32:44,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:44,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:44,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:44,992 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:44,993 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:44,993 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694306927] [2024-10-18 18:32:44,994 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [694306927] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:44,994 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [23523747] [2024-10-18 18:32:44,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:44,994 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:44,994 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:44,996 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:44,998 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-18 18:32:45,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:45,138 INFO L255 TraceCheckSpWp]: Trace formula consists of 343 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:45,141 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:45,218 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:45,218 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:45,300 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:45,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [23523747] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:45,300 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:45,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2024-10-18 18:32:45,301 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1084452324] [2024-10-18 18:32:45,301 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:45,301 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-10-18 18:32:45,301 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:45,301 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-10-18 18:32:45,302 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-10-18 18:32:45,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:45,302 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:45,302 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 11.2) internal successors, (112), 9 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 11 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:45,302 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:45,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:45,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:45,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:45,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:45,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:45,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:45,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:45,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:45,658 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-10-18 18:32:45,840 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2024-10-18 18:32:45,840 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:45,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:45,841 INFO L85 PathProgramCache]: Analyzing trace with hash -1207726502, now seen corresponding path program 1 times [2024-10-18 18:32:45,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:45,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036441318] [2024-10-18 18:32:45,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:45,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:45,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:46,069 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 18:32:46,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:46,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036441318] [2024-10-18 18:32:46,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2036441318] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:46,070 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:46,070 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:46,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923811249] [2024-10-18 18:32:46,070 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:46,071 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:46,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:46,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:46,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:46,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:46,074 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:46,074 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:46,074 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:46,074 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,074 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:46,074 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,074 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:46,075 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:46,075 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,075 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:46,075 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-10-18 18:32:46,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 18:32:46,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:46,172 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-10-18 18:32:46,172 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 18:32:46,172 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:46,172 INFO L85 PathProgramCache]: Analyzing trace with hash -1207725541, now seen corresponding path program 1 times [2024-10-18 18:32:46,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:46,173 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912879329] [2024-10-18 18:32:46,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:46,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:46,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:46,206 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 18:32:46,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 18:32:46,247 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 18:32:46,248 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 18:32:46,248 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2024-10-18 18:32:46,248 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-10-18 18:32:46,250 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-18 18:32:46,250 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (1/3) [2024-10-18 18:32:46,251 WARN L239 ceAbstractionStarter]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 18:32:46,251 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 3 thread instances. [2024-10-18 18:32:46,286 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-10-18 18:32:46,289 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 18:32:46,289 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 18:32:46,289 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:46,291 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 18:32:46,293 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (8)] Waiting until timeout for monitored process [2024-10-18 18:32:46,337 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 18:32:46,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:46,338 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread3of3ForFork0 ======== [2024-10-18 18:32:46,339 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1b1df86e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 18:32:46,340 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-10-18 18:32:49,122 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:49,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:49,123 INFO L85 PathProgramCache]: Analyzing trace with hash -1964417026, now seen corresponding path program 1 times [2024-10-18 18:32:49,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:49,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899760298] [2024-10-18 18:32:49,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:49,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:49,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:49,200 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:49,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:49,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899760298] [2024-10-18 18:32:49,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [899760298] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:49,201 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:49,201 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 18:32:49,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1654969825] [2024-10-18 18:32:49,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:49,202 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:32:49,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:49,202 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:49,202 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:32:49,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:49,203 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:49,203 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 2 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:49,203 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:49,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:49,351 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-10-18 18:32:49,351 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:49,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:49,351 INFO L85 PathProgramCache]: Analyzing trace with hash -843580769, now seen corresponding path program 1 times [2024-10-18 18:32:49,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:49,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605188656] [2024-10-18 18:32:49,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:49,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:49,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:49,436 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:49,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:49,437 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605188656] [2024-10-18 18:32:49,437 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1605188656] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:49,437 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:49,437 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:49,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792766485] [2024-10-18 18:32:49,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:49,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 18:32:49,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:49,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 18:32:49,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:49,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:49,439 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:49,439 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.2) internal successors, (56), 4 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:49,439 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:49,439 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:50,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:50,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:50,009 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-10-18 18:32:50,010 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:50,010 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:50,010 INFO L85 PathProgramCache]: Analyzing trace with hash -984220833, now seen corresponding path program 1 times [2024-10-18 18:32:50,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:50,010 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441933587] [2024-10-18 18:32:50,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:50,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,076 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,076 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:50,076 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441933587] [2024-10-18 18:32:50,077 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [441933587] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:50,077 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [217084336] [2024-10-18 18:32:50,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:50,078 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:50,080 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:50,081 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-18 18:32:50,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,248 INFO L255 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-10-18 18:32:50,250 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:50,301 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,301 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 18:32:50,414 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:50,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [217084336] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 18:32:50,415 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 18:32:50,415 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-10-18 18:32:50,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559689889] [2024-10-18 18:32:50,415 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 18:32:50,416 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:50,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:50,416 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:50,416 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-10-18 18:32:50,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:50,417 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:50,417 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 6 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:50,417 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:50,417 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:50,417 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:50,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:50,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:50,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:50,609 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-10-18 18:32:50,791 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:50,792 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:50,792 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:50,792 INFO L85 PathProgramCache]: Analyzing trace with hash 2114606527, now seen corresponding path program 1 times [2024-10-18 18:32:50,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:50,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604992136] [2024-10-18 18:32:50,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:50,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:50,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:50,908 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:32:50,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:50,909 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604992136] [2024-10-18 18:32:50,909 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604992136] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:50,909 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:50,909 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 18:32:50,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243502849] [2024-10-18 18:32:50,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:50,910 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:50,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:50,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:50,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:50,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:50,911 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:50,911 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 4 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:50,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:50,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:50,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:50,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:51,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:51,358 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-10-18 18:32:51,358 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:51,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:51,358 INFO L85 PathProgramCache]: Analyzing trace with hash -1300592888, now seen corresponding path program 1 times [2024-10-18 18:32:51,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:51,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101371205] [2024-10-18 18:32:51,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:51,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:51,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:51,491 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-10-18 18:32:51,492 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:51,492 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101371205] [2024-10-18 18:32:51,492 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2101371205] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:51,492 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:51,493 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:51,493 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623700514] [2024-10-18 18:32:51,493 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:51,493 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:51,493 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:51,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:51,494 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:51,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:51,494 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:51,495 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 19.666666666666668) internal successors, (59), 4 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:51,495 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:51,495 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:51,495 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:51,495 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:51,495 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:52,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:52,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:52,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,168 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-10-18 18:32:52,169 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:52,169 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:52,169 INFO L85 PathProgramCache]: Analyzing trace with hash 308452227, now seen corresponding path program 1 times [2024-10-18 18:32:52,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:52,169 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1290534694] [2024-10-18 18:32:52,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:52,320 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 18:32:52,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:52,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1290534694] [2024-10-18 18:32:52,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1290534694] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:52,321 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:52,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-10-18 18:32:52,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119549569] [2024-10-18 18:32:52,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:52,322 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:52,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:52,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:52,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-10-18 18:32:52,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:52,323 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:52,323 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 15.5) internal successors, (93), 6 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:52,323 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:52,323 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,323 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:52,323 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,324 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,324 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:52,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:52,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:52,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:52,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:52,933 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-10-18 18:32:52,933 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:52,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:52,934 INFO L85 PathProgramCache]: Analyzing trace with hash 503507777, now seen corresponding path program 1 times [2024-10-18 18:32:52,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:52,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067790666] [2024-10-18 18:32:52,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:52,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:52,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,170 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 39 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:32:53,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:53,172 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067790666] [2024-10-18 18:32:53,172 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2067790666] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:53,172 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1891365123] [2024-10-18 18:32:53,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:53,172 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:53,173 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:53,174 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:53,175 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-18 18:32:53,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:53,381 INFO L255 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-10-18 18:32:53,384 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:53,451 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 18:32:53,451 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:53,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1891365123] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:53,451 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:53,451 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 11 [2024-10-18 18:32:53,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1972128665] [2024-10-18 18:32:53,451 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:53,452 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 18:32:53,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:53,452 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:32:53,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2024-10-18 18:32:53,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:53,452 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:53,452 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 5 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:53,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:53,452 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:53,453 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:53,453 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:53,453 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:53,453 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:53,453 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:53,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:53,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:53,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:53,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:53,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:53,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:53,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:53,955 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-10-18 18:32:54,137 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:54,137 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:54,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:54,138 INFO L85 PathProgramCache]: Analyzing trace with hash 2045647571, now seen corresponding path program 1 times [2024-10-18 18:32:54,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:54,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626929483] [2024-10-18 18:32:54,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:54,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:54,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:54,263 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 17 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:54,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:54,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [626929483] [2024-10-18 18:32:54,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [626929483] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 18:32:54,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [926242472] [2024-10-18 18:32:54,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:54,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 18:32:54,264 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 18:32:54,266 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 18:32:54,267 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-10-18 18:32:54,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:54,468 INFO L255 TraceCheckSpWp]: Trace formula consists of 463 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-18 18:32:54,471 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 18:32:54,549 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:32:54,550 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 18:32:54,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [926242472] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:54,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 18:32:54,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 7 [2024-10-18 18:32:54,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143588222] [2024-10-18 18:32:54,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:54,551 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-10-18 18:32:54,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:54,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:32:54,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-10-18 18:32:54,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:54,552 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:54,552 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 12.0) internal successors, (84), 6 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:54,552 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:54,552 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:54,552 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:54,552 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:54,552 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:54,552 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:54,553 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:54,553 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:54,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:54,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:54,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:54,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:54,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:54,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:54,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:54,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:54,866 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-10-18 18:32:55,048 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2024-10-18 18:32:55,049 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:55,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:55,049 INFO L85 PathProgramCache]: Analyzing trace with hash 1474719939, now seen corresponding path program 1 times [2024-10-18 18:32:55,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:55,049 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730063090] [2024-10-18 18:32:55,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:55,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:55,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:55,234 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:32:55,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:32:55,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730063090] [2024-10-18 18:32:55,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [730063090] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:32:55,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:32:55,235 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:32:55,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [230760124] [2024-10-18 18:32:55,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:32:55,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 18:32:55,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:32:55,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:55,236 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:55,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:55,237 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:32:55,237 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 23.0) internal successors, (69), 4 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:55,237 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:55,238 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:55,238 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:32:56,088 INFO L85 PathProgramCache]: Analyzing trace with hash -1207850224, now seen corresponding path program 1 times [2024-10-18 18:32:56,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,250 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 142 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 18:32:56,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:56,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:56,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:56,461 INFO L134 CoverageAnalysis]: Checked inductivity of 246 backedges. 142 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 18:32:56,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:32:56,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 18:32:58,350 INFO L85 PathProgramCache]: Analyzing trace with hash -1683489689, now seen corresponding path program 1 times [2024-10-18 18:32:58,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,487 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-10-18 18:32:58,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:58,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:58,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:32:58,615 INFO L134 CoverageAnalysis]: Checked inductivity of 205 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2024-10-18 18:32:58,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:32:58,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-10-18 18:32:59,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:32:59,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:59,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:59,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:59,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:59,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:32:59,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:32:59,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:32:59,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:32:59,897 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-10-18 18:32:59,897 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting thr1Err0ASSERT_VIOLATIONERROR_FUNCTION === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-10-18 18:32:59,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 18:32:59,898 INFO L85 PathProgramCache]: Analyzing trace with hash 997038134, now seen corresponding path program 1 times [2024-10-18 18:32:59,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 18:32:59,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589717891] [2024-10-18 18:32:59,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:32:59,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:32:59,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:00,059 INFO L134 CoverageAnalysis]: Checked inductivity of 128 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:33:00,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 18:33:00,059 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589717891] [2024-10-18 18:33:00,059 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589717891] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 18:33:00,059 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 18:33:00,059 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 18:33:00,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307434744] [2024-10-18 18:33:00,060 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 18:33:00,060 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 18:33:00,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 18:33:00,061 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 18:33:00,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 18:33:00,061 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:33:00,061 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 18:33:00,062 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 18:33:00,062 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-10-18 18:33:00,063 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 18:33:00,063 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 18:33:01,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:33:01,088 INFO L85 PathProgramCache]: Analyzing trace with hash -1648041374, now seen corresponding path program 1 times [2024-10-18 18:33:01,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:01,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:01,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:01,548 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:33:01,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:01,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:01,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:01,919 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:33:01,920 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-10-18 18:33:01,920 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2024-10-18 18:33:04,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 884 treesize of output 836 [2024-10-18 18:33:04,175 INFO L85 PathProgramCache]: Analyzing trace with hash 2111150371, now seen corresponding path program 1 times [2024-10-18 18:33:04,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:04,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:04,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:04,351 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:33:04,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:04,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:04,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:04,485 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:33:04,486 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:33:04,486 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=318, Unknown=0, NotChecked=0, Total=380 [2024-10-18 18:33:06,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:33:06,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1856527907, now seen corresponding path program 1 times [2024-10-18 18:33:06,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:06,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:06,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:06,579 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:33:06,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:06,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:06,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:06,818 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-10-18 18:33:07,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:33:07,747 INFO L85 PathProgramCache]: Analyzing trace with hash 1030814471, now seen corresponding path program 1 times [2024-10-18 18:33:07,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:07,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:07,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:07,949 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2024-10-18 18:33:07,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:07,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:08,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:08,115 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 198 proven. 0 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2024-10-18 18:33:08,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:33:08,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1212, Unknown=0, NotChecked=0, Total=1406 [2024-10-18 18:33:10,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:33:10,142 INFO L85 PathProgramCache]: Analyzing trace with hash 445445431, now seen corresponding path program 1 times [2024-10-18 18:33:10,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:10,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:10,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:10,440 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:10,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:10,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:10,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:10,581 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:11,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:33:11,045 INFO L85 PathProgramCache]: Analyzing trace with hash -1038048111, now seen corresponding path program 1 times [2024-10-18 18:33:11,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:11,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:11,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:11,349 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:33:11,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:11,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:11,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:11,555 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:33:11,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 202 [2024-10-18 18:33:11,708 INFO L85 PathProgramCache]: Analyzing trace with hash -971558923, now seen corresponding path program 1 times [2024-10-18 18:33:11,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:11,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:11,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:11,862 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:33:11,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:11,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:11,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:12,051 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:33:12,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 433 treesize of output 409 [2024-10-18 18:33:12,391 INFO L85 PathProgramCache]: Analyzing trace with hash -1008494444, now seen corresponding path program 1 times [2024-10-18 18:33:12,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:12,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:12,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:12,561 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:33:12,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:12,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:12,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:12,830 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:33:13,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:33:13,023 INFO L85 PathProgramCache]: Analyzing trace with hash -814361452, now seen corresponding path program 1 times [2024-10-18 18:33:13,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:13,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:13,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:13,570 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 75 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:13,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:13,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:13,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:13,844 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 75 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:13,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 434 treesize of output 410 [2024-10-18 18:33:13,985 INFO L85 PathProgramCache]: Analyzing trace with hash 418603338, now seen corresponding path program 1 times [2024-10-18 18:33:13,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:13,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:14,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:14,313 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 107 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 18:33:14,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:14,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:14,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:14,593 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 107 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 18:33:14,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 226 treesize of output 214 [2024-10-18 18:33:14,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1151118497, now seen corresponding path program 1 times [2024-10-18 18:33:14,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:14,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:14,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,050 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 112 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 18:33:15,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:15,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,536 INFO L134 CoverageAnalysis]: Checked inductivity of 154 backedges. 112 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 18:33:15,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 190 treesize of output 178 [2024-10-18 18:33:15,629 INFO L85 PathProgramCache]: Analyzing trace with hash 720943090, now seen corresponding path program 1 times [2024-10-18 18:33:15,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:15,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:15,982 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 97 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:33:15,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:15,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:16,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:16,347 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 97 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:33:16,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:33:16,431 INFO L85 PathProgramCache]: Analyzing trace with hash 768005697, now seen corresponding path program 1 times [2024-10-18 18:33:16,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:16,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:16,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,066 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:17,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,439 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:17,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:33:17,486 INFO L85 PathProgramCache]: Analyzing trace with hash -681876766, now seen corresponding path program 1 times [2024-10-18 18:33:17,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:17,837 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:17,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:17,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:17,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:18,424 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 122 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:18,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:33:18,528 INFO L85 PathProgramCache]: Analyzing trace with hash -1464064513, now seen corresponding path program 1 times [2024-10-18 18:33:18,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:18,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:18,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:19,058 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 129 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:33:19,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:19,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:19,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:19,511 INFO L134 CoverageAnalysis]: Checked inductivity of 140 backedges. 129 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:33:19,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 772 treesize of output 724 [2024-10-18 18:33:19,571 INFO L85 PathProgramCache]: Analyzing trace with hash -2063206068, now seen corresponding path program 1 times [2024-10-18 18:33:19,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:19,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:19,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:20,135 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 158 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:20,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:20,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:20,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:20,617 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 158 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:20,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:33:20,742 INFO L85 PathProgramCache]: Analyzing trace with hash -869805099, now seen corresponding path program 1 times [2024-10-18 18:33:20,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:20,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:20,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:20,936 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 18:33:20,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:20,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:20,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:21,106 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 18:33:31,308 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:31,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:33:31,364 INFO L85 PathProgramCache]: Analyzing trace with hash -504101081, now seen corresponding path program 1 times [2024-10-18 18:33:31,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:31,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:31,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:31,445 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:31,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:31,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:31,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:31,526 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:32,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1030 treesize of output 934 [2024-10-18 18:33:32,398 INFO L85 PathProgramCache]: Analyzing trace with hash -1241547536, now seen corresponding path program 1 times [2024-10-18 18:33:32,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:32,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:32,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:32,545 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:32,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:32,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:32,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:32,665 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:33,652 INFO L85 PathProgramCache]: Analyzing trace with hash -1050976843, now seen corresponding path program 1 times [2024-10-18 18:33:33,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:33,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:33,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:33,972 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:33,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:33,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:34,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:34,114 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:34,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1779398666, now seen corresponding path program 1 times [2024-10-18 18:33:34,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:34,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:34,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:34,273 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:34,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:34,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:34,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:34,429 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:35,265 INFO L85 PathProgramCache]: Analyzing trace with hash 568092833, now seen corresponding path program 1 times [2024-10-18 18:33:35,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:35,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:35,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:35,533 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:35,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:35,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:35,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:35,761 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:35,787 INFO L85 PathProgramCache]: Analyzing trace with hash 430949328, now seen corresponding path program 1 times [2024-10-18 18:33:35,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:35,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:35,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,011 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:36,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,239 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:36,314 INFO L85 PathProgramCache]: Analyzing trace with hash 383685808, now seen corresponding path program 1 times [2024-10-18 18:33:36,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:36,576 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 141 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:33:36,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:36,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:36,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:37,148 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 141 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 18:33:37,158 INFO L85 PathProgramCache]: Analyzing trace with hash -990701575, now seen corresponding path program 1 times [2024-10-18 18:33:37,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:37,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:37,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:37,434 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 142 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:37,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:37,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:37,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:37,692 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 142 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:37,785 INFO L85 PathProgramCache]: Analyzing trace with hash -1050328968, now seen corresponding path program 1 times [2024-10-18 18:33:37,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:37,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:37,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:37,959 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:37,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:37,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:38,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:38,137 INFO L134 CoverageAnalysis]: Checked inductivity of 167 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:38,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1799479430, now seen corresponding path program 1 times [2024-10-18 18:33:38,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:38,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:38,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:38,329 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 79 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:38,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:38,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:38,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:38,682 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 79 proven. 16 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-10-18 18:33:38,853 INFO L85 PathProgramCache]: Analyzing trace with hash 482550339, now seen corresponding path program 1 times [2024-10-18 18:33:38,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:38,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:38,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:39,022 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 73 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:39,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:39,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:39,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:39,186 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 73 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:39,196 INFO L85 PathProgramCache]: Analyzing trace with hash 2074097087, now seen corresponding path program 1 times [2024-10-18 18:33:39,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:39,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:39,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:39,359 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:39,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:39,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:39,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:39,522 INFO L134 CoverageAnalysis]: Checked inductivity of 163 backedges. 76 proven. 16 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-10-18 18:33:39,586 INFO L85 PathProgramCache]: Analyzing trace with hash 1399606700, now seen corresponding path program 1 times [2024-10-18 18:33:39,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:39,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:39,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:40,131 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 147 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:40,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:40,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:40,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:40,556 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 147 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-10-18 18:33:40,731 INFO L85 PathProgramCache]: Analyzing trace with hash 219450897, now seen corresponding path program 1 times [2024-10-18 18:33:40,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:40,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:40,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:41,010 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:41,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:41,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:41,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:41,284 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 7 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:41,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1639520900, now seen corresponding path program 1 times [2024-10-18 18:33:41,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:41,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:41,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:41,711 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-10-18 18:33:41,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:41,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:41,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:42,002 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 20 proven. 4 refuted. 0 times theorem prover too weak. 185 trivial. 0 not checked. [2024-10-18 18:33:42,040 INFO L85 PathProgramCache]: Analyzing trace with hash 219420252, now seen corresponding path program 1 times [2024-10-18 18:33:42,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:42,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:42,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:42,446 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:42,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:42,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:42,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:42,625 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-10-18 18:33:42,670 INFO L85 PathProgramCache]: Analyzing trace with hash -1366327668, now seen corresponding path program 1 times [2024-10-18 18:33:42,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:42,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:42,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:42,850 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-18 18:33:42,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:42,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:42,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:43,027 INFO L134 CoverageAnalysis]: Checked inductivity of 187 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-10-18 18:33:46,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 542 treesize of output 494 [2024-10-18 18:33:46,865 INFO L85 PathProgramCache]: Analyzing trace with hash -483798229, now seen corresponding path program 1 times [2024-10-18 18:33:46,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:46,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:46,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:46,927 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:46,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:46,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:46,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:46,987 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:47,029 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:47,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 550 treesize of output 502 [2024-10-18 18:33:47,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1849570436, now seen corresponding path program 1 times [2024-10-18 18:33:47,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:47,132 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:47,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:47,206 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:47,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:33:47,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1068944956, now seen corresponding path program 1 times [2024-10-18 18:33:47,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:47,379 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:47,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:47,455 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:47,501 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:47,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 288 treesize of output 264 [2024-10-18 18:33:47,535 INFO L85 PathProgramCache]: Analyzing trace with hash 439918758, now seen corresponding path program 1 times [2024-10-18 18:33:47,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:47,603 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:47,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:47,683 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:33:47,725 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:47,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1038 treesize of output 942 [2024-10-18 18:33:47,755 INFO L85 PathProgramCache]: Analyzing trace with hash 2016404173, now seen corresponding path program 1 times [2024-10-18 18:33:47,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:47,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:47,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:48,024 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:48,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:48,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:48,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:48,123 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:48,169 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:48,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 514 treesize of output 466 [2024-10-18 18:33:48,208 INFO L85 PathProgramCache]: Analyzing trace with hash -2040824936, now seen corresponding path program 1 times [2024-10-18 18:33:48,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:48,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:48,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:48,296 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:33:48,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:48,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:48,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:48,379 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:33:52,939 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:52,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 514 treesize of output 466 [2024-10-18 18:33:52,975 INFO L85 PathProgramCache]: Analyzing trace with hash 375399546, now seen corresponding path program 1 times [2024-10-18 18:33:52,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:52,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:52,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:53,053 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:53,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:53,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:53,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:53,133 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:53,174 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:33:53,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 550 treesize of output 502 [2024-10-18 18:33:53,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1619653267, now seen corresponding path program 1 times [2024-10-18 18:33:53,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:53,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:53,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:53,321 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:33:53,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:33:53,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:33:53,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:33:53,420 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 22 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:02,237 INFO L85 PathProgramCache]: Analyzing trace with hash 1674476633, now seen corresponding path program 1 times [2024-10-18 18:34:02,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:02,307 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:02,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:02,378 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:02,529 INFO L85 PathProgramCache]: Analyzing trace with hash 369042368, now seen corresponding path program 1 times [2024-10-18 18:34:02,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:02,600 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:02,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:02,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:02,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:02,799 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:03,177 INFO L85 PathProgramCache]: Analyzing trace with hash -1607447247, now seen corresponding path program 1 times [2024-10-18 18:34:03,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:03,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:03,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:03,250 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:34:03,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:03,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:03,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:03,322 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:34:03,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 18:34:03,324 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=547, Invalid=5305, Unknown=0, NotChecked=0, Total=5852 [2024-10-18 18:34:41,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1687307988, now seen corresponding path program 1 times [2024-10-18 18:34:41,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:41,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:41,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:41,692 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:41,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:41,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:41,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:41,772 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:42,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1458921249, now seen corresponding path program 1 times [2024-10-18 18:34:42,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:42,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:42,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:42,148 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:42,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:42,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:42,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:42,228 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:43,142 INFO L85 PathProgramCache]: Analyzing trace with hash -1966416498, now seen corresponding path program 1 times [2024-10-18 18:34:43,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:43,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:43,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:43,217 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:43,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:43,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:43,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:43,293 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:43,496 INFO L85 PathProgramCache]: Analyzing trace with hash -829634285, now seen corresponding path program 1 times [2024-10-18 18:34:43,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:43,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:43,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:43,589 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:43,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:43,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:43,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:43,678 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:44,189 INFO L85 PathProgramCache]: Analyzing trace with hash 2144239992, now seen corresponding path program 1 times [2024-10-18 18:34:44,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:44,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:44,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:44,429 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-18 18:34:44,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:44,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:44,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:44,513 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:34:44,625 INFO L85 PathProgramCache]: Analyzing trace with hash 539126374, now seen corresponding path program 1 times [2024-10-18 18:34:44,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:44,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:44,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:44,729 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:44,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:44,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:44,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:44,814 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:46,867 INFO L85 PathProgramCache]: Analyzing trace with hash -412483575, now seen corresponding path program 1 times [2024-10-18 18:34:46,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:46,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:46,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:46,947 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:46,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:46,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:46,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:47,028 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:47,373 INFO L85 PathProgramCache]: Analyzing trace with hash 97638748, now seen corresponding path program 1 times [2024-10-18 18:34:47,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:47,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:47,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:47,456 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:47,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:47,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:47,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:47,539 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:50,186 INFO L85 PathProgramCache]: Analyzing trace with hash -1368669968, now seen corresponding path program 1 times [2024-10-18 18:34:50,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:50,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:50,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:50,267 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:50,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:50,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:50,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:50,347 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 18:34:50,466 INFO L85 PathProgramCache]: Analyzing trace with hash 520624677, now seen corresponding path program 1 times [2024-10-18 18:34:50,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:50,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:50,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:50,550 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:50,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:50,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:50,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:50,632 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:34:51,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1630786702, now seen corresponding path program 1 times [2024-10-18 18:34:51,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:51,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:51,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:51,715 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:51,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:51,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:51,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:51,787 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:51,911 INFO L85 PathProgramCache]: Analyzing trace with hash -985501165, now seen corresponding path program 1 times [2024-10-18 18:34:51,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:51,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:51,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:51,969 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:51,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:51,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:51,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:52,024 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:54,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:54,529 INFO L85 PathProgramCache]: Analyzing trace with hash -671057264, now seen corresponding path program 1 times [2024-10-18 18:34:54,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:54,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:54,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:54,582 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:54,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:54,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:54,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:54,634 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:34:54,813 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:54,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:56,837 INFO L85 PathProgramCache]: Analyzing trace with hash -804887927, now seen corresponding path program 1 times [2024-10-18 18:34:56,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:56,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:56,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:56,913 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:34:56,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:56,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:56,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,157 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 18:34:57,228 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:57,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 532 treesize of output 484 [2024-10-18 18:34:57,268 INFO L85 PathProgramCache]: Analyzing trace with hash 1214869566, now seen corresponding path program 1 times [2024-10-18 18:34:57,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,348 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:34:57,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,426 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-10-18 18:34:57,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:57,518 INFO L85 PathProgramCache]: Analyzing trace with hash -1586598662, now seen corresponding path program 1 times [2024-10-18 18:34:57,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,595 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:57,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,671 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:57,756 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:57,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:34:57,784 INFO L85 PathProgramCache]: Analyzing trace with hash -1671370632, now seen corresponding path program 1 times [2024-10-18 18:34:57,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,868 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 20 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:57,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:57,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:57,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:57,951 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 20 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:58,035 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:58,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:58,069 INFO L85 PathProgramCache]: Analyzing trace with hash -727267154, now seen corresponding path program 1 times [2024-10-18 18:34:58,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:58,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:58,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:58,160 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:58,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:58,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:58,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:58,240 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:58,311 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:58,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:58,343 INFO L85 PathProgramCache]: Analyzing trace with hash -1646531739, now seen corresponding path program 1 times [2024-10-18 18:34:58,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:58,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:58,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:58,422 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:58,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:58,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:58,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:58,515 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:58,574 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:58,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:34:58,622 INFO L85 PathProgramCache]: Analyzing trace with hash 515983137, now seen corresponding path program 1 times [2024-10-18 18:34:58,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:58,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:58,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:58,737 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:58,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:58,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:58,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,016 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:34:59,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:34:59,091 INFO L85 PathProgramCache]: Analyzing trace with hash -1097129637, now seen corresponding path program 1 times [2024-10-18 18:34:59,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:59,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:59,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,193 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:59,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:59,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:59,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,275 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-10-18 18:34:59,377 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:34:59,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 288 treesize of output 264 [2024-10-18 18:34:59,414 INFO L85 PathProgramCache]: Analyzing trace with hash -1830465877, now seen corresponding path program 1 times [2024-10-18 18:34:59,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:59,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:59,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,487 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:59,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:59,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:59,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,562 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 18:34:59,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:34:59,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1440872236, now seen corresponding path program 1 times [2024-10-18 18:34:59,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:59,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:59,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,782 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:59,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:34:59,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:34:59,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:34:59,895 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:34:59,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 506 treesize of output 458 [2024-10-18 18:35:00,004 INFO L85 PathProgramCache]: Analyzing trace with hash 904842728, now seen corresponding path program 1 times [2024-10-18 18:35:00,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:00,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:00,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:00,113 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:35:00,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:00,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:00,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:00,205 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 18:35:00,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 262 treesize of output 238 [2024-10-18 18:35:00,365 INFO L85 PathProgramCache]: Analyzing trace with hash 209751384, now seen corresponding path program 1 times [2024-10-18 18:35:00,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:00,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:00,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:00,420 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:00,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:00,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:00,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:00,474 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:00,732 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:35:00,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 568 treesize of output 520 [2024-10-18 18:35:00,924 INFO L85 PathProgramCache]: Analyzing trace with hash -536054925, now seen corresponding path program 1 times [2024-10-18 18:35:00,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:00,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:00,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:01,004 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:01,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:01,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:01,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:01,086 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:01,220 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 18:35:01,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1056 treesize of output 960 [2024-10-18 18:35:01,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1035483100, now seen corresponding path program 1 times [2024-10-18 18:35:01,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:01,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:01,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:01,385 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:35:01,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:01,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:01,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:01,509 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 18:35:07,023 INFO L85 PathProgramCache]: Analyzing trace with hash 705194130, now seen corresponding path program 1 times [2024-10-18 18:35:07,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:07,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:07,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:07,336 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:07,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:07,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:07,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:07,740 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:35:27,973 INFO L85 PathProgramCache]: Analyzing trace with hash -1482468659, now seen corresponding path program 1 times [2024-10-18 18:35:27,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:27,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:28,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:28,135 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 18:35:28,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:35:28,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:35:28,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:35:28,334 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 18:35:28,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-10-18 18:35:28,337 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=600, Invalid=6540, Unknown=0, NotChecked=0, Total=7140 [2024-10-18 18:36:24,365 INFO L85 PathProgramCache]: Analyzing trace with hash 705201734, now seen corresponding path program 1 times [2024-10-18 18:36:24,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:24,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:24,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:24,649 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:24,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:24,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:24,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:24,917 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:47,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1481507629, now seen corresponding path program 1 times [2024-10-18 18:36:47,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:47,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:47,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:47,797 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:47,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:47,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:47,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:48,085 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 54 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:48,775 INFO L85 PathProgramCache]: Analyzing trace with hash 832290757, now seen corresponding path program 1 times [2024-10-18 18:36:48,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:48,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:48,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:48,944 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-10-18 18:36:48,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:48,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:49,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:49,096 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-10-18 18:36:49,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 18:36:49,098 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=615, Invalid=6867, Unknown=0, NotChecked=0, Total=7482 [2024-10-18 18:36:50,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 884 treesize of output 836 [2024-10-18 18:36:50,807 INFO L85 PathProgramCache]: Analyzing trace with hash 890386865, now seen corresponding path program 1 times [2024-10-18 18:36:50,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:50,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:50,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:51,040 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:51,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:51,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:51,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:51,371 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 28 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:53,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:36:53,768 INFO L85 PathProgramCache]: Analyzing trace with hash 1217724176, now seen corresponding path program 1 times [2024-10-18 18:36:53,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:53,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:53,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:54,237 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 181 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 18:36:54,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:54,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:54,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:54,646 INFO L134 CoverageAnalysis]: Checked inductivity of 194 backedges. 181 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 18:36:55,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:36:55,056 INFO L85 PathProgramCache]: Analyzing trace with hash -1377618824, now seen corresponding path program 1 times [2024-10-18 18:36:55,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:55,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:55,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:56,010 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 285 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:56,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:56,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:56,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:56,573 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 285 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:36:57,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 884 treesize of output 836 [2024-10-18 18:36:57,668 INFO L85 PathProgramCache]: Analyzing trace with hash -1552692542, now seen corresponding path program 1 times [2024-10-18 18:36:57,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:57,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:57,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:36:59,032 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 574 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:36:59,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:36:59,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:36:59,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:00,210 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 574 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 18:37:00,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 904 treesize of output 856 [2024-10-18 18:37:00,497 INFO L85 PathProgramCache]: Analyzing trace with hash -210139142, now seen corresponding path program 1 times [2024-10-18 18:37:00,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:00,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:00,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:01,531 INFO L134 CoverageAnalysis]: Checked inductivity of 693 backedges. 671 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 18:37:01,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:01,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:01,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:02,574 INFO L134 CoverageAnalysis]: Checked inductivity of 693 backedges. 671 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 18:37:02,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:02,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1593977526, now seen corresponding path program 1 times [2024-10-18 18:37:02,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:02,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:02,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:04,404 INFO L134 CoverageAnalysis]: Checked inductivity of 829 backedges. 815 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:37:04,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:04,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:04,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:05,613 INFO L134 CoverageAnalysis]: Checked inductivity of 829 backedges. 815 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:37:05,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:37:05,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1609584555, now seen corresponding path program 1 times [2024-10-18 18:37:05,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:05,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:05,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:07,432 INFO L134 CoverageAnalysis]: Checked inductivity of 853 backedges. 842 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:37:07,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:07,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:07,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:09,047 INFO L134 CoverageAnalysis]: Checked inductivity of 853 backedges. 842 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 18:37:09,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:37:09,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1835115635, now seen corresponding path program 1 times [2024-10-18 18:37:09,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:09,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:09,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:10,913 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 860 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:37:10,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:10,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:11,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:12,267 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 860 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:37:13,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 449 treesize of output 425 [2024-10-18 18:37:13,269 INFO L85 PathProgramCache]: Analyzing trace with hash -820341202, now seen corresponding path program 1 times [2024-10-18 18:37:13,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:13,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:13,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:14,876 INFO L134 CoverageAnalysis]: Checked inductivity of 947 backedges. 935 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:37:14,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:14,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:15,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:16,406 INFO L134 CoverageAnalysis]: Checked inductivity of 947 backedges. 935 proven. 1 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 18:37:17,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 390 treesize of output 366 [2024-10-18 18:37:17,373 INFO L85 PathProgramCache]: Analyzing trace with hash -800864981, now seen corresponding path program 1 times [2024-10-18 18:37:17,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:17,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:17,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:18,856 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 18:37:18,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:18,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:18,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:20,396 INFO L134 CoverageAnalysis]: Checked inductivity of 941 backedges. 925 proven. 1 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 18:37:20,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:20,462 INFO L85 PathProgramCache]: Analyzing trace with hash -740167942, now seen corresponding path program 1 times [2024-10-18 18:37:20,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:20,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:20,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:22,544 INFO L134 CoverageAnalysis]: Checked inductivity of 970 backedges. 953 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:37:22,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:22,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:22,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:24,099 INFO L134 CoverageAnalysis]: Checked inductivity of 970 backedges. 953 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:37:24,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 470 treesize of output 446 [2024-10-18 18:37:24,149 INFO L85 PathProgramCache]: Analyzing trace with hash 1644400923, now seen corresponding path program 1 times [2024-10-18 18:37:24,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:24,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:24,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:25,825 INFO L134 CoverageAnalysis]: Checked inductivity of 973 backedges. 956 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:37:25,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:25,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:25,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 18:37:27,412 INFO L134 CoverageAnalysis]: Checked inductivity of 973 backedges. 956 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 18:37:27,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 381 treesize of output 357 [2024-10-18 18:37:27,562 INFO L85 PathProgramCache]: Analyzing trace with hash -2083405598, now seen corresponding path program 1 times [2024-10-18 18:37:27,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 18:37:27,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 18:37:27,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat