./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/libvsync/rec_ticketlock.i --full-output --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b86fb0b7 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../../../trunk/examples/svcomp/libvsync/rec_ticketlock.i -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 26fb157b5325eaa996338c8b5885df439eefd4a5361a0a1d7cce4088ff8240ef --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 5 -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.conditional-comm-b86fb0b-m [2024-10-18 23:47:23,115 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-18 23:47:23,189 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2024-10-18 23:47:23,197 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-18 23:47:23,198 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-18 23:47:23,223 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-18 23:47:23,224 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-18 23:47:23,224 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-18 23:47:23,225 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-18 23:47:23,226 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-18 23:47:23,227 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-18 23:47:23,227 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-18 23:47:23,228 INFO L153 SettingsManager]: * Use SBE=true [2024-10-18 23:47:23,230 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-18 23:47:23,230 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-18 23:47:23,230 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-18 23:47:23,230 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-18 23:47:23,231 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-18 23:47:23,231 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-18 23:47:23,231 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-18 23:47:23,231 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-18 23:47:23,234 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-18 23:47:23,234 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-18 23:47:23,234 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-18 23:47:23,234 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-18 23:47:23,235 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-18 23:47:23,235 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-18 23:47:23,235 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-18 23:47:23,236 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-18 23:47:23,236 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-18 23:47:23,236 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 23:47:23,236 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-18 23:47:23,237 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-18 23:47:23,237 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2024-10-18 23:47:23,237 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-18 23:47:23,237 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-18 23:47:23,238 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2024-10-18 23:47:23,238 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-18 23:47:23,239 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-18 23:47:23,239 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-10-18 23:47:23,239 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2024-10-18 23:47:23,240 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 26fb157b5325eaa996338c8b5885df439eefd4a5361a0a1d7cce4088ff8240ef Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 5 [2024-10-18 23:47:23,468 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-18 23:47:23,490 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-18 23:47:23,493 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-18 23:47:23,494 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-18 23:47:23,494 INFO L274 PluginConnector]: CDTParser initialized [2024-10-18 23:47:23,496 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/libvsync/rec_ticketlock.i [2024-10-18 23:47:24,944 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-18 23:47:25,371 INFO L384 CDTParser]: Found 1 translation units. [2024-10-18 23:47:25,372 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i [2024-10-18 23:47:25,412 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/7aeb7cff5/aab75fb8eee349a995f8f027ae957e84/FLAGca859227a [2024-10-18 23:47:25,507 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/7aeb7cff5/aab75fb8eee349a995f8f027ae957e84 [2024-10-18 23:47:25,511 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-18 23:47:25,512 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-18 23:47:25,515 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-18 23:47:25,515 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-18 23:47:25,520 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-18 23:47:25,521 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 11:47:25" (1/1) ... [2024-10-18 23:47:25,521 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@541bf6b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:25, skipping insertion in model container [2024-10-18 23:47:25,522 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 11:47:25" (1/1) ... [2024-10-18 23:47:25,618 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-18 23:47:27,168 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[172521,172534] [2024-10-18 23:47:27,182 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[172881,172894] [2024-10-18 23:47:27,379 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[195820,195833] [2024-10-18 23:47:27,379 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[195887,195900] [2024-10-18 23:47:27,390 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 23:47:27,398 INFO L200 MainTranslator]: Completed pre-run [2024-10-18 23:47:27,538 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3755] [2024-10-18 23:47:27,540 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3757] [2024-10-18 23:47:27,543 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3762] [2024-10-18 23:47:27,544 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3764] [2024-10-18 23:47:27,544 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3770] [2024-10-18 23:47:27,545 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3772] [2024-10-18 23:47:27,545 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3778] [2024-10-18 23:47:27,547 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3780] [2024-10-18 23:47:27,547 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3786] [2024-10-18 23:47:27,547 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3788] [2024-10-18 23:47:27,548 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3794] [2024-10-18 23:47:27,549 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3796] [2024-10-18 23:47:27,549 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3802] [2024-10-18 23:47:27,551 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3804] [2024-10-18 23:47:27,551 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3810] [2024-10-18 23:47:27,551 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3812] [2024-10-18 23:47:27,551 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3817] [2024-10-18 23:47:27,552 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3819] [2024-10-18 23:47:27,552 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3824] [2024-10-18 23:47:27,552 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3826] [2024-10-18 23:47:27,552 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3831] [2024-10-18 23:47:27,553 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3833] [2024-10-18 23:47:27,553 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3838] [2024-10-18 23:47:27,553 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3840] [2024-10-18 23:47:27,553 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3845] [2024-10-18 23:47:27,554 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3847] [2024-10-18 23:47:27,554 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3852] [2024-10-18 23:47:27,556 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3855] [2024-10-18 23:47:27,556 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3861] [2024-10-18 23:47:27,556 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3864] [2024-10-18 23:47:27,557 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3870] [2024-10-18 23:47:27,558 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3873] [2024-10-18 23:47:27,558 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3879] [2024-10-18 23:47:27,558 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3882] [2024-10-18 23:47:27,559 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3888] [2024-10-18 23:47:27,559 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3891] [2024-10-18 23:47:27,560 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3897] [2024-10-18 23:47:27,561 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3900] [2024-10-18 23:47:27,561 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3907] [2024-10-18 23:47:27,562 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3910] [2024-10-18 23:47:27,562 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3917] [2024-10-18 23:47:27,562 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3920] [2024-10-18 23:47:27,562 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3927] [2024-10-18 23:47:27,563 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3930] [2024-10-18 23:47:27,563 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3937] [2024-10-18 23:47:27,564 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3940] [2024-10-18 23:47:27,564 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3947] [2024-10-18 23:47:27,565 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3950] [2024-10-18 23:47:27,565 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3957] [2024-10-18 23:47:27,565 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3960] [2024-10-18 23:47:27,565 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3966] [2024-10-18 23:47:27,566 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3969] [2024-10-18 23:47:27,567 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3975] [2024-10-18 23:47:27,568 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3978] [2024-10-18 23:47:27,568 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3984] [2024-10-18 23:47:27,568 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3987] [2024-10-18 23:47:27,569 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3993] [2024-10-18 23:47:27,570 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3996] [2024-10-18 23:47:27,571 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4002] [2024-10-18 23:47:27,571 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4005] [2024-10-18 23:47:27,572 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4011] [2024-10-18 23:47:27,572 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4014] [2024-10-18 23:47:27,574 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4020] [2024-10-18 23:47:27,574 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4023] [2024-10-18 23:47:27,575 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4029] [2024-10-18 23:47:27,575 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4032] [2024-10-18 23:47:27,575 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4038] [2024-10-18 23:47:27,576 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4041] [2024-10-18 23:47:27,576 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4047] [2024-10-18 23:47:27,578 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4050] [2024-10-18 23:47:27,578 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4056] [2024-10-18 23:47:27,579 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4059] [2024-10-18 23:47:27,579 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4065] [2024-10-18 23:47:27,579 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4068] [2024-10-18 23:47:27,580 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4074] [2024-10-18 23:47:27,580 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4077] [2024-10-18 23:47:27,581 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4083] [2024-10-18 23:47:27,581 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4086] [2024-10-18 23:47:27,582 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4092] [2024-10-18 23:47:27,582 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4095] [2024-10-18 23:47:27,583 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4101] [2024-10-18 23:47:27,583 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4103] [2024-10-18 23:47:27,583 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4109] [2024-10-18 23:47:27,584 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4111] [2024-10-18 23:47:27,584 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4117] [2024-10-18 23:47:27,584 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4119] [2024-10-18 23:47:27,585 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4125] [2024-10-18 23:47:27,586 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4127] [2024-10-18 23:47:27,586 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4133] [2024-10-18 23:47:27,587 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4135] [2024-10-18 23:47:27,587 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4141] [2024-10-18 23:47:27,587 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4143] [2024-10-18 23:47:27,587 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4149] [2024-10-18 23:47:27,588 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4151] [2024-10-18 23:47:27,588 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4157] [2024-10-18 23:47:27,588 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4159] [2024-10-18 23:47:27,588 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4165] [2024-10-18 23:47:27,589 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4167] [2024-10-18 23:47:27,589 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4173] [2024-10-18 23:47:27,589 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4175] [2024-10-18 23:47:27,642 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[172521,172534] [2024-10-18 23:47:27,643 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[172881,172894] [2024-10-18 23:47:27,653 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[195820,195833] [2024-10-18 23:47:27,654 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/libvsync/rec_ticketlock.i[195887,195900] [2024-10-18 23:47:27,661 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 23:47:28,024 INFO L204 MainTranslator]: Completed translation [2024-10-18 23:47:28,024 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28 WrapperNode [2024-10-18 23:47:28,024 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-18 23:47:28,025 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-18 23:47:28,026 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-18 23:47:28,026 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-18 23:47:28,033 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,120 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,184 INFO L138 Inliner]: procedures = 923, calls = 933, calls flagged for inlining = 834, calls inlined = 53, statements flattened = 512 [2024-10-18 23:47:28,184 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-18 23:47:28,185 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-18 23:47:28,185 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-18 23:47:28,185 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-18 23:47:28,198 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,198 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,205 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,206 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,222 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,238 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,244 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,247 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,255 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-18 23:47:28,256 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-18 23:47:28,257 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-18 23:47:28,257 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-18 23:47:28,258 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (1/1) ... [2024-10-18 23:47:28,267 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 23:47:28,280 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:47:28,296 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-10-18 23:47:28,301 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-10-18 23:47:28,344 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-10-18 23:47:28,344 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-18 23:47:28,345 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-18 23:47:28,345 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-18 23:47:28,345 INFO L130 BoogieDeclarations]: Found specification of procedure run [2024-10-18 23:47:28,345 INFO L138 BoogieDeclarations]: Found implementation of procedure run [2024-10-18 23:47:28,346 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-10-18 23:47:28,346 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-10-18 23:47:28,346 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-10-18 23:47:28,347 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-10-18 23:47:28,348 WARN L207 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2024-10-18 23:47:28,508 INFO L238 CfgBuilder]: Building ICFG [2024-10-18 23:47:28,509 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-18 23:47:29,119 INFO L283 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2024-10-18 23:47:29,119 INFO L287 CfgBuilder]: Performing block encoding [2024-10-18 23:47:29,417 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-18 23:47:29,418 INFO L314 CfgBuilder]: Removed 78 assume(true) statements. [2024-10-18 23:47:29,418 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 11:47:29 BoogieIcfgContainer [2024-10-18 23:47:29,418 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-18 23:47:29,421 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-18 23:47:29,422 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-18 23:47:29,425 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-18 23:47:29,425 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.10 11:47:25" (1/3) ... [2024-10-18 23:47:29,425 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e3931bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 11:47:29, skipping insertion in model container [2024-10-18 23:47:29,426 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 11:47:28" (2/3) ... [2024-10-18 23:47:29,427 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e3931bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 11:47:29, skipping insertion in model container [2024-10-18 23:47:29,427 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 11:47:29" (3/3) ... [2024-10-18 23:47:29,428 INFO L112 eAbstractionObserver]: Analyzing ICFG rec_ticketlock.i [2024-10-18 23:47:29,445 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-18 23:47:29,445 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 5 error locations. [2024-10-18 23:47:29,445 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-10-18 23:47:29,545 INFO L143 ThreadInstanceAdder]: Constructed 1 joinOtherThreadTransitions. [2024-10-18 23:47:29,599 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 23:47:29,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 23:47:29,639 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:47:29,642 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 23:47:29,644 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-10-18 23:47:29,757 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 23:47:29,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:47:29,777 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == runThread1of1ForFork0 ======== [2024-10-18 23:47:29,786 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@78f53405, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 23:47:29,786 INFO L334 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2024-10-18 23:47:30,325 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:47:30,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:47:30,327 INFO L85 PathProgramCache]: Analyzing trace with hash -1166657820, now seen corresponding path program 1 times [2024-10-18 23:47:30,337 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:47:30,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744840728] [2024-10-18 23:47:30,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:30,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:30,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:30,502 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 23:47:30,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:47:30,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744840728] [2024-10-18 23:47:30,504 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744840728] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 23:47:30,504 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 23:47:30,504 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 23:47:30,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418206100] [2024-10-18 23:47:30,506 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 23:47:30,510 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-10-18 23:47:30,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:47:30,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-10-18 23:47:30,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-10-18 23:47:30,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:30,536 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:47:30,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 8.5) internal successors, (17), 2 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:47:30,537 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:30,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:30,672 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-18 23:47:30,672 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:47:30,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:47:30,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1705556324, now seen corresponding path program 1 times [2024-10-18 23:47:30,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:47:30,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641642034] [2024-10-18 23:47:30,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:30,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:30,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:31,177 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:31,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:47:31,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641642034] [2024-10-18 23:47:31,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641642034] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 23:47:31,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021489805] [2024-10-18 23:47:31,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:31,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 23:47:31,179 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:47:31,181 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 23:47:31,183 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-18 23:47:31,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:31,353 INFO L255 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-10-18 23:47:31,360 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 23:47:31,556 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:31,556 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 23:47:31,704 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:31,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2021489805] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 23:47:31,705 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 23:47:31,705 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2024-10-18 23:47:31,706 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423315287] [2024-10-18 23:47:31,707 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 23:47:31,707 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-10-18 23:47:31,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:47:31,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-10-18 23:47:31,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2024-10-18 23:47:31,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:31,709 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:47:31,710 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 4.333333333333333) internal successors, (52), 12 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:47:31,710 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:31,710 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:32,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:32,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 23:47:32,147 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-10-18 23:47:32,329 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable1 [2024-10-18 23:47:32,329 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting runErr1ASSERT_VIOLATIONUNKNOWN === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:47:32,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:47:32,330 INFO L85 PathProgramCache]: Analyzing trace with hash -688402377, now seen corresponding path program 1 times [2024-10-18 23:47:32,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:47:32,330 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1294937605] [2024-10-18 23:47:32,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:32,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:32,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:32,683 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:32,683 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:47:32,684 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1294937605] [2024-10-18 23:47:32,684 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1294937605] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 23:47:32,684 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [854691430] [2024-10-18 23:47:32,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:32,684 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 23:47:32,685 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:47:32,689 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 23:47:32,690 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-18 23:47:32,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:32,849 INFO L255 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-10-18 23:47:32,851 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 23:47:32,951 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:32,951 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 23:47:33,084 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:33,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [854691430] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 23:47:33,086 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 23:47:33,086 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 12 [2024-10-18 23:47:33,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [998806125] [2024-10-18 23:47:33,087 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 23:47:33,087 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-10-18 23:47:33,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:47:33,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-10-18 23:47:33,089 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2024-10-18 23:47:33,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:33,090 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:47:33,090 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 5.25) internal successors, (63), 12 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:47:33,091 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:33,091 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 23:47:33,091 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:47:38,219 INFO L85 PathProgramCache]: Analyzing trace with hash -226419282, now seen corresponding path program 1 times [2024-10-18 23:47:38,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:38,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:38,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:38,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:38,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:38,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:38,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:38,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:38,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 23:47:38,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-10-18 23:47:38,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:47:39,678 INFO L85 PathProgramCache]: Analyzing trace with hash 1790403382, now seen corresponding path program 1 times [2024-10-18 23:47:39,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:39,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:39,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:39,702 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:47:39,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:40,542 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:47:40,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1536 treesize of output 1356 [2024-10-18 23:47:40,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2024-10-18 23:47:40,970 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:47:41,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2024-10-18 23:47:41,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:47:43,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1704450533, now seen corresponding path program 1 times [2024-10-18 23:47:43,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:43,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:43,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:43,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:43,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:43,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:43,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:47:43,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:47:43,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 23:47:43,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-10-18 23:47:43,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:47:44,036 INFO L85 PathProgramCache]: Analyzing trace with hash 1790403396, now seen corresponding path program 1 times [2024-10-18 23:47:44,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:44,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:44,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:44,057 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:47:44,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:45,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:47:45,097 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:47:45,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1389 treesize of output 1257 [2024-10-18 23:47:48,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:47:48,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:47:48,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:47:48,768 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:47:48,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:47:48,788 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:47:51,233 INFO L85 PathProgramCache]: Analyzing trace with hash -1298365576, now seen corresponding path program 1 times [2024-10-18 23:47:51,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:51,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:51,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:51,248 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:47:51,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:52,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:47:54,479 INFO L85 PathProgramCache]: Analyzing trace with hash 860042534, now seen corresponding path program 1 times [2024-10-18 23:47:54,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:47:54,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:47:54,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:54,502 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:47:54,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:47:55,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1650 treesize of output 1554 [2024-10-18 23:48:00,122 INFO L85 PathProgramCache]: Analyzing trace with hash 2135817433, now seen corresponding path program 1 times [2024-10-18 23:48:00,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:00,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:00,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:00,146 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:00,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:01,214 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:48:01,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 729 treesize of output 641 [2024-10-18 23:48:01,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2024-10-18 23:48:01,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:01,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2024-10-18 23:48:01,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:03,521 INFO L85 PathProgramCache]: Analyzing trace with hash -374918997, now seen corresponding path program 1 times [2024-10-18 23:48:03,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:03,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:03,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:03,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:03,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:03,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:03,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:03,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:03,574 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 23:48:03,574 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-10-18 23:48:03,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:05,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1790403457, now seen corresponding path program 1 times [2024-10-18 23:48:05,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:05,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:05,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:05,923 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:05,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:06,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:06,364 INFO L85 PathProgramCache]: Analyzing trace with hash 584639649, now seen corresponding path program 1 times [2024-10-18 23:48:06,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:06,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:06,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:07,397 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:07,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:07,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:07,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:07,972 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:07,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-10-18 23:48:07,973 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=370, Unknown=0, NotChecked=0, Total=420 [2024-10-18 23:48:09,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:09,668 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:48:09,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3582 treesize of output 3266 [2024-10-18 23:48:12,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:12,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:12,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:12,492 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:12,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:12,512 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:14,717 INFO L85 PathProgramCache]: Analyzing trace with hash -1298365514, now seen corresponding path program 1 times [2024-10-18 23:48:14,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:14,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:14,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:14,730 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:14,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:15,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:15,427 INFO L85 PathProgramCache]: Analyzing trace with hash 860042584, now seen corresponding path program 1 times [2024-10-18 23:48:15,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:15,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:15,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:15,442 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:15,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:15,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1710 treesize of output 1614 [2024-10-18 23:48:21,730 INFO L85 PathProgramCache]: Analyzing trace with hash 2135817473, now seen corresponding path program 1 times [2024-10-18 23:48:21,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:21,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:21,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:21,749 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:21,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:21,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:22,200 INFO L85 PathProgramCache]: Analyzing trace with hash -123479683, now seen corresponding path program 1 times [2024-10-18 23:48:22,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:22,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:22,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:22,226 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:22,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:22,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:22,888 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:48:22,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3714 treesize of output 3398 [2024-10-18 23:48:26,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:26,133 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:26,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:26,146 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:26,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:26,160 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:28,393 INFO L85 PathProgramCache]: Analyzing trace with hash -2100820031, now seen corresponding path program 1 times [2024-10-18 23:48:28,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:28,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:28,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:29,853 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:29,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:29,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:29,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:30,909 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:31,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:31,195 INFO L85 PathProgramCache]: Analyzing trace with hash 725019531, now seen corresponding path program 1 times [2024-10-18 23:48:31,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:31,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:31,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:31,969 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:31,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:31,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:31,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:32,645 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:32,971 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 792 treesize of output 744 [2024-10-18 23:48:35,254 INFO L85 PathProgramCache]: Analyzing trace with hash -1984336438, now seen corresponding path program 1 times [2024-10-18 23:48:35,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:35,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:35,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:38,035 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:38,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:38,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:38,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:40,646 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:48:41,055 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:48:41,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 729 treesize of output 641 [2024-10-18 23:48:41,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2024-10-18 23:48:41,340 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:41,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2024-10-18 23:48:41,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:42,135 INFO L85 PathProgramCache]: Analyzing trace with hash 1537248400, now seen corresponding path program 1 times [2024-10-18 23:48:42,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:42,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:42,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:42,480 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 23:48:42,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:42,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:42,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:48:42,661 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-10-18 23:48:42,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 23:48:42,665 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=7809, Unknown=0, NotChecked=0, Total=8372 [2024-10-18 23:48:43,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:43,389 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:48:43,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1770 treesize of output 1614 [2024-10-18 23:48:46,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:46,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:46,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:46,073 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:46,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:46,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:48,220 INFO L85 PathProgramCache]: Analyzing trace with hash -1298365480, now seen corresponding path program 1 times [2024-10-18 23:48:48,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:48,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:48,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:48,230 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:48,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:48,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:48,622 INFO L85 PathProgramCache]: Analyzing trace with hash 860042618, now seen corresponding path program 1 times [2024-10-18 23:48:48,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:48,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:48,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:48,664 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:48,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:49,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 393 treesize of output 369 [2024-10-18 23:48:54,440 INFO L85 PathProgramCache]: Analyzing trace with hash 2135817509, now seen corresponding path program 1 times [2024-10-18 23:48:54,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:48:54,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:48:54,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:54,452 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:48:54,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:48:55,304 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:48:55,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3030 treesize of output 2762 [2024-10-18 23:48:55,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:48:58,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:58,987 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:58,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:59,002 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:48:59,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 32 [2024-10-18 23:48:59,018 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:01,165 INFO L85 PathProgramCache]: Analyzing trace with hash -2100819992, now seen corresponding path program 1 times [2024-10-18 23:49:01,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:01,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:01,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:01,760 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:01,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:01,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:01,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:02,347 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:02,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:49:02,622 INFO L85 PathProgramCache]: Analyzing trace with hash 725019570, now seen corresponding path program 1 times [2024-10-18 23:49:02,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:02,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:02,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:03,181 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:03,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:03,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:03,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:03,761 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:04,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 429 treesize of output 405 [2024-10-18 23:49:06,437 INFO L85 PathProgramCache]: Analyzing trace with hash -1984336399, now seen corresponding path program 1 times [2024-10-18 23:49:06,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:06,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:06,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:07,806 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:07,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:07,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:07,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:09,024 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:09,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 393 treesize of output 369 [2024-10-18 23:49:11,026 INFO L85 PathProgramCache]: Analyzing trace with hash 410050699, now seen corresponding path program 1 times [2024-10-18 23:49:11,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:11,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:11,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:11,517 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:11,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:11,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:11,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:11,674 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:12,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2024-10-18 23:49:12,632 INFO L85 PathProgramCache]: Analyzing trace with hash -1078607178, now seen corresponding path program 1 times [2024-10-18 23:49:12,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:12,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:12,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:12,805 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:12,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:12,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:12,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:12,963 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:13,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 804 treesize of output 756 [2024-10-18 23:49:16,116 INFO L85 PathProgramCache]: Analyzing trace with hash -1454719686, now seen corresponding path program 1 times [2024-10-18 23:49:16,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:16,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:16,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:16,283 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:16,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:16,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:16,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:16,456 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:17,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:17,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-10-18 23:49:17,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-10-18 23:49:17,671 INFO L782 garLoopResultBuilder]: Registering result SAFE for location runErr2ASSERT_VIOLATIONERROR_FUNCTION (2 of 3 remaining) [2024-10-18 23:49:17,671 INFO L782 garLoopResultBuilder]: Registering result SAFE for location runErr0ASSERT_VIOLATIONERROR_FUNCTION (1 of 3 remaining) [2024-10-18 23:49:17,672 INFO L782 garLoopResultBuilder]: Registering result SAFE for location runErr1ASSERT_VIOLATIONUNKNOWN (0 of 3 remaining) [2024-10-18 23:49:17,689 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-10-18 23:49:17,875 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable4,SelfDestructingSolverStorable18,SelfDestructingSolverStorable3,SelfDestructingSolverStorable19,SelfDestructingSolverStorable2,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable32,SelfDestructingSolverStorable11,SelfDestructingSolverStorable33,SelfDestructingSolverStorable12,SelfDestructingSolverStorable34,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable35,SelfDestructingSolverStorable14,SelfDestructingSolverStorable36,SelfDestructingSolverStorable15,SelfDestructingSolverStorable37,SelfDestructingSolverStorable16,SelfDestructingSolverStorable38,SelfDestructingSolverStorable17,SelfDestructingSolverStorable39,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable20,SelfDestructingSolverStorable42,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable43,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-10-18 23:49:17,883 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-10-18 23:49:17,885 INFO L312 ceAbstractionStarter]: Result for error location runThread1of1ForFork0 was SAFE,SAFE,SAFE (1/2) [2024-10-18 23:49:17,890 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 23:49:17,891 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 23:49:17,892 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:49:17,893 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 23:49:17,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (5)] Waiting until timeout for monitored process [2024-10-18 23:49:17,962 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 23:49:17,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:49:17,964 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 23:49:17,964 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@78f53405, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 23:49:17,964 INFO L334 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2024-10-18 23:49:18,196 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 23:49:18,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:49:18,196 INFO L85 PathProgramCache]: Analyzing trace with hash 185304202, now seen corresponding path program 1 times [2024-10-18 23:49:18,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:49:18,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790410426] [2024-10-18 23:49:18,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:18,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:18,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:18,204 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-10-18 23:49:18,204 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:49:18,204 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790410426] [2024-10-18 23:49:18,204 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [790410426] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 23:49:18,204 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 23:49:18,204 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-10-18 23:49:18,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238088015] [2024-10-18 23:49:18,204 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 23:49:18,205 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-10-18 23:49:18,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:49:18,205 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-10-18 23:49:18,205 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-10-18 23:49:18,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:18,205 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:49:18,205 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:49:18,205 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:18,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:18,253 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-10-18 23:49:18,254 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2024-10-18 23:49:18,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:49:18,254 INFO L85 PathProgramCache]: Analyzing trace with hash -909967323, now seen corresponding path program 1 times [2024-10-18 23:49:18,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:49:18,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603066343] [2024-10-18 23:49:18,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:18,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:18,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:49:18,263 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 23:49:18,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 23:49:18,271 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-10-18 23:49:18,271 INFO L332 BasicCegarLoop]: Counterexample is feasible [2024-10-18 23:49:18,271 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 3 remaining) [2024-10-18 23:49:18,272 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (1 of 3 remaining) [2024-10-18 23:49:18,272 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION (0 of 3 remaining) [2024-10-18 23:49:18,272 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-10-18 23:49:18,274 INFO L414 BasicCegarLoop]: Path program histogram: [1, 1] [2024-10-18 23:49:18,274 INFO L312 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE,UNKNOWN,UNKNOWN (2/2) [2024-10-18 23:49:18,276 WARN L239 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2024-10-18 23:49:18,276 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2024-10-18 23:49:18,372 INFO L143 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2024-10-18 23:49:18,378 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 23:49:18,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 23:49:18,378 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:49:18,383 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 23:49:18,384 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (6)] Waiting until timeout for monitored process [2024-10-18 23:49:18,468 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 23:49:18,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:49:18,470 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == runThread2of2ForFork0 ======== [2024-10-18 23:49:18,470 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@78f53405, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=5, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 23:49:18,470 INFO L334 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2024-10-18 23:49:19,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:49:19,779 INFO L85 PathProgramCache]: Analyzing trace with hash -283641636, now seen corresponding path program 1 times [2024-10-18 23:49:19,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:19,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:19,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:19,809 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 23:49:19,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:19,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:19,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:19,839 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 23:49:19,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-10-18 23:49:19,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-10-18 23:49:20,366 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:49:20,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:49:20,367 INFO L85 PathProgramCache]: Analyzing trace with hash -1833130364, now seen corresponding path program 1 times [2024-10-18 23:49:20,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:49:20,367 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006784151] [2024-10-18 23:49:20,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:20,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:20,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:20,429 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 214 proven. 0 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2024-10-18 23:49:20,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:49:20,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006784151] [2024-10-18 23:49:20,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006784151] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 23:49:20,429 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 23:49:20,429 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 23:49:20,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634743096] [2024-10-18 23:49:20,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 23:49:20,430 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 23:49:20,430 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:49:20,430 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 23:49:20,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 23:49:20,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:20,430 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:49:20,431 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.0) internal successors, (120), 3 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:49:20,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:20,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:49:20,608 INFO L85 PathProgramCache]: Analyzing trace with hash -1463121472, now seen corresponding path program 1 times [2024-10-18 23:49:20,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:20,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:20,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:20,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:20,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:20,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:20,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:20,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:49:20,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 23:49:20,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-10-18 23:49:21,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:49:21,482 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49 [2024-10-18 23:49:21,482 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:49:21,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:49:21,483 INFO L85 PathProgramCache]: Analyzing trace with hash -561267203, now seen corresponding path program 1 times [2024-10-18 23:49:21,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:49:21,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830018937] [2024-10-18 23:49:21,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:21,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:21,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:21,647 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 71 proven. 20 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:49:21,647 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:49:21,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830018937] [2024-10-18 23:49:21,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830018937] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 23:49:21,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1978549490] [2024-10-18 23:49:21,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:21,648 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 23:49:21,648 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:49:21,650 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 23:49:21,652 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-18 23:49:21,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:21,944 INFO L255 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-18 23:49:21,948 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 23:49:22,019 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:49:22,019 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 23:49:22,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1978549490] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 23:49:22,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 23:49:22,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2024-10-18 23:49:22,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [528136325] [2024-10-18 23:49:22,019 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 23:49:22,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 23:49:22,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:49:22,020 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 23:49:22,020 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-10-18 23:49:22,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:22,021 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:49:22,021 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:49:22,021 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:49:22,021 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:49:22,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:49:22,551 INFO L85 PathProgramCache]: Analyzing trace with hash 426976743, now seen corresponding path program 1 times [2024-10-18 23:49:22,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:22,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:22,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:22,801 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:49:22,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:22,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:22,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:23,030 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:49:23,406 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:49:23,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1172 treesize of output 992 [2024-10-18 23:49:23,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:23,502 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:23,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:23,520 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:25,612 INFO L85 PathProgramCache]: Analyzing trace with hash 351373439, now seen corresponding path program 1 times [2024-10-18 23:49:25,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:25,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:25,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:25,980 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:49:25,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:25,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:26,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:26,348 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:49:26,592 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:49:26,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:49:26,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1232436759, now seen corresponding path program 1 times [2024-10-18 23:49:26,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:26,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:26,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:26,777 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 23:49:26,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:26,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:26,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:26,884 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 23:49:26,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 23:49:26,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-10-18 23:49:27,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:49:27,565 INFO L85 PathProgramCache]: Analyzing trace with hash -1062174113, now seen corresponding path program 1 times [2024-10-18 23:49:27,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:27,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:27,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:28,729 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:49:28,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:28,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:28,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:29,917 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:49:30,163 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:49:30,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:49:30,240 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:30,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:30,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:30,266 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:32,370 INFO L85 PathProgramCache]: Analyzing trace with hash 1432336647, now seen corresponding path program 1 times [2024-10-18 23:49:32,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:32,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:32,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:33,837 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:49:33,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:33,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:33,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:35,105 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:49:35,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:49:37,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1452759192, now seen corresponding path program 1 times [2024-10-18 23:49:37,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:37,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:37,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:38,130 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:49:38,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:38,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:38,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:38,724 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:49:38,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:49:38,901 INFO L85 PathProgramCache]: Analyzing trace with hash 237095543, now seen corresponding path program 1 times [2024-10-18 23:49:38,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:38,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:39,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:39,390 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:49:39,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:39,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:39,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:39,986 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:49:40,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:49:40,401 INFO L85 PathProgramCache]: Analyzing trace with hash 215442609, now seen corresponding path program 1 times [2024-10-18 23:49:40,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:40,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:40,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:40,885 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:49:40,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:40,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:41,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:41,647 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:49:41,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:49:41,761 INFO L85 PathProgramCache]: Analyzing trace with hash 1302729341, now seen corresponding path program 1 times [2024-10-18 23:49:41,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:41,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:41,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:42,849 INFO L134 CoverageAnalysis]: Checked inductivity of 444 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:49:42,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:42,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:42,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:43,963 INFO L134 CoverageAnalysis]: Checked inductivity of 444 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:49:44,326 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:49:44,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1172 treesize of output 992 [2024-10-18 23:49:44,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:44,410 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:44,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:44,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:44,550 INFO L85 PathProgramCache]: Analyzing trace with hash 1729899179, now seen corresponding path program 1 times [2024-10-18 23:49:44,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:44,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:44,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:45,893 INFO L134 CoverageAnalysis]: Checked inductivity of 445 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:49:45,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:45,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:46,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:47,112 INFO L134 CoverageAnalysis]: Checked inductivity of 445 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:49:47,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:49:49,471 INFO L85 PathProgramCache]: Analyzing trace with hash 2087262580, now seen corresponding path program 1 times [2024-10-18 23:49:49,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:49,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:49,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:50,299 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 377 trivial. 0 not checked. [2024-10-18 23:49:50,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:50,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:50,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:51,027 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 377 trivial. 0 not checked. [2024-10-18 23:49:51,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:49:51,122 INFO L85 PathProgramCache]: Analyzing trace with hash 109480973, now seen corresponding path program 1 times [2024-10-18 23:49:51,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:51,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:51,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:51,689 INFO L134 CoverageAnalysis]: Checked inductivity of 448 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 379 trivial. 0 not checked. [2024-10-18 23:49:51,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:51,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:51,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:52,329 INFO L134 CoverageAnalysis]: Checked inductivity of 448 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 379 trivial. 0 not checked. [2024-10-18 23:49:52,510 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:49:52,770 INFO L85 PathProgramCache]: Analyzing trace with hash 2131883779, now seen corresponding path program 1 times [2024-10-18 23:49:52,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:52,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:52,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:53,297 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 23:49:53,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:53,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:53,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:53,802 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 23:49:53,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:49:53,897 INFO L85 PathProgramCache]: Analyzing trace with hash 1724027983, now seen corresponding path program 1 times [2024-10-18 23:49:53,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:53,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:54,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:55,468 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:49:55,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:55,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:55,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:57,063 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:49:57,522 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:49:57,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:49:57,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:57,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:57,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:49:57,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:49:57,717 INFO L85 PathProgramCache]: Analyzing trace with hash -1066652370, now seen corresponding path program 1 times [2024-10-18 23:49:57,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:57,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:57,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:49:59,520 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:49:59,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:49:59,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:49:59,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:00,852 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:50:00,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:00,923 INFO L85 PathProgramCache]: Analyzing trace with hash 970539888, now seen corresponding path program 1 times [2024-10-18 23:50:00,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:00,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:01,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:02,350 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:02,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:02,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:02,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:03,892 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:04,066 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:50:04,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1152 treesize of output 972 [2024-10-18 23:50:04,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:04,141 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:04,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:04,154 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:04,272 INFO L85 PathProgramCache]: Analyzing trace with hash 680755595, now seen corresponding path program 1 times [2024-10-18 23:50:04,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:04,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:04,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:05,857 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:05,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:05,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:05,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:07,130 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:07,408 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:50:07,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2862 treesize of output 2546 [2024-10-18 23:50:07,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:07,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:50:07,518 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:07,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:50:07,525 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:07,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:50:07,534 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:07,801 INFO L85 PathProgramCache]: Analyzing trace with hash -371418057, now seen corresponding path program 1 times [2024-10-18 23:50:07,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:07,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:07,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:09,375 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:09,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:09,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:09,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:10,835 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:11,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:50:11,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:50:11,637 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-10-18 23:50:11,823 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable72,SelfDestructingSolverStorable51,SelfDestructingSolverStorable73,SelfDestructingSolverStorable52,SelfDestructingSolverStorable74,SelfDestructingSolverStorable53,SelfDestructingSolverStorable75,7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54,SelfDestructingSolverStorable76,SelfDestructingSolverStorable55,SelfDestructingSolverStorable77,SelfDestructingSolverStorable56,SelfDestructingSolverStorable78,SelfDestructingSolverStorable57,SelfDestructingSolverStorable79,SelfDestructingSolverStorable58,SelfDestructingSolverStorable59,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable60,SelfDestructingSolverStorable82,SelfDestructingSolverStorable61,SelfDestructingSolverStorable83,SelfDestructingSolverStorable62,SelfDestructingSolverStorable84,SelfDestructingSolverStorable63,SelfDestructingSolverStorable85,SelfDestructingSolverStorable64,SelfDestructingSolverStorable86,SelfDestructingSolverStorable65,SelfDestructingSolverStorable87,SelfDestructingSolverStorable66,SelfDestructingSolverStorable67,SelfDestructingSolverStorable68,SelfDestructingSolverStorable69 [2024-10-18 23:50:11,824 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:50:11,824 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:50:11,824 INFO L85 PathProgramCache]: Analyzing trace with hash 155202602, now seen corresponding path program 1 times [2024-10-18 23:50:11,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:50:11,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [407623170] [2024-10-18 23:50:11,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:11,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:11,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:12,294 INFO L134 CoverageAnalysis]: Checked inductivity of 5829 backedges. 717 proven. 0 refuted. 0 times theorem prover too weak. 5112 trivial. 0 not checked. [2024-10-18 23:50:12,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:50:12,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [407623170] [2024-10-18 23:50:12,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [407623170] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 23:50:12,294 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 23:50:12,294 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 23:50:12,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [216982132] [2024-10-18 23:50:12,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 23:50:12,295 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-10-18 23:50:12,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:50:12,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 23:50:12,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-10-18 23:50:12,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:50:12,296 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:50:12,296 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 53.333333333333336) internal successors, (160), 3 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:50:12,297 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:50:12,297 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:50:12,297 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:50:12,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:50:12,623 INFO L85 PathProgramCache]: Analyzing trace with hash -1062174048, now seen corresponding path program 1 times [2024-10-18 23:50:12,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:12,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:12,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:13,836 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:50:13,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:13,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:13,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:14,817 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:50:15,003 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:50:15,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:50:15,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:15,072 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:15,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:15,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:15,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1432336712, now seen corresponding path program 1 times [2024-10-18 23:50:15,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:15,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:15,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:16,378 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:50:16,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:16,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:16,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:17,621 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 427 trivial. 0 not checked. [2024-10-18 23:50:17,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:50:19,509 INFO L85 PathProgramCache]: Analyzing trace with hash 1452759255, now seen corresponding path program 1 times [2024-10-18 23:50:19,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:19,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:19,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:20,118 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:50:20,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:20,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:20,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:20,599 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:50:20,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:20,675 INFO L85 PathProgramCache]: Analyzing trace with hash 237095600, now seen corresponding path program 1 times [2024-10-18 23:50:20,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:20,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:20,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:21,260 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:50:21,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:21,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:21,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:21,746 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:50:21,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:50:24,055 INFO L85 PathProgramCache]: Analyzing trace with hash 215442662, now seen corresponding path program 1 times [2024-10-18 23:50:24,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:24,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:24,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:24,648 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:50:24,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:24,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:24,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:25,137 INFO L134 CoverageAnalysis]: Checked inductivity of 439 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 370 trivial. 0 not checked. [2024-10-18 23:50:25,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:50:25,268 INFO L85 PathProgramCache]: Analyzing trace with hash 1302729394, now seen corresponding path program 1 times [2024-10-18 23:50:25,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:25,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:25,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:26,402 INFO L134 CoverageAnalysis]: Checked inductivity of 444 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:50:26,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:26,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:26,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:27,383 INFO L134 CoverageAnalysis]: Checked inductivity of 444 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:50:27,563 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:50:27,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:50:27,630 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:27,631 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:27,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:27,645 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:27,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1729899232, now seen corresponding path program 1 times [2024-10-18 23:50:27,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:27,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:27,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:29,244 INFO L134 CoverageAnalysis]: Checked inductivity of 445 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:50:29,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:29,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:29,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:30,523 INFO L134 CoverageAnalysis]: Checked inductivity of 445 backedges. 6 proven. 7 refuted. 0 times theorem prover too weak. 432 trivial. 0 not checked. [2024-10-18 23:50:30,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:50:32,801 INFO L85 PathProgramCache]: Analyzing trace with hash 2087262633, now seen corresponding path program 1 times [2024-10-18 23:50:32,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:32,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:32,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:33,289 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 377 trivial. 0 not checked. [2024-10-18 23:50:33,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:33,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:33,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:33,818 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 377 trivial. 0 not checked. [2024-10-18 23:50:33,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:33,903 INFO L85 PathProgramCache]: Analyzing trace with hash 109481026, now seen corresponding path program 1 times [2024-10-18 23:50:33,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:33,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:34,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:34,576 INFO L134 CoverageAnalysis]: Checked inductivity of 448 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 379 trivial. 0 not checked. [2024-10-18 23:50:34,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:34,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:34,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:35,092 INFO L134 CoverageAnalysis]: Checked inductivity of 448 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 379 trivial. 0 not checked. [2024-10-18 23:50:35,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:50:37,383 INFO L85 PathProgramCache]: Analyzing trace with hash 2131883832, now seen corresponding path program 1 times [2024-10-18 23:50:37,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:37,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:37,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:37,880 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 23:50:37,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:37,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:38,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:38,534 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 51 proven. 18 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 23:50:38,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:38,610 INFO L85 PathProgramCache]: Analyzing trace with hash 1724028034, now seen corresponding path program 1 times [2024-10-18 23:50:38,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:38,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:38,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:40,258 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:50:40,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:40,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:40,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:41,799 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:50:41,957 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:50:41,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1132 treesize of output 952 [2024-10-18 23:50:42,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:42,038 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:42,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:42,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:44,141 INFO L85 PathProgramCache]: Analyzing trace with hash -1066652323, now seen corresponding path program 1 times [2024-10-18 23:50:44,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:44,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:44,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:45,351 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:50:45,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:45,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:45,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:46,672 INFO L134 CoverageAnalysis]: Checked inductivity of 453 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2024-10-18 23:50:46,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:46,757 INFO L85 PathProgramCache]: Analyzing trace with hash 970539935, now seen corresponding path program 1 times [2024-10-18 23:50:46,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:46,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:46,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:48,238 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:48,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:48,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:48,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:49,719 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:49,967 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:50:49,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1152 treesize of output 972 [2024-10-18 23:50:50,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:50,037 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:50,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:50:50,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:50,169 INFO L85 PathProgramCache]: Analyzing trace with hash 680755642, now seen corresponding path program 1 times [2024-10-18 23:50:50,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:50,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:50,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:51,521 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:51,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:51,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:51,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:52,755 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:52,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:50:52,964 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:50:52,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1116 treesize of output 984 [2024-10-18 23:50:53,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:50:53,048 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:53,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:50:53,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:53,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:50:53,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:50:55,159 INFO L85 PathProgramCache]: Analyzing trace with hash -371418012, now seen corresponding path program 1 times [2024-10-18 23:50:55,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:55,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:55,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:56,736 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:56,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:56,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:56,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:58,288 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 443 trivial. 0 not checked. [2024-10-18 23:50:58,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:50:58,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:50:58,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:50:58,381 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable110,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable98,SelfDestructingSolverStorable104,SelfDestructingSolverStorable99,SelfDestructingSolverStorable105,SelfDestructingSolverStorable106,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable115,SelfDestructingSolverStorable88,SelfDestructingSolverStorable116,SelfDestructingSolverStorable89,SelfDestructingSolverStorable117,SelfDestructingSolverStorable118,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-10-18 23:50:58,382 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:50:58,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:50:58,382 INFO L85 PathProgramCache]: Analyzing trace with hash -1026364445, now seen corresponding path program 1 times [2024-10-18 23:50:58,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:50:58,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504566600] [2024-10-18 23:50:58,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:58,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:50:58,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:50:59,078 INFO L134 CoverageAnalysis]: Checked inductivity of 5483 backedges. 1230 proven. 31 refuted. 0 times theorem prover too weak. 4222 trivial. 0 not checked. [2024-10-18 23:50:59,078 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:50:59,078 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504566600] [2024-10-18 23:50:59,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [504566600] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 23:50:59,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2107753707] [2024-10-18 23:50:59,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:50:59,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 23:50:59,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:50:59,080 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 23:50:59,081 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-18 23:51:01,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:01,139 INFO L255 TraceCheckSpWp]: Trace formula consists of 5758 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-10-18 23:51:01,155 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 23:51:01,269 INFO L134 CoverageAnalysis]: Checked inductivity of 5483 backedges. 1261 proven. 0 refuted. 0 times theorem prover too weak. 4222 trivial. 0 not checked. [2024-10-18 23:51:01,269 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 23:51:01,269 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2107753707] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 23:51:01,269 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 23:51:01,270 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 6 [2024-10-18 23:51:01,270 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96750212] [2024-10-18 23:51:01,270 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 23:51:01,273 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-10-18 23:51:01,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:51:01,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-10-18 23:51:01,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-10-18 23:51:01,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:51:01,274 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:51:01,274 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 45.6) internal successors, (228), 5 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:51:01,274 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:51:01,274 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:51:01,274 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:51:01,274 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:51:01,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:51:01,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:51:01,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:51:01,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:51:01,527 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-10-18 23:51:01,702 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable119 [2024-10-18 23:51:01,702 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting runErr2ASSERT_VIOLATIONERROR_FUNCTION === [runErr2ASSERT_VIOLATIONERROR_FUNCTION, runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONUNKNOWN] === [2024-10-18 23:51:01,703 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 23:51:01,703 INFO L85 PathProgramCache]: Analyzing trace with hash 219036074, now seen corresponding path program 1 times [2024-10-18 23:51:01,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 23:51:01,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137035908] [2024-10-18 23:51:01,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:01,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:01,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:02,105 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 35 proven. 8 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-10-18 23:51:02,105 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 23:51:02,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137035908] [2024-10-18 23:51:02,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1137035908] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 23:51:02,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [57792240] [2024-10-18 23:51:02,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:02,105 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 23:51:02,105 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 23:51:02,109 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 23:51:02,111 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-18 23:51:03,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:03,502 INFO L255 TraceCheckSpWp]: Trace formula consists of 1108 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-10-18 23:51:03,505 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 23:51:03,579 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 26 proven. 2 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-10-18 23:51:03,579 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 23:51:03,651 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 26 proven. 2 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-10-18 23:51:03,651 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [57792240] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 23:51:03,651 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 23:51:03,651 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 16 [2024-10-18 23:51:03,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637934001] [2024-10-18 23:51:03,652 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 23:51:03,652 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-10-18 23:51:03,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 23:51:03,653 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-10-18 23:51:03,653 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2024-10-18 23:51:03,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:51:03,653 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 23:51:03,654 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 15.375) internal successors, (246), 16 states have internal predecessors, (246), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 23:51:03,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:51:03,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:51:03,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-10-18 23:51:03,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-10-18 23:51:03,654 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 23:51:04,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:04,397 INFO L85 PathProgramCache]: Analyzing trace with hash -1666528932, now seen corresponding path program 1 times [2024-10-18 23:51:04,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:04,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:04,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:04,723 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:04,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:04,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:04,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:04,991 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:05,356 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:05,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:51:05,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:51:05,440 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:05,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:51:05,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:07,562 INFO L85 PathProgramCache]: Analyzing trace with hash 488274297, now seen corresponding path program 1 times [2024-10-18 23:51:07,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:07,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:07,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:07,844 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:07,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:07,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:07,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:08,103 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:08,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:51:10,453 INFO L85 PathProgramCache]: Analyzing trace with hash -1599913435, now seen corresponding path program 1 times [2024-10-18 23:51:10,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:10,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:10,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:10,967 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:10,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:10,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:11,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:11,322 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:11,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:11,412 INFO L85 PathProgramCache]: Analyzing trace with hash 81285438, now seen corresponding path program 1 times [2024-10-18 23:51:11,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:11,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:11,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:11,727 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:11,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:11,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:11,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:12,056 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:12,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:51:14,435 INFO L85 PathProgramCache]: Analyzing trace with hash 805714100, now seen corresponding path program 1 times [2024-10-18 23:51:14,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:14,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:14,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:14,753 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:14,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:14,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:14,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:15,081 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:15,330 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:51:15,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1128 treesize of output 996 [2024-10-18 23:51:15,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:15,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:51:15,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:15,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:51:15,444 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:15,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:51:15,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:15,741 INFO L85 PathProgramCache]: Analyzing trace with hash -1011476869, now seen corresponding path program 1 times [2024-10-18 23:51:15,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:15,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:15,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:16,025 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:16,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:16,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:16,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:16,339 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:16,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:16,429 INFO L85 PathProgramCache]: Analyzing trace with hash 576865797, now seen corresponding path program 1 times [2024-10-18 23:51:16,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:16,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:16,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:16,735 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:51:16,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:16,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:16,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:17,106 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:51:17,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:51:19,582 INFO L85 PathProgramCache]: Analyzing trace with hash -1254969788, now seen corresponding path program 1 times [2024-10-18 23:51:19,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:19,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:19,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:19,899 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:51:19,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:19,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:20,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:20,344 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:51:20,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:20,473 INFO L85 PathProgramCache]: Analyzing trace with hash 1328955208, now seen corresponding path program 1 times [2024-10-18 23:51:20,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:20,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:20,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:20,748 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:20,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:20,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:20,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:21,030 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:21,683 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:21,683 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1196 treesize of output 1016 [2024-10-18 23:51:21,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:51:21,823 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:21,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:51:21,838 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:23,930 INFO L85 PathProgramCache]: Analyzing trace with hash 836690945, now seen corresponding path program 1 times [2024-10-18 23:51:23,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:23,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:23,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:24,216 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:24,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:24,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:24,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:24,460 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:24,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:24,665 INFO L85 PathProgramCache]: Analyzing trace with hash 900885339, now seen corresponding path program 1 times [2024-10-18 23:51:24,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:24,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:24,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:24,953 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:51:24,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:24,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:24,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:25,247 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:51:25,511 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:51:25,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1446 treesize of output 1290 [2024-10-18 23:51:25,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:25,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:51:25,637 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:25,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:51:25,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:25,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:51:25,655 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:27,749 INFO L85 PathProgramCache]: Analyzing trace with hash -2043372592, now seen corresponding path program 1 times [2024-10-18 23:51:27,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:27,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:27,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:28,181 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:28,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:28,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:28,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:28,447 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:28,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:28,524 INFO L85 PathProgramCache]: Analyzing trace with hash -1548455164, now seen corresponding path program 1 times [2024-10-18 23:51:28,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:28,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:28,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:28,810 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:28,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:28,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:28,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:29,154 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:29,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:51:31,537 INFO L85 PathProgramCache]: Analyzing trace with hash -151654315, now seen corresponding path program 1 times [2024-10-18 23:51:31,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:31,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:31,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:31,840 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:31,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:31,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:31,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:32,162 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:32,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:32,239 INFO L85 PathProgramCache]: Analyzing trace with hash -993910463, now seen corresponding path program 1 times [2024-10-18 23:51:32,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:32,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:32,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:32,492 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:32,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:32,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:32,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:32,743 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:32,957 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:32,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2278 treesize of output 1914 [2024-10-18 23:51:33,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:51:33,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:33,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:51:33,061 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:51:35,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1496140658, now seen corresponding path program 1 times [2024-10-18 23:51:35,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:35,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:35,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:35,553 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:35,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:35,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:35,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:35,779 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:35,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:35,859 INFO L85 PathProgramCache]: Analyzing trace with hash -1023111800, now seen corresponding path program 1 times [2024-10-18 23:51:35,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:35,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:35,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:36,132 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:36,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:36,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:36,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:36,480 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:36,564 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:36,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:51:38,614 INFO L85 PathProgramCache]: Analyzing trace with hash 263636586, now seen corresponding path program 1 times [2024-10-18 23:51:38,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:38,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:38,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:38,900 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:38,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:38,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:38,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:39,124 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:39,211 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:39,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:51:41,262 INFO L85 PathProgramCache]: Analyzing trace with hash 1272126790, now seen corresponding path program 1 times [2024-10-18 23:51:41,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:41,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:41,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:41,717 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:41,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:41,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:41,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:41,960 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:42,034 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:42,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:51:44,106 INFO L85 PathProgramCache]: Analyzing trace with hash 733563197, now seen corresponding path program 1 times [2024-10-18 23:51:44,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:44,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:44,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:44,412 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:51:44,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:44,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:44,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:44,680 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:51:44,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:44,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1265615004, now seen corresponding path program 1 times [2024-10-18 23:51:44,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:44,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:44,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:45,219 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:51:45,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:45,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:45,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:45,691 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:51:45,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:45,798 INFO L85 PathProgramCache]: Analyzing trace with hash -2004575826, now seen corresponding path program 1 times [2024-10-18 23:51:45,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:45,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:45,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:46,109 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:46,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:46,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:46,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:46,443 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:51:46,528 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:46,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:51:48,581 INFO L85 PathProgramCache]: Analyzing trace with hash 1385033769, now seen corresponding path program 1 times [2024-10-18 23:51:48,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:48,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:48,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:49,019 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:51:49,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:49,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:49,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:49,300 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:51:49,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:49,375 INFO L85 PathProgramCache]: Analyzing trace with hash -13634138, now seen corresponding path program 1 times [2024-10-18 23:51:49,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:49,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:49,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:49,692 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:51:49,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:49,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:49,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:50,018 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:51:50,061 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:50,098 INFO L85 PathProgramCache]: Analyzing trace with hash 1194354228, now seen corresponding path program 1 times [2024-10-18 23:51:50,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:50,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:50,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:50,438 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:51:50,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:50,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:50,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:50,950 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:51:51,031 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:51:51,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 25 [2024-10-18 23:51:51,052 INFO L85 PathProgramCache]: Analyzing trace with hash 781217030, now seen corresponding path program 1 times [2024-10-18 23:51:51,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:51,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:51,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:51,387 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:51:51,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:51,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:51,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:51,669 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:51:51,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:51,781 INFO L85 PathProgramCache]: Analyzing trace with hash -1508324338, now seen corresponding path program 1 times [2024-10-18 23:51:51,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:51,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:51,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:52,105 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:52,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:52,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:52,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:52,502 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:52,587 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:52,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:51:54,651 INFO L85 PathProgramCache]: Analyzing trace with hash -2014974154, now seen corresponding path program 1 times [2024-10-18 23:51:54,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:54,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:54,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:54,925 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:54,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:54,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:54,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:55,164 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:51:55,270 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:51:55,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 25 [2024-10-18 23:51:55,291 INFO L85 PathProgramCache]: Analyzing trace with hash -417208180, now seen corresponding path program 1 times [2024-10-18 23:51:55,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:55,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:55,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:55,562 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:55,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:55,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:55,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:55,969 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:56,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:56,047 INFO L85 PathProgramCache]: Analyzing trace with hash 627250256, now seen corresponding path program 1 times [2024-10-18 23:51:56,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:56,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:56,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:56,323 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:56,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:56,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:56,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:56,590 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:56,672 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:51:56,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:51:58,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1271502946, now seen corresponding path program 1 times [2024-10-18 23:51:58,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:58,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:58,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:58,967 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:58,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:58,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:59,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:59,340 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:51:59,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:51:59,443 INFO L85 PathProgramCache]: Analyzing trace with hash -635837028, now seen corresponding path program 1 times [2024-10-18 23:51:59,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:59,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:59,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:59,723 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:51:59,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:51:59,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:51:59,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:51:59,986 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:00,335 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:00,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1132 treesize of output 952 [2024-10-18 23:52:00,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:00,409 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:00,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:00,442 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:00,605 INFO L85 PathProgramCache]: Analyzing trace with hash -1154325253, now seen corresponding path program 1 times [2024-10-18 23:52:00,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:00,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:00,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:00,874 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:00,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:00,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:00,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:01,075 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:01,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:01,167 INFO L85 PathProgramCache]: Analyzing trace with hash 1294914877, now seen corresponding path program 1 times [2024-10-18 23:52:01,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:01,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:01,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:01,609 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 23:52:01,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:01,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:01,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:01,887 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 23:52:02,066 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:02,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:52:02,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:02,144 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:02,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:02,171 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:04,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1127622184, now seen corresponding path program 1 times [2024-10-18 23:52:04,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:04,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:04,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:04,476 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:04,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:04,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:04,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:04,697 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:04,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:52:04,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1248460916, now seen corresponding path program 1 times [2024-10-18 23:52:04,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:04,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:04,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:05,150 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:05,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:05,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:05,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:05,355 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:05,638 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:05,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1132 treesize of output 952 [2024-10-18 23:52:05,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:52:05,723 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:05,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:52:05,735 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:07,834 INFO L85 PathProgramCache]: Analyzing trace with hash 47573508, now seen corresponding path program 1 times [2024-10-18 23:52:07,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:07,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:07,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:08,124 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:08,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:08,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:08,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:08,361 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:08,495 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:08,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:10,551 INFO L85 PathProgramCache]: Analyzing trace with hash -1526939809, now seen corresponding path program 1 times [2024-10-18 23:52:10,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:10,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:10,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:10,847 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:10,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:10,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:11,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:11,262 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:11,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:52:13,647 INFO L85 PathProgramCache]: Analyzing trace with hash 1474769716, now seen corresponding path program 1 times [2024-10-18 23:52:13,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:13,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:13,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:13,864 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 23:52:13,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:13,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:13,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:13,996 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 23:52:13,997 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 23:52:13,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=1881, Unknown=0, NotChecked=0, Total=1980 [2024-10-18 23:52:14,512 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:52:14,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2250 treesize of output 1982 [2024-10-18 23:52:14,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:14,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:52:14,621 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:14,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:52:14,628 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:14,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:52:14,638 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:16,811 INFO L85 PathProgramCache]: Analyzing trace with hash -1011476779, now seen corresponding path program 1 times [2024-10-18 23:52:16,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:16,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:16,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:17,090 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:17,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:17,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:17,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:17,510 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:17,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:17,597 INFO L85 PathProgramCache]: Analyzing trace with hash 576865887, now seen corresponding path program 1 times [2024-10-18 23:52:17,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:17,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:17,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:17,905 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:52:17,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:17,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:17,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:18,211 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:52:18,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:52:20,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1254969702, now seen corresponding path program 1 times [2024-10-18 23:52:20,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:20,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:20,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:20,819 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:52:20,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:20,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:20,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:21,278 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:52:21,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:21,379 INFO L85 PathProgramCache]: Analyzing trace with hash 1328955292, now seen corresponding path program 1 times [2024-10-18 23:52:21,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:21,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:21,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:21,644 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:21,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:21,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:21,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:21,911 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:22,184 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:22,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2278 treesize of output 1914 [2024-10-18 23:52:22,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:22,279 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:22,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:22,312 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:24,405 INFO L85 PathProgramCache]: Analyzing trace with hash 836691021, now seen corresponding path program 1 times [2024-10-18 23:52:24,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:24,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:24,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:24,647 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:24,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:24,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:24,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:25,030 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:25,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:25,139 INFO L85 PathProgramCache]: Analyzing trace with hash 900885411, now seen corresponding path program 1 times [2024-10-18 23:52:25,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:25,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:25,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:25,449 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:52:25,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:25,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:25,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:25,784 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:52:25,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:25,872 INFO L85 PathProgramCache]: Analyzing trace with hash -1548455095, now seen corresponding path program 1 times [2024-10-18 23:52:25,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:25,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:25,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:26,169 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:26,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:26,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:26,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:26,462 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:26,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:52:28,764 INFO L85 PathProgramCache]: Analyzing trace with hash -151654246, now seen corresponding path program 1 times [2024-10-18 23:52:28,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:28,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:28,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:29,197 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:29,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:29,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:29,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:29,498 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:29,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:29,584 INFO L85 PathProgramCache]: Analyzing trace with hash -993910394, now seen corresponding path program 1 times [2024-10-18 23:52:29,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:29,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:29,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:29,839 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:29,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:29,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:29,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:30,106 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:30,385 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:30,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1152 treesize of output 972 [2024-10-18 23:52:30,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:30,483 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:30,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:30,497 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:32,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1496140727, now seen corresponding path program 1 times [2024-10-18 23:52:32,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:32,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:32,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:32,945 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:32,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:32,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:32,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:33,170 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:33,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:33,256 INFO L85 PathProgramCache]: Analyzing trace with hash -1023111731, now seen corresponding path program 1 times [2024-10-18 23:52:33,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:33,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:33,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:33,546 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:33,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:33,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:33,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:33,843 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:33,925 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:33,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:36,033 INFO L85 PathProgramCache]: Analyzing trace with hash 263636653, now seen corresponding path program 1 times [2024-10-18 23:52:36,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:36,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:36,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:36,257 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:36,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:36,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:36,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:36,478 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:36,561 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:36,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:38,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1272126857, now seen corresponding path program 1 times [2024-10-18 23:52:38,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:38,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:38,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:39,015 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:39,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:39,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:39,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:39,255 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:39,349 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:39,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:41,419 INFO L85 PathProgramCache]: Analyzing trace with hash 733563264, now seen corresponding path program 1 times [2024-10-18 23:52:41,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:41,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:41,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:41,676 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:41,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:41,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:41,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:41,944 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:42,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:42,083 INFO L85 PathProgramCache]: Analyzing trace with hash 1265615067, now seen corresponding path program 1 times [2024-10-18 23:52:42,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:42,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:42,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:42,514 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:42,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:42,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:42,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:42,806 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:52:42,864 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:42,908 INFO L85 PathProgramCache]: Analyzing trace with hash -2004575767, now seen corresponding path program 1 times [2024-10-18 23:52:42,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:42,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:42,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:43,246 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:52:43,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:43,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:43,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:43,600 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:52:43,693 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:43,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:45,762 INFO L85 PathProgramCache]: Analyzing trace with hash 1385033826, now seen corresponding path program 1 times [2024-10-18 23:52:45,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:45,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:45,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:46,042 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:52:46,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:46,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:46,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:46,476 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:52:46,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:46,584 INFO L85 PathProgramCache]: Analyzing trace with hash -13634081, now seen corresponding path program 1 times [2024-10-18 23:52:46,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:46,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:46,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:46,929 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:52:46,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:46,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:46,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:47,268 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:52:47,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:47,384 INFO L85 PathProgramCache]: Analyzing trace with hash 1194354285, now seen corresponding path program 1 times [2024-10-18 23:52:47,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:47,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:47,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:47,745 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:52:47,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:47,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:47,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:48,262 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:52:48,352 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:52:48,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 25 [2024-10-18 23:52:48,383 INFO L85 PathProgramCache]: Analyzing trace with hash 781217085, now seen corresponding path program 1 times [2024-10-18 23:52:48,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:48,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:48,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:48,802 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:52:48,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:48,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:48,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:49,119 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:52:49,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:49,225 INFO L85 PathProgramCache]: Analyzing trace with hash -1508324287, now seen corresponding path program 1 times [2024-10-18 23:52:49,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:49,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:49,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:49,517 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:49,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:49,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:49,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:49,810 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:49,927 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:49,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:52,006 INFO L85 PathProgramCache]: Analyzing trace with hash -2014974103, now seen corresponding path program 1 times [2024-10-18 23:52:52,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:52,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:52,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:52,394 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:52,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:52,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:52,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:52,631 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:52:52,715 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:52:52,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 25 [2024-10-18 23:52:52,747 INFO L85 PathProgramCache]: Analyzing trace with hash -417208133, now seen corresponding path program 1 times [2024-10-18 23:52:52,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:52,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:52,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:53,054 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:53,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:53,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:53,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:53,360 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:53,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:53,473 INFO L85 PathProgramCache]: Analyzing trace with hash 627250303, now seen corresponding path program 1 times [2024-10-18 23:52:53,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:53,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:53,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:53,749 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:53,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:53,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:53,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:54,187 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:54,302 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:54,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:52:56,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1271502993, now seen corresponding path program 1 times [2024-10-18 23:52:56,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:56,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:56,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:56,605 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:56,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:56,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:56,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:56,830 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:52:56,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:52:57,011 INFO L85 PathProgramCache]: Analyzing trace with hash -635836981, now seen corresponding path program 1 times [2024-10-18 23:52:57,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:57,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:57,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:57,311 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:57,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:52:57,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:52:57,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:52:57,619 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:52:57,951 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:52:57,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:52:58,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:58,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:52:58,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:52:58,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:00,181 INFO L85 PathProgramCache]: Analyzing trace with hash -1154325206, now seen corresponding path program 1 times [2024-10-18 23:53:00,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:00,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:00,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:00,541 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:00,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:00,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:00,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:00,750 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:00,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:00,938 INFO L85 PathProgramCache]: Analyzing trace with hash 1294914928, now seen corresponding path program 1 times [2024-10-18 23:53:00,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:00,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:00,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:01,247 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 23:53:01,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:01,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:01,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:01,556 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 23:53:01,910 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:01,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 577 treesize of output 489 [2024-10-18 23:53:02,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:53:02,033 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:02,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:53:02,047 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:04,150 INFO L85 PathProgramCache]: Analyzing trace with hash -1127622131, now seen corresponding path program 1 times [2024-10-18 23:53:04,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:04,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:04,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:04,376 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:04,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:04,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:04,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:04,597 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:04,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:53:04,822 INFO L85 PathProgramCache]: Analyzing trace with hash 1248460971, now seen corresponding path program 1 times [2024-10-18 23:53:04,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:04,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:05,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:05,185 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:05,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:05,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:05,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:05,382 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:05,908 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:05,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:53:06,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:06,020 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:06,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:06,050 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:08,148 INFO L85 PathProgramCache]: Analyzing trace with hash 47573563, now seen corresponding path program 1 times [2024-10-18 23:53:08,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:08,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:08,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:08,386 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:08,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:08,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:08,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:08,646 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:08,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:09,038 INFO L85 PathProgramCache]: Analyzing trace with hash -85794358, now seen corresponding path program 1 times [2024-10-18 23:53:09,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:09,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:09,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:09,476 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:09,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:09,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:09,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:09,948 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:10,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:53:12,461 INFO L85 PathProgramCache]: Analyzing trace with hash -844326776, now seen corresponding path program 1 times [2024-10-18 23:53:12,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:12,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:12,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:12,795 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:53:12,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:12,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:12,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:13,142 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:53:13,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:53:13,462 INFO L85 PathProgramCache]: Analyzing trace with hash 550521918, now seen corresponding path program 1 times [2024-10-18 23:53:13,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:13,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:13,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:13,679 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:13,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:13,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:13,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:14,067 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:14,388 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:14,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:53:14,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:14,494 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:14,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:14,506 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:14,643 INFO L85 PathProgramCache]: Analyzing trace with hash -113701622, now seen corresponding path program 1 times [2024-10-18 23:53:14,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:14,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:14,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:14,905 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:14,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:14,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:14,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:15,165 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:15,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:15,326 INFO L85 PathProgramCache]: Analyzing trace with hash 1432620243, now seen corresponding path program 1 times [2024-10-18 23:53:15,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:15,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:15,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:15,651 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:15,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:15,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:15,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:15,970 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:16,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:53:18,455 INFO L85 PathProgramCache]: Analyzing trace with hash -1936798901, now seen corresponding path program 1 times [2024-10-18 23:53:18,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:18,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:18,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:18,982 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:53:18,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:18,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:19,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:19,345 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:53:19,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:19,666 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:53:19,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1506 treesize of output 1286 [2024-10-18 23:53:19,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:53:19,772 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:19,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:53:19,780 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:19,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:53:19,793 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:20,603 INFO L85 PathProgramCache]: Analyzing trace with hash -596558307, now seen corresponding path program 1 times [2024-10-18 23:53:20,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:20,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:20,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:20,858 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:20,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:20,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:20,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:21,114 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:21,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:21,447 INFO L85 PathProgramCache]: Analyzing trace with hash 494476469, now seen corresponding path program 1 times [2024-10-18 23:53:21,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:21,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:21,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:22,094 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:22,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:22,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:22,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:22,382 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:22,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:53:24,813 INFO L85 PathProgramCache]: Analyzing trace with hash 747942704, now seen corresponding path program 1 times [2024-10-18 23:53:24,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:24,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:24,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:25,147 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:53:25,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:25,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:25,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:25,485 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:53:25,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:25,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1571833602, now seen corresponding path program 1 times [2024-10-18 23:53:25,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:25,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:25,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:26,057 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:53:26,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:26,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:26,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:26,532 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:53:27,165 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:27,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:53:27,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:27,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:27,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:27,286 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:27,784 INFO L85 PathProgramCache]: Analyzing trace with hash -119755721, now seen corresponding path program 1 times [2024-10-18 23:53:27,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:27,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:27,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:28,003 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:28,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:28,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:28,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:28,222 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:28,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:28,537 INFO L85 PathProgramCache]: Analyzing trace with hash 878453461, now seen corresponding path program 1 times [2024-10-18 23:53:28,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:28,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:28,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:28,898 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:28,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:28,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:28,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:29,181 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:29,583 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:53:29,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 369 treesize of output 317 [2024-10-18 23:53:29,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:29,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:53:29,894 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:29,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:53:29,905 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:29,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:53:29,918 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:31,428 INFO L85 PathProgramCache]: Analyzing trace with hash -1424353334, now seen corresponding path program 1 times [2024-10-18 23:53:31,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:31,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:31,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:31,677 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:31,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:31,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:31,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:31,921 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:31,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:32,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1353551238, now seen corresponding path program 1 times [2024-10-18 23:53:32,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:32,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:32,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:32,320 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:32,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:32,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:32,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:32,592 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:32,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:53:33,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1589238163, now seen corresponding path program 1 times [2024-10-18 23:53:33,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:33,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:33,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:33,393 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:53:33,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:33,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:33,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:33,878 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:53:33,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:34,001 INFO L85 PathProgramCache]: Analyzing trace with hash 723361479, now seen corresponding path program 1 times [2024-10-18 23:53:34,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:34,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:34,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:34,301 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:53:34,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:34,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:34,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:34,609 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:53:34,985 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:34,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:53:35,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:35,144 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:35,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:35,168 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:35,427 INFO L85 PathProgramCache]: Analyzing trace with hash -146458758, now seen corresponding path program 1 times [2024-10-18 23:53:35,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:35,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:35,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:35,637 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:35,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:35,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:35,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:35,859 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:35,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:53:35,991 INFO L85 PathProgramCache]: Analyzing trace with hash 986609874, now seen corresponding path program 1 times [2024-10-18 23:53:35,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:35,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:36,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:36,454 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:36,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:36,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:36,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:36,717 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:36,813 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:36,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:53:38,877 INFO L85 PathProgramCache]: Analyzing trace with hash 327821645, now seen corresponding path program 1 times [2024-10-18 23:53:38,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:38,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:38,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:39,245 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:39,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:39,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:39,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:39,454 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:53:39,787 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:39,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:53:41,861 INFO L85 PathProgramCache]: Analyzing trace with hash 1432836335, now seen corresponding path program 1 times [2024-10-18 23:53:41,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:41,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:41,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:42,074 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:42,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:42,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:42,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:42,287 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:53:42,447 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:53:42,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:53:42,514 INFO L85 PathProgramCache]: Analyzing trace with hash -458767323, now seen corresponding path program 1 times [2024-10-18 23:53:42,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:42,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:42,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:43,063 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:53:43,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:43,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:43,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:43,390 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:53:43,893 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:43,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:53:43,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:43,987 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:44,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:44,014 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:46,114 INFO L85 PathProgramCache]: Analyzing trace with hash 1505769185, now seen corresponding path program 1 times [2024-10-18 23:53:46,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:46,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:46,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:46,679 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:46,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:46,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:46,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:46,913 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:47,106 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:47,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:53:49,183 INFO L85 PathProgramCache]: Analyzing trace with hash -360241858, now seen corresponding path program 1 times [2024-10-18 23:53:49,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:49,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:49,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:49,526 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:49,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:49,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:49,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:49,781 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:50,188 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:50,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:53:50,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:50,278 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:50,300 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:50,303 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:52,409 INFO L85 PathProgramCache]: Analyzing trace with hash 1699486712, now seen corresponding path program 1 times [2024-10-18 23:53:52,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:52,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:52,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:52,868 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:52,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:52,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:52,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:53,125 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:53:53,290 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:53:53,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:53:53,356 INFO L85 PathProgramCache]: Analyzing trace with hash 1089743272, now seen corresponding path program 1 times [2024-10-18 23:53:53,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:53,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:53,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:53,716 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:53:53,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:53,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:53,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:54,182 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:53:54,447 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:54,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:53:54,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:54,542 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:54,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:54,569 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:54,705 INFO L85 PathProgramCache]: Analyzing trace with hash -729218018, now seen corresponding path program 1 times [2024-10-18 23:53:54,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:54,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:54,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:54,957 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:54,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:54,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:55,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:55,209 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:55,305 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:55,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:53:57,397 INFO L85 PathProgramCache]: Analyzing trace with hash -699307465, now seen corresponding path program 1 times [2024-10-18 23:53:57,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:57,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:57,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:57,670 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:57,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:53:57,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:53:57,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:53:58,070 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:53:58,300 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:53:58,300 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:53:58,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:58,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:53:58,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:53:58,421 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:00,517 INFO L85 PathProgramCache]: Analyzing trace with hash -2020022099, now seen corresponding path program 1 times [2024-10-18 23:54:00,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:00,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:00,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:00,795 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:54:00,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:00,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:00,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:01,073 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:54:01,471 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:01,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:01,512 INFO L349 Elim1Store]: treesize reduction 29, result has 23.7 percent of original size [2024-10-18 23:54:01,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 2070 treesize of output 1698 [2024-10-18 23:54:01,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:01,702 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:01,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:01,724 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:01,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:01,743 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:03,934 INFO L85 PathProgramCache]: Analyzing trace with hash -2067408001, now seen corresponding path program 1 times [2024-10-18 23:54:03,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:03,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:03,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:04,454 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:04,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:04,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:04,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:04,823 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:04,930 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:04,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:07,015 INFO L85 PathProgramCache]: Analyzing trace with hash -335323121, now seen corresponding path program 1 times [2024-10-18 23:54:07,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:07,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:07,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:07,466 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:07,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:07,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:07,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:07,722 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:08,035 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:08,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:54:08,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:08,133 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:08,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:08,184 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:08,385 INFO L85 PathProgramCache]: Analyzing trace with hash 1108512902, now seen corresponding path program 1 times [2024-10-18 23:54:08,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:08,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:08,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:08,656 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:08,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:08,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:08,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:09,017 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:09,137 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:09,137 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:11,219 INFO L85 PathProgramCache]: Analyzing trace with hash 1422720080, now seen corresponding path program 1 times [2024-10-18 23:54:11,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:11,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:11,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:11,428 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:11,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:11,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:11,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:11,637 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:11,932 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:11,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:14,015 INFO L85 PathProgramCache]: Analyzing trace with hash -1768217060, now seen corresponding path program 1 times [2024-10-18 23:54:14,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:14,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:14,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:14,364 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:14,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:14,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:14,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:14,612 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:15,139 INFO L349 Elim1Store]: treesize reduction 29, result has 23.7 percent of original size [2024-10-18 23:54:15,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 1261 treesize of output 1049 [2024-10-18 23:54:15,220 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:15,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:15,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:15,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:15,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:15,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:15,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:15,427 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:17,562 INFO L85 PathProgramCache]: Analyzing trace with hash -635505397, now seen corresponding path program 1 times [2024-10-18 23:54:17,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:17,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:17,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:17,779 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:17,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:17,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:17,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:17,995 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:18,090 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:18,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:20,172 INFO L85 PathProgramCache]: Analyzing trace with hash -140537659, now seen corresponding path program 1 times [2024-10-18 23:54:20,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:20,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:20,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:20,415 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:20,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:20,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:20,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:20,670 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:20,926 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:20,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:54:21,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:21,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:21,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:21,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:21,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1635251920, now seen corresponding path program 1 times [2024-10-18 23:54:21,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:21,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:21,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:21,647 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:21,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:21,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:21,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:21,862 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:21,964 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:21,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:24,052 INFO L85 PathProgramCache]: Analyzing trace with hash 2042798594, now seen corresponding path program 1 times [2024-10-18 23:54:24,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:24,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:24,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:24,251 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:24,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:24,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:24,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:24,451 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:24,594 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:24,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:26,679 INFO L85 PathProgramCache]: Analyzing trace with hash -328909816, now seen corresponding path program 1 times [2024-10-18 23:54:26,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:26,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:26,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:26,912 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:26,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:26,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:26,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:27,312 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:27,470 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:54:27,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:54:27,534 INFO L85 PathProgramCache]: Analyzing trace with hash 715364008, now seen corresponding path program 1 times [2024-10-18 23:54:27,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:27,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:27,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:27,833 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:54:27,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:27,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:27,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:28,149 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:54:28,306 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:54:28,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:54:28,372 INFO L85 PathProgramCache]: Analyzing trace with hash 1171835332, now seen corresponding path program 1 times [2024-10-18 23:54:28,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:28,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:28,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:28,685 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:54:28,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:28,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:28,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:29,013 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:54:29,177 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:54:29,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:54:29,244 INFO L85 PathProgramCache]: Analyzing trace with hash -1679322315, now seen corresponding path program 1 times [2024-10-18 23:54:29,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:29,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:29,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:29,701 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:54:29,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:29,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:29,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:30,036 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:54:30,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:30,210 INFO L85 PathProgramCache]: Analyzing trace with hash -519399850, now seen corresponding path program 1 times [2024-10-18 23:54:30,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:30,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:30,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:30,624 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:54:30,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:30,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:30,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:30,837 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:54:31,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:31,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1987042792, now seen corresponding path program 1 times [2024-10-18 23:54:31,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:31,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:31,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:31,531 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:54:31,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:31,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:31,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:31,897 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:54:32,065 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:54:32,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:54:32,131 INFO L85 PathProgramCache]: Analyzing trace with hash -1693380447, now seen corresponding path program 1 times [2024-10-18 23:54:32,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:32,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:32,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:32,480 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-10-18 23:54:32,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:32,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:32,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:32,824 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-10-18 23:54:32,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:33,002 INFO L85 PathProgramCache]: Analyzing trace with hash -955202152, now seen corresponding path program 1 times [2024-10-18 23:54:33,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:33,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:33,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:33,221 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:54:33,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:33,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:33,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:33,594 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:54:33,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:33,774 INFO L85 PathProgramCache]: Analyzing trace with hash -2096760922, now seen corresponding path program 1 times [2024-10-18 23:54:33,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:33,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:33,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:34,019 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:54:34,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:34,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:34,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:34,265 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:54:34,458 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:34,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:34,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1967141112, now seen corresponding path program 1 times [2024-10-18 23:54:34,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:34,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:34,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:34,817 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:54:34,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:34,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:34,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:35,133 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:54:35,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:35,416 INFO L85 PathProgramCache]: Analyzing trace with hash -2060554944, now seen corresponding path program 1 times [2024-10-18 23:54:35,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:35,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:35,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:35,871 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:35,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:35,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:35,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:36,071 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:54:36,268 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:54:36,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:54:36,342 INFO L85 PathProgramCache]: Analyzing trace with hash -2115265618, now seen corresponding path program 1 times [2024-10-18 23:54:36,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:36,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:36,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:36,655 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:54:36,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:36,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:36,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:36,969 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:54:37,159 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:37,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:37,194 INFO L85 PathProgramCache]: Analyzing trace with hash 701431996, now seen corresponding path program 1 times [2024-10-18 23:54:37,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:37,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:37,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:37,500 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:54:37,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:37,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:37,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:37,962 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:54:38,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:38,141 INFO L85 PathProgramCache]: Analyzing trace with hash 929929664, now seen corresponding path program 1 times [2024-10-18 23:54:38,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:38,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:38,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:38,330 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:38,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:38,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:38,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:38,519 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:54:38,714 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:54:38,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:54:38,791 INFO L85 PathProgramCache]: Analyzing trace with hash 1723230360, now seen corresponding path program 1 times [2024-10-18 23:54:38,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:38,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:38,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:39,103 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:54:39,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:39,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:39,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:39,404 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:54:39,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:39,646 INFO L85 PathProgramCache]: Analyzing trace with hash -1407884519, now seen corresponding path program 1 times [2024-10-18 23:54:39,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:39,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:39,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:39,820 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:39,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:39,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:40,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:40,144 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:40,374 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:40,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1196 treesize of output 1016 [2024-10-18 23:54:40,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:40,485 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:40,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:40,512 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:42,624 INFO L85 PathProgramCache]: Analyzing trace with hash -694768911, now seen corresponding path program 1 times [2024-10-18 23:54:42,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:42,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:42,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:42,934 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:42,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:42,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:42,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:43,133 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:43,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:54:45,516 INFO L85 PathProgramCache]: Analyzing trace with hash -63021230, now seen corresponding path program 1 times [2024-10-18 23:54:45,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:45,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:45,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:45,815 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:54:45,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:45,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:45,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:46,110 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:54:46,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:54:46,275 INFO L85 PathProgramCache]: Analyzing trace with hash -434538707, now seen corresponding path program 1 times [2024-10-18 23:54:46,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:46,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:46,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:46,731 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:54:46,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:46,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:46,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:47,060 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:54:47,159 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:47,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:49,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1529028941, now seen corresponding path program 1 times [2024-10-18 23:54:49,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:49,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:49,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:49,549 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:49,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:49,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:49,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:49,747 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:49,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:54:49,877 INFO L85 PathProgramCache]: Analyzing trace with hash 155235236, now seen corresponding path program 1 times [2024-10-18 23:54:49,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:49,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:49,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:50,214 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:50,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:50,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:50,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:50,597 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:50,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:54:50,802 INFO L85 PathProgramCache]: Analyzing trace with hash 1155963674, now seen corresponding path program 1 times [2024-10-18 23:54:50,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:50,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:50,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:50,956 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:50,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:50,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:50,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:51,111 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:51,362 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:51,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2378 treesize of output 2014 [2024-10-18 23:54:51,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:51,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:51,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:54:51,491 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:54:53,593 INFO L85 PathProgramCache]: Analyzing trace with hash 1475113324, now seen corresponding path program 1 times [2024-10-18 23:54:53,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:53,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:53,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:53,895 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:53,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:53,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:53,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:54,081 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:54,182 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:54:54,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:54:56,256 INFO L85 PathProgramCache]: Analyzing trace with hash 244169989, now seen corresponding path program 1 times [2024-10-18 23:54:56,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:56,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:56,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:56,450 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:56,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:56,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:56,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:56,816 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 23:54:57,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:54:59,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1516149100, now seen corresponding path program 1 times [2024-10-18 23:54:59,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:59,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:59,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:59,433 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:54:59,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:54:59,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:54:59,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:54:59,539 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:54:59,539 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 23:54:59,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=5231, Unknown=0, NotChecked=0, Total=5402 [2024-10-18 23:55:00,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:00,120 INFO L85 PathProgramCache]: Analyzing trace with hash 576866149, now seen corresponding path program 1 times [2024-10-18 23:55:00,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:00,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:00,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:00,456 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:00,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:00,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:00,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:00,788 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:00,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:55:03,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1254969440, now seen corresponding path program 1 times [2024-10-18 23:55:03,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:03,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:03,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:03,515 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:03,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:03,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:03,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:04,027 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:04,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:04,154 INFO L85 PathProgramCache]: Analyzing trace with hash 1328955554, now seen corresponding path program 1 times [2024-10-18 23:55:04,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:04,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:04,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:04,427 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:04,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:04,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:04,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:04,698 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:05,065 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:05,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1196 treesize of output 1016 [2024-10-18 23:55:05,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:55:05,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:05,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:55:05,215 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:05,723 INFO L85 PathProgramCache]: Analyzing trace with hash 836691283, now seen corresponding path program 1 times [2024-10-18 23:55:05,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:05,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:05,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:05,974 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:05,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:05,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:06,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:06,385 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:06,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:06,511 INFO L85 PathProgramCache]: Analyzing trace with hash 900885673, now seen corresponding path program 1 times [2024-10-18 23:55:06,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:06,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:06,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:06,842 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:55:06,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:06,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:06,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:07,171 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:55:07,274 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:07,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:55:09,353 INFO L85 PathProgramCache]: Analyzing trace with hash 263636910, now seen corresponding path program 1 times [2024-10-18 23:55:09,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:09,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:09,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:09,582 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:09,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:09,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:09,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:09,970 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:10,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:10,099 INFO L85 PathProgramCache]: Analyzing trace with hash 1265615324, now seen corresponding path program 1 times [2024-10-18 23:55:10,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:10,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:10,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:10,393 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:10,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:10,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:10,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:10,695 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:10,819 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:55:10,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 25 [2024-10-18 23:55:10,849 INFO L85 PathProgramCache]: Analyzing trace with hash 781217342, now seen corresponding path program 1 times [2024-10-18 23:55:10,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:10,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:10,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:11,176 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:11,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:11,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:11,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:11,509 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:11,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:11,619 INFO L85 PathProgramCache]: Analyzing trace with hash -1508324030, now seen corresponding path program 1 times [2024-10-18 23:55:11,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:11,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:11,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:12,056 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:12,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:12,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:12,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:12,348 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:12,467 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:12,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:55:14,549 INFO L85 PathProgramCache]: Analyzing trace with hash -2014973846, now seen corresponding path program 1 times [2024-10-18 23:55:14,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:14,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:14,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:14,787 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:14,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:14,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:14,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:15,026 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:15,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:15,159 INFO L85 PathProgramCache]: Analyzing trace with hash -635836727, now seen corresponding path program 1 times [2024-10-18 23:55:15,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:15,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:15,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:15,604 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:55:15,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:15,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:15,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:15,952 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:55:16,297 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:16,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1176 treesize of output 996 [2024-10-18 23:55:16,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:55:16,417 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:16,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:55:16,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:18,560 INFO L85 PathProgramCache]: Analyzing trace with hash -1154324954, now seen corresponding path program 1 times [2024-10-18 23:55:18,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:18,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:18,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:18,767 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:18,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:18,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:18,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:18,979 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:19,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:55:19,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1248461219, now seen corresponding path program 1 times [2024-10-18 23:55:19,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:19,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:19,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:19,587 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:19,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:19,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:19,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:19,787 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:20,105 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:20,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2378 treesize of output 2014 [2024-10-18 23:55:20,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:20,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:20,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:20,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:22,336 INFO L85 PathProgramCache]: Analyzing trace with hash 47573809, now seen corresponding path program 1 times [2024-10-18 23:55:22,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:22,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:22,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:22,714 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:22,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:22,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:22,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:22,953 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:23,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:23,196 INFO L85 PathProgramCache]: Analyzing trace with hash -85794118, now seen corresponding path program 1 times [2024-10-18 23:55:23,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:23,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:23,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:23,488 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:23,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:23,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:23,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:23,790 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:55:23,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:55:26,147 INFO L85 PathProgramCache]: Analyzing trace with hash -844326542, now seen corresponding path program 1 times [2024-10-18 23:55:26,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:26,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:26,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:26,641 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:55:26,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:26,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:26,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:26,984 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:55:27,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:55:27,194 INFO L85 PathProgramCache]: Analyzing trace with hash 550522148, now seen corresponding path program 1 times [2024-10-18 23:55:27,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:27,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:27,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:27,410 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:55:27,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:27,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:27,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:27,627 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:55:27,980 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:27,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2358 treesize of output 1994 [2024-10-18 23:55:28,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:28,089 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:28,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:28,102 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:30,198 INFO L85 PathProgramCache]: Analyzing trace with hash -113701392, now seen corresponding path program 1 times [2024-10-18 23:55:30,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:30,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:30,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:30,459 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:55:30,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:30,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:30,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:30,916 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:55:31,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:31,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1432620473, now seen corresponding path program 1 times [2024-10-18 23:55:31,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:31,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:31,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:31,431 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:55:31,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:31,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:31,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:31,754 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:55:31,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:55:34,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1936798671, now seen corresponding path program 1 times [2024-10-18 23:55:34,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:34,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:34,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:34,559 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:55:34,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:34,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:34,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:35,087 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2024-10-18 23:55:35,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:35,427 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:55:35,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 744 treesize of output 636 [2024-10-18 23:55:35,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:55:35,542 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:35,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:55:35,554 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:35,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:55:35,571 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:35,923 INFO L85 PathProgramCache]: Analyzing trace with hash -596558077, now seen corresponding path program 1 times [2024-10-18 23:55:35,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:35,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:35,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:36,186 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:36,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:36,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:36,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:36,445 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:36,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:36,572 INFO L85 PathProgramCache]: Analyzing trace with hash 494476693, now seen corresponding path program 1 times [2024-10-18 23:55:36,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:36,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:36,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:36,865 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:36,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:36,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:36,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:37,313 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:37,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:55:39,762 INFO L85 PathProgramCache]: Analyzing trace with hash 747942924, now seen corresponding path program 1 times [2024-10-18 23:55:39,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:39,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:39,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:40,098 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:40,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:40,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:40,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:40,438 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:55:40,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:40,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1571833386, now seen corresponding path program 1 times [2024-10-18 23:55:40,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:40,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:40,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:40,877 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:55:40,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:40,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:40,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:41,195 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:55:41,570 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:41,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2378 treesize of output 2014 [2024-10-18 23:55:41,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:41,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:41,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:41,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:42,095 INFO L85 PathProgramCache]: Analyzing trace with hash -119755511, now seen corresponding path program 1 times [2024-10-18 23:55:42,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:42,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:42,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:42,339 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:42,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:42,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:42,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:42,560 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:42,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:42,686 INFO L85 PathProgramCache]: Analyzing trace with hash 878453665, now seen corresponding path program 1 times [2024-10-18 23:55:42,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:42,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:42,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:42,969 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:42,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:42,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:43,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:43,250 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:55:43,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:43,554 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:55:43,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 369 treesize of output 317 [2024-10-18 23:55:43,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:55:43,669 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:43,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:55:43,680 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:43,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:55:43,692 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:45,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1424353136, now seen corresponding path program 1 times [2024-10-18 23:55:45,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:45,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:45,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:46,342 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:46,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:46,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:46,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:46,587 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:46,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:46,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1353551436, now seen corresponding path program 1 times [2024-10-18 23:55:46,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:46,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:46,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:46,992 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:46,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:46,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:47,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:47,267 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:47,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:55:49,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1589238361, now seen corresponding path program 1 times [2024-10-18 23:55:49,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:49,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:49,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:49,979 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:55:49,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:49,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:50,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:50,490 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:55:50,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:50,620 INFO L85 PathProgramCache]: Analyzing trace with hash 723361677, now seen corresponding path program 1 times [2024-10-18 23:55:50,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:50,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:50,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:50,925 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:55:50,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:50,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:50,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:51,235 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:55:51,624 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:51,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 577 treesize of output 489 [2024-10-18 23:55:51,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:51,751 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:51,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:55:51,770 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:55:53,875 INFO L85 PathProgramCache]: Analyzing trace with hash -146458560, now seen corresponding path program 1 times [2024-10-18 23:55:53,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:53,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:53,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:54,086 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:54,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:54,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:54,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:54,294 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:54,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:55:54,444 INFO L85 PathProgramCache]: Analyzing trace with hash 986610072, now seen corresponding path program 1 times [2024-10-18 23:55:54,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:54,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:54,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:54,891 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:54,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:54,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:54,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:55,156 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:55,256 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:55,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:55:57,342 INFO L85 PathProgramCache]: Analyzing trace with hash 327821843, now seen corresponding path program 1 times [2024-10-18 23:55:57,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:57,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:57,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:57,543 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:57,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:57,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:57,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:55:57,746 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:55:57,842 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:55:57,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:55:59,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1432836527, now seen corresponding path program 1 times [2024-10-18 23:55:59,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:55:59,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:55:59,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:00,126 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:00,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:00,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:00,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:00,513 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:00,688 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:00,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:00,754 INFO L85 PathProgramCache]: Analyzing trace with hash -458767131, now seen corresponding path program 1 times [2024-10-18 23:56:00,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:00,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:00,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:01,083 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:56:01,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:01,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:01,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:01,413 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:56:01,777 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:01,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:56:01,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:01,886 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:01,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:01,903 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:02,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1505769373, now seen corresponding path program 1 times [2024-10-18 23:56:02,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:02,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:02,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:02,267 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:02,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:02,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:02,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:02,501 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:02,663 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:02,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:04,743 INFO L85 PathProgramCache]: Analyzing trace with hash -360241672, now seen corresponding path program 1 times [2024-10-18 23:56:04,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:04,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:04,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:05,162 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:05,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:05,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:05,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:05,414 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:05,643 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:05,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2378 treesize of output 2014 [2024-10-18 23:56:05,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:05,764 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:05,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:05,781 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:07,925 INFO L85 PathProgramCache]: Analyzing trace with hash 1699486894, now seen corresponding path program 1 times [2024-10-18 23:56:07,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:07,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:07,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:08,194 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:08,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:08,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:08,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:08,455 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:08,620 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:08,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:08,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1089743454, now seen corresponding path program 1 times [2024-10-18 23:56:08,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:08,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:08,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:09,199 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:56:09,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:09,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:09,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:09,545 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:56:09,867 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:09,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1196 treesize of output 1016 [2024-10-18 23:56:10,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:10,008 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:10,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:10,029 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:10,153 INFO L85 PathProgramCache]: Analyzing trace with hash -729217834, now seen corresponding path program 1 times [2024-10-18 23:56:10,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:10,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:10,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:10,414 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:10,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:10,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:10,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:10,669 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:10,921 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:10,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:56:11,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:11,027 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:11,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:11,044 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:13,155 INFO L85 PathProgramCache]: Analyzing trace with hash -2020021916, now seen corresponding path program 1 times [2024-10-18 23:56:13,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:13,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:13,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:13,593 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:13,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:13,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:13,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:13,871 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:14,236 INFO L349 Elim1Store]: treesize reduction 29, result has 23.7 percent of original size [2024-10-18 23:56:14,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 1261 treesize of output 1049 [2024-10-18 23:56:14,307 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:14,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:14,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:14,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:14,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:14,447 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:14,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:14,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:16,615 INFO L85 PathProgramCache]: Analyzing trace with hash -2067407820, now seen corresponding path program 1 times [2024-10-18 23:56:16,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:16,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:16,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:16,847 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:16,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:16,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:16,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:17,076 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:17,175 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:17,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:19,259 INFO L85 PathProgramCache]: Analyzing trace with hash -335322940, now seen corresponding path program 1 times [2024-10-18 23:56:19,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:19,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:19,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:19,516 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:19,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:19,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:19,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:19,941 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:20,186 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:20,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1196 treesize of output 1016 [2024-10-18 23:56:20,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:20,292 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:20,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:20,311 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:20,440 INFO L85 PathProgramCache]: Analyzing trace with hash 1108513081, now seen corresponding path program 1 times [2024-10-18 23:56:20,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:20,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:20,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:20,672 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:20,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:20,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:20,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:20,902 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:20,998 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:20,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:23,078 INFO L85 PathProgramCache]: Analyzing trace with hash 1422720257, now seen corresponding path program 1 times [2024-10-18 23:56:23,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:23,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:23,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:23,293 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:23,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:23,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:23,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:23,507 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:23,605 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:23,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:25,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1768216889, now seen corresponding path program 1 times [2024-10-18 23:56:25,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:25,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:25,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:26,087 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:26,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:26,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:26,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:26,336 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:26,653 INFO L349 Elim1Store]: treesize reduction 29, result has 23.7 percent of original size [2024-10-18 23:56:26,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 1261 treesize of output 1049 [2024-10-18 23:56:26,737 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:26,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:26,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:26,855 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:26,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:26,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:26,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:26,890 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:29,043 INFO L85 PathProgramCache]: Analyzing trace with hash -635505228, now seen corresponding path program 1 times [2024-10-18 23:56:29,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:29,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:29,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:29,261 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:29,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:29,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:29,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:29,479 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:29,575 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:29,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:31,678 INFO L85 PathProgramCache]: Analyzing trace with hash -140537490, now seen corresponding path program 1 times [2024-10-18 23:56:31,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:31,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:31,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:31,924 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:31,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:31,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:32,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:32,327 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:32,607 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:32,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2358 treesize of output 1994 [2024-10-18 23:56:32,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:32,731 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:32,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:56:32,746 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:32,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1635252089, now seen corresponding path program 1 times [2024-10-18 23:56:32,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:32,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:32,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:33,165 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:33,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:33,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:33,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:33,385 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:33,488 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:33,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:35,595 INFO L85 PathProgramCache]: Analyzing trace with hash 2042798763, now seen corresponding path program 1 times [2024-10-18 23:56:35,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:35,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:35,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:35,798 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:35,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:35,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:35,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:35,999 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:36,110 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:36,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:38,195 INFO L85 PathProgramCache]: Analyzing trace with hash -328909647, now seen corresponding path program 1 times [2024-10-18 23:56:38,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:38,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:38,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:38,602 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:38,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:38,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:38,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:38,841 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:39,018 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:39,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:39,089 INFO L85 PathProgramCache]: Analyzing trace with hash 715364177, now seen corresponding path program 1 times [2024-10-18 23:56:39,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:39,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:39,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:39,413 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:56:39,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:39,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:39,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:39,777 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:56:39,957 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:39,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:40,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1171835501, now seen corresponding path program 1 times [2024-10-18 23:56:40,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:40,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:40,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:40,362 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:56:40,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:40,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:40,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:40,877 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:56:41,053 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:41,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:41,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1679322146, now seen corresponding path program 1 times [2024-10-18 23:56:41,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:41,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:41,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:41,463 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:56:41,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:41,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:41,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:41,803 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-10-18 23:56:41,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:42,028 INFO L85 PathProgramCache]: Analyzing trace with hash -519399679, now seen corresponding path program 1 times [2024-10-18 23:56:42,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:42,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:42,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:42,274 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:42,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:42,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:42,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:42,481 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:42,652 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:42,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1987042961, now seen corresponding path program 1 times [2024-10-18 23:56:42,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:42,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:42,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:43,105 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:43,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:43,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:43,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:43,336 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-10-18 23:56:43,509 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:43,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:43,586 INFO L85 PathProgramCache]: Analyzing trace with hash -1693380278, now seen corresponding path program 1 times [2024-10-18 23:56:43,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:43,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:43,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:43,946 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-10-18 23:56:43,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:43,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:43,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:44,307 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-10-18 23:56:44,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:44,530 INFO L85 PathProgramCache]: Analyzing trace with hash -955201981, now seen corresponding path program 1 times [2024-10-18 23:56:44,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:44,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:44,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:44,754 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:44,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:44,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:44,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:45,161 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:45,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:45,347 INFO L85 PathProgramCache]: Analyzing trace with hash -2096760751, now seen corresponding path program 1 times [2024-10-18 23:56:45,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:45,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:45,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:45,595 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:45,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:45,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:45,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:45,844 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-10-18 23:56:46,009 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:46,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:46,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1967141281, now seen corresponding path program 1 times [2024-10-18 23:56:46,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:46,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:46,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:46,377 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:56:46,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:46,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:46,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:46,891 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:56:47,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:47,080 INFO L85 PathProgramCache]: Analyzing trace with hash -2060554779, now seen corresponding path program 1 times [2024-10-18 23:56:47,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:47,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:47,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:47,283 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:47,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:47,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:47,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:47,487 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:47,695 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:47,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:47,775 INFO L85 PathProgramCache]: Analyzing trace with hash -2115265453, now seen corresponding path program 1 times [2024-10-18 23:56:47,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:47,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:47,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:48,101 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:56:48,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:48,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:48,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:48,435 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:56:48,606 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:56:48,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:56:48,649 INFO L85 PathProgramCache]: Analyzing trace with hash 701432159, now seen corresponding path program 1 times [2024-10-18 23:56:48,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:48,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:48,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:49,137 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:56:49,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:49,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:49,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:49,456 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:56:49,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:49,649 INFO L85 PathProgramCache]: Analyzing trace with hash 929929827, now seen corresponding path program 1 times [2024-10-18 23:56:49,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:49,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:49,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:49,842 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:49,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:49,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:49,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:50,037 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:56:50,244 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:50,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:50,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1723230523, now seen corresponding path program 1 times [2024-10-18 23:56:50,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:50,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:50,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:50,802 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:56:50,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:50,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:50,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:51,123 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:56:51,824 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:51,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:56:51,899 INFO L85 PathProgramCache]: Analyzing trace with hash -122054685, now seen corresponding path program 1 times [2024-10-18 23:56:51,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:51,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:51,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:52,195 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:56:52,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:52,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:52,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:52,488 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:56:53,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:56:53,080 INFO L85 PathProgramCache]: Analyzing trace with hash 413955132, now seen corresponding path program 1 times [2024-10-18 23:56:53,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:53,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:53,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:53,295 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 23:56:53,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:53,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:53,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:53,385 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 23:56:53,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-10-18 23:56:53,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=5377, Unknown=0, NotChecked=0, Total=5550 [2024-10-18 23:56:54,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:56:54,995 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:56:54,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 369 treesize of output 317 [2024-10-18 23:56:55,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:56:55,118 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:55,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:56:55,127 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:55,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:56:55,143 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:56:57,410 INFO L85 PathProgramCache]: Analyzing trace with hash -596557924, now seen corresponding path program 1 times [2024-10-18 23:56:57,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:57,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:57,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:57,672 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:57,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:57,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:57,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:57,934 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:58,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:56:58,085 INFO L85 PathProgramCache]: Analyzing trace with hash 494476846, now seen corresponding path program 1 times [2024-10-18 23:56:58,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:58,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:58,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:58,380 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:58,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:56:58,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:56:58,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:56:59,154 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:56:59,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:57:01,733 INFO L85 PathProgramCache]: Analyzing trace with hash 747943077, now seen corresponding path program 1 times [2024-10-18 23:57:01,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:01,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:01,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:02,300 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:57:02,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:02,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:02,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:02,863 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:57:02,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:57:03,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1571833233, now seen corresponding path program 1 times [2024-10-18 23:57:03,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:03,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:03,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:03,592 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:57:03,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:03,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:03,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:04,158 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:57:04,689 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:04,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:57:04,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:04,834 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:04,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:04,873 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:07,051 INFO L85 PathProgramCache]: Analyzing trace with hash -119755358, now seen corresponding path program 1 times [2024-10-18 23:57:07,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:07,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:07,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:07,485 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:07,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:07,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:07,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:07,877 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:08,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:57:08,076 INFO L85 PathProgramCache]: Analyzing trace with hash 878453818, now seen corresponding path program 1 times [2024-10-18 23:57:08,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:08,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:08,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:08,510 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:08,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:08,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:08,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:08,800 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:09,176 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:09,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:57:11,262 INFO L85 PathProgramCache]: Analyzing trace with hash 327821990, now seen corresponding path program 1 times [2024-10-18 23:57:11,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:11,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:11,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:11,470 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:57:11,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:11,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:11,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:11,795 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 23:57:12,256 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:12,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:57:12,298 INFO L349 Elim1Store]: treesize reduction 29, result has 23.7 percent of original size [2024-10-18 23:57:12,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 1128 treesize of output 926 [2024-10-18 23:57:12,464 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:12,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:12,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:12,487 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:12,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:12,515 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:14,663 INFO L85 PathProgramCache]: Analyzing trace with hash -2067407683, now seen corresponding path program 1 times [2024-10-18 23:57:14,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:14,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:14,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:14,894 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:14,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:14,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:14,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:15,125 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:15,231 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:15,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:57:17,318 INFO L85 PathProgramCache]: Analyzing trace with hash -335322803, now seen corresponding path program 1 times [2024-10-18 23:57:17,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:17,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:17,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:17,581 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:17,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:17,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:17,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:17,997 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:18,340 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:18,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 577 treesize of output 489 [2024-10-18 23:57:18,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:18,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:18,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:18,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:18,795 INFO L85 PathProgramCache]: Analyzing trace with hash 1108513218, now seen corresponding path program 1 times [2024-10-18 23:57:18,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:18,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:18,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:19,039 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:19,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:19,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:19,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:19,284 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:19,422 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:19,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:57:21,517 INFO L85 PathProgramCache]: Analyzing trace with hash 1422720394, now seen corresponding path program 1 times [2024-10-18 23:57:21,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:21,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:21,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:21,735 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:21,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:21,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:21,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:21,953 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:22,072 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:22,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:57:24,159 INFO L85 PathProgramCache]: Analyzing trace with hash -1768216752, now seen corresponding path program 1 times [2024-10-18 23:57:24,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:24,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:24,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:24,545 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:24,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:24,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:24,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:24,796 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 23:57:24,975 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:57:24,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:57:25,049 INFO L85 PathProgramCache]: Analyzing trace with hash 715364309, now seen corresponding path program 1 times [2024-10-18 23:57:25,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:25,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:25,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:25,373 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:57:25,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:25,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:25,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:25,698 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:57:25,937 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:25,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 29 [2024-10-18 23:57:25,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1967141404, now seen corresponding path program 1 times [2024-10-18 23:57:25,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:25,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:26,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:26,470 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:57:26,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:26,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:26,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:26,804 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-10-18 23:57:27,021 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:57:27,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 25 [2024-10-18 23:57:27,110 INFO L85 PathProgramCache]: Analyzing trace with hash -2115265331, now seen corresponding path program 1 times [2024-10-18 23:57:27,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:27,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:27,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:27,438 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:57:27,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:27,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:27,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:27,775 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:57:35,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:57:35,153 INFO L85 PathProgramCache]: Analyzing trace with hash 694763376, now seen corresponding path program 1 times [2024-10-18 23:57:35,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:35,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:35,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:35,518 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:57:35,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:35,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:35,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:35,691 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:57:36,232 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:36,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1172 treesize of output 992 [2024-10-18 23:57:36,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:36,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:36,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:36,420 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:36,611 INFO L85 PathProgramCache]: Analyzing trace with hash 62797260, now seen corresponding path program 1 times [2024-10-18 23:57:36,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:36,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:36,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:36,810 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:57:36,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:36,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:36,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:37,013 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:57:37,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:57:39,967 INFO L85 PathProgramCache]: Analyzing trace with hash 1946684405, now seen corresponding path program 1 times [2024-10-18 23:57:39,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:39,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:40,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:40,238 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:57:40,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:40,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:40,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:40,508 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:57:40,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:57:40,942 INFO L85 PathProgramCache]: Analyzing trace with hash -1843010536, now seen corresponding path program 1 times [2024-10-18 23:57:40,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:40,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:40,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:41,263 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:57:41,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:41,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:41,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:41,441 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:57:41,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:57:43,952 INFO L85 PathProgramCache]: Analyzing trace with hash -1607576432, now seen corresponding path program 1 times [2024-10-18 23:57:43,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:43,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:43,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:44,238 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:57:44,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:44,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:44,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:44,517 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:57:44,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:57:44,802 INFO L85 PathProgramCache]: Analyzing trace with hash -733078640, now seen corresponding path program 1 times [2024-10-18 23:57:44,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:44,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:44,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:44,941 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:57:44,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:44,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:44,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:45,081 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:57:45,368 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:45,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 577 treesize of output 489 [2024-10-18 23:57:45,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:45,470 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:45,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:57:45,493 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:46,092 INFO L85 PathProgramCache]: Analyzing trace with hash -1250633268, now seen corresponding path program 1 times [2024-10-18 23:57:46,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:46,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:46,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:46,366 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:57:46,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:46,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:46,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:46,644 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:57:47,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:57:49,416 INFO L85 PathProgramCache]: Analyzing trace with hash -114957239, now seen corresponding path program 1 times [2024-10-18 23:57:49,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:49,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:49,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:50,044 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 23:57:50,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:50,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:50,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:50,514 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-10-18 23:57:50,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:57:50,699 INFO L85 PathProgramCache]: Analyzing trace with hash 1194240162, now seen corresponding path program 1 times [2024-10-18 23:57:50,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:50,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:50,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:51,037 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:57:51,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:51,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:51,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:51,377 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:57:51,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:57:54,054 INFO L85 PathProgramCache]: Analyzing trace with hash 907539800, now seen corresponding path program 1 times [2024-10-18 23:57:54,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:54,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:54,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:54,469 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 23:57:54,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:54,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:54,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:54,886 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 23:57:55,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:57:55,175 INFO L85 PathProgramCache]: Analyzing trace with hash -1410080604, now seen corresponding path program 1 times [2024-10-18 23:57:55,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:55,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:55,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:55,689 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:57:55,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:55,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:55,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:56,003 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:57:56,947 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:56,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:57:57,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:57:57,092 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:57,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:57:57,111 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:57,239 INFO L85 PathProgramCache]: Analyzing trace with hash 2121165653, now seen corresponding path program 1 times [2024-10-18 23:57:57,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:57,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:57,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:57,437 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:57:57,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:57,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:57,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:57,630 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:57:57,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:57:57,767 INFO L85 PathProgramCache]: Analyzing trace with hash -1348409193, now seen corresponding path program 1 times [2024-10-18 23:57:57,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:57,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:57,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:58,216 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:57:58,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:57:58,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:57:58,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:57:58,545 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:57:58,840 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:57:58,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1168 treesize of output 988 [2024-10-18 23:57:58,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:57:58,970 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:57:58,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:57:58,989 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:01,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1257826418, now seen corresponding path program 1 times [2024-10-18 23:58:01,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:01,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:01,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:01,314 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:01,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:01,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:01,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:01,524 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:01,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:01,865 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:58:01,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 555 treesize of output 491 [2024-10-18 23:58:01,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:02,000 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:02,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:02,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:02,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:02,026 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:04,363 INFO L85 PathProgramCache]: Analyzing trace with hash 337880492, now seen corresponding path program 1 times [2024-10-18 23:58:04,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:04,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:04,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:04,603 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:04,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:04,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:04,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:05,143 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:05,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:05,456 INFO L85 PathProgramCache]: Analyzing trace with hash -1637830300, now seen corresponding path program 1 times [2024-10-18 23:58:05,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:05,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:05,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:05,913 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:05,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:05,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:05,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:06,378 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:07,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 660 treesize of output 612 [2024-10-18 23:58:09,265 INFO L85 PathProgramCache]: Analyzing trace with hash 1286788089, now seen corresponding path program 1 times [2024-10-18 23:58:09,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:09,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:09,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:09,850 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-10-18 23:58:09,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:09,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:09,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:10,454 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-10-18 23:58:10,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:10,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1820393305, now seen corresponding path program 1 times [2024-10-18 23:58:10,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:10,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:10,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:11,285 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 23:58:11,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:11,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:11,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:11,889 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-10-18 23:58:12,559 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:58:12,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1132 treesize of output 952 [2024-10-18 23:58:12,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:12,716 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:12,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:12,776 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:12,981 INFO L85 PathProgramCache]: Analyzing trace with hash -2029274534, now seen corresponding path program 1 times [2024-10-18 23:58:12,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:12,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:13,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:13,282 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:13,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:13,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:13,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:13,854 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:14,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:14,554 INFO L85 PathProgramCache]: Analyzing trace with hash -218735566, now seen corresponding path program 1 times [2024-10-18 23:58:14,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:14,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:14,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:14,948 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:14,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:14,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:15,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:15,329 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-10-18 23:58:15,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:15,872 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:58:15,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 714 treesize of output 638 [2024-10-18 23:58:16,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:16,009 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:16,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:16,023 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:16,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:16,039 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:16,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1331593085, now seen corresponding path program 1 times [2024-10-18 23:58:16,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:16,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:16,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:16,493 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:16,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:16,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:16,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:16,820 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:16,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:16,942 INFO L85 PathProgramCache]: Analyzing trace with hash 1138768349, now seen corresponding path program 1 times [2024-10-18 23:58:16,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:16,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:16,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:17,203 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:17,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:17,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:17,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:17,464 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:17,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:58:19,915 INFO L85 PathProgramCache]: Analyzing trace with hash -87782782, now seen corresponding path program 1 times [2024-10-18 23:58:19,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:19,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:19,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:20,251 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:58:20,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:20,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:20,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:20,582 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:58:20,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:20,703 INFO L85 PathProgramCache]: Analyzing trace with hash -2146714086, now seen corresponding path program 1 times [2024-10-18 23:58:20,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:20,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:20,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:21,252 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:58:21,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:21,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:21,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:21,764 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 23:58:22,458 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:58:22,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 569 treesize of output 481 [2024-10-18 23:58:22,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:22,628 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:22,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:22,658 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:24,852 INFO L85 PathProgramCache]: Analyzing trace with hash -1165935281, now seen corresponding path program 1 times [2024-10-18 23:58:24,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:24,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:24,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:25,343 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:25,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:25,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:25,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:25,747 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:25,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:25,931 INFO L85 PathProgramCache]: Analyzing trace with hash 521583077, now seen corresponding path program 1 times [2024-10-18 23:58:25,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:25,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:26,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:26,458 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:26,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:26,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:26,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:26,996 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 23:58:27,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:58:28,788 INFO L85 PathProgramCache]: Analyzing trace with hash -141591755, now seen corresponding path program 1 times [2024-10-18 23:58:28,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:28,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:28,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:29,177 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:58:29,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:29,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:29,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:29,564 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:58:29,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:29,751 INFO L85 PathProgramCache]: Analyzing trace with hash 2004821825, now seen corresponding path program 1 times [2024-10-18 23:58:29,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:29,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:29,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:30,479 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:58:30,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:30,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:30,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:30,740 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:58:31,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-10-18 23:58:33,404 INFO L85 PathProgramCache]: Analyzing trace with hash 149790380, now seen corresponding path program 1 times [2024-10-18 23:58:33,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:33,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:33,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:33,689 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:58:33,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:33,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:33,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:33,971 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-10-18 23:58:34,304 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:58:34,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1172 treesize of output 992 [2024-10-18 23:58:34,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:34,410 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:34,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:34,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:34,590 INFO L85 PathProgramCache]: Analyzing trace with hash 1427441495, now seen corresponding path program 1 times [2024-10-18 23:58:34,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:34,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:34,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:34,940 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:58:34,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:34,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:34,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:35,093 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:58:35,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:58:35,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1233473861, now seen corresponding path program 1 times [2024-10-18 23:58:35,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:35,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:35,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:35,550 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:58:35,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:35,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:35,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:35,685 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-10-18 23:58:36,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:36,186 INFO L85 PathProgramCache]: Analyzing trace with hash 1183678826, now seen corresponding path program 1 times [2024-10-18 23:58:36,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:36,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:36,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:36,932 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:36,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:36,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:36,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:37,212 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:37,479 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:58:37,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1116 treesize of output 984 [2024-10-18 23:58:37,511 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:37,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:37,640 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:37,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:37,655 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:37,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:58:37,669 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:39,807 INFO L85 PathProgramCache]: Analyzing trace with hash -1131705696, now seen corresponding path program 1 times [2024-10-18 23:58:39,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:39,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:39,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:40,470 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:40,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:40,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:40,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:40,907 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:41,429 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:58:41,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2378 treesize of output 2014 [2024-10-18 23:58:41,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:58:41,608 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:41,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:58:41,663 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:43,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1947774980, now seen corresponding path program 1 times [2024-10-18 23:58:43,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:43,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:43,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:44,404 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:44,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:44,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:44,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:44,768 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:44,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:44,973 INFO L85 PathProgramCache]: Analyzing trace with hash -1210736233, now seen corresponding path program 1 times [2024-10-18 23:58:44,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:44,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:45,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:45,499 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:58:45,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:45,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:46,049 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:58:46,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:46,381 INFO L85 PathProgramCache]: Analyzing trace with hash -1659055250, now seen corresponding path program 1 times [2024-10-18 23:58:46,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:46,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:46,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:47,096 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:47,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:47,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:47,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:47,637 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:48,153 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:58:48,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:58:48,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:48,330 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:48,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:58:48,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:58:50,549 INFO L85 PathProgramCache]: Analyzing trace with hash -871723494, now seen corresponding path program 1 times [2024-10-18 23:58:50,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:50,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:50,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:51,098 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:51,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:51,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:51,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:51,413 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 23:58:51,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:51,649 INFO L85 PathProgramCache]: Analyzing trace with hash 744669339, now seen corresponding path program 1 times [2024-10-18 23:58:51,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:51,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:51,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:52,033 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:58:52,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:52,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:52,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:52,507 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 23:58:52,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 321 treesize of output 297 [2024-10-18 23:58:55,062 INFO L85 PathProgramCache]: Analyzing trace with hash -1542933651, now seen corresponding path program 1 times [2024-10-18 23:58:55,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:55,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:55,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:55,504 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 23:58:55,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:55,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:55,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:55,930 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 23:58:56,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:58:56,057 INFO L85 PathProgramCache]: Analyzing trace with hash 63700985, now seen corresponding path program 1 times [2024-10-18 23:58:56,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:56,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:56,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:56,738 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:58:56,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:58:56,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:58:56,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:58:57,323 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:58:57,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 648 treesize of output 600 [2024-10-18 23:59:00,012 INFO L85 PathProgramCache]: Analyzing trace with hash -1099155484, now seen corresponding path program 1 times [2024-10-18 23:59:00,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:00,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:00,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:00,787 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 23:59:00,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:00,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:00,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:01,473 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 23:59:01,848 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:59:01,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:59:02,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:59:02,021 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:02,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:59:02,047 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:04,208 INFO L85 PathProgramCache]: Analyzing trace with hash 278774281, now seen corresponding path program 1 times [2024-10-18 23:59:04,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:04,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:04,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:04,747 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:59:04,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:04,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:04,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:05,154 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:59:05,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2024-10-18 23:59:05,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1547622287, now seen corresponding path program 1 times [2024-10-18 23:59:05,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:05,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:05,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:05,751 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:59:05,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:05,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:05,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:06,082 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-10-18 23:59:06,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:59:06,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1383256454, now seen corresponding path program 1 times [2024-10-18 23:59:06,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:06,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:06,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:07,413 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-10-18 23:59:07,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:07,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:07,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:08,318 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-10-18 23:59:08,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:59:08,593 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-10-18 23:59:08,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2250 treesize of output 1982 [2024-10-18 23:59:08,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:59:08,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:08,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:59:08,751 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:08,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2024-10-18 23:59:08,771 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:09,534 INFO L85 PathProgramCache]: Analyzing trace with hash 1105822740, now seen corresponding path program 1 times [2024-10-18 23:59:09,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:09,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:09,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:10,111 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-10-18 23:59:10,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:10,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:10,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:11,026 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-10-18 23:59:11,430 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:59:11,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 585 treesize of output 497 [2024-10-18 23:59:11,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:59:11,646 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:11,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2024-10-18 23:59:11,669 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-10-18 23:59:13,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1218492056, now seen corresponding path program 1 times [2024-10-18 23:59:13,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:13,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:13,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:14,657 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-10-18 23:59:14,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:14,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:14,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:15,584 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 157 trivial. 0 not checked. [2024-10-18 23:59:15,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-10-18 23:59:15,819 INFO L85 PathProgramCache]: Analyzing trace with hash 942608467, now seen corresponding path program 1 times [2024-10-18 23:59:15,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:15,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:15,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:17,285 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 267 trivial. 0 not checked. [2024-10-18 23:59:17,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 23:59:17,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 23:59:17,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 23:59:18,437 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 267 trivial. 0 not checked. [2024-10-18 23:59:18,914 INFO L349 Elim1Store]: treesize reduction 9, result has 30.8 percent of original size [2024-10-18 23:59:18,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2278 treesize of output 1914 [2024-10-18 23:59:19,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2024-10-18 23:59:19,096 INFO L190 IndexEqualityManager]: detected not equals via solver Killed by 15