./Ultimate.py --spec ../../../trunk/examples/svcomp/properties/unreach-call.prp --file ../../../trunk/examples/svcomp/weaver/popl20-more-buffer-mult.wvr.c --full-output --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking IA --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b86fb0b7 Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-buffer-mult.wvr.c -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e5124dd4a5a155d8a4e322a35428820633f9eccdd993e14120e650d1ba1fbebe --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking IA --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc /storage/repos/ultimate/releaseScripts/default/benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.conditional-comm-b86fb0b-m [2024-10-18 09:57:34,762 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-10-18 09:57:34,807 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2024-10-18 09:57:34,812 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-10-18 09:57:34,812 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-10-18 09:57:34,848 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-10-18 09:57:34,849 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-10-18 09:57:34,850 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-10-18 09:57:34,851 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-10-18 09:57:34,851 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-10-18 09:57:34,852 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-10-18 09:57:34,852 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-10-18 09:57:34,852 INFO L153 SettingsManager]: * Use SBE=true [2024-10-18 09:57:34,854 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-10-18 09:57:34,854 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-10-18 09:57:34,854 INFO L153 SettingsManager]: * sizeof long=4 [2024-10-18 09:57:34,854 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-10-18 09:57:34,855 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-10-18 09:57:34,855 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-10-18 09:57:34,855 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-10-18 09:57:34,855 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-10-18 09:57:34,858 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-10-18 09:57:34,858 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-10-18 09:57:34,858 INFO L153 SettingsManager]: * sizeof long double=12 [2024-10-18 09:57:34,858 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-10-18 09:57:34,858 INFO L153 SettingsManager]: * Use constant arrays=true [2024-10-18 09:57:34,858 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-10-18 09:57:34,858 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-10-18 09:57:34,859 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-10-18 09:57:34,859 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-10-18 09:57:34,859 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 09:57:34,859 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-10-18 09:57:34,859 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-10-18 09:57:34,859 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2024-10-18 09:57:34,859 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-10-18 09:57:34,860 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-10-18 09:57:34,860 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2024-10-18 09:57:34,860 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-10-18 09:57:34,860 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-10-18 09:57:34,860 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-10-18 09:57:34,860 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2024-10-18 09:57:34,862 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e5124dd4a5a155d8a4e322a35428820633f9eccdd993e14120e650d1ba1fbebe Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> IA Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-10-18 09:57:35,063 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-10-18 09:57:35,082 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-10-18 09:57:35,085 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-10-18 09:57:35,086 INFO L270 PluginConnector]: Initializing CDTParser... [2024-10-18 09:57:35,086 INFO L274 PluginConnector]: CDTParser initialized [2024-10-18 09:57:35,087 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-buffer-mult.wvr.c [2024-10-18 09:57:36,290 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-10-18 09:57:36,435 INFO L384 CDTParser]: Found 1 translation units. [2024-10-18 09:57:36,435 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-mult.wvr.c [2024-10-18 09:57:36,442 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/0b8667a59/a61cf5ce93d841a697db6fd05ed9b558/FLAG587b1c8a9 [2024-10-18 09:57:36,452 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/0b8667a59/a61cf5ce93d841a697db6fd05ed9b558 [2024-10-18 09:57:36,454 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-10-18 09:57:36,456 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-10-18 09:57:36,458 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-10-18 09:57:36,458 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-10-18 09:57:36,462 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-10-18 09:57:36,463 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,465 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@71651c4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36, skipping insertion in model container [2024-10-18 09:57:36,465 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,484 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-10-18 09:57:36,631 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-mult.wvr.c[4270,4283] [2024-10-18 09:57:36,639 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 09:57:36,646 INFO L200 MainTranslator]: Completed pre-run [2024-10-18 09:57:36,673 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-mult.wvr.c[4270,4283] [2024-10-18 09:57:36,681 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-10-18 09:57:36,699 INFO L204 MainTranslator]: Completed translation [2024-10-18 09:57:36,700 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36 WrapperNode [2024-10-18 09:57:36,700 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-10-18 09:57:36,701 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-10-18 09:57:36,701 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-10-18 09:57:36,701 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-10-18 09:57:36,705 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,712 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,733 INFO L138 Inliner]: procedures = 26, calls = 60, calls flagged for inlining = 18, calls inlined = 22, statements flattened = 296 [2024-10-18 09:57:36,733 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-10-18 09:57:36,733 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-10-18 09:57:36,734 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-10-18 09:57:36,734 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-10-18 09:57:36,745 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,745 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,752 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,752 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,758 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,761 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,763 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,764 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,766 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-10-18 09:57:36,767 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-10-18 09:57:36,767 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-10-18 09:57:36,767 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-10-18 09:57:36,768 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (1/1) ... [2024-10-18 09:57:36,772 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-10-18 09:57:36,782 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:57:36,795 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-10-18 09:57:36,797 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-10-18 09:57:36,827 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-10-18 09:57:36,827 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-10-18 09:57:36,828 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-10-18 09:57:36,828 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-10-18 09:57:36,828 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-10-18 09:57:36,828 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-10-18 09:57:36,828 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-10-18 09:57:36,829 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-10-18 09:57:36,829 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-10-18 09:57:36,829 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-10-18 09:57:36,829 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-10-18 09:57:36,831 WARN L207 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2024-10-18 09:57:36,917 INFO L238 CfgBuilder]: Building ICFG [2024-10-18 09:57:36,919 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-10-18 09:57:37,212 INFO L283 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2024-10-18 09:57:37,212 INFO L287 CfgBuilder]: Performing block encoding [2024-10-18 09:57:37,523 INFO L309 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-10-18 09:57:37,524 INFO L314 CfgBuilder]: Removed 6 assume(true) statements. [2024-10-18 09:57:37,524 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 09:57:37 BoogieIcfgContainer [2024-10-18 09:57:37,524 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-10-18 09:57:37,526 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-10-18 09:57:37,526 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-10-18 09:57:37,528 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-10-18 09:57:37,529 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.10 09:57:36" (1/3) ... [2024-10-18 09:57:37,529 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@185408b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 09:57:37, skipping insertion in model container [2024-10-18 09:57:37,529 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.10 09:57:36" (2/3) ... [2024-10-18 09:57:37,531 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@185408b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.10 09:57:37, skipping insertion in model container [2024-10-18 09:57:37,531 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.10 09:57:37" (3/3) ... [2024-10-18 09:57:37,532 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-buffer-mult.wvr.c [2024-10-18 09:57:37,544 INFO L209 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-10-18 09:57:37,545 INFO L149 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-10-18 09:57:37,545 INFO L484 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-10-18 09:57:37,584 INFO L143 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-10-18 09:57:37,621 INFO L106 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-10-18 09:57:37,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-10-18 09:57:37,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:57:37,624 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-10-18 09:57:37,625 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-10-18 09:57:37,707 INFO L194 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-10-18 09:57:37,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:57:37,721 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2024-10-18 09:57:37,726 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7d7ae6d, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=IA, mConComCheckerCriterion=DEFAULT, mConComCheckerTraceCheckMode=GENERATOR, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-10-18 09:57:37,727 INFO L334 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-10-18 09:57:39,362 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:57:39,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:57:39,365 INFO L85 PathProgramCache]: Analyzing trace with hash -186559353, now seen corresponding path program 1 times [2024-10-18 09:57:39,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:57:39,372 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664266558] [2024-10-18 09:57:39,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:39,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:39,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:40,242 INFO L134 CoverageAnalysis]: Checked inductivity of 457 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 448 trivial. 0 not checked. [2024-10-18 09:57:40,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:57:40,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1664266558] [2024-10-18 09:57:40,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1664266558] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 09:57:40,243 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 09:57:40,243 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-10-18 09:57:40,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417867279] [2024-10-18 09:57:40,246 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 09:57:40,250 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 09:57:40,251 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:57:41,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 09:57:41,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 09:57:41,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:41,666 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:57:41,667 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.25) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:57:41,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:41,751 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:41,751 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-10-18 09:57:41,752 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:57:41,752 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:57:41,752 INFO L85 PathProgramCache]: Analyzing trace with hash 2023229458, now seen corresponding path program 1 times [2024-10-18 09:57:41,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:57:41,753 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035132730] [2024-10-18 09:57:41,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:41,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:41,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:42,106 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 428 trivial. 0 not checked. [2024-10-18 09:57:42,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:57:42,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035132730] [2024-10-18 09:57:42,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1035132730] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 09:57:42,107 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-10-18 09:57:42,107 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-10-18 09:57:42,107 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733017439] [2024-10-18 09:57:42,107 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 09:57:42,108 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-10-18 09:57:42,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:57:43,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-10-18 09:57:43,309 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-10-18 09:57:43,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:43,310 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:57:43,310 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:57:43,310 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:43,310 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:43,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:43,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:43,398 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-10-18 09:57:43,399 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:57:43,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:57:43,399 INFO L85 PathProgramCache]: Analyzing trace with hash -1553029290, now seen corresponding path program 1 times [2024-10-18 09:57:43,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:57:43,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894477748] [2024-10-18 09:57:43,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:43,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:43,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:43,871 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 96 proven. 3 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2024-10-18 09:57:43,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:57:43,874 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894477748] [2024-10-18 09:57:43,874 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894477748] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:57:43,874 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [262995214] [2024-10-18 09:57:43,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:43,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:57:43,874 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:57:43,893 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:57:43,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-10-18 09:57:44,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:44,038 INFO L255 TraceCheckSpWp]: Trace formula consists of 669 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-18 09:57:44,044 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:57:44,131 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 98 proven. 1 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2024-10-18 09:57:44,131 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:57:44,245 INFO L134 CoverageAnalysis]: Checked inductivity of 459 backedges. 96 proven. 3 refuted. 0 times theorem prover too weak. 360 trivial. 0 not checked. [2024-10-18 09:57:44,246 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [262995214] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:57:44,246 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:57:44,246 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 13 [2024-10-18 09:57:44,246 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837928304] [2024-10-18 09:57:44,246 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:57:44,247 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-10-18 09:57:44,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:57:45,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-10-18 09:57:45,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2024-10-18 09:57:45,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:45,474 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:57:45,475 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 8.071428571428571) internal successors, (113), 13 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:57:45,475 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:45,475 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:45,475 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:45,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:45,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:45,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:57:45,673 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-10-18 09:57:45,856 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2024-10-18 09:57:45,857 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:57:45,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:57:45,858 INFO L85 PathProgramCache]: Analyzing trace with hash 340173857, now seen corresponding path program 2 times [2024-10-18 09:57:45,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:57:45,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577079432] [2024-10-18 09:57:45,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:45,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:45,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:46,258 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 235 proven. 86 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2024-10-18 09:57:46,258 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:57:46,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577079432] [2024-10-18 09:57:46,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [577079432] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:57:46,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1158625312] [2024-10-18 09:57:46,259 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-18 09:57:46,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:57:46,259 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:57:46,261 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:57:46,262 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-10-18 09:57:46,397 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-18 09:57:46,398 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:57:46,400 INFO L255 TraceCheckSpWp]: Trace formula consists of 678 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-10-18 09:57:46,403 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:57:46,472 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 115 proven. 1 refuted. 0 times theorem prover too weak. 345 trivial. 0 not checked. [2024-10-18 09:57:46,472 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:57:46,557 INFO L134 CoverageAnalysis]: Checked inductivity of 461 backedges. 109 proven. 7 refuted. 0 times theorem prover too weak. 345 trivial. 0 not checked. [2024-10-18 09:57:46,557 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1158625312] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:57:46,558 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:57:46,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2024-10-18 09:57:46,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423187457] [2024-10-18 09:57:46,558 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:57:46,558 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-10-18 09:57:46,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:57:47,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-10-18 09:57:47,725 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2024-10-18 09:57:47,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:47,725 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:57:47,725 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 8.916666666666666) internal successors, (107), 12 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:57:47,725 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:47,725 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:47,725 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:57:47,725 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:57:47,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:47,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:57:47,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:57:47,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:57:47,868 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-10-18 09:57:48,055 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:57:48,056 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:57:48,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:57:48,056 INFO L85 PathProgramCache]: Analyzing trace with hash 2106821927, now seen corresponding path program 3 times [2024-10-18 09:57:48,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:57:48,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103881965] [2024-10-18 09:57:48,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:48,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:48,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:48,415 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 273 proven. 77 refuted. 0 times theorem prover too weak. 113 trivial. 0 not checked. [2024-10-18 09:57:48,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:57:48,416 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103881965] [2024-10-18 09:57:48,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103881965] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:57:48,416 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [700283729] [2024-10-18 09:57:48,416 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-18 09:57:48,416 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:57:48,417 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:57:48,418 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:57:48,419 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-10-18 09:57:48,536 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-10-18 09:57:48,536 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:57:48,538 INFO L255 TraceCheckSpWp]: Trace formula consists of 372 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-10-18 09:57:48,541 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:57:48,746 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 135 proven. 3 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2024-10-18 09:57:48,746 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:57:48,943 INFO L134 CoverageAnalysis]: Checked inductivity of 463 backedges. 30 proven. 108 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2024-10-18 09:57:48,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [700283729] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:57:48,944 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:57:48,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 19 [2024-10-18 09:57:48,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288336723] [2024-10-18 09:57:48,944 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:57:48,945 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-10-18 09:57:48,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:57:49,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 09:57:49,156 INFO L85 PathProgramCache]: Analyzing trace with hash 66412661, now seen corresponding path program 1 times [2024-10-18 09:57:49,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:49,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:49,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:57:49,241 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:57:49,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:57:49,422 INFO L85 PathProgramCache]: Analyzing trace with hash 2058784469, now seen corresponding path program 1 times [2024-10-18 09:57:49,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:49,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:49,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:57:49,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:57:49,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:57:49,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:57:49,710 INFO L85 PathProgramCache]: Analyzing trace with hash 636978188, now seen corresponding path program 1 times [2024-10-18 09:57:49,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:49,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:49,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:57:49,758 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:57:49,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:57:49,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1728521073, now seen corresponding path program 1 times [2024-10-18 09:57:49,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:49,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:49,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:49,946 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 09:57:49,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:49,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:49,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:50,010 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-10-18 09:57:50,116 INFO L85 PathProgramCache]: Analyzing trace with hash -1958674526, now seen corresponding path program 1 times [2024-10-18 09:57:50,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:50,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:50,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:50,323 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 09:57:50,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:50,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:50,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:50,468 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 09:57:50,556 INFO L85 PathProgramCache]: Analyzing trace with hash -2135954967, now seen corresponding path program 1 times [2024-10-18 09:57:50,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:50,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:50,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:50,709 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 09:57:50,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:50,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:50,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:50,845 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-10-18 09:57:51,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 09:57:51,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1651243608, now seen corresponding path program 1 times [2024-10-18 09:57:51,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:51,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:51,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:51,241 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:51,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:51,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:51,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:51,433 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:51,520 INFO L85 PathProgramCache]: Analyzing trace with hash -351064206, now seen corresponding path program 1 times [2024-10-18 09:57:51,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:51,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:51,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:51,728 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:51,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:51,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:51,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:51,940 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:52,252 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:57:52,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:57:54,950 INFO L85 PathProgramCache]: Analyzing trace with hash -316507798, now seen corresponding path program 1 times [2024-10-18 09:57:54,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:54,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:54,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:55,230 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:55,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:55,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:55,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:55,410 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:55,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1221815425, now seen corresponding path program 1 times [2024-10-18 09:57:55,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:55,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:55,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:55,709 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:55,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:57:55,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:57:55,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:57:55,905 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:57:56,222 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:57:56,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:07,550 WARN L286 SmtUtils]: Spent 6.45s on a formula simplification. DAG size of input: 37 DAG size of output: 33 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 09:58:07,551 INFO L85 PathProgramCache]: Analyzing trace with hash 1347725446, now seen corresponding path program 1 times [2024-10-18 09:58:07,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:07,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:07,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:07,871 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:58:07,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:07,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:07,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:08,094 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-10-18 09:58:08,394 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:08,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:13,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1033526747, now seen corresponding path program 1 times [2024-10-18 09:58:13,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:13,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:13,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:13,529 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 09:58:13,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:13,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:13,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:13,709 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 09:58:13,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1081484646, now seen corresponding path program 1 times [2024-10-18 09:58:13,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:13,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:13,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:14,044 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 09:58:14,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:14,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:14,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:14,216 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 09:58:14,376 INFO L85 PathProgramCache]: Analyzing trace with hash 339432197, now seen corresponding path program 1 times [2024-10-18 09:58:14,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:14,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:14,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:14,587 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 09:58:14,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:14,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:14,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:14,787 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-10-18 09:58:15,049 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:15,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:16,385 INFO L85 PathProgramCache]: Analyzing trace with hash -3209318, now seen corresponding path program 1 times [2024-10-18 09:58:16,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:16,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:16,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:16,653 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 09:58:16,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:16,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:16,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:16,834 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-10-18 09:58:17,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-10-18 09:58:17,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2024-10-18 09:58:17,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:17,253 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:58:17,253 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 9.8) internal successors, (196), 21 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:58:17,254 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:17,254 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:17,254 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:17,254 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:17,254 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:18,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:18,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:18,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:18,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:18,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:18,176 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-10-18 09:58:18,363 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable4,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17,SelfDestructingSolverStorable20,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-10-18 09:58:18,364 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:58:18,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:58:18,364 INFO L85 PathProgramCache]: Analyzing trace with hash -114993234, now seen corresponding path program 4 times [2024-10-18 09:58:18,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:58:18,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594286075] [2024-10-18 09:58:18,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:18,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:18,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:18,814 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 349 proven. 12 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2024-10-18 09:58:18,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:58:18,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594286075] [2024-10-18 09:58:18,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1594286075] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:58:18,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [495275759] [2024-10-18 09:58:18,815 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-18 09:58:18,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:58:18,815 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:58:18,816 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:58:18,817 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-10-18 09:58:18,986 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-18 09:58:18,986 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:58:18,989 INFO L255 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-10-18 09:58:18,991 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:58:19,320 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 419 proven. 6 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2024-10-18 09:58:19,320 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:58:19,588 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 321 proven. 104 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2024-10-18 09:58:19,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [495275759] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:58:19,589 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:58:19,589 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10] total 26 [2024-10-18 09:58:19,589 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108396174] [2024-10-18 09:58:19,589 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:58:19,589 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-10-18 09:58:19,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:58:19,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 09:58:19,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1025412887, now seen corresponding path program 1 times [2024-10-18 09:58:19,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:19,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:19,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:19,784 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:19,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:19,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1723017911, now seen corresponding path program 1 times [2024-10-18 09:58:19,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:19,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:19,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:19,969 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:20,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:20,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:58:20,216 INFO L85 PathProgramCache]: Analyzing trace with hash -2126811346, now seen corresponding path program 1 times [2024-10-18 09:58:20,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:20,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:20,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:20,262 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:20,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:20,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 09:58:20,503 INFO L85 PathProgramCache]: Analyzing trace with hash 1260405508, now seen corresponding path program 1 times [2024-10-18 09:58:20,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:20,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:20,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:20,778 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 13 proven. 15 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 09:58:20,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:20,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:20,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:20,926 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 13 proven. 15 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-10-18 09:58:20,979 INFO L85 PathProgramCache]: Analyzing trace with hash 417854300, now seen corresponding path program 1 times [2024-10-18 09:58:20,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:20,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:20,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:21,163 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 09:58:21,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:21,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:21,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:21,325 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 09:58:21,647 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:21,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:22,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1457367219, now seen corresponding path program 1 times [2024-10-18 09:58:22,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:22,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:22,306 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 22 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 09:58:22,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:22,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:22,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:22,489 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 22 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 09:58:22,752 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:22,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:25,299 INFO L85 PathProgramCache]: Analyzing trace with hash -175596401, now seen corresponding path program 1 times [2024-10-18 09:58:25,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:25,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:25,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:25,505 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 09:58:25,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:25,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:25,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:25,744 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 09:58:25,795 INFO L85 PathProgramCache]: Analyzing trace with hash -1148531726, now seen corresponding path program 1 times [2024-10-18 09:58:25,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:25,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:25,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:25,989 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-10-18 09:58:25,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:25,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:26,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:26,160 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-10-18 09:58:26,242 INFO L85 PathProgramCache]: Analyzing trace with hash -1244755943, now seen corresponding path program 1 times [2024-10-18 09:58:26,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:26,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:26,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:26,441 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 09:58:26,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:26,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:26,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:26,605 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 09:58:26,654 INFO L85 PathProgramCache]: Analyzing trace with hash 67260565, now seen corresponding path program 1 times [2024-10-18 09:58:26,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:26,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:26,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:26,819 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 09:58:26,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:26,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:26,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:27,049 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-10-18 09:58:27,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-10-18 09:58:27,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=1121, Unknown=0, NotChecked=0, Total=1332 [2024-10-18 09:58:27,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:27,488 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:58:27,488 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 8.222222222222221) internal successors, (222), 26 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:58:27,488 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:27,488 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:27,488 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:27,488 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:27,488 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:27,488 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:27,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:27,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:27,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:27,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:27,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:27,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:27,655 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-10-18 09:58:27,842 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable32,SelfDestructingSolverStorable43,SelfDestructingSolverStorable33,SelfDestructingSolverStorable44,SelfDestructingSolverStorable34,SelfDestructingSolverStorable45,SelfDestructingSolverStorable35,SelfDestructingSolverStorable46,SelfDestructingSolverStorable36,SelfDestructingSolverStorable47,SelfDestructingSolverStorable37,SelfDestructingSolverStorable48,SelfDestructingSolverStorable38,SelfDestructingSolverStorable49,SelfDestructingSolverStorable39 [2024-10-18 09:58:27,842 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:58:27,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:58:27,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1302978830, now seen corresponding path program 5 times [2024-10-18 09:58:27,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:58:27,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048250513] [2024-10-18 09:58:27,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:27,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:27,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:28,339 INFO L134 CoverageAnalysis]: Checked inductivity of 546 backedges. 68 proven. 347 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2024-10-18 09:58:28,340 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:58:28,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048250513] [2024-10-18 09:58:28,340 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1048250513] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:58:28,340 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1243797871] [2024-10-18 09:58:28,340 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-18 09:58:28,340 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:58:28,341 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:58:28,342 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:58:28,343 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-10-18 09:58:28,679 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2024-10-18 09:58:28,679 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:58:28,683 INFO L255 TraceCheckSpWp]: Trace formula consists of 741 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-10-18 09:58:28,685 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:58:28,827 INFO L134 CoverageAnalysis]: Checked inductivity of 546 backedges. 335 proven. 58 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2024-10-18 09:58:28,827 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:58:29,324 INFO L134 CoverageAnalysis]: Checked inductivity of 546 backedges. 162 proven. 351 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-10-18 09:58:29,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1243797871] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:58:29,324 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:58:29,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 5, 19] total 36 [2024-10-18 09:58:29,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187307426] [2024-10-18 09:58:29,325 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:58:29,325 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-10-18 09:58:29,325 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:58:29,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 09:58:29,492 INFO L85 PathProgramCache]: Analyzing trace with hash -11698019, now seen corresponding path program 1 times [2024-10-18 09:58:29,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:29,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:29,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:29,556 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:29,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:29,677 INFO L85 PathProgramCache]: Analyzing trace with hash -362650241, now seen corresponding path program 1 times [2024-10-18 09:58:29,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:29,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:29,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:29,739 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:29,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:29,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:58:29,943 INFO L85 PathProgramCache]: Analyzing trace with hash 2130457078, now seen corresponding path program 1 times [2024-10-18 09:58:29,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:29,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:29,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:29,987 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:30,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:30,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:58:30,288 INFO L85 PathProgramCache]: Analyzing trace with hash -890716832, now seen corresponding path program 1 times [2024-10-18 09:58:30,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:30,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:30,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:30,545 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 09:58:30,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:30,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:30,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:30,696 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 09:58:30,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 09:58:30,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1845710287, now seen corresponding path program 1 times [2024-10-18 09:58:30,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:30,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:30,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:30,993 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 13 proven. 15 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 09:58:30,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:30,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:31,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:31,129 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 13 proven. 15 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-10-18 09:58:31,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1382431977, now seen corresponding path program 1 times [2024-10-18 09:58:31,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:31,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:31,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:31,415 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 09:58:31,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:31,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:31,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:31,573 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 09:58:31,891 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:31,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:34,726 INFO L85 PathProgramCache]: Analyzing trace with hash -1850328192, now seen corresponding path program 1 times [2024-10-18 09:58:34,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:34,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:34,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:34,943 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 22 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 09:58:34,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:34,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:34,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:35,106 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 22 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-10-18 09:58:35,406 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:35,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:37,843 INFO L85 PathProgramCache]: Analyzing trace with hash -163402212, now seen corresponding path program 1 times [2024-10-18 09:58:37,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:37,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:37,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:38,000 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:38,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:38,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:38,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:38,225 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:38,318 INFO L85 PathProgramCache]: Analyzing trace with hash -770513215, now seen corresponding path program 1 times [2024-10-18 09:58:38,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:38,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:38,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:38,555 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-10-18 09:58:38,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:38,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:38,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:38,724 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 4 proven. 15 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-10-18 09:58:38,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:58:38,874 INFO L85 PathProgramCache]: Analyzing trace with hash 1883881896, now seen corresponding path program 1 times [2024-10-18 09:58:38,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:38,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:38,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:39,044 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:39,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:39,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:39,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:39,236 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:39,313 INFO L85 PathProgramCache]: Analyzing trace with hash 1883881899, now seen corresponding path program 1 times [2024-10-18 09:58:39,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:39,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:39,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:39,474 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:39,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:39,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:39,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:39,635 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:39,703 INFO L85 PathProgramCache]: Analyzing trace with hash -1729215639, now seen corresponding path program 1 times [2024-10-18 09:58:39,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:39,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:39,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:39,818 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-10-18 09:58:39,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:39,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:39,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:39,935 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-10-18 09:58:40,006 INFO L85 PathProgramCache]: Analyzing trace with hash -130829986, now seen corresponding path program 1 times [2024-10-18 09:58:40,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:40,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:40,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:40,207 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:40,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:40,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:40,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:40,388 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 5 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-10-18 09:58:40,672 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:40,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:42,010 INFO L85 PathProgramCache]: Analyzing trace with hash -610142669, now seen corresponding path program 1 times [2024-10-18 09:58:42,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:42,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:42,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:42,241 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 09:58:42,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:42,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:42,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:42,438 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 09:58:42,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1771264653, now seen corresponding path program 1 times [2024-10-18 09:58:42,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:42,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:42,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:42,853 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 14 proven. 46 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 09:58:42,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:42,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:42,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:43,247 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 14 proven. 46 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-10-18 09:58:43,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-10-18 09:58:43,562 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=298, Invalid=2152, Unknown=0, NotChecked=0, Total=2450 [2024-10-18 09:58:43,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:43,562 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:58:43,562 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 8.027027027027026) internal successors, (297), 36 states have internal predecessors, (297), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:58:43,562 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:43,562 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:43,563 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:43,563 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:43,563 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:43,563 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:43,563 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:44,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:44,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:44,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:44,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:44,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:44,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:44,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:58:44,796 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2024-10-18 09:58:44,982 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable50,SelfDestructingSolverStorable72,SelfDestructingSolverStorable51,SelfDestructingSolverStorable73,SelfDestructingSolverStorable52,SelfDestructingSolverStorable74,SelfDestructingSolverStorable53,SelfDestructingSolverStorable75,7 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54,SelfDestructingSolverStorable76,SelfDestructingSolverStorable55,SelfDestructingSolverStorable77,SelfDestructingSolverStorable56,SelfDestructingSolverStorable57,SelfDestructingSolverStorable58,SelfDestructingSolverStorable59,SelfDestructingSolverStorable60,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable65,SelfDestructingSolverStorable66,SelfDestructingSolverStorable67,SelfDestructingSolverStorable68,SelfDestructingSolverStorable69 [2024-10-18 09:58:44,983 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:58:44,983 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:58:44,983 INFO L85 PathProgramCache]: Analyzing trace with hash 786857464, now seen corresponding path program 6 times [2024-10-18 09:58:44,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:58:44,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091127260] [2024-10-18 09:58:44,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:44,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:45,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:45,431 INFO L134 CoverageAnalysis]: Checked inductivity of 466 backedges. 100 proven. 296 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-10-18 09:58:45,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:58:45,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091127260] [2024-10-18 09:58:45,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091127260] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:58:45,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [785396498] [2024-10-18 09:58:45,432 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-18 09:58:45,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:58:45,432 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:58:45,435 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:58:45,436 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-10-18 09:58:45,656 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2024-10-18 09:58:45,656 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:58:45,658 INFO L255 TraceCheckSpWp]: Trace formula consists of 423 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-10-18 09:58:45,660 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:58:45,851 INFO L134 CoverageAnalysis]: Checked inductivity of 466 backedges. 274 proven. 6 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2024-10-18 09:58:45,851 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:58:46,051 INFO L134 CoverageAnalysis]: Checked inductivity of 466 backedges. 228 proven. 52 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2024-10-18 09:58:46,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [785396498] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:58:46,051 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:58:46,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 10, 10] total 33 [2024-10-18 09:58:46,052 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281599400] [2024-10-18 09:58:46,052 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:58:46,052 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2024-10-18 09:58:46,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:58:46,135 INFO L85 PathProgramCache]: Analyzing trace with hash 487112306, now seen corresponding path program 1 times [2024-10-18 09:58:46,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:46,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:46,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:46,178 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:46,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:46,351 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-10-18 09:58:46,351 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=909, Unknown=0, NotChecked=0, Total=1056 [2024-10-18 09:58:46,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:46,352 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:58:46,352 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 6.7272727272727275) internal successors, (222), 33 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:46,352 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:58:46,353 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:46,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:46,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:46,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:46,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:46,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:46,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:46,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:58:46,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:58:46,631 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-10-18 09:58:46,817 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable78,SelfDestructingSolverStorable79 [2024-10-18 09:58:46,818 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:58:46,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:58:46,818 INFO L85 PathProgramCache]: Analyzing trace with hash -1562816505, now seen corresponding path program 7 times [2024-10-18 09:58:46,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:58:46,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [948537287] [2024-10-18 09:58:46,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:46,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:46,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:47,306 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 136 proven. 300 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-10-18 09:58:47,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:58:47,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [948537287] [2024-10-18 09:58:47,307 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [948537287] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:58:47,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [147055896] [2024-10-18 09:58:47,307 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-10-18 09:58:47,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:58:47,307 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:58:47,308 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:58:47,309 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-10-18 09:58:47,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:47,474 INFO L255 TraceCheckSpWp]: Trace formula consists of 650 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-10-18 09:58:47,476 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:58:47,752 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 323 proven. 10 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2024-10-18 09:58:47,752 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:58:48,021 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 264 proven. 69 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2024-10-18 09:58:48,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [147055896] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:58:48,021 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:58:48,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 12, 12] total 39 [2024-10-18 09:58:48,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1175461897] [2024-10-18 09:58:48,021 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:58:48,022 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2024-10-18 09:58:48,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:58:48,134 INFO L85 PathProgramCache]: Analyzing trace with hash 856155400, now seen corresponding path program 1 times [2024-10-18 09:58:48,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:48,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:48,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:48,222 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:48,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:48,532 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:48,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:58:55,627 INFO L85 PathProgramCache]: Analyzing trace with hash -886536135, now seen corresponding path program 1 times [2024-10-18 09:58:55,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:55,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:55,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:55,695 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:55,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:55,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2024-10-18 09:58:55,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=1280, Unknown=0, NotChecked=0, Total=1482 [2024-10-18 09:58:55,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:55,816 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:58:55,816 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 6.871794871794871) internal successors, (268), 39 states have internal predecessors, (268), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:58:55,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:55,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:55,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:55,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:55,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:55,816 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:55,817 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:58:55,817 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:58:55,817 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:58:56,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:58:56,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:58:56,086 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-10-18 09:58:56,269 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,9 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:58:56,269 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:58:56,270 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:58:56,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1682480792, now seen corresponding path program 8 times [2024-10-18 09:58:56,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:58:56,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274059589] [2024-10-18 09:58:56,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:56,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:56,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:58:56,830 INFO L134 CoverageAnalysis]: Checked inductivity of 490 backedges. 183 proven. 282 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-10-18 09:58:56,830 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:58:56,831 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274059589] [2024-10-18 09:58:56,831 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274059589] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:58:56,831 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [496333335] [2024-10-18 09:58:56,831 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-18 09:58:56,831 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:58:56,831 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:58:56,832 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:58:56,833 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-10-18 09:58:57,003 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-18 09:58:57,004 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:58:57,005 INFO L255 TraceCheckSpWp]: Trace formula consists of 668 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-10-18 09:58:57,007 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:58:57,345 INFO L134 CoverageAnalysis]: Checked inductivity of 490 backedges. 361 proven. 15 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-10-18 09:58:57,345 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:58:57,682 INFO L134 CoverageAnalysis]: Checked inductivity of 490 backedges. 285 proven. 91 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-10-18 09:58:57,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [496333335] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:58:57,682 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:58:57,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 14, 14] total 45 [2024-10-18 09:58:57,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1292895214] [2024-10-18 09:58:57,682 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:58:57,683 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2024-10-18 09:58:57,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:58:57,772 INFO L85 PathProgramCache]: Analyzing trace with hash 174657313, now seen corresponding path program 1 times [2024-10-18 09:58:57,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:58:57,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:58:57,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:57,867 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:58:57,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:58:58,221 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:58:58,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:59:00,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1472291952, now seen corresponding path program 1 times [2024-10-18 09:59:00,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:00,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:00,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:00,783 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:59:00,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:00,905 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2024-10-18 09:59:00,906 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=267, Invalid=1713, Unknown=0, NotChecked=0, Total=1980 [2024-10-18 09:59:00,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:59:00,906 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:59:00,907 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 45 states have (on average 6.733333333333333) internal successors, (303), 45 states have internal predecessors, (303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:59:00,907 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:59:01,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:01,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:01,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:01,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:01,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:59:01,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:59:01,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:59:01,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:59:01,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:59:01,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 09:59:01,254 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-10-18 09:59:01,441 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,10 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:59:01,442 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:59:01,442 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:59:01,442 INFO L85 PathProgramCache]: Analyzing trace with hash -447852313, now seen corresponding path program 9 times [2024-10-18 09:59:01,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:59:01,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600326723] [2024-10-18 09:59:01,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:01,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:01,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:02,064 INFO L134 CoverageAnalysis]: Checked inductivity of 505 backedges. 243 proven. 241 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-10-18 09:59:02,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:59:02,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600326723] [2024-10-18 09:59:02,064 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [600326723] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:59:02,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [987406799] [2024-10-18 09:59:02,064 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-18 09:59:02,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:59:02,065 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:59:02,066 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:59:02,066 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-10-18 09:59:02,373 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-10-18 09:59:02,373 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:59:02,376 INFO L255 TraceCheckSpWp]: Trace formula consists of 473 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-10-18 09:59:02,378 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:59:02,541 INFO L134 CoverageAnalysis]: Checked inductivity of 505 backedges. 180 proven. 6 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2024-10-18 09:59:02,541 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:59:02,747 INFO L134 CoverageAnalysis]: Checked inductivity of 505 backedges. 175 proven. 11 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2024-10-18 09:59:02,747 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [987406799] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:59:02,747 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:59:02,747 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 9, 11] total 40 [2024-10-18 09:59:02,747 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1147593919] [2024-10-18 09:59:02,747 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:59:02,748 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2024-10-18 09:59:02,748 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:59:02,852 INFO L85 PathProgramCache]: Analyzing trace with hash -607914504, now seen corresponding path program 1 times [2024-10-18 09:59:02,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:02,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:02,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:02,925 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:59:02,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:03,319 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:59:03,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:59:06,070 INFO L85 PathProgramCache]: Analyzing trace with hash 1414065001, now seen corresponding path program 1 times [2024-10-18 09:59:06,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:06,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:06,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:06,136 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:59:06,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:06,301 INFO L85 PathProgramCache]: Analyzing trace with hash 257864137, now seen corresponding path program 1 times [2024-10-18 09:59:06,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:06,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:06,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:06,699 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 35 proven. 51 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-10-18 09:59:06,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:06,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:06,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:06,952 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 35 proven. 51 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-10-18 09:59:06,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2024-10-18 09:59:06,954 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=1839, Unknown=0, NotChecked=0, Total=2070 [2024-10-18 09:59:06,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:59:06,954 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:59:06,954 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 5.4) internal successors, (216), 40 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:59:06,954 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-10-18 09:59:06,955 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:59:07,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:59:07,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 09:59:07,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-10-18 09:59:07,581 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-10-18 09:59:07,767 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable90,SelfDestructingSolverStorable86,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89 [2024-10-18 09:59:07,767 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:59:07,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:59:07,768 INFO L85 PathProgramCache]: Analyzing trace with hash 126008291, now seen corresponding path program 10 times [2024-10-18 09:59:07,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:59:07,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563491150] [2024-10-18 09:59:07,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:07,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:07,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:08,159 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 249 proven. 3 refuted. 0 times theorem prover too weak. 202 trivial. 0 not checked. [2024-10-18 09:59:08,159 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:59:08,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563491150] [2024-10-18 09:59:08,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1563491150] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:59:08,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [171634977] [2024-10-18 09:59:08,159 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-10-18 09:59:08,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:59:08,159 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:59:08,160 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:59:08,161 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-10-18 09:59:08,348 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-10-18 09:59:08,348 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:59:08,351 INFO L255 TraceCheckSpWp]: Trace formula consists of 691 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-10-18 09:59:08,353 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:59:08,482 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 242 proven. 57 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2024-10-18 09:59:08,483 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:59:08,673 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 230 proven. 69 refuted. 0 times theorem prover too weak. 155 trivial. 0 not checked. [2024-10-18 09:59:08,674 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [171634977] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:59:08,674 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:59:08,674 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 8, 8] total 16 [2024-10-18 09:59:08,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948721507] [2024-10-18 09:59:08,674 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:59:08,675 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-10-18 09:59:08,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:59:08,984 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:59:08,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:59:14,070 INFO L85 PathProgramCache]: Analyzing trace with hash -1149182258, now seen corresponding path program 1 times [2024-10-18 09:59:14,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:14,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:14,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:14,120 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:59:14,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:14,277 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-10-18 09:59:14,277 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=171, Unknown=0, NotChecked=0, Total=240 [2024-10-18 09:59:14,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:59:14,278 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 09:59:14,278 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 13.5625) internal successors, (217), 16 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:59:14,278 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-10-18 09:59:14,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:59:14,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:59:14,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-10-18 09:59:14,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 27 states. [2024-10-18 09:59:14,279 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 09:59:22,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 09:59:22,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-10-18 09:59:22,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-10-18 09:59:22,531 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-10-18 09:59:22,717 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,12 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:59:22,718 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 09:59:22,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 09:59:22,718 INFO L85 PathProgramCache]: Analyzing trace with hash 867746753, now seen corresponding path program 11 times [2024-10-18 09:59:22,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 09:59:22,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122681402] [2024-10-18 09:59:22,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:22,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:23,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:25,581 INFO L134 CoverageAnalysis]: Checked inductivity of 14317 backedges. 1576 proven. 4353 refuted. 0 times theorem prover too weak. 8388 trivial. 0 not checked. [2024-10-18 09:59:25,582 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 09:59:25,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122681402] [2024-10-18 09:59:25,582 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2122681402] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 09:59:25,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1782380720] [2024-10-18 09:59:25,582 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-10-18 09:59:25,582 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 09:59:25,582 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 09:59:25,583 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 09:59:25,584 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-10-18 09:59:37,281 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2024-10-18 09:59:37,281 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 09:59:37,306 INFO L255 TraceCheckSpWp]: Trace formula consists of 2472 conjuncts, 84 conjuncts are in the unsatisfiable core [2024-10-18 09:59:37,317 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 09:59:37,957 INFO L134 CoverageAnalysis]: Checked inductivity of 14317 backedges. 6546 proven. 4047 refuted. 0 times theorem prover too weak. 3724 trivial. 0 not checked. [2024-10-18 09:59:37,957 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 09:59:41,609 INFO L134 CoverageAnalysis]: Checked inductivity of 14317 backedges. 900 proven. 13299 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2024-10-18 09:59:41,609 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1782380720] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 09:59:41,610 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 09:59:41,610 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 6, 84] total 111 [2024-10-18 09:59:41,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667806666] [2024-10-18 09:59:41,610 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 09:59:41,611 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 112 states [2024-10-18 09:59:41,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 09:59:41,917 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:59:41,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:59:54,183 WARN L286 SmtUtils]: Spent 7.51s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 09:59:54,184 INFO L85 PathProgramCache]: Analyzing trace with hash -1149181895, now seen corresponding path program 1 times [2024-10-18 09:59:54,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:54,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:54,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:54,267 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:59:54,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:54,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:59:54,523 INFO L85 PathProgramCache]: Analyzing trace with hash -1046759353, now seen corresponding path program 1 times [2024-10-18 09:59:54,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:54,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:54,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:54,642 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 09:59:54,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 09:59:54,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:59:54,956 INFO L85 PathProgramCache]: Analyzing trace with hash 1317571677, now seen corresponding path program 1 times [2024-10-18 09:59:54,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:54,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:54,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:55,572 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 167 proven. 64 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-10-18 09:59:55,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:55,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:55,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:55,896 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 167 proven. 64 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-10-18 09:59:56,161 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 09:59:56,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 09:59:58,624 INFO L85 PathProgramCache]: Analyzing trace with hash -168813483, now seen corresponding path program 1 times [2024-10-18 09:59:58,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:58,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:58,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:59,094 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 100 proven. 133 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2024-10-18 09:59:59,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:59,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:59,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:59,438 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 100 proven. 133 refuted. 0 times theorem prover too weak. 82 trivial. 0 not checked. [2024-10-18 09:59:59,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 09:59:59,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1971614243, now seen corresponding path program 1 times [2024-10-18 09:59:59,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:59,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 09:59:59,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 09:59:59,990 INFO L134 CoverageAnalysis]: Checked inductivity of 421 backedges. 81 proven. 231 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2024-10-18 09:59:59,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 09:59:59,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:00,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:00,415 INFO L134 CoverageAnalysis]: Checked inductivity of 421 backedges. 81 proven. 231 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2024-10-18 10:00:00,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:00:00,614 INFO L85 PathProgramCache]: Analyzing trace with hash 107856441, now seen corresponding path program 1 times [2024-10-18 10:00:00,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:00,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:00,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:01,099 INFO L134 CoverageAnalysis]: Checked inductivity of 664 backedges. 75 proven. 328 refuted. 0 times theorem prover too weak. 261 trivial. 0 not checked. [2024-10-18 10:00:01,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:01,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:01,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:01,565 INFO L134 CoverageAnalysis]: Checked inductivity of 664 backedges. 75 proven. 328 refuted. 0 times theorem prover too weak. 261 trivial. 0 not checked. [2024-10-18 10:00:01,829 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:00:01,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:00:08,616 INFO L85 PathProgramCache]: Analyzing trace with hash -2076229225, now seen corresponding path program 1 times [2024-10-18 10:00:08,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:08,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:08,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:09,093 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 95 proven. 328 refuted. 0 times theorem prover too weak. 261 trivial. 0 not checked. [2024-10-18 10:00:09,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:09,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:09,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:09,611 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 95 proven. 328 refuted. 0 times theorem prover too weak. 261 trivial. 0 not checked. [2024-10-18 10:00:09,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:00:09,856 INFO L85 PathProgramCache]: Analyzing trace with hash -741123577, now seen corresponding path program 1 times [2024-10-18 10:00:09,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:09,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:09,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:10,399 INFO L134 CoverageAnalysis]: Checked inductivity of 710 backedges. 95 proven. 328 refuted. 0 times theorem prover too weak. 287 trivial. 0 not checked. [2024-10-18 10:00:10,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:10,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:10,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:10,994 INFO L134 CoverageAnalysis]: Checked inductivity of 710 backedges. 95 proven. 328 refuted. 0 times theorem prover too weak. 287 trivial. 0 not checked. [2024-10-18 10:00:11,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:00:11,219 INFO L85 PathProgramCache]: Analyzing trace with hash 337064411, now seen corresponding path program 1 times [2024-10-18 10:00:11,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:11,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:11,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:12,265 INFO L134 CoverageAnalysis]: Checked inductivity of 1025 backedges. 175 proven. 581 refuted. 0 times theorem prover too weak. 269 trivial. 0 not checked. [2024-10-18 10:00:12,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:12,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:12,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:13,183 INFO L134 CoverageAnalysis]: Checked inductivity of 1025 backedges. 175 proven. 581 refuted. 0 times theorem prover too weak. 269 trivial. 0 not checked. [2024-10-18 10:00:13,493 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:00:13,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:00:16,593 INFO L85 PathProgramCache]: Analyzing trace with hash -1095212015, now seen corresponding path program 1 times [2024-10-18 10:00:16,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:16,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:16,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:17,623 INFO L134 CoverageAnalysis]: Checked inductivity of 1282 backedges. 201 proven. 700 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 10:00:17,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:17,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:17,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:18,599 INFO L134 CoverageAnalysis]: Checked inductivity of 1282 backedges. 201 proven. 700 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 10:00:18,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:00:18,788 INFO L85 PathProgramCache]: Analyzing trace with hash -231698393, now seen corresponding path program 1 times [2024-10-18 10:00:18,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:18,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:18,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:19,949 INFO L134 CoverageAnalysis]: Checked inductivity of 1283 backedges. 143 proven. 759 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 10:00:19,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:19,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:20,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:20,974 INFO L134 CoverageAnalysis]: Checked inductivity of 1283 backedges. 143 proven. 759 refuted. 0 times theorem prover too weak. 381 trivial. 0 not checked. [2024-10-18 10:00:21,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:00:21,172 INFO L85 PathProgramCache]: Analyzing trace with hash -248944100, now seen corresponding path program 1 times [2024-10-18 10:00:21,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:21,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:21,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:22,204 INFO L134 CoverageAnalysis]: Checked inductivity of 1297 backedges. 140 proven. 619 refuted. 0 times theorem prover too weak. 538 trivial. 0 not checked. [2024-10-18 10:00:22,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:22,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:22,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:23,263 INFO L134 CoverageAnalysis]: Checked inductivity of 1297 backedges. 140 proven. 619 refuted. 0 times theorem prover too weak. 538 trivial. 0 not checked. [2024-10-18 10:00:23,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:00:23,482 INFO L85 PathProgramCache]: Analyzing trace with hash 1320449520, now seen corresponding path program 1 times [2024-10-18 10:00:23,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:23,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:23,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:24,423 INFO L134 CoverageAnalysis]: Checked inductivity of 1736 backedges. 829 proven. 408 refuted. 0 times theorem prover too weak. 499 trivial. 0 not checked. [2024-10-18 10:00:24,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:24,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:24,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:25,404 INFO L134 CoverageAnalysis]: Checked inductivity of 1736 backedges. 829 proven. 408 refuted. 0 times theorem prover too weak. 499 trivial. 0 not checked. [2024-10-18 10:00:25,744 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:00:25,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:00:32,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1670919242, now seen corresponding path program 1 times [2024-10-18 10:00:32,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:32,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:32,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:33,761 INFO L134 CoverageAnalysis]: Checked inductivity of 2087 backedges. 334 proven. 1085 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2024-10-18 10:00:33,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:33,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:33,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:35,003 INFO L134 CoverageAnalysis]: Checked inductivity of 2087 backedges. 334 proven. 1085 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2024-10-18 10:00:35,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:00:35,215 INFO L85 PathProgramCache]: Analyzing trace with hash -2066877218, now seen corresponding path program 1 times [2024-10-18 10:00:35,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:35,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:35,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:36,139 INFO L134 CoverageAnalysis]: Checked inductivity of 2095 backedges. 1055 proven. 408 refuted. 0 times theorem prover too weak. 632 trivial. 0 not checked. [2024-10-18 10:00:36,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:36,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:36,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:37,329 INFO L134 CoverageAnalysis]: Checked inductivity of 2095 backedges. 1055 proven. 408 refuted. 0 times theorem prover too weak. 632 trivial. 0 not checked. [2024-10-18 10:00:37,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:00:37,572 INFO L85 PathProgramCache]: Analyzing trace with hash -1968092940, now seen corresponding path program 1 times [2024-10-18 10:00:37,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:37,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:37,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:38,999 INFO L134 CoverageAnalysis]: Checked inductivity of 2622 backedges. 523 proven. 1171 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2024-10-18 10:00:38,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:39,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:39,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:40,421 INFO L134 CoverageAnalysis]: Checked inductivity of 2622 backedges. 523 proven. 1171 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2024-10-18 10:00:40,703 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:00:40,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:00:47,525 INFO L85 PathProgramCache]: Analyzing trace with hash 585174100, now seen corresponding path program 1 times [2024-10-18 10:00:47,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:47,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:47,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:48,979 INFO L134 CoverageAnalysis]: Checked inductivity of 2665 backedges. 182 proven. 1475 refuted. 0 times theorem prover too weak. 1008 trivial. 0 not checked. [2024-10-18 10:00:48,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:48,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:49,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:50,443 INFO L134 CoverageAnalysis]: Checked inductivity of 2665 backedges. 182 proven. 1475 refuted. 0 times theorem prover too weak. 1008 trivial. 0 not checked. [2024-10-18 10:00:50,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:00:50,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1202732162, now seen corresponding path program 1 times [2024-10-18 10:00:50,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:50,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:50,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:51,834 INFO L134 CoverageAnalysis]: Checked inductivity of 2781 backedges. 1482 proven. 381 refuted. 0 times theorem prover too weak. 918 trivial. 0 not checked. [2024-10-18 10:00:51,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:51,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:52,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:52,965 INFO L134 CoverageAnalysis]: Checked inductivity of 2781 backedges. 1482 proven. 381 refuted. 0 times theorem prover too weak. 918 trivial. 0 not checked. [2024-10-18 10:00:53,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:00:53,130 INFO L85 PathProgramCache]: Analyzing trace with hash 326640254, now seen corresponding path program 1 times [2024-10-18 10:00:53,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:53,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:53,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:54,293 INFO L134 CoverageAnalysis]: Checked inductivity of 2813 backedges. 1501 proven. 381 refuted. 0 times theorem prover too weak. 931 trivial. 0 not checked. [2024-10-18 10:00:54,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:54,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:54,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:55,455 INFO L134 CoverageAnalysis]: Checked inductivity of 2813 backedges. 1501 proven. 381 refuted. 0 times theorem prover too weak. 931 trivial. 0 not checked. [2024-10-18 10:00:55,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:00:55,630 INFO L85 PathProgramCache]: Analyzing trace with hash 157896884, now seen corresponding path program 1 times [2024-10-18 10:00:55,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:55,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:55,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:56,763 INFO L134 CoverageAnalysis]: Checked inductivity of 2845 backedges. 1517 proven. 381 refuted. 0 times theorem prover too weak. 947 trivial. 0 not checked. [2024-10-18 10:00:56,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:56,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:56,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:00:58,212 INFO L134 CoverageAnalysis]: Checked inductivity of 2845 backedges. 1517 proven. 381 refuted. 0 times theorem prover too weak. 947 trivial. 0 not checked. [2024-10-18 10:00:58,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:00:58,396 INFO L85 PathProgramCache]: Analyzing trace with hash 2015794728, now seen corresponding path program 1 times [2024-10-18 10:00:58,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:00:58,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:00:58,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:00,044 INFO L134 CoverageAnalysis]: Checked inductivity of 2882 backedges. 216 proven. 1315 refuted. 0 times theorem prover too weak. 1351 trivial. 0 not checked. [2024-10-18 10:01:00,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:00,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:00,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:01,721 INFO L134 CoverageAnalysis]: Checked inductivity of 2882 backedges. 216 proven. 1315 refuted. 0 times theorem prover too weak. 1351 trivial. 0 not checked. [2024-10-18 10:01:02,040 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:01:02,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:01:04,063 INFO L85 PathProgramCache]: Analyzing trace with hash 1359200910, now seen corresponding path program 1 times [2024-10-18 10:01:04,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:04,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:04,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:05,391 INFO L134 CoverageAnalysis]: Checked inductivity of 3114 backedges. 1628 proven. 408 refuted. 0 times theorem prover too weak. 1078 trivial. 0 not checked. [2024-10-18 10:01:05,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:05,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:05,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:06,625 INFO L134 CoverageAnalysis]: Checked inductivity of 3114 backedges. 1628 proven. 408 refuted. 0 times theorem prover too weak. 1078 trivial. 0 not checked. [2024-10-18 10:01:06,900 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:01:06,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:01:07,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1725314916, now seen corresponding path program 1 times [2024-10-18 10:01:07,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:07,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:07,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:09,321 INFO L134 CoverageAnalysis]: Checked inductivity of 3114 backedges. 323 proven. 1183 refuted. 0 times theorem prover too weak. 1608 trivial. 0 not checked. [2024-10-18 10:01:09,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:09,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:09,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:11,044 INFO L134 CoverageAnalysis]: Checked inductivity of 3114 backedges. 323 proven. 1183 refuted. 0 times theorem prover too weak. 1608 trivial. 0 not checked. [2024-10-18 10:01:11,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:01:11,211 INFO L85 PathProgramCache]: Analyzing trace with hash 169327535, now seen corresponding path program 1 times [2024-10-18 10:01:11,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:11,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:11,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:12,462 INFO L134 CoverageAnalysis]: Checked inductivity of 3114 backedges. 1653 proven. 381 refuted. 0 times theorem prover too weak. 1080 trivial. 0 not checked. [2024-10-18 10:01:12,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:12,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:12,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:13,737 INFO L134 CoverageAnalysis]: Checked inductivity of 3114 backedges. 1653 proven. 381 refuted. 0 times theorem prover too weak. 1080 trivial. 0 not checked. [2024-10-18 10:01:14,110 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:01:14,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:01:21,902 WARN L286 SmtUtils]: Spent 5.18s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 10:01:21,903 INFO L85 PathProgramCache]: Analyzing trace with hash -769858598, now seen corresponding path program 1 times [2024-10-18 10:01:21,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:21,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:22,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:23,298 INFO L134 CoverageAnalysis]: Checked inductivity of 3363 backedges. 1770 proven. 381 refuted. 0 times theorem prover too weak. 1212 trivial. 0 not checked. [2024-10-18 10:01:23,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:23,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:23,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:24,678 INFO L134 CoverageAnalysis]: Checked inductivity of 3363 backedges. 1770 proven. 381 refuted. 0 times theorem prover too weak. 1212 trivial. 0 not checked. [2024-10-18 10:01:24,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:01:24,847 INFO L85 PathProgramCache]: Analyzing trace with hash -1197613842, now seen corresponding path program 1 times [2024-10-18 10:01:24,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:24,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:25,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:26,272 INFO L134 CoverageAnalysis]: Checked inductivity of 3377 backedges. 1778 proven. 381 refuted. 0 times theorem prover too weak. 1218 trivial. 0 not checked. [2024-10-18 10:01:26,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:26,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:26,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:27,680 INFO L134 CoverageAnalysis]: Checked inductivity of 3377 backedges. 1778 proven. 381 refuted. 0 times theorem prover too weak. 1218 trivial. 0 not checked. [2024-10-18 10:01:27,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:01:27,894 INFO L85 PathProgramCache]: Analyzing trace with hash 804150040, now seen corresponding path program 1 times [2024-10-18 10:01:27,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:27,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:28,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:31,886 INFO L134 CoverageAnalysis]: Checked inductivity of 3642 backedges. 3084 proven. 458 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2024-10-18 10:01:31,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:31,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:32,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:35,000 INFO L134 CoverageAnalysis]: Checked inductivity of 3642 backedges. 3084 proven. 458 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2024-10-18 10:01:35,299 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:01:35,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:01:44,633 INFO L85 PathProgramCache]: Analyzing trace with hash 1796366160, now seen corresponding path program 1 times [2024-10-18 10:01:44,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:44,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:44,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:46,131 INFO L134 CoverageAnalysis]: Checked inductivity of 3717 backedges. 1936 proven. 381 refuted. 0 times theorem prover too weak. 1400 trivial. 0 not checked. [2024-10-18 10:01:46,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:01:46,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:01:46,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:01:47,552 INFO L134 CoverageAnalysis]: Checked inductivity of 3717 backedges. 1936 proven. 381 refuted. 0 times theorem prover too weak. 1400 trivial. 0 not checked. [2024-10-18 10:01:47,855 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:01:47,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:02:00,431 WARN L286 SmtUtils]: Spent 10.02s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 10:02:00,432 INFO L85 PathProgramCache]: Analyzing trace with hash 783194176, now seen corresponding path program 1 times [2024-10-18 10:02:00,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:00,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:00,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:01,928 INFO L134 CoverageAnalysis]: Checked inductivity of 3806 backedges. 1947 proven. 408 refuted. 0 times theorem prover too weak. 1451 trivial. 0 not checked. [2024-10-18 10:02:01,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:01,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:02,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:03,468 INFO L134 CoverageAnalysis]: Checked inductivity of 3806 backedges. 1947 proven. 408 refuted. 0 times theorem prover too weak. 1451 trivial. 0 not checked. [2024-10-18 10:02:03,759 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:02:03,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:02:29,287 WARN L286 SmtUtils]: Spent 20.31s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 10:02:29,287 INFO L85 PathProgramCache]: Analyzing trace with hash -1599953576, now seen corresponding path program 1 times [2024-10-18 10:02:29,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:29,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:29,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:31,353 INFO L134 CoverageAnalysis]: Checked inductivity of 3881 backedges. 128 proven. 1047 refuted. 0 times theorem prover too weak. 2706 trivial. 0 not checked. [2024-10-18 10:02:31,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:31,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:31,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:33,433 INFO L134 CoverageAnalysis]: Checked inductivity of 3881 backedges. 128 proven. 1047 refuted. 0 times theorem prover too weak. 2706 trivial. 0 not checked. [2024-10-18 10:02:33,777 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:02:33,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:02:41,876 INFO L85 PathProgramCache]: Analyzing trace with hash -390626112, now seen corresponding path program 1 times [2024-10-18 10:02:41,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:41,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:42,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:43,951 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 99 proven. 1029 refuted. 0 times theorem prover too weak. 2763 trivial. 0 not checked. [2024-10-18 10:02:43,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:43,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:44,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:46,039 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 99 proven. 1029 refuted. 0 times theorem prover too weak. 2763 trivial. 0 not checked. [2024-10-18 10:02:46,115 INFO L85 PathProgramCache]: Analyzing trace with hash 775462201, now seen corresponding path program 1 times [2024-10-18 10:02:46,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:46,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:46,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:47,598 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 1977 proven. 408 refuted. 0 times theorem prover too weak. 1506 trivial. 0 not checked. [2024-10-18 10:02:47,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:47,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:47,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:49,198 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 1977 proven. 408 refuted. 0 times theorem prover too weak. 1506 trivial. 0 not checked. [2024-10-18 10:02:49,275 INFO L85 PathProgramCache]: Analyzing trace with hash -1730505664, now seen corresponding path program 1 times [2024-10-18 10:02:49,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:49,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:49,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:50,858 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 1977 proven. 408 refuted. 0 times theorem prover too weak. 1506 trivial. 0 not checked. [2024-10-18 10:02:50,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:50,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:51,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:52,345 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 1977 proven. 408 refuted. 0 times theorem prover too weak. 1506 trivial. 0 not checked. [2024-10-18 10:02:52,452 INFO L85 PathProgramCache]: Analyzing trace with hash -2106098208, now seen corresponding path program 1 times [2024-10-18 10:02:52,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:52,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:52,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:53,996 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 1977 proven. 408 refuted. 0 times theorem prover too weak. 1506 trivial. 0 not checked. [2024-10-18 10:02:53,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:53,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:54,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:55,549 INFO L134 CoverageAnalysis]: Checked inductivity of 3891 backedges. 1977 proven. 408 refuted. 0 times theorem prover too weak. 1506 trivial. 0 not checked. [2024-10-18 10:02:55,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:02:55,757 INFO L85 PathProgramCache]: Analyzing trace with hash -42518826, now seen corresponding path program 1 times [2024-10-18 10:02:55,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:55,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:56,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:02:57,878 INFO L134 CoverageAnalysis]: Checked inductivity of 3921 backedges. 105 proven. 1052 refuted. 0 times theorem prover too weak. 2764 trivial. 0 not checked. [2024-10-18 10:02:57,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:02:57,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:02:58,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:00,012 INFO L134 CoverageAnalysis]: Checked inductivity of 3921 backedges. 105 proven. 1052 refuted. 0 times theorem prover too weak. 2764 trivial. 0 not checked. [2024-10-18 10:03:00,321 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:03:00,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:03:11,889 INFO L85 PathProgramCache]: Analyzing trace with hash -1319538574, now seen corresponding path program 1 times [2024-10-18 10:03:11,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:11,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:12,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:14,061 INFO L134 CoverageAnalysis]: Checked inductivity of 3925 backedges. 58 proven. 801 refuted. 0 times theorem prover too weak. 3066 trivial. 0 not checked. [2024-10-18 10:03:14,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:14,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:14,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:16,244 INFO L134 CoverageAnalysis]: Checked inductivity of 3925 backedges. 58 proven. 801 refuted. 0 times theorem prover too weak. 3066 trivial. 0 not checked. [2024-10-18 10:03:16,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:03:16,404 INFO L85 PathProgramCache]: Analyzing trace with hash 1424804102, now seen corresponding path program 1 times [2024-10-18 10:03:16,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:16,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:16,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:18,607 INFO L134 CoverageAnalysis]: Checked inductivity of 3925 backedges. 58 proven. 801 refuted. 0 times theorem prover too weak. 3066 trivial. 0 not checked. [2024-10-18 10:03:18,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:18,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:18,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:20,835 INFO L134 CoverageAnalysis]: Checked inductivity of 3925 backedges. 58 proven. 801 refuted. 0 times theorem prover too weak. 3066 trivial. 0 not checked. [2024-10-18 10:03:21,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:03:21,077 INFO L85 PathProgramCache]: Analyzing trace with hash 1177995484, now seen corresponding path program 1 times [2024-10-18 10:03:21,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:21,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:21,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:23,304 INFO L134 CoverageAnalysis]: Checked inductivity of 4080 backedges. 70 proven. 837 refuted. 0 times theorem prover too weak. 3173 trivial. 0 not checked. [2024-10-18 10:03:23,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:23,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:23,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:25,546 INFO L134 CoverageAnalysis]: Checked inductivity of 4080 backedges. 70 proven. 837 refuted. 0 times theorem prover too weak. 3173 trivial. 0 not checked. [2024-10-18 10:03:25,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:03:25,746 INFO L85 PathProgramCache]: Analyzing trace with hash 1000112784, now seen corresponding path program 1 times [2024-10-18 10:03:25,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:25,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:26,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:28,002 INFO L134 CoverageAnalysis]: Checked inductivity of 4129 backedges. 119 proven. 837 refuted. 0 times theorem prover too weak. 3173 trivial. 0 not checked. [2024-10-18 10:03:28,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:28,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:28,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:30,239 INFO L134 CoverageAnalysis]: Checked inductivity of 4129 backedges. 119 proven. 837 refuted. 0 times theorem prover too weak. 3173 trivial. 0 not checked. [2024-10-18 10:03:30,683 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:03:30,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:03:33,526 INFO L85 PathProgramCache]: Analyzing trace with hash -1469267069, now seen corresponding path program 1 times [2024-10-18 10:03:33,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:33,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:33,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:35,911 INFO L134 CoverageAnalysis]: Checked inductivity of 4885 backedges. 517 proven. 773 refuted. 0 times theorem prover too weak. 3595 trivial. 0 not checked. [2024-10-18 10:03:35,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:35,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:36,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:38,391 INFO L134 CoverageAnalysis]: Checked inductivity of 4885 backedges. 517 proven. 773 refuted. 0 times theorem prover too weak. 3595 trivial. 0 not checked. [2024-10-18 10:03:38,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 112 interpolants. [2024-10-18 10:03:38,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3172, Invalid=22588, Unknown=0, NotChecked=0, Total=25760 [2024-10-18 10:03:38,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:03:38,666 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 10:03:38,667 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 112 states, 112 states have (on average 7.75) internal successors, (868), 111 states have internal predecessors, (868), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:03:38,667 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:03:40,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:03:40,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:03:40,035 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-10-18 10:03:40,204 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable151,SelfDestructingSolverStorable152,SelfDestructingSolverStorable153,SelfDestructingSolverStorable110,SelfDestructingSolverStorable154,SelfDestructingSolverStorable150,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable104,SelfDestructingSolverStorable148,SelfDestructingSolverStorable105,SelfDestructingSolverStorable149,SelfDestructingSolverStorable106,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable144,SelfDestructingSolverStorable101,SelfDestructingSolverStorable145,SelfDestructingSolverStorable102,SelfDestructingSolverStorable146,SelfDestructingSolverStorable103,SelfDestructingSolverStorable147,SelfDestructingSolverStorable140,SelfDestructingSolverStorable141,SelfDestructingSolverStorable142,SelfDestructingSolverStorable143,SelfDestructingSolverStorable137,SelfDestructingSolverStorable138,SelfDestructingSolverStorable139,SelfDestructingSolverStorable133,SelfDestructingSolverStorable134,SelfDestructingSolverStorable135,SelfDestructingSolverStorable136,SelfDestructingSolverStorable130,SelfDestructingSolverStorable131,SelfDestructingSolverStorable93,SelfDestructingSolverStorable132,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable170,SelfDestructingSolverStorable96,SelfDestructingSolverStorable171,SelfDestructingSolverStorable97,13 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable98,SelfDestructingSolverStorable126,SelfDestructingSolverStorable99,SelfDestructingSolverStorable127,SelfDestructingSolverStorable128,SelfDestructingSolverStorable129,SelfDestructingSolverStorable122,SelfDestructingSolverStorable166,SelfDestructingSolverStorable123,SelfDestructingSolverStorable167,SelfDestructingSolverStorable124,SelfDestructingSolverStorable168,SelfDestructingSolverStorable125,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable163,SelfDestructingSolverStorable120,SelfDestructingSolverStorable164,SelfDestructingSolverStorable121,SelfDestructingSolverStorable165,SelfDestructingSolverStorable160,SelfDestructingSolverStorable161,SelfDestructingSolverStorable119,SelfDestructingSolverStorable115,SelfDestructingSolverStorable159,SelfDestructingSolverStorable116,SelfDestructingSolverStorable117,SelfDestructingSolverStorable118,SelfDestructingSolverStorable111,SelfDestructingSolverStorable155,SelfDestructingSolverStorable112,SelfDestructingSolverStorable156,SelfDestructingSolverStorable113,SelfDestructingSolverStorable157,SelfDestructingSolverStorable114,SelfDestructingSolverStorable158 [2024-10-18 10:03:40,204 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 10:03:40,204 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 10:03:40,204 INFO L85 PathProgramCache]: Analyzing trace with hash 255904869, now seen corresponding path program 12 times [2024-10-18 10:03:40,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 10:03:40,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807417294] [2024-10-18 10:03:40,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:40,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:40,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:43,412 INFO L134 CoverageAnalysis]: Checked inductivity of 17157 backedges. 1766 proven. 5241 refuted. 0 times theorem prover too weak. 10150 trivial. 0 not checked. [2024-10-18 10:03:43,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 10:03:43,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807417294] [2024-10-18 10:03:43,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [807417294] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 10:03:43,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [144980184] [2024-10-18 10:03:43,412 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-10-18 10:03:43,412 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 10:03:43,412 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 10:03:43,413 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 10:03:43,414 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-10-18 10:03:43,795 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2024-10-18 10:03:43,795 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 10:03:43,797 INFO L255 TraceCheckSpWp]: Trace formula consists of 397 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-10-18 10:03:43,803 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 10:03:43,922 INFO L134 CoverageAnalysis]: Checked inductivity of 17157 backedges. 610 proven. 0 refuted. 0 times theorem prover too weak. 16547 trivial. 0 not checked. [2024-10-18 10:03:43,922 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-10-18 10:03:43,922 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [144980184] provided 1 perfect and 0 imperfect interpolant sequences [2024-10-18 10:03:43,922 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-10-18 10:03:43,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [25] total 30 [2024-10-18 10:03:43,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80139159] [2024-10-18 10:03:43,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-10-18 10:03:43,923 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-10-18 10:03:43,923 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 10:03:44,227 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:03:44,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:03:51,262 INFO L85 PathProgramCache]: Analyzing trace with hash 994531414, now seen corresponding path program 1 times [2024-10-18 10:03:51,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:51,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:51,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:03:51,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:03:51,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:03:51,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:03:51,681 INFO L85 PathProgramCache]: Analyzing trace with hash -1875045468, now seen corresponding path program 1 times [2024-10-18 10:03:51,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:51,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:51,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:03:51,745 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:03:51,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:03:52,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:03:52,089 INFO L85 PathProgramCache]: Analyzing trace with hash -2056979526, now seen corresponding path program 1 times [2024-10-18 10:03:52,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:52,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:52,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:52,694 INFO L134 CoverageAnalysis]: Checked inductivity of 310 backedges. 167 proven. 64 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-10-18 10:03:52,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:03:52,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:03:52,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:03:53,002 INFO L134 CoverageAnalysis]: Checked inductivity of 310 backedges. 167 proven. 64 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-10-18 10:03:53,274 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:03:53,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:04:07,425 INFO L85 PathProgramCache]: Analyzing trace with hash 1724389874, now seen corresponding path program 1 times [2024-10-18 10:04:07,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:07,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:07,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:07,858 INFO L134 CoverageAnalysis]: Checked inductivity of 326 backedges. 100 proven. 133 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-10-18 10:04:07,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:07,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:07,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:08,290 INFO L134 CoverageAnalysis]: Checked inductivity of 326 backedges. 100 proven. 133 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-10-18 10:04:08,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:04:08,457 INFO L85 PathProgramCache]: Analyzing trace with hash -856624384, now seen corresponding path program 1 times [2024-10-18 10:04:08,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:08,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:08,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:08,844 INFO L134 CoverageAnalysis]: Checked inductivity of 432 backedges. 81 proven. 231 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2024-10-18 10:04:08,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:08,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:08,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:09,243 INFO L134 CoverageAnalysis]: Checked inductivity of 432 backedges. 81 proven. 231 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2024-10-18 10:04:09,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:04:09,439 INFO L85 PathProgramCache]: Analyzing trace with hash -199272682, now seen corresponding path program 1 times [2024-10-18 10:04:09,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:09,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:09,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:09,871 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 75 proven. 328 refuted. 0 times theorem prover too weak. 272 trivial. 0 not checked. [2024-10-18 10:04:09,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:09,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:09,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:10,314 INFO L134 CoverageAnalysis]: Checked inductivity of 675 backedges. 75 proven. 328 refuted. 0 times theorem prover too weak. 272 trivial. 0 not checked. [2024-10-18 10:04:10,603 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:04:10,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:04:35,042 INFO L85 PathProgramCache]: Analyzing trace with hash -1662434290, now seen corresponding path program 1 times [2024-10-18 10:04:35,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:35,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:35,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:35,522 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 61 proven. 369 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2024-10-18 10:04:35,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:35,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:35,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:35,999 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 61 proven. 369 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2024-10-18 10:04:36,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:04:36,164 INFO L85 PathProgramCache]: Analyzing trace with hash -1188291876, now seen corresponding path program 1 times [2024-10-18 10:04:36,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:36,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:36,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:36,770 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 104 proven. 444 refuted. 0 times theorem prover too weak. 322 trivial. 0 not checked. [2024-10-18 10:04:36,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:36,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:36,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:37,286 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 104 proven. 444 refuted. 0 times theorem prover too weak. 322 trivial. 0 not checked. [2024-10-18 10:04:37,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:04:37,484 INFO L85 PathProgramCache]: Analyzing trace with hash -820053262, now seen corresponding path program 1 times [2024-10-18 10:04:37,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:37,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:37,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:38,061 INFO L134 CoverageAnalysis]: Checked inductivity of 1222 backedges. 80 proven. 527 refuted. 0 times theorem prover too weak. 615 trivial. 0 not checked. [2024-10-18 10:04:38,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:38,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:38,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:38,637 INFO L134 CoverageAnalysis]: Checked inductivity of 1222 backedges. 80 proven. 527 refuted. 0 times theorem prover too weak. 615 trivial. 0 not checked. [2024-10-18 10:04:38,921 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:04:38,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:04:43,926 INFO L85 PathProgramCache]: Analyzing trace with hash 1754577688, now seen corresponding path program 1 times [2024-10-18 10:04:43,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:43,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:44,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:44,521 INFO L134 CoverageAnalysis]: Checked inductivity of 1252 backedges. 110 proven. 527 refuted. 0 times theorem prover too weak. 615 trivial. 0 not checked. [2024-10-18 10:04:44,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:44,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:44,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:45,117 INFO L134 CoverageAnalysis]: Checked inductivity of 1252 backedges. 110 proven. 527 refuted. 0 times theorem prover too weak. 615 trivial. 0 not checked. [2024-10-18 10:04:45,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:04:45,421 INFO L85 PathProgramCache]: Analyzing trace with hash 198601152, now seen corresponding path program 1 times [2024-10-18 10:04:45,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:45,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:45,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:46,080 INFO L134 CoverageAnalysis]: Checked inductivity of 1278 backedges. 110 proven. 527 refuted. 0 times theorem prover too weak. 641 trivial. 0 not checked. [2024-10-18 10:04:46,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:46,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:46,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:46,820 INFO L134 CoverageAnalysis]: Checked inductivity of 1278 backedges. 110 proven. 527 refuted. 0 times theorem prover too weak. 641 trivial. 0 not checked. [2024-10-18 10:04:46,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:04:47,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1908920724, now seen corresponding path program 1 times [2024-10-18 10:04:47,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:47,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:47,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:48,271 INFO L134 CoverageAnalysis]: Checked inductivity of 1693 backedges. 227 proven. 918 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-10-18 10:04:48,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:48,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:48,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:49,481 INFO L134 CoverageAnalysis]: Checked inductivity of 1693 backedges. 227 proven. 918 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-10-18 10:04:49,802 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:04:49,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:04:52,655 INFO L85 PathProgramCache]: Analyzing trace with hash -552012398, now seen corresponding path program 1 times [2024-10-18 10:04:52,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:52,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:52,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:53,972 INFO L134 CoverageAnalysis]: Checked inductivity of 2020 backedges. 289 proven. 1063 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2024-10-18 10:04:53,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:53,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:54,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:55,186 INFO L134 CoverageAnalysis]: Checked inductivity of 2020 backedges. 289 proven. 1063 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2024-10-18 10:04:55,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:04:55,382 INFO L85 PathProgramCache]: Analyzing trace with hash -657444952, now seen corresponding path program 1 times [2024-10-18 10:04:55,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:55,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:55,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:56,680 INFO L134 CoverageAnalysis]: Checked inductivity of 2021 backedges. 214 proven. 1139 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2024-10-18 10:04:56,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:56,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:56,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:57,893 INFO L134 CoverageAnalysis]: Checked inductivity of 2021 backedges. 214 proven. 1139 refuted. 0 times theorem prover too weak. 668 trivial. 0 not checked. [2024-10-18 10:04:58,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:04:58,081 INFO L85 PathProgramCache]: Analyzing trace with hash 546864797, now seen corresponding path program 1 times [2024-10-18 10:04:58,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:58,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:58,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:04:59,429 INFO L134 CoverageAnalysis]: Checked inductivity of 2035 backedges. 230 proven. 994 refuted. 0 times theorem prover too weak. 811 trivial. 0 not checked. [2024-10-18 10:04:59,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:04:59,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:04:59,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:00,779 INFO L134 CoverageAnalysis]: Checked inductivity of 2035 backedges. 230 proven. 994 refuted. 0 times theorem prover too weak. 811 trivial. 0 not checked. [2024-10-18 10:05:00,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:05:00,976 INFO L85 PathProgramCache]: Analyzing trace with hash -1555301775, now seen corresponding path program 1 times [2024-10-18 10:05:00,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:00,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:01,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:01,966 INFO L134 CoverageAnalysis]: Checked inductivity of 2574 backedges. 1095 proven. 626 refuted. 0 times theorem prover too weak. 853 trivial. 0 not checked. [2024-10-18 10:05:01,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:01,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:02,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:03,062 INFO L134 CoverageAnalysis]: Checked inductivity of 2574 backedges. 1095 proven. 626 refuted. 0 times theorem prover too weak. 853 trivial. 0 not checked. [2024-10-18 10:05:03,373 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:05:03,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:05:06,238 INFO L85 PathProgramCache]: Analyzing trace with hash -657745205, now seen corresponding path program 1 times [2024-10-18 10:05:06,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:06,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:06,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:07,826 INFO L134 CoverageAnalysis]: Checked inductivity of 3000 backedges. 356 proven. 1431 refuted. 0 times theorem prover too weak. 1213 trivial. 0 not checked. [2024-10-18 10:05:07,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:07,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:07,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:09,355 INFO L134 CoverageAnalysis]: Checked inductivity of 3000 backedges. 356 proven. 1431 refuted. 0 times theorem prover too weak. 1213 trivial. 0 not checked. [2024-10-18 10:05:09,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:05:09,531 INFO L85 PathProgramCache]: Analyzing trace with hash -1060247201, now seen corresponding path program 1 times [2024-10-18 10:05:09,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:09,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:09,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:10,677 INFO L134 CoverageAnalysis]: Checked inductivity of 3012 backedges. 1400 proven. 626 refuted. 0 times theorem prover too weak. 986 trivial. 0 not checked. [2024-10-18 10:05:10,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:10,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:10,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:11,795 INFO L134 CoverageAnalysis]: Checked inductivity of 3012 backedges. 1400 proven. 626 refuted. 0 times theorem prover too weak. 986 trivial. 0 not checked. [2024-10-18 10:05:11,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:05:12,005 INFO L85 PathProgramCache]: Analyzing trace with hash 1884925301, now seen corresponding path program 1 times [2024-10-18 10:05:12,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:12,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:12,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:13,670 INFO L134 CoverageAnalysis]: Checked inductivity of 3648 backedges. 694 proven. 1636 refuted. 0 times theorem prover too weak. 1318 trivial. 0 not checked. [2024-10-18 10:05:13,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:13,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:13,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:15,387 INFO L134 CoverageAnalysis]: Checked inductivity of 3648 backedges. 694 proven. 1636 refuted. 0 times theorem prover too weak. 1318 trivial. 0 not checked. [2024-10-18 10:05:15,669 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:05:15,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:05:25,725 INFO L85 PathProgramCache]: Analyzing trace with hash -1328281331, now seen corresponding path program 1 times [2024-10-18 10:05:25,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:25,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:25,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:27,480 INFO L134 CoverageAnalysis]: Checked inductivity of 3701 backedges. 227 proven. 1907 refuted. 0 times theorem prover too weak. 1567 trivial. 0 not checked. [2024-10-18 10:05:27,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:27,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:27,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:29,227 INFO L134 CoverageAnalysis]: Checked inductivity of 3701 backedges. 227 proven. 1907 refuted. 0 times theorem prover too weak. 1567 trivial. 0 not checked. [2024-10-18 10:05:29,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:05:29,478 INFO L85 PathProgramCache]: Analyzing trace with hash 1105832451, now seen corresponding path program 1 times [2024-10-18 10:05:29,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:29,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:29,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:30,763 INFO L134 CoverageAnalysis]: Checked inductivity of 3817 backedges. 1946 proven. 599 refuted. 0 times theorem prover too weak. 1272 trivial. 0 not checked. [2024-10-18 10:05:30,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:30,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:31,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:32,089 INFO L134 CoverageAnalysis]: Checked inductivity of 3817 backedges. 1946 proven. 599 refuted. 0 times theorem prover too weak. 1272 trivial. 0 not checked. [2024-10-18 10:05:32,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:05:32,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1649276471, now seen corresponding path program 1 times [2024-10-18 10:05:32,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:32,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:32,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:33,640 INFO L134 CoverageAnalysis]: Checked inductivity of 3856 backedges. 1972 proven. 599 refuted. 0 times theorem prover too weak. 1285 trivial. 0 not checked. [2024-10-18 10:05:33,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:33,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:33,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:34,956 INFO L134 CoverageAnalysis]: Checked inductivity of 3856 backedges. 1972 proven. 599 refuted. 0 times theorem prover too weak. 1285 trivial. 0 not checked. [2024-10-18 10:05:35,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:05:35,132 INFO L85 PathProgramCache]: Analyzing trace with hash 1296420661, now seen corresponding path program 1 times [2024-10-18 10:05:35,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:35,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:35,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:36,506 INFO L134 CoverageAnalysis]: Checked inductivity of 3893 backedges. 1993 proven. 599 refuted. 0 times theorem prover too weak. 1301 trivial. 0 not checked. [2024-10-18 10:05:36,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:36,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:36,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:37,917 INFO L134 CoverageAnalysis]: Checked inductivity of 3893 backedges. 1993 proven. 599 refuted. 0 times theorem prover too weak. 1301 trivial. 0 not checked. [2024-10-18 10:05:38,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:05:38,112 INFO L85 PathProgramCache]: Analyzing trace with hash -470533919, now seen corresponding path program 1 times [2024-10-18 10:05:38,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:38,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:38,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:40,015 INFO L134 CoverageAnalysis]: Checked inductivity of 3935 backedges. 256 proven. 1702 refuted. 0 times theorem prover too weak. 1977 trivial. 0 not checked. [2024-10-18 10:05:40,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:40,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:40,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:41,969 INFO L134 CoverageAnalysis]: Checked inductivity of 3935 backedges. 256 proven. 1702 refuted. 0 times theorem prover too weak. 1977 trivial. 0 not checked. [2024-10-18 10:05:42,282 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:05:42,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:05:49,946 INFO L85 PathProgramCache]: Analyzing trace with hash 695674439, now seen corresponding path program 1 times [2024-10-18 10:05:49,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:49,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:50,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:51,376 INFO L134 CoverageAnalysis]: Checked inductivity of 4213 backedges. 2155 proven. 626 refuted. 0 times theorem prover too weak. 1432 trivial. 0 not checked. [2024-10-18 10:05:51,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:51,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:51,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:52,848 INFO L134 CoverageAnalysis]: Checked inductivity of 4213 backedges. 2155 proven. 626 refuted. 0 times theorem prover too weak. 1432 trivial. 0 not checked. [2024-10-18 10:05:53,137 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:05:53,137 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:05:57,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1868939547, now seen corresponding path program 1 times [2024-10-18 10:05:57,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:57,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:05:58,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:05:59,989 INFO L134 CoverageAnalysis]: Checked inductivity of 4213 backedges. 443 proven. 1671 refuted. 0 times theorem prover too weak. 2099 trivial. 0 not checked. [2024-10-18 10:05:59,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:05:59,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:00,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:02,064 INFO L134 CoverageAnalysis]: Checked inductivity of 4213 backedges. 443 proven. 1671 refuted. 0 times theorem prover too weak. 2099 trivial. 0 not checked. [2024-10-18 10:06:02,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:06:02,247 INFO L85 PathProgramCache]: Analyzing trace with hash -755717584, now seen corresponding path program 1 times [2024-10-18 10:06:02,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:02,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:02,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:03,775 INFO L134 CoverageAnalysis]: Checked inductivity of 4213 backedges. 2180 proven. 599 refuted. 0 times theorem prover too weak. 1434 trivial. 0 not checked. [2024-10-18 10:06:03,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:03,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:04,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:05,213 INFO L134 CoverageAnalysis]: Checked inductivity of 4213 backedges. 2180 proven. 599 refuted. 0 times theorem prover too weak. 1434 trivial. 0 not checked. [2024-10-18 10:06:05,565 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:06:05,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:06:08,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1736615077, now seen corresponding path program 1 times [2024-10-18 10:06:08,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:08,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:08,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:09,760 INFO L134 CoverageAnalysis]: Checked inductivity of 4503 backedges. 2338 proven. 599 refuted. 0 times theorem prover too weak. 1566 trivial. 0 not checked. [2024-10-18 10:06:09,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:09,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:10,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:11,370 INFO L134 CoverageAnalysis]: Checked inductivity of 4503 backedges. 2338 proven. 599 refuted. 0 times theorem prover too weak. 1566 trivial. 0 not checked. [2024-10-18 10:06:11,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:06:11,543 INFO L85 PathProgramCache]: Analyzing trace with hash -690331025, now seen corresponding path program 1 times [2024-10-18 10:06:11,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:11,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:11,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:13,066 INFO L134 CoverageAnalysis]: Checked inductivity of 4521 backedges. 2350 proven. 599 refuted. 0 times theorem prover too weak. 1572 trivial. 0 not checked. [2024-10-18 10:06:13,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:13,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:13,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:14,654 INFO L134 CoverageAnalysis]: Checked inductivity of 4521 backedges. 2350 proven. 599 refuted. 0 times theorem prover too weak. 1572 trivial. 0 not checked. [2024-10-18 10:06:14,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:06:14,850 INFO L85 PathProgramCache]: Analyzing trace with hash 1387823001, now seen corresponding path program 1 times [2024-10-18 10:06:14,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:14,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:15,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:19,747 INFO L134 CoverageAnalysis]: Checked inductivity of 4833 backedges. 4179 proven. 540 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-10-18 10:06:19,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:19,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:20,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:23,541 INFO L134 CoverageAnalysis]: Checked inductivity of 4833 backedges. 4179 proven. 540 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-10-18 10:06:23,840 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:06:23,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:06:30,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1068546351, now seen corresponding path program 1 times [2024-10-18 10:06:30,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:30,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:31,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:34,938 INFO L134 CoverageAnalysis]: Checked inductivity of 4923 backedges. 4405 proven. 402 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-10-18 10:06:34,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:34,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:35,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:38,925 INFO L134 CoverageAnalysis]: Checked inductivity of 4923 backedges. 4405 proven. 402 refuted. 0 times theorem prover too weak. 116 trivial. 0 not checked. [2024-10-18 10:06:39,228 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:06:39,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:06:43,797 INFO L85 PathProgramCache]: Analyzing trace with hash 72606713, now seen corresponding path program 1 times [2024-10-18 10:06:43,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:43,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:44,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:45,531 INFO L134 CoverageAnalysis]: Checked inductivity of 5026 backedges. 2595 proven. 626 refuted. 0 times theorem prover too weak. 1805 trivial. 0 not checked. [2024-10-18 10:06:45,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:06:45,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:06:45,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:06:47,209 INFO L134 CoverageAnalysis]: Checked inductivity of 5026 backedges. 2595 proven. 626 refuted. 0 times theorem prover too weak. 1805 trivial. 0 not checked. [2024-10-18 10:06:47,508 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:06:47,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:07:00,466 INFO L85 PathProgramCache]: Analyzing trace with hash 875386129, now seen corresponding path program 1 times [2024-10-18 10:07:00,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:00,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:00,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:02,200 INFO L134 CoverageAnalysis]: Checked inductivity of 5110 backedges. 2630 proven. 626 refuted. 0 times theorem prover too weak. 1854 trivial. 0 not checked. [2024-10-18 10:07:02,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:02,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:02,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:03,931 INFO L134 CoverageAnalysis]: Checked inductivity of 5110 backedges. 2630 proven. 626 refuted. 0 times theorem prover too weak. 1854 trivial. 0 not checked. [2024-10-18 10:07:04,228 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:07:04,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:07:06,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1578352705, now seen corresponding path program 1 times [2024-10-18 10:07:06,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:06,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:06,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:08,993 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 107 proven. 1282 refuted. 0 times theorem prover too weak. 3731 trivial. 0 not checked. [2024-10-18 10:07:08,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:08,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:09,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:11,427 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 107 proven. 1282 refuted. 0 times theorem prover too weak. 3731 trivial. 0 not checked. [2024-10-18 10:07:11,507 INFO L85 PathProgramCache]: Analyzing trace with hash 1684256754, now seen corresponding path program 1 times [2024-10-18 10:07:11,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:11,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:11,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:13,246 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 2634 proven. 626 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2024-10-18 10:07:13,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:13,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:13,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:15,002 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 2634 proven. 626 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2024-10-18 10:07:15,082 INFO L85 PathProgramCache]: Analyzing trace with hash 672315073, now seen corresponding path program 1 times [2024-10-18 10:07:15,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:15,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:15,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:16,869 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 2634 proven. 626 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2024-10-18 10:07:16,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:16,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:17,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:18,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 2634 proven. 626 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2024-10-18 10:07:18,803 INFO L85 PathProgramCache]: Analyzing trace with hash -633106023, now seen corresponding path program 1 times [2024-10-18 10:07:18,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:18,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:19,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:20,543 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 2634 proven. 626 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2024-10-18 10:07:20,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:20,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:20,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:22,300 INFO L134 CoverageAnalysis]: Checked inductivity of 5120 backedges. 2634 proven. 626 refuted. 0 times theorem prover too weak. 1860 trivial. 0 not checked. [2024-10-18 10:07:22,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:07:22,510 INFO L85 PathProgramCache]: Analyzing trace with hash -1002660777, now seen corresponding path program 1 times [2024-10-18 10:07:22,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:22,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:22,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:25,022 INFO L134 CoverageAnalysis]: Checked inductivity of 5150 backedges. 113 proven. 1305 refuted. 0 times theorem prover too weak. 3732 trivial. 0 not checked. [2024-10-18 10:07:25,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:25,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:25,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:27,540 INFO L134 CoverageAnalysis]: Checked inductivity of 5150 backedges. 113 proven. 1305 refuted. 0 times theorem prover too weak. 3732 trivial. 0 not checked. [2024-10-18 10:07:27,836 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:07:27,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:07:43,402 INFO L85 PathProgramCache]: Analyzing trace with hash 24110835, now seen corresponding path program 1 times [2024-10-18 10:07:43,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:43,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:43,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:46,005 INFO L134 CoverageAnalysis]: Checked inductivity of 5154 backedges. 92 proven. 1195 refuted. 0 times theorem prover too weak. 3867 trivial. 0 not checked. [2024-10-18 10:07:46,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:46,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:46,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:48,631 INFO L134 CoverageAnalysis]: Checked inductivity of 5154 backedges. 92 proven. 1195 refuted. 0 times theorem prover too weak. 3867 trivial. 0 not checked. [2024-10-18 10:07:48,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:07:48,796 INFO L85 PathProgramCache]: Analyzing trace with hash 600296839, now seen corresponding path program 1 times [2024-10-18 10:07:48,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:48,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:49,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:51,408 INFO L134 CoverageAnalysis]: Checked inductivity of 5154 backedges. 92 proven. 1195 refuted. 0 times theorem prover too weak. 3867 trivial. 0 not checked. [2024-10-18 10:07:51,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:51,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:51,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:54,011 INFO L134 CoverageAnalysis]: Checked inductivity of 5154 backedges. 92 proven. 1195 refuted. 0 times theorem prover too weak. 3867 trivial. 0 not checked. [2024-10-18 10:07:54,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:07:54,222 INFO L85 PathProgramCache]: Analyzing trace with hash -22163307, now seen corresponding path program 1 times [2024-10-18 10:07:54,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:54,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:54,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:56,841 INFO L134 CoverageAnalysis]: Checked inductivity of 5330 backedges. 76 proven. 1100 refuted. 0 times theorem prover too weak. 4154 trivial. 0 not checked. [2024-10-18 10:07:56,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:56,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:07:57,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:07:59,627 INFO L134 CoverageAnalysis]: Checked inductivity of 5330 backedges. 76 proven. 1100 refuted. 0 times theorem prover too weak. 4154 trivial. 0 not checked. [2024-10-18 10:07:59,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:07:59,825 INFO L85 PathProgramCache]: Analyzing trace with hash -338342639, now seen corresponding path program 1 times [2024-10-18 10:07:59,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:07:59,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:00,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:02,546 INFO L134 CoverageAnalysis]: Checked inductivity of 5384 backedges. 130 proven. 1100 refuted. 0 times theorem prover too weak. 4154 trivial. 0 not checked. [2024-10-18 10:08:02,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:02,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:02,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:05,260 INFO L134 CoverageAnalysis]: Checked inductivity of 5384 backedges. 130 proven. 1100 refuted. 0 times theorem prover too weak. 4154 trivial. 0 not checked. [2024-10-18 10:08:05,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:08:05,481 INFO L85 PathProgramCache]: Analyzing trace with hash -2139107033, now seen corresponding path program 1 times [2024-10-18 10:08:05,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:05,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:05,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:08,258 INFO L134 CoverageAnalysis]: Checked inductivity of 6221 backedges. 563 proven. 1208 refuted. 0 times theorem prover too weak. 4450 trivial. 0 not checked. [2024-10-18 10:08:08,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:08,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:08,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:11,145 INFO L134 CoverageAnalysis]: Checked inductivity of 6221 backedges. 563 proven. 1208 refuted. 0 times theorem prover too weak. 4450 trivial. 0 not checked. [2024-10-18 10:08:11,429 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:08:11,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:08:14,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1897525565, now seen corresponding path program 1 times [2024-10-18 10:08:14,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:14,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:14,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:17,391 INFO L134 CoverageAnalysis]: Checked inductivity of 6254 backedges. 595 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:17,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:17,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:17,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:20,503 INFO L134 CoverageAnalysis]: Checked inductivity of 6254 backedges. 595 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:20,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:08:20,687 INFO L85 PathProgramCache]: Analyzing trace with hash -1306287674, now seen corresponding path program 1 times [2024-10-18 10:08:20,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:20,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:21,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:23,486 INFO L134 CoverageAnalysis]: Checked inductivity of 6254 backedges. 595 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:23,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:23,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:23,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:26,359 INFO L134 CoverageAnalysis]: Checked inductivity of 6254 backedges. 595 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:26,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:08:26,607 INFO L85 PathProgramCache]: Analyzing trace with hash -1840250179, now seen corresponding path program 1 times [2024-10-18 10:08:26,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:26,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:26,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:29,481 INFO L134 CoverageAnalysis]: Checked inductivity of 6255 backedges. 596 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:29,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:29,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:29,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:32,349 INFO L134 CoverageAnalysis]: Checked inductivity of 6255 backedges. 596 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:32,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:08:32,551 INFO L85 PathProgramCache]: Analyzing trace with hash -1213218707, now seen corresponding path program 1 times [2024-10-18 10:08:32,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:32,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:32,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:35,483 INFO L134 CoverageAnalysis]: Checked inductivity of 6255 backedges. 596 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:35,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:35,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:35,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:38,342 INFO L134 CoverageAnalysis]: Checked inductivity of 6255 backedges. 596 proven. 1208 refuted. 0 times theorem prover too weak. 4451 trivial. 0 not checked. [2024-10-18 10:08:38,634 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:08:38,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:08:43,564 INFO L85 PathProgramCache]: Analyzing trace with hash 225964418, now seen corresponding path program 1 times [2024-10-18 10:08:43,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:43,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:43,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:46,442 INFO L134 CoverageAnalysis]: Checked inductivity of 6260 backedges. 59 proven. 1427 refuted. 0 times theorem prover too weak. 4774 trivial. 0 not checked. [2024-10-18 10:08:46,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:46,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:46,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:49,340 INFO L134 CoverageAnalysis]: Checked inductivity of 6260 backedges. 59 proven. 1427 refuted. 0 times theorem prover too weak. 4774 trivial. 0 not checked. [2024-10-18 10:08:49,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:08:49,539 INFO L85 PathProgramCache]: Analyzing trace with hash 1705003659, now seen corresponding path program 1 times [2024-10-18 10:08:49,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:49,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:50,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:52,558 INFO L134 CoverageAnalysis]: Checked inductivity of 6268 backedges. 66 proven. 1427 refuted. 0 times theorem prover too weak. 4775 trivial. 0 not checked. [2024-10-18 10:08:52,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:52,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:52,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:08:55,619 INFO L134 CoverageAnalysis]: Checked inductivity of 6268 backedges. 66 proven. 1427 refuted. 0 times theorem prover too weak. 4775 trivial. 0 not checked. [2024-10-18 10:08:55,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-10-18 10:08:55,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1051, Invalid=6089, Unknown=0, NotChecked=0, Total=7140 [2024-10-18 10:08:55,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:08:55,622 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 10:08:55,622 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.0) internal successors, (54), 6 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 10:08:55,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:08:55,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:08:55,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:08:55,622 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:08:55,623 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:08:56,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:08:56,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 10:08:56,794 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2024-10-18 10:08:56,979 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable265,SelfDestructingSolverStorable266,SelfDestructingSolverStorable267,SelfDestructingSolverStorable268,SelfDestructingSolverStorable261,SelfDestructingSolverStorable262,SelfDestructingSolverStorable263,SelfDestructingSolverStorable264,SelfDestructingSolverStorable260,SelfDestructingSolverStorable258,SelfDestructingSolverStorable259,SelfDestructingSolverStorable254,SelfDestructingSolverStorable255,SelfDestructingSolverStorable256,SelfDestructingSolverStorable257,SelfDestructingSolverStorable173,14 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable174,SelfDestructingSolverStorable175,SelfDestructingSolverStorable176,SelfDestructingSolverStorable172,SelfDestructingSolverStorable207,SelfDestructingSolverStorable208,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable204,SelfDestructingSolverStorable205,SelfDestructingSolverStorable206,SelfDestructingSolverStorable200,SelfDestructingSolverStorable201,SelfDestructingSolverStorable202,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable230,SelfDestructingSolverStorable198,SelfDestructingSolverStorable231,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable229,SelfDestructingSolverStorable225,SelfDestructingSolverStorable226,SelfDestructingSolverStorable227,SelfDestructingSolverStorable228,SelfDestructingSolverStorable188,SelfDestructingSolverStorable221,SelfDestructingSolverStorable189,SelfDestructingSolverStorable222,SelfDestructingSolverStorable223,SelfDestructingSolverStorable224,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable220,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable218,SelfDestructingSolverStorable219,SelfDestructingSolverStorable214,SelfDestructingSolverStorable215,SelfDestructingSolverStorable216,SelfDestructingSolverStorable217,SelfDestructingSolverStorable177,SelfDestructingSolverStorable210,SelfDestructingSolverStorable178,SelfDestructingSolverStorable211,SelfDestructingSolverStorable179,SelfDestructingSolverStorable212,SelfDestructingSolverStorable213,SelfDestructingSolverStorable250,SelfDestructingSolverStorable251,SelfDestructingSolverStorable252,SelfDestructingSolverStorable253,SelfDestructingSolverStorable247,SelfDestructingSolverStorable248,SelfDestructingSolverStorable249,SelfDestructingSolverStorable243,SelfDestructingSolverStorable244,SelfDestructingSolverStorable245,SelfDestructingSolverStorable246,SelfDestructingSolverStorable240,SelfDestructingSolverStorable241,SelfDestructingSolverStorable242,SelfDestructingSolverStorable236,SelfDestructingSolverStorable237,SelfDestructingSolverStorable238,SelfDestructingSolverStorable239,SelfDestructingSolverStorable199,SelfDestructingSolverStorable232,SelfDestructingSolverStorable233,SelfDestructingSolverStorable234,SelfDestructingSolverStorable235 [2024-10-18 10:08:56,979 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 10:08:56,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 10:08:56,979 INFO L85 PathProgramCache]: Analyzing trace with hash -609365196, now seen corresponding path program 13 times [2024-10-18 10:08:56,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 10:08:56,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864464890] [2024-10-18 10:08:56,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:08:56,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:08:57,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:09:03,988 INFO L134 CoverageAnalysis]: Checked inductivity of 16917 backedges. 14861 proven. 1903 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2024-10-18 10:09:03,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 10:09:03,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864464890] [2024-10-18 10:09:03,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [864464890] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 10:09:03,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [882352349] [2024-10-18 10:09:03,989 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-10-18 10:09:03,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 10:09:03,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 10:09:03,990 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 10:09:03,991 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-10-18 10:09:04,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:09:04,761 INFO L255 TraceCheckSpWp]: Trace formula consists of 2670 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-10-18 10:09:04,768 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 10:09:05,557 INFO L134 CoverageAnalysis]: Checked inductivity of 16917 backedges. 3729 proven. 21 refuted. 0 times theorem prover too weak. 13167 trivial. 0 not checked. [2024-10-18 10:09:05,558 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 10:09:06,368 INFO L134 CoverageAnalysis]: Checked inductivity of 16917 backedges. 3640 proven. 110 refuted. 0 times theorem prover too weak. 13167 trivial. 0 not checked. [2024-10-18 10:09:06,368 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [882352349] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 10:09:06,368 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 10:09:06,368 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 16, 16] total 92 [2024-10-18 10:09:06,368 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1520798918] [2024-10-18 10:09:06,368 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 10:09:06,369 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 92 states [2024-10-18 10:09:06,369 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 10:09:06,729 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:09:06,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:09:08,735 INFO L85 PathProgramCache]: Analyzing trace with hash 994531663, now seen corresponding path program 1 times [2024-10-18 10:09:08,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:09:08,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:09:08,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:08,837 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:09:08,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:09,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:09:09,132 INFO L85 PathProgramCache]: Analyzing trace with hash -1875045219, now seen corresponding path program 1 times [2024-10-18 10:09:09,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:09:09,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:09:09,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:09,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:09:09,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:12,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2024-10-18 10:09:12,135 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1547, Invalid=6825, Unknown=0, NotChecked=0, Total=8372 [2024-10-18 10:09:12,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:09:12,135 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 10:09:12,135 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 92 states, 92 states have (on average 8.880434782608695) internal successors, (817), 92 states have internal predecessors, (817), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 10:09:12,135 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:12,135 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:12,135 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:12,135 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:12,135 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-10-18 10:09:12,136 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:09:12,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 10:09:12,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-18 10:09:12,633 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-10-18 10:09:12,815 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable270,SelfDestructingSolverStorable271,SelfDestructingSolverStorable269,15 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 10:09:12,815 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 10:09:12,815 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 10:09:12,815 INFO L85 PathProgramCache]: Analyzing trace with hash -420843453, now seen corresponding path program 14 times [2024-10-18 10:09:12,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 10:09:12,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322620285] [2024-10-18 10:09:12,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:09:12,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:09:13,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:09:20,005 INFO L134 CoverageAnalysis]: Checked inductivity of 16936 backedges. 14861 proven. 1915 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2024-10-18 10:09:20,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 10:09:20,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322620285] [2024-10-18 10:09:20,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322620285] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 10:09:20,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1033356252] [2024-10-18 10:09:20,005 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-10-18 10:09:20,005 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 10:09:20,005 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 10:09:20,007 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 10:09:20,008 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-10-18 10:09:20,751 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-10-18 10:09:20,751 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 10:09:20,762 INFO L255 TraceCheckSpWp]: Trace formula consists of 2688 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-10-18 10:09:20,769 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 10:09:21,688 INFO L134 CoverageAnalysis]: Checked inductivity of 16936 backedges. 4198 proven. 28 refuted. 0 times theorem prover too weak. 12710 trivial. 0 not checked. [2024-10-18 10:09:21,688 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 10:09:22,614 INFO L134 CoverageAnalysis]: Checked inductivity of 16936 backedges. 4102 proven. 124 refuted. 0 times theorem prover too weak. 12710 trivial. 0 not checked. [2024-10-18 10:09:22,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1033356252] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 10:09:22,614 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 10:09:22,614 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 18, 18] total 97 [2024-10-18 10:09:22,614 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646759493] [2024-10-18 10:09:22,614 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 10:09:22,615 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 97 states [2024-10-18 10:09:22,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 10:09:22,968 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:09:22,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:09:47,145 WARN L286 SmtUtils]: Spent 10.03s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 10:09:47,146 INFO L85 PathProgramCache]: Analyzing trace with hash 291210594, now seen corresponding path program 1 times [2024-10-18 10:09:47,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:09:47,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:09:47,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:47,267 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:09:47,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:47,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:09:47,666 INFO L85 PathProgramCache]: Analyzing trace with hash 166271728, now seen corresponding path program 1 times [2024-10-18 10:09:47,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:09:47,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:09:47,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:47,757 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:09:47,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:09:50,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-10-18 10:09:50,835 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1625, Invalid=7687, Unknown=0, NotChecked=0, Total=9312 [2024-10-18 10:09:50,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:09:50,835 INFO L471 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-10-18 10:09:50,835 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 97 states, 97 states have (on average 8.68041237113402) internal successors, (842), 97 states have internal predecessors, (842), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:09:50,835 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-10-18 10:09:50,836 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-10-18 10:09:51,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-10-18 10:09:51,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-10-18 10:09:51,396 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2024-10-18 10:09:51,578 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable272,SelfDestructingSolverStorable273,SelfDestructingSolverStorable274,16 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 10:09:51,578 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-10-18 10:09:51,578 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-10-18 10:09:51,578 INFO L85 PathProgramCache]: Analyzing trace with hash 1156030036, now seen corresponding path program 15 times [2024-10-18 10:09:51,579 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-10-18 10:09:51,579 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057842861] [2024-10-18 10:09:51,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:09:51,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:09:52,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:09:58,991 INFO L134 CoverageAnalysis]: Checked inductivity of 16957 backedges. 14861 proven. 1928 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2024-10-18 10:09:58,992 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-10-18 10:09:58,992 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057842861] [2024-10-18 10:09:58,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057842861] provided 0 perfect and 1 imperfect interpolant sequences [2024-10-18 10:09:58,992 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042879712] [2024-10-18 10:09:58,992 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-10-18 10:09:58,992 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-10-18 10:09:58,992 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-10-18 10:09:58,993 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-10-18 10:09:58,994 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-10-18 10:09:59,563 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-10-18 10:09:59,563 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-10-18 10:09:59,567 INFO L255 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-10-18 10:09:59,573 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-10-18 10:10:00,088 INFO L134 CoverageAnalysis]: Checked inductivity of 16957 backedges. 1142 proven. 21 refuted. 0 times theorem prover too weak. 15794 trivial. 0 not checked. [2024-10-18 10:10:00,088 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-10-18 10:10:00,242 INFO L134 CoverageAnalysis]: Checked inductivity of 16957 backedges. 556 proven. 2 refuted. 0 times theorem prover too weak. 16399 trivial. 0 not checked. [2024-10-18 10:10:00,242 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042879712] provided 0 perfect and 2 imperfect interpolant sequences [2024-10-18 10:10:00,242 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-10-18 10:10:00,242 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 11, 5] total 79 [2024-10-18 10:10:00,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287010505] [2024-10-18 10:10:00,243 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-10-18 10:10:00,243 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 79 states [2024-10-18 10:10:00,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-10-18 10:10:00,574 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:10:00,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:10:22,000 WARN L286 SmtUtils]: Spent 8.06s on a formula simplification. DAG size of input: 34 DAG size of output: 29 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-10-18 10:10:22,000 INFO L85 PathProgramCache]: Analyzing trace with hash 328914295, now seen corresponding path program 1 times [2024-10-18 10:10:22,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:22,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:22,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:10:22,127 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:10:22,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:10:22,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:10:22,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1407973179, now seen corresponding path program 1 times [2024-10-18 10:10:22,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:22,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:22,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:10:22,583 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:10:22,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:10:22,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:10:22,958 INFO L85 PathProgramCache]: Analyzing trace with hash 1269264603, now seen corresponding path program 1 times [2024-10-18 10:10:22,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:22,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:23,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:10:23,141 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-10-18 10:10:23,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-10-18 10:10:23,558 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:10:23,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:10:24,173 INFO L85 PathProgramCache]: Analyzing trace with hash 460138259, now seen corresponding path program 1 times [2024-10-18 10:10:24,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:24,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:24,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:25,325 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 182 proven. 80 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 10:10:25,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:25,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:25,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:25,716 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 182 proven. 80 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2024-10-18 10:10:25,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:10:25,892 INFO L85 PathProgramCache]: Analyzing trace with hash -1982498783, now seen corresponding path program 1 times [2024-10-18 10:10:25,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:25,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:26,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:26,450 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 279 proven. 88 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-10-18 10:10:26,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:26,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:26,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:26,885 INFO L134 CoverageAnalysis]: Checked inductivity of 472 backedges. 279 proven. 88 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-10-18 10:10:27,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-10-18 10:10:27,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1093622839, now seen corresponding path program 1 times [2024-10-18 10:10:27,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:27,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:27,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:27,720 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 82 proven. 438 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2024-10-18 10:10:27,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:27,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:27,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:28,255 INFO L134 CoverageAnalysis]: Checked inductivity of 715 backedges. 82 proven. 438 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2024-10-18 10:10:28,534 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-10-18 10:10:28,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-10-18 10:10:33,849 INFO L85 PathProgramCache]: Analyzing trace with hash 547873071, now seen corresponding path program 1 times [2024-10-18 10:10:33,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:33,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:33,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:34,624 INFO L134 CoverageAnalysis]: Checked inductivity of 746 backedges. 158 proven. 389 refuted. 0 times theorem prover too weak. 199 trivial. 0 not checked. [2024-10-18 10:10:34,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:34,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:34,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:35,213 INFO L134 CoverageAnalysis]: Checked inductivity of 746 backedges. 158 proven. 389 refuted. 0 times theorem prover too weak. 199 trivial. 0 not checked. [2024-10-18 10:10:35,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:10:35,707 INFO L85 PathProgramCache]: Analyzing trace with hash 244231853, now seen corresponding path program 1 times [2024-10-18 10:10:35,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:35,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:35,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:37,058 INFO L134 CoverageAnalysis]: Checked inductivity of 1733 backedges. 468 proven. 952 refuted. 0 times theorem prover too weak. 313 trivial. 0 not checked. [2024-10-18 10:10:37,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:37,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:37,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:38,324 INFO L134 CoverageAnalysis]: Checked inductivity of 1733 backedges. 468 proven. 952 refuted. 0 times theorem prover too weak. 313 trivial. 0 not checked. [2024-10-18 10:10:38,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1925998474, now seen corresponding path program 1 times [2024-10-18 10:10:38,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:38,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:38,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:40,088 INFO L134 CoverageAnalysis]: Checked inductivity of 2064 backedges. 282 proven. 1130 refuted. 0 times theorem prover too weak. 652 trivial. 0 not checked. [2024-10-18 10:10:40,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:40,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:40,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:41,508 INFO L134 CoverageAnalysis]: Checked inductivity of 2064 backedges. 282 proven. 1130 refuted. 0 times theorem prover too weak. 652 trivial. 0 not checked. [2024-10-18 10:10:41,589 INFO L85 PathProgramCache]: Analyzing trace with hash -423638769, now seen corresponding path program 1 times [2024-10-18 10:10:41,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:41,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:41,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:42,993 INFO L134 CoverageAnalysis]: Checked inductivity of 2064 backedges. 282 proven. 1130 refuted. 0 times theorem prover too weak. 652 trivial. 0 not checked. [2024-10-18 10:10:42,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:42,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:43,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:44,467 INFO L134 CoverageAnalysis]: Checked inductivity of 2064 backedges. 282 proven. 1130 refuted. 0 times theorem prover too weak. 652 trivial. 0 not checked. [2024-10-18 10:10:44,576 INFO L85 PathProgramCache]: Analyzing trace with hash -247949327, now seen corresponding path program 1 times [2024-10-18 10:10:44,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:44,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:44,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:46,010 INFO L134 CoverageAnalysis]: Checked inductivity of 2064 backedges. 282 proven. 1130 refuted. 0 times theorem prover too weak. 652 trivial. 0 not checked. [2024-10-18 10:10:46,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:46,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:46,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:47,535 INFO L134 CoverageAnalysis]: Checked inductivity of 2064 backedges. 282 proven. 1130 refuted. 0 times theorem prover too weak. 652 trivial. 0 not checked. [2024-10-18 10:10:48,260 INFO L85 PathProgramCache]: Analyzing trace with hash 256679250, now seen corresponding path program 1 times [2024-10-18 10:10:48,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:48,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:48,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:49,810 INFO L134 CoverageAnalysis]: Checked inductivity of 3187 backedges. 1549 proven. 769 refuted. 0 times theorem prover too weak. 869 trivial. 0 not checked. [2024-10-18 10:10:49,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:49,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:50,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:51,256 INFO L134 CoverageAnalysis]: Checked inductivity of 3187 backedges. 1549 proven. 769 refuted. 0 times theorem prover too weak. 869 trivial. 0 not checked. [2024-10-18 10:10:51,333 INFO L85 PathProgramCache]: Analyzing trace with hash -632927971, now seen corresponding path program 1 times [2024-10-18 10:10:51,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:51,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:51,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:52,812 INFO L134 CoverageAnalysis]: Checked inductivity of 3188 backedges. 1549 proven. 769 refuted. 0 times theorem prover too weak. 870 trivial. 0 not checked. [2024-10-18 10:10:52,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:52,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:52,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:54,252 INFO L134 CoverageAnalysis]: Checked inductivity of 3188 backedges. 1549 proven. 769 refuted. 0 times theorem prover too weak. 870 trivial. 0 not checked. [2024-10-18 10:10:54,362 INFO L85 PathProgramCache]: Analyzing trace with hash 1854019193, now seen corresponding path program 1 times [2024-10-18 10:10:54,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:54,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:54,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:55,844 INFO L134 CoverageAnalysis]: Checked inductivity of 3189 backedges. 1549 proven. 769 refuted. 0 times theorem prover too weak. 871 trivial. 0 not checked. [2024-10-18 10:10:55,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:55,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:56,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:57,397 INFO L134 CoverageAnalysis]: Checked inductivity of 3189 backedges. 1549 proven. 769 refuted. 0 times theorem prover too weak. 871 trivial. 0 not checked. [2024-10-18 10:10:57,706 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:10:57,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1607267474, now seen corresponding path program 1 times [2024-10-18 10:10:57,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:57,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:57,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:10:59,296 INFO L134 CoverageAnalysis]: Checked inductivity of 3344 backedges. 1646 proven. 769 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2024-10-18 10:10:59,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:10:59,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:10:59,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:00,954 INFO L134 CoverageAnalysis]: Checked inductivity of 3344 backedges. 1646 proven. 769 refuted. 0 times theorem prover too weak. 929 trivial. 0 not checked. [2024-10-18 10:11:01,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:11:01,647 INFO L85 PathProgramCache]: Analyzing trace with hash 853618692, now seen corresponding path program 1 times [2024-10-18 10:11:01,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:01,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:01,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:04,433 INFO L134 CoverageAnalysis]: Checked inductivity of 5050 backedges. 396 proven. 1617 refuted. 0 times theorem prover too weak. 3037 trivial. 0 not checked. [2024-10-18 10:11:04,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:04,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:04,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:07,138 INFO L134 CoverageAnalysis]: Checked inductivity of 5050 backedges. 396 proven. 1617 refuted. 0 times theorem prover too weak. 3037 trivial. 0 not checked. [2024-10-18 10:11:07,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-10-18 10:11:07,388 INFO L85 PathProgramCache]: Analyzing trace with hash -749130493, now seen corresponding path program 1 times [2024-10-18 10:11:07,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:07,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:07,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:10,463 INFO L134 CoverageAnalysis]: Checked inductivity of 5115 backedges. 129 proven. 1881 refuted. 0 times theorem prover too weak. 3105 trivial. 0 not checked. [2024-10-18 10:11:10,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:10,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:10,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:13,497 INFO L134 CoverageAnalysis]: Checked inductivity of 5115 backedges. 129 proven. 1881 refuted. 0 times theorem prover too weak. 3105 trivial. 0 not checked. [2024-10-18 10:11:13,975 INFO L85 PathProgramCache]: Analyzing trace with hash -477676301, now seen corresponding path program 1 times [2024-10-18 10:11:13,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:13,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:14,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:16,169 INFO L134 CoverageAnalysis]: Checked inductivity of 5492 backedges. 2908 proven. 709 refuted. 0 times theorem prover too weak. 1875 trivial. 0 not checked. [2024-10-18 10:11:16,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:16,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:16,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:18,469 INFO L134 CoverageAnalysis]: Checked inductivity of 5492 backedges. 2908 proven. 709 refuted. 0 times theorem prover too weak. 1875 trivial. 0 not checked. [2024-10-18 10:11:18,549 INFO L85 PathProgramCache]: Analyzing trace with hash -1923115312, now seen corresponding path program 1 times [2024-10-18 10:11:18,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:18,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:18,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-10-18 10:11:20,824 INFO L134 CoverageAnalysis]: Checked inductivity of 5492 backedges. 2908 proven. 709 refuted. 0 times theorem prover too weak. 1875 trivial. 0 not checked. [2024-10-18 10:11:20,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-10-18 10:11:20,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-10-18 10:11:21,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Killed by 15