java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector-Const.epf -i ../../../trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 18:34:41,588 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 18:34:41,590 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 18:34:41,602 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 18:34:41,602 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 18:34:41,603 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 18:34:41,604 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 18:34:41,606 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 18:34:41,608 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 18:34:41,609 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 18:34:41,610 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 18:34:41,610 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 18:34:41,617 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 18:34:41,618 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 18:34:41,619 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 18:34:41,620 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 18:34:41,621 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 18:34:41,625 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 18:34:41,627 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 18:34:41,629 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 18:34:41,633 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 18:34:41,634 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 18:34:41,638 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-14 18:34:41,650 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector-Const.epf [2018-11-14 18:34:41,679 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 18:34:41,679 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 18:34:41,680 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 18:34:41,680 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 18:34:41,685 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 18:34:41,685 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 18:34:41,685 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 18:34:41,687 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 18:34:41,687 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 18:34:41,687 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 18:34:41,687 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 18:34:41,687 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 18:34:41,688 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 18:34:41,688 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 18:34:41,688 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-14 18:34:41,688 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-14 18:34:41,688 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 18:34:41,688 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 18:34:41,690 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-14 18:34:41,690 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 18:34:41,690 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 18:34:41,690 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 18:34:41,690 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 18:34:41,691 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 18:34:41,691 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 18:34:41,691 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 18:34:41,691 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 18:34:41,691 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 18:34:41,692 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-14 18:34:41,692 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 18:34:41,692 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-14 18:34:41,692 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-14 18:34:41,693 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 18:34:41,756 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 18:34:41,769 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 18:34:41,773 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 18:34:41,775 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 18:34:41,775 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 18:34:41,776 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i [2018-11-14 18:34:41,843 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ef5286dea/0eeb8afb2d2c45a692eecca5f5833931/FLAGc1a0930a8 [2018-11-14 18:34:42,337 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 18:34:42,338 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i [2018-11-14 18:34:42,344 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ef5286dea/0eeb8afb2d2c45a692eecca5f5833931/FLAGc1a0930a8 [2018-11-14 18:34:42,358 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ef5286dea/0eeb8afb2d2c45a692eecca5f5833931 [2018-11-14 18:34:42,369 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 18:34:42,371 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 18:34:42,372 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 18:34:42,372 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 18:34:42,376 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 18:34:42,377 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,380 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@348f2663 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42, skipping insertion in model container [2018-11-14 18:34:42,381 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,390 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 18:34:42,410 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 18:34:42,607 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 18:34:42,613 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 18:34:42,633 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 18:34:42,651 INFO L195 MainTranslator]: Completed translation [2018-11-14 18:34:42,651 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42 WrapperNode [2018-11-14 18:34:42,652 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 18:34:42,652 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 18:34:42,653 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 18:34:42,653 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 18:34:42,667 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,668 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,675 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,675 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,684 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,689 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,690 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... [2018-11-14 18:34:42,693 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 18:34:42,693 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 18:34:42,693 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 18:34:42,694 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 18:34:42,695 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 18:34:42,823 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 18:34:42,823 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 18:34:42,823 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 18:34:42,823 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 18:34:42,823 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 18:34:42,824 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-14 18:34:42,824 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 18:34:42,824 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-14 18:34:42,824 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 18:34:42,824 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 18:34:42,825 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 18:34:43,285 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 18:34:43,286 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 06:34:43 BoogieIcfgContainer [2018-11-14 18:34:43,286 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 18:34:43,287 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 18:34:43,287 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 18:34:43,290 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 18:34:43,291 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 06:34:42" (1/3) ... [2018-11-14 18:34:43,292 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a2196de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 06:34:43, skipping insertion in model container [2018-11-14 18:34:43,292 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 06:34:42" (2/3) ... [2018-11-14 18:34:43,292 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a2196de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 06:34:43, skipping insertion in model container [2018-11-14 18:34:43,292 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 06:34:43" (3/3) ... [2018-11-14 18:34:43,294 INFO L112 eAbstractionObserver]: Analyzing ICFG half_true-unreach-call_true-termination.i [2018-11-14 18:34:43,304 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 18:34:43,312 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 18:34:43,325 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 18:34:43,355 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 18:34:43,356 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 18:34:43,356 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 18:34:43,356 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 18:34:43,356 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 18:34:43,357 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 18:34:43,357 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 18:34:43,357 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 18:34:43,357 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 18:34:43,376 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-11-14 18:34:43,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-11-14 18:34:43,382 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:34:43,383 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:34:43,386 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:34:43,391 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:34:43,391 INFO L82 PathProgramCache]: Analyzing trace with hash 439143249, now seen corresponding path program 1 times [2018-11-14 18:34:43,395 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:34:43,396 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:34:43,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 18:34:43,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:43,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:43,470 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:34:43,514 INFO L256 TraceCheckUtils]: 0: Hoare triple {25#true} call ULTIMATE.init(); {25#true} is VALID [2018-11-14 18:34:43,517 INFO L273 TraceCheckUtils]: 1: Hoare triple {25#true} assume true; {25#true} is VALID [2018-11-14 18:34:43,518 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} #43#return; {25#true} is VALID [2018-11-14 18:34:43,518 INFO L256 TraceCheckUtils]: 3: Hoare triple {25#true} call #t~ret4 := main(); {25#true} is VALID [2018-11-14 18:34:43,519 INFO L273 TraceCheckUtils]: 4: Hoare triple {25#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {25#true} is VALID [2018-11-14 18:34:43,519 INFO L273 TraceCheckUtils]: 5: Hoare triple {25#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {25#true} is VALID [2018-11-14 18:34:43,527 INFO L273 TraceCheckUtils]: 6: Hoare triple {25#true} assume !true; {26#false} is VALID [2018-11-14 18:34:43,527 INFO L256 TraceCheckUtils]: 7: Hoare triple {26#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {26#false} is VALID [2018-11-14 18:34:43,528 INFO L273 TraceCheckUtils]: 8: Hoare triple {26#false} ~cond := #in~cond; {26#false} is VALID [2018-11-14 18:34:43,528 INFO L273 TraceCheckUtils]: 9: Hoare triple {26#false} assume ~cond == 0bv32; {26#false} is VALID [2018-11-14 18:34:43,528 INFO L273 TraceCheckUtils]: 10: Hoare triple {26#false} assume !false; {26#false} is VALID [2018-11-14 18:34:43,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:43,532 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 18:34:43,536 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 18:34:43,536 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 18:34:43,541 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-11-14 18:34:43,545 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:34:43,548 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 18:34:43,588 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:43,588 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 18:34:43,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 18:34:43,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 18:34:43,604 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 2 states. [2018-11-14 18:34:43,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:43,730 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2018-11-14 18:34:43,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 18:34:43,730 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-11-14 18:34:43,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 18:34:43,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 18:34:43,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 39 transitions. [2018-11-14 18:34:43,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 18:34:43,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 39 transitions. [2018-11-14 18:34:43,747 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 39 transitions. [2018-11-14 18:34:44,132 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:44,144 INFO L225 Difference]: With dead ends: 34 [2018-11-14 18:34:44,144 INFO L226 Difference]: Without dead ends: 15 [2018-11-14 18:34:44,148 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 18:34:44,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2018-11-14 18:34:44,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-11-14 18:34:44,222 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 18:34:44,223 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand 15 states. [2018-11-14 18:34:44,223 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand 15 states. [2018-11-14 18:34:44,223 INFO L87 Difference]: Start difference. First operand 15 states. Second operand 15 states. [2018-11-14 18:34:44,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:44,227 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2018-11-14 18:34:44,227 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-11-14 18:34:44,228 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:44,228 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:44,228 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand 15 states. [2018-11-14 18:34:44,228 INFO L87 Difference]: Start difference. First operand 15 states. Second operand 15 states. [2018-11-14 18:34:44,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:44,232 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2018-11-14 18:34:44,232 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-11-14 18:34:44,233 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:44,233 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:44,233 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 18:34:44,233 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 18:34:44,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-14 18:34:44,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2018-11-14 18:34:44,237 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 11 [2018-11-14 18:34:44,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 18:34:44,238 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2018-11-14 18:34:44,238 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 18:34:44,238 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-11-14 18:34:44,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-11-14 18:34:44,239 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:34:44,239 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:34:44,239 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:34:44,240 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:34:44,240 INFO L82 PathProgramCache]: Analyzing trace with hash 299545522, now seen corresponding path program 1 times [2018-11-14 18:34:44,240 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:34:44,240 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:34:44,269 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 18:34:44,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:44,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:44,308 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:34:44,647 INFO L256 TraceCheckUtils]: 0: Hoare triple {154#true} call ULTIMATE.init(); {154#true} is VALID [2018-11-14 18:34:44,647 INFO L273 TraceCheckUtils]: 1: Hoare triple {154#true} assume true; {154#true} is VALID [2018-11-14 18:34:44,648 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {154#true} {154#true} #43#return; {154#true} is VALID [2018-11-14 18:34:44,648 INFO L256 TraceCheckUtils]: 3: Hoare triple {154#true} call #t~ret4 := main(); {154#true} is VALID [2018-11-14 18:34:44,649 INFO L273 TraceCheckUtils]: 4: Hoare triple {154#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {171#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 18:34:44,654 INFO L273 TraceCheckUtils]: 5: Hoare triple {171#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:44,655 INFO L273 TraceCheckUtils]: 6: Hoare triple {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:44,656 INFO L273 TraceCheckUtils]: 7: Hoare triple {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {182#(and (= main_~n~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (not (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:44,658 INFO L256 TraceCheckUtils]: 8: Hoare triple {182#(and (= main_~n~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (not (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0))))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {186#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 18:34:44,659 INFO L273 TraceCheckUtils]: 9: Hoare triple {186#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {190#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 18:34:44,660 INFO L273 TraceCheckUtils]: 10: Hoare triple {190#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {155#false} is VALID [2018-11-14 18:34:44,660 INFO L273 TraceCheckUtils]: 11: Hoare triple {155#false} assume !false; {155#false} is VALID [2018-11-14 18:34:44,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:44,663 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 18:34:44,665 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 18:34:44,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-14 18:34:44,667 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 12 [2018-11-14 18:34:44,667 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:34:44,668 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-14 18:34:44,698 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:44,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-14 18:34:44,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-14 18:34:44,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-14 18:34:44,699 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand 7 states. [2018-11-14 18:34:45,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:45,507 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-11-14 18:34:45,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-14 18:34:45,507 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 12 [2018-11-14 18:34:45,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 18:34:45,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 18:34:45,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2018-11-14 18:34:45,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 18:34:45,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2018-11-14 18:34:45,514 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 34 transitions. [2018-11-14 18:34:45,619 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:45,621 INFO L225 Difference]: With dead ends: 30 [2018-11-14 18:34:45,622 INFO L226 Difference]: Without dead ends: 18 [2018-11-14 18:34:45,623 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-11-14 18:34:45,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-11-14 18:34:45,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-11-14 18:34:45,638 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 18:34:45,638 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand 18 states. [2018-11-14 18:34:45,638 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-14 18:34:45,639 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-14 18:34:45,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:45,640 INFO L93 Difference]: Finished difference Result 18 states and 19 transitions. [2018-11-14 18:34:45,640 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-11-14 18:34:45,641 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:45,641 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:45,641 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-14 18:34:45,641 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-14 18:34:45,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:45,643 INFO L93 Difference]: Finished difference Result 18 states and 19 transitions. [2018-11-14 18:34:45,644 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-11-14 18:34:45,644 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:45,644 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:45,644 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 18:34:45,645 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 18:34:45,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 18:34:45,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-11-14 18:34:45,646 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 12 [2018-11-14 18:34:45,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 18:34:45,647 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2018-11-14 18:34:45,647 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-14 18:34:45,647 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-11-14 18:34:45,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-14 18:34:45,648 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:34:45,648 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:34:45,648 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:34:45,649 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:34:45,649 INFO L82 PathProgramCache]: Analyzing trace with hash 2077692347, now seen corresponding path program 1 times [2018-11-14 18:34:45,649 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:34:45,649 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:34:45,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 18:34:45,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:45,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:45,704 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:34:45,988 INFO L256 TraceCheckUtils]: 0: Hoare triple {305#true} call ULTIMATE.init(); {305#true} is VALID [2018-11-14 18:34:45,988 INFO L273 TraceCheckUtils]: 1: Hoare triple {305#true} assume true; {305#true} is VALID [2018-11-14 18:34:45,989 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {305#true} {305#true} #43#return; {305#true} is VALID [2018-11-14 18:34:45,989 INFO L256 TraceCheckUtils]: 3: Hoare triple {305#true} call #t~ret4 := main(); {305#true} is VALID [2018-11-14 18:34:45,989 INFO L273 TraceCheckUtils]: 4: Hoare triple {305#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {305#true} is VALID [2018-11-14 18:34:45,991 INFO L273 TraceCheckUtils]: 5: Hoare triple {305#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:45,992 INFO L273 TraceCheckUtils]: 6: Hoare triple {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:45,993 INFO L273 TraceCheckUtils]: 7: Hoare triple {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:45,996 INFO L273 TraceCheckUtils]: 8: Hoare triple {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:45,997 INFO L273 TraceCheckUtils]: 9: Hoare triple {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:45,998 INFO L273 TraceCheckUtils]: 10: Hoare triple {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:46,000 INFO L273 TraceCheckUtils]: 11: Hoare triple {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {306#false} is VALID [2018-11-14 18:34:46,000 INFO L256 TraceCheckUtils]: 12: Hoare triple {306#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {306#false} is VALID [2018-11-14 18:34:46,001 INFO L273 TraceCheckUtils]: 13: Hoare triple {306#false} ~cond := #in~cond; {306#false} is VALID [2018-11-14 18:34:46,001 INFO L273 TraceCheckUtils]: 14: Hoare triple {306#false} assume ~cond == 0bv32; {306#false} is VALID [2018-11-14 18:34:46,002 INFO L273 TraceCheckUtils]: 15: Hoare triple {306#false} assume !false; {306#false} is VALID [2018-11-14 18:34:46,004 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:46,004 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 18:34:46,180 INFO L273 TraceCheckUtils]: 15: Hoare triple {306#false} assume !false; {306#false} is VALID [2018-11-14 18:34:46,180 INFO L273 TraceCheckUtils]: 14: Hoare triple {306#false} assume ~cond == 0bv32; {306#false} is VALID [2018-11-14 18:34:46,181 INFO L273 TraceCheckUtils]: 13: Hoare triple {306#false} ~cond := #in~cond; {306#false} is VALID [2018-11-14 18:34:46,181 INFO L256 TraceCheckUtils]: 12: Hoare triple {306#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {306#false} is VALID [2018-11-14 18:34:46,181 INFO L273 TraceCheckUtils]: 11: Hoare triple {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {306#false} is VALID [2018-11-14 18:34:46,182 INFO L273 TraceCheckUtils]: 10: Hoare triple {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume true; {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:46,184 INFO L273 TraceCheckUtils]: 9: Hoare triple {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:46,185 INFO L273 TraceCheckUtils]: 8: Hoare triple {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:46,188 INFO L273 TraceCheckUtils]: 7: Hoare triple {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:46,189 INFO L273 TraceCheckUtils]: 6: Hoare triple {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:46,190 INFO L273 TraceCheckUtils]: 5: Hoare triple {305#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:46,191 INFO L273 TraceCheckUtils]: 4: Hoare triple {305#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {305#true} is VALID [2018-11-14 18:34:46,191 INFO L256 TraceCheckUtils]: 3: Hoare triple {305#true} call #t~ret4 := main(); {305#true} is VALID [2018-11-14 18:34:46,191 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {305#true} {305#true} #43#return; {305#true} is VALID [2018-11-14 18:34:46,192 INFO L273 TraceCheckUtils]: 1: Hoare triple {305#true} assume true; {305#true} is VALID [2018-11-14 18:34:46,192 INFO L256 TraceCheckUtils]: 0: Hoare triple {305#true} call ULTIMATE.init(); {305#true} is VALID [2018-11-14 18:34:46,193 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:46,196 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 18:34:46,196 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-14 18:34:46,197 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2018-11-14 18:34:46,197 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:34:46,197 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-14 18:34:46,264 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:46,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-14 18:34:46,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-14 18:34:46,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-11-14 18:34:46,265 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand 8 states. [2018-11-14 18:34:46,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:46,819 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2018-11-14 18:34:46,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-14 18:34:46,819 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2018-11-14 18:34:46,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 18:34:46,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-14 18:34:46,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 45 transitions. [2018-11-14 18:34:46,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-14 18:34:46,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 45 transitions. [2018-11-14 18:34:46,826 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 45 transitions. [2018-11-14 18:34:46,924 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:46,927 INFO L225 Difference]: With dead ends: 38 [2018-11-14 18:34:46,927 INFO L226 Difference]: Without dead ends: 29 [2018-11-14 18:34:46,928 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-14 18:34:46,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-14 18:34:46,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-11-14 18:34:46,946 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 18:34:46,946 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 29 states. [2018-11-14 18:34:46,946 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-14 18:34:46,946 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-14 18:34:46,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:46,949 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2018-11-14 18:34:46,949 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-11-14 18:34:46,950 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:46,950 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:46,950 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-14 18:34:46,951 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-14 18:34:46,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:46,953 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2018-11-14 18:34:46,953 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-11-14 18:34:46,954 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:46,954 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:46,954 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 18:34:46,954 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 18:34:46,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-14 18:34:46,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 32 transitions. [2018-11-14 18:34:46,957 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 32 transitions. Word has length 16 [2018-11-14 18:34:46,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 18:34:46,957 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 32 transitions. [2018-11-14 18:34:46,957 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-14 18:34:46,958 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-11-14 18:34:46,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-14 18:34:46,959 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:34:46,959 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:34:46,959 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:34:46,959 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:34:46,960 INFO L82 PathProgramCache]: Analyzing trace with hash -2068472574, now seen corresponding path program 1 times [2018-11-14 18:34:46,960 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:34:46,960 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:34:46,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 18:34:47,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:47,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:47,019 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:34:47,576 INFO L256 TraceCheckUtils]: 0: Hoare triple {560#true} call ULTIMATE.init(); {560#true} is VALID [2018-11-14 18:34:47,576 INFO L273 TraceCheckUtils]: 1: Hoare triple {560#true} assume true; {560#true} is VALID [2018-11-14 18:34:47,577 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {560#true} {560#true} #43#return; {560#true} is VALID [2018-11-14 18:34:47,577 INFO L256 TraceCheckUtils]: 3: Hoare triple {560#true} call #t~ret4 := main(); {560#true} is VALID [2018-11-14 18:34:47,579 INFO L273 TraceCheckUtils]: 4: Hoare triple {560#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {577#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 18:34:47,579 INFO L273 TraceCheckUtils]: 5: Hoare triple {577#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:47,581 INFO L273 TraceCheckUtils]: 6: Hoare triple {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:47,585 INFO L273 TraceCheckUtils]: 7: Hoare triple {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {588#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:47,587 INFO L273 TraceCheckUtils]: 8: Hoare triple {588#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {592#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:47,587 INFO L273 TraceCheckUtils]: 9: Hoare triple {592#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:47,589 INFO L273 TraceCheckUtils]: 10: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:47,591 INFO L273 TraceCheckUtils]: 11: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:47,592 INFO L273 TraceCheckUtils]: 12: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:47,593 INFO L273 TraceCheckUtils]: 13: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:34:47,593 INFO L273 TraceCheckUtils]: 14: Hoare triple {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume true; {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:34:47,595 INFO L273 TraceCheckUtils]: 15: Hoare triple {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {616#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0))) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:47,598 INFO L256 TraceCheckUtils]: 16: Hoare triple {616#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0))) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {620#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 18:34:47,599 INFO L273 TraceCheckUtils]: 17: Hoare triple {620#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {624#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 18:34:47,600 INFO L273 TraceCheckUtils]: 18: Hoare triple {624#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {561#false} is VALID [2018-11-14 18:34:47,600 INFO L273 TraceCheckUtils]: 19: Hoare triple {561#false} assume !false; {561#false} is VALID [2018-11-14 18:34:47,603 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:47,603 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 18:34:48,311 INFO L273 TraceCheckUtils]: 19: Hoare triple {561#false} assume !false; {561#false} is VALID [2018-11-14 18:34:48,312 INFO L273 TraceCheckUtils]: 18: Hoare triple {634#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {561#false} is VALID [2018-11-14 18:34:48,312 INFO L273 TraceCheckUtils]: 17: Hoare triple {638#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {634#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 18:34:48,314 INFO L256 TraceCheckUtils]: 16: Hoare triple {642#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {638#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 18:34:48,315 INFO L273 TraceCheckUtils]: 15: Hoare triple {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {642#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,316 INFO L273 TraceCheckUtils]: 14: Hoare triple {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume true; {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,319 INFO L273 TraceCheckUtils]: 13: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,320 INFO L273 TraceCheckUtils]: 12: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,320 INFO L273 TraceCheckUtils]: 11: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,321 INFO L273 TraceCheckUtils]: 10: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume true; {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,355 INFO L273 TraceCheckUtils]: 9: Hoare triple {666#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,357 INFO L273 TraceCheckUtils]: 8: Hoare triple {670#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {666#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,359 INFO L273 TraceCheckUtils]: 7: Hoare triple {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {670#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:34:48,360 INFO L273 TraceCheckUtils]: 6: Hoare triple {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:48,363 INFO L273 TraceCheckUtils]: 5: Hoare triple {577#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:48,364 INFO L273 TraceCheckUtils]: 4: Hoare triple {560#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {577#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 18:34:48,364 INFO L256 TraceCheckUtils]: 3: Hoare triple {560#true} call #t~ret4 := main(); {560#true} is VALID [2018-11-14 18:34:48,365 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {560#true} {560#true} #43#return; {560#true} is VALID [2018-11-14 18:34:48,365 INFO L273 TraceCheckUtils]: 1: Hoare triple {560#true} assume true; {560#true} is VALID [2018-11-14 18:34:48,365 INFO L256 TraceCheckUtils]: 0: Hoare triple {560#true} call ULTIMATE.init(); {560#true} is VALID [2018-11-14 18:34:48,367 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:48,369 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 18:34:48,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-14 18:34:48,370 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 20 [2018-11-14 18:34:48,370 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:34:48,370 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 18:34:48,547 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:48,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 18:34:48,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 18:34:48,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=278, Unknown=0, NotChecked=0, Total=342 [2018-11-14 18:34:48,549 INFO L87 Difference]: Start difference. First operand 29 states and 32 transitions. Second operand 19 states. [2018-11-14 18:34:49,613 WARN L179 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-14 18:34:50,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:50,228 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2018-11-14 18:34:50,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-14 18:34:50,228 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 20 [2018-11-14 18:34:50,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 18:34:50,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 18:34:50,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 50 transitions. [2018-11-14 18:34:50,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 18:34:50,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 50 transitions. [2018-11-14 18:34:50,235 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 50 transitions. [2018-11-14 18:34:50,377 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:50,380 INFO L225 Difference]: With dead ends: 52 [2018-11-14 18:34:50,380 INFO L226 Difference]: Without dead ends: 36 [2018-11-14 18:34:50,381 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=126, Invalid=524, Unknown=0, NotChecked=0, Total=650 [2018-11-14 18:34:50,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-11-14 18:34:50,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2018-11-14 18:34:50,412 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 18:34:50,412 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand 33 states. [2018-11-14 18:34:50,412 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand 33 states. [2018-11-14 18:34:50,412 INFO L87 Difference]: Start difference. First operand 36 states. Second operand 33 states. [2018-11-14 18:34:50,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:50,415 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2018-11-14 18:34:50,415 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-11-14 18:34:50,416 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:50,416 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:50,416 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 36 states. [2018-11-14 18:34:50,417 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 36 states. [2018-11-14 18:34:50,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:50,419 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2018-11-14 18:34:50,419 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-11-14 18:34:50,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:34:50,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:34:50,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 18:34:50,421 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 18:34:50,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-14 18:34:50,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2018-11-14 18:34:50,423 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 35 transitions. Word has length 20 [2018-11-14 18:34:50,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 18:34:50,423 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 35 transitions. [2018-11-14 18:34:50,423 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 18:34:50,424 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 35 transitions. [2018-11-14 18:34:50,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-14 18:34:50,425 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:34:50,425 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:34:50,425 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:34:50,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:34:50,426 INFO L82 PathProgramCache]: Analyzing trace with hash 1335055195, now seen corresponding path program 2 times [2018-11-14 18:34:50,426 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:34:50,426 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:34:50,449 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 18:34:50,501 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 18:34:50,501 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 18:34:50,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:34:50,517 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:34:51,020 INFO L256 TraceCheckUtils]: 0: Hoare triple {901#true} call ULTIMATE.init(); {901#true} is VALID [2018-11-14 18:34:51,020 INFO L273 TraceCheckUtils]: 1: Hoare triple {901#true} assume true; {901#true} is VALID [2018-11-14 18:34:51,021 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {901#true} {901#true} #43#return; {901#true} is VALID [2018-11-14 18:34:51,021 INFO L256 TraceCheckUtils]: 3: Hoare triple {901#true} call #t~ret4 := main(); {901#true} is VALID [2018-11-14 18:34:51,021 INFO L273 TraceCheckUtils]: 4: Hoare triple {901#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {901#true} is VALID [2018-11-14 18:34:51,022 INFO L273 TraceCheckUtils]: 5: Hoare triple {901#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,022 INFO L273 TraceCheckUtils]: 6: Hoare triple {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,023 INFO L273 TraceCheckUtils]: 7: Hoare triple {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,024 INFO L273 TraceCheckUtils]: 8: Hoare triple {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,024 INFO L273 TraceCheckUtils]: 9: Hoare triple {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:51,029 INFO L273 TraceCheckUtils]: 10: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:51,030 INFO L273 TraceCheckUtils]: 11: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:51,031 INFO L273 TraceCheckUtils]: 12: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:51,033 INFO L273 TraceCheckUtils]: 13: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:34:51,034 INFO L273 TraceCheckUtils]: 14: Hoare triple {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume true; {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:34:51,035 INFO L273 TraceCheckUtils]: 15: Hoare triple {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:34:51,036 INFO L273 TraceCheckUtils]: 16: Hoare triple {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:34:51,037 INFO L273 TraceCheckUtils]: 17: Hoare triple {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,038 INFO L273 TraceCheckUtils]: 18: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,039 INFO L273 TraceCheckUtils]: 19: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,041 INFO L273 TraceCheckUtils]: 20: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,042 INFO L273 TraceCheckUtils]: 21: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,043 INFO L273 TraceCheckUtils]: 22: Hoare triple {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,044 INFO L273 TraceCheckUtils]: 23: Hoare triple {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,045 INFO L273 TraceCheckUtils]: 24: Hoare triple {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:34:51,047 INFO L273 TraceCheckUtils]: 25: Hoare triple {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:51,062 INFO L273 TraceCheckUtils]: 26: Hoare triple {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:34:51,064 INFO L273 TraceCheckUtils]: 27: Hoare triple {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {902#false} is VALID [2018-11-14 18:34:51,064 INFO L256 TraceCheckUtils]: 28: Hoare triple {902#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {902#false} is VALID [2018-11-14 18:34:51,065 INFO L273 TraceCheckUtils]: 29: Hoare triple {902#false} ~cond := #in~cond; {902#false} is VALID [2018-11-14 18:34:51,065 INFO L273 TraceCheckUtils]: 30: Hoare triple {902#false} assume ~cond == 0bv32; {902#false} is VALID [2018-11-14 18:34:51,065 INFO L273 TraceCheckUtils]: 31: Hoare triple {902#false} assume !false; {902#false} is VALID [2018-11-14 18:34:51,073 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:51,073 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 18:34:52,095 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 14 [2018-11-14 18:34:52,120 INFO L273 TraceCheckUtils]: 31: Hoare triple {902#false} assume !false; {902#false} is VALID [2018-11-14 18:34:52,120 INFO L273 TraceCheckUtils]: 30: Hoare triple {902#false} assume ~cond == 0bv32; {902#false} is VALID [2018-11-14 18:34:52,121 INFO L273 TraceCheckUtils]: 29: Hoare triple {902#false} ~cond := #in~cond; {902#false} is VALID [2018-11-14 18:34:52,121 INFO L256 TraceCheckUtils]: 28: Hoare triple {902#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {902#false} is VALID [2018-11-14 18:34:52,124 INFO L273 TraceCheckUtils]: 27: Hoare triple {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {902#false} is VALID [2018-11-14 18:34:52,124 INFO L273 TraceCheckUtils]: 26: Hoare triple {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume true; {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:52,126 INFO L273 TraceCheckUtils]: 25: Hoare triple {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:52,126 INFO L273 TraceCheckUtils]: 24: Hoare triple {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:52,127 INFO L273 TraceCheckUtils]: 23: Hoare triple {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:34:52,127 INFO L273 TraceCheckUtils]: 22: Hoare triple {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,159 INFO L273 TraceCheckUtils]: 21: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,159 INFO L273 TraceCheckUtils]: 20: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:52,160 INFO L273 TraceCheckUtils]: 19: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:52,160 INFO L273 TraceCheckUtils]: 18: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:52,205 INFO L273 TraceCheckUtils]: 17: Hoare triple {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:52,206 INFO L273 TraceCheckUtils]: 16: Hoare triple {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:52,207 INFO L273 TraceCheckUtils]: 15: Hoare triple {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:34:52,207 INFO L273 TraceCheckUtils]: 14: Hoare triple {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,264 INFO L273 TraceCheckUtils]: 13: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,265 INFO L273 TraceCheckUtils]: 12: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,265 INFO L273 TraceCheckUtils]: 11: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,266 INFO L273 TraceCheckUtils]: 10: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,346 INFO L273 TraceCheckUtils]: 9: Hoare triple {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,347 INFO L273 TraceCheckUtils]: 8: Hoare triple {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,347 INFO L273 TraceCheckUtils]: 7: Hoare triple {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,348 INFO L273 TraceCheckUtils]: 6: Hoare triple {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,349 INFO L273 TraceCheckUtils]: 5: Hoare triple {901#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:34:52,349 INFO L273 TraceCheckUtils]: 4: Hoare triple {901#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {901#true} is VALID [2018-11-14 18:34:52,350 INFO L256 TraceCheckUtils]: 3: Hoare triple {901#true} call #t~ret4 := main(); {901#true} is VALID [2018-11-14 18:34:52,350 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {901#true} {901#true} #43#return; {901#true} is VALID [2018-11-14 18:34:52,350 INFO L273 TraceCheckUtils]: 1: Hoare triple {901#true} assume true; {901#true} is VALID [2018-11-14 18:34:52,350 INFO L256 TraceCheckUtils]: 0: Hoare triple {901#true} call ULTIMATE.init(); {901#true} is VALID [2018-11-14 18:34:52,355 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:34:52,356 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 18:34:52,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-14 18:34:52,358 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-14 18:34:52,359 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:34:52,359 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-14 18:34:52,671 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:34:52,671 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-14 18:34:52,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-14 18:34:52,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2018-11-14 18:34:52,672 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. Second operand 20 states. [2018-11-14 18:34:54,827 WARN L179 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 24 [2018-11-14 18:34:55,547 WARN L179 SmtUtils]: Spent 537.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 25 [2018-11-14 18:34:56,078 WARN L179 SmtUtils]: Spent 277.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 15 [2018-11-14 18:34:56,395 WARN L179 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 21 [2018-11-14 18:34:56,793 WARN L179 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 15 [2018-11-14 18:34:57,845 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 12 [2018-11-14 18:34:58,416 WARN L179 SmtUtils]: Spent 295.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 24 [2018-11-14 18:34:58,876 WARN L179 SmtUtils]: Spent 206.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 20 [2018-11-14 18:34:59,325 WARN L179 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 16 [2018-11-14 18:34:59,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:34:59,519 INFO L93 Difference]: Finished difference Result 81 states and 96 transitions. [2018-11-14 18:34:59,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-14 18:34:59,519 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-14 18:34:59,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 18:34:59,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 18:34:59,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2018-11-14 18:34:59,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 18:34:59,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2018-11-14 18:34:59,526 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 85 transitions. [2018-11-14 18:35:01,146 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:35:01,149 INFO L225 Difference]: With dead ends: 81 [2018-11-14 18:35:01,149 INFO L226 Difference]: Without dead ends: 65 [2018-11-14 18:35:01,150 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=237, Invalid=755, Unknown=0, NotChecked=0, Total=992 [2018-11-14 18:35:01,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-11-14 18:35:01,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 61. [2018-11-14 18:35:01,362 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 18:35:01,362 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand 61 states. [2018-11-14 18:35:01,362 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand 61 states. [2018-11-14 18:35:01,362 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 61 states. [2018-11-14 18:35:01,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:35:01,365 INFO L93 Difference]: Finished difference Result 65 states and 72 transitions. [2018-11-14 18:35:01,365 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 72 transitions. [2018-11-14 18:35:01,366 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:35:01,366 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:35:01,367 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 65 states. [2018-11-14 18:35:01,367 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 65 states. [2018-11-14 18:35:01,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:35:01,370 INFO L93 Difference]: Finished difference Result 65 states and 72 transitions. [2018-11-14 18:35:01,370 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 72 transitions. [2018-11-14 18:35:01,371 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:35:01,371 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:35:01,371 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 18:35:01,371 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 18:35:01,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-14 18:35:01,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 68 transitions. [2018-11-14 18:35:01,374 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 68 transitions. Word has length 32 [2018-11-14 18:35:01,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 18:35:01,375 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 68 transitions. [2018-11-14 18:35:01,375 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-14 18:35:01,375 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2018-11-14 18:35:01,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-14 18:35:01,376 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:35:01,376 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:35:01,377 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:35:01,377 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:35:01,377 INFO L82 PathProgramCache]: Analyzing trace with hash 1794670498, now seen corresponding path program 3 times [2018-11-14 18:35:01,378 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:35:01,378 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:35:01,415 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 18:35:01,631 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-11-14 18:35:01,631 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 18:35:01,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:35:01,656 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:35:02,541 INFO L256 TraceCheckUtils]: 0: Hoare triple {1454#true} call ULTIMATE.init(); {1454#true} is VALID [2018-11-14 18:35:02,542 INFO L273 TraceCheckUtils]: 1: Hoare triple {1454#true} assume true; {1454#true} is VALID [2018-11-14 18:35:02,542 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1454#true} {1454#true} #43#return; {1454#true} is VALID [2018-11-14 18:35:02,542 INFO L256 TraceCheckUtils]: 3: Hoare triple {1454#true} call #t~ret4 := main(); {1454#true} is VALID [2018-11-14 18:35:02,543 INFO L273 TraceCheckUtils]: 4: Hoare triple {1454#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1471#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 18:35:02,544 INFO L273 TraceCheckUtils]: 5: Hoare triple {1471#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,544 INFO L273 TraceCheckUtils]: 6: Hoare triple {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,545 INFO L273 TraceCheckUtils]: 7: Hoare triple {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1482#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,545 INFO L273 TraceCheckUtils]: 8: Hoare triple {1482#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1486#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,547 INFO L273 TraceCheckUtils]: 9: Hoare triple {1486#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,548 INFO L273 TraceCheckUtils]: 10: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,549 INFO L273 TraceCheckUtils]: 11: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,550 INFO L273 TraceCheckUtils]: 12: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,569 INFO L273 TraceCheckUtils]: 13: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:02,571 INFO L273 TraceCheckUtils]: 14: Hoare triple {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume true; {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:02,573 INFO L273 TraceCheckUtils]: 15: Hoare triple {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:02,574 INFO L273 TraceCheckUtils]: 16: Hoare triple {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1513#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:02,575 INFO L273 TraceCheckUtils]: 17: Hoare triple {1513#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,576 INFO L273 TraceCheckUtils]: 18: Hoare triple {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,576 INFO L273 TraceCheckUtils]: 19: Hoare triple {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,577 INFO L273 TraceCheckUtils]: 20: Hoare triple {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:02,579 INFO L273 TraceCheckUtils]: 21: Hoare triple {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:02,580 INFO L273 TraceCheckUtils]: 22: Hoare triple {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:02,581 INFO L273 TraceCheckUtils]: 23: Hoare triple {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:02,582 INFO L273 TraceCheckUtils]: 24: Hoare triple {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1541#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:02,585 INFO L273 TraceCheckUtils]: 25: Hoare triple {1541#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,586 INFO L273 TraceCheckUtils]: 26: Hoare triple {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,588 INFO L273 TraceCheckUtils]: 27: Hoare triple {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,589 INFO L273 TraceCheckUtils]: 28: Hoare triple {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:02,590 INFO L273 TraceCheckUtils]: 29: Hoare triple {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:02,591 INFO L273 TraceCheckUtils]: 30: Hoare triple {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:02,592 INFO L273 TraceCheckUtils]: 31: Hoare triple {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1566#(and (bvslt (_ bv5 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:02,594 INFO L256 TraceCheckUtils]: 32: Hoare triple {1566#(and (bvslt (_ bv5 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0))))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1570#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 18:35:02,596 INFO L273 TraceCheckUtils]: 33: Hoare triple {1570#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1574#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 18:35:02,597 INFO L273 TraceCheckUtils]: 34: Hoare triple {1574#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {1455#false} is VALID [2018-11-14 18:35:02,597 INFO L273 TraceCheckUtils]: 35: Hoare triple {1455#false} assume !false; {1455#false} is VALID [2018-11-14 18:35:02,602 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:35:02,602 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 18:35:05,477 WARN L179 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 20 [2018-11-14 18:35:05,528 INFO L273 TraceCheckUtils]: 35: Hoare triple {1455#false} assume !false; {1455#false} is VALID [2018-11-14 18:35:05,528 INFO L273 TraceCheckUtils]: 34: Hoare triple {1584#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {1455#false} is VALID [2018-11-14 18:35:05,545 INFO L273 TraceCheckUtils]: 33: Hoare triple {1588#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1584#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 18:35:05,561 INFO L256 TraceCheckUtils]: 32: Hoare triple {1592#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1588#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 18:35:05,569 INFO L273 TraceCheckUtils]: 31: Hoare triple {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1592#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,571 INFO L273 TraceCheckUtils]: 30: Hoare triple {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume true; {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,574 INFO L273 TraceCheckUtils]: 29: Hoare triple {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,574 INFO L273 TraceCheckUtils]: 28: Hoare triple {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,580 INFO L273 TraceCheckUtils]: 27: Hoare triple {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,581 INFO L273 TraceCheckUtils]: 26: Hoare triple {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,601 INFO L273 TraceCheckUtils]: 25: Hoare triple {1617#(or (= main_~n~0 main_~k~0) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,602 INFO L273 TraceCheckUtils]: 24: Hoare triple {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1617#(or (= main_~n~0 main_~k~0) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,603 INFO L273 TraceCheckUtils]: 23: Hoare triple {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,603 INFO L273 TraceCheckUtils]: 22: Hoare triple {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume true; {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,641 INFO L273 TraceCheckUtils]: 21: Hoare triple {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,642 INFO L273 TraceCheckUtils]: 20: Hoare triple {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,642 INFO L273 TraceCheckUtils]: 19: Hoare triple {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,643 INFO L273 TraceCheckUtils]: 18: Hoare triple {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,699 INFO L273 TraceCheckUtils]: 17: Hoare triple {1645#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,727 INFO L273 TraceCheckUtils]: 16: Hoare triple {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1645#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,728 INFO L273 TraceCheckUtils]: 15: Hoare triple {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,728 INFO L273 TraceCheckUtils]: 14: Hoare triple {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume true; {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,804 INFO L273 TraceCheckUtils]: 13: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 18:35:05,805 INFO L273 TraceCheckUtils]: 12: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,805 INFO L273 TraceCheckUtils]: 11: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,805 INFO L273 TraceCheckUtils]: 10: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,884 INFO L273 TraceCheckUtils]: 9: Hoare triple {1672#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,909 INFO L273 TraceCheckUtils]: 8: Hoare triple {1676#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1672#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,910 INFO L273 TraceCheckUtils]: 7: Hoare triple {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1676#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,911 INFO L273 TraceCheckUtils]: 6: Hoare triple {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,912 INFO L273 TraceCheckUtils]: 5: Hoare triple {1471#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:05,912 INFO L273 TraceCheckUtils]: 4: Hoare triple {1454#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1471#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 18:35:05,913 INFO L256 TraceCheckUtils]: 3: Hoare triple {1454#true} call #t~ret4 := main(); {1454#true} is VALID [2018-11-14 18:35:05,913 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1454#true} {1454#true} #43#return; {1454#true} is VALID [2018-11-14 18:35:05,913 INFO L273 TraceCheckUtils]: 1: Hoare triple {1454#true} assume true; {1454#true} is VALID [2018-11-14 18:35:05,913 INFO L256 TraceCheckUtils]: 0: Hoare triple {1454#true} call ULTIMATE.init(); {1454#true} is VALID [2018-11-14 18:35:05,920 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:35:05,932 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 18:35:05,932 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 35 [2018-11-14 18:35:05,934 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 36 [2018-11-14 18:35:05,934 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:35:05,934 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 35 states. [2018-11-14 18:35:06,390 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:35:06,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-11-14 18:35:06,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-11-14 18:35:06,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-11-14 18:35:06,391 INFO L87 Difference]: Start difference. First operand 61 states and 68 transitions. Second operand 35 states. [2018-11-14 18:35:07,258 WARN L179 SmtUtils]: Spent 274.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-11-14 18:35:10,056 WARN L179 SmtUtils]: Spent 279.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-14 18:35:10,794 WARN L179 SmtUtils]: Spent 258.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-14 18:35:11,473 WARN L179 SmtUtils]: Spent 206.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-14 18:35:11,979 WARN L179 SmtUtils]: Spent 199.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-14 18:35:12,886 WARN L179 SmtUtils]: Spent 541.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2018-11-14 18:35:13,281 WARN L179 SmtUtils]: Spent 182.00 ms on a formula simplification that was a NOOP. DAG size: 35 [2018-11-14 18:35:13,980 WARN L179 SmtUtils]: Spent 256.00 ms on a formula simplification that was a NOOP. DAG size: 41 [2018-11-14 18:35:14,402 WARN L179 SmtUtils]: Spent 159.00 ms on a formula simplification that was a NOOP. DAG size: 35 [2018-11-14 18:35:15,235 WARN L179 SmtUtils]: Spent 489.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 39 [2018-11-14 18:35:16,149 WARN L179 SmtUtils]: Spent 442.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 40 [2018-11-14 18:35:16,576 WARN L179 SmtUtils]: Spent 168.00 ms on a formula simplification that was a NOOP. DAG size: 39 [2018-11-14 18:35:17,084 WARN L179 SmtUtils]: Spent 162.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-14 18:35:17,569 WARN L179 SmtUtils]: Spent 150.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-14 18:35:18,090 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-14 18:35:18,476 WARN L179 SmtUtils]: Spent 120.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-14 18:35:19,452 WARN L179 SmtUtils]: Spent 411.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 35 [2018-11-14 18:35:19,852 WARN L179 SmtUtils]: Spent 163.00 ms on a formula simplification that was a NOOP. DAG size: 37 [2018-11-14 18:35:20,326 WARN L179 SmtUtils]: Spent 134.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-14 18:35:20,804 WARN L179 SmtUtils]: Spent 132.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-14 18:35:21,664 WARN L179 SmtUtils]: Spent 109.00 ms on a formula simplification that was a NOOP. DAG size: 32 [2018-11-14 18:35:22,684 WARN L179 SmtUtils]: Spent 395.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 34 [2018-11-14 18:35:23,076 WARN L179 SmtUtils]: Spent 136.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-14 18:35:24,145 WARN L179 SmtUtils]: Spent 603.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 47 [2018-11-14 18:35:24,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:35:24,348 INFO L93 Difference]: Finished difference Result 127 states and 149 transitions. [2018-11-14 18:35:24,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-14 18:35:24,348 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 36 [2018-11-14 18:35:24,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 18:35:24,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-14 18:35:24,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 93 transitions. [2018-11-14 18:35:24,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-14 18:35:24,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 93 transitions. [2018-11-14 18:35:24,356 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 43 states and 93 transitions. [2018-11-14 18:35:30,522 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 93 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:35:30,524 INFO L225 Difference]: With dead ends: 127 [2018-11-14 18:35:30,524 INFO L226 Difference]: Without dead ends: 95 [2018-11-14 18:35:30,526 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 13.8s TimeCoverageRelationStatistics Valid=784, Invalid=2998, Unknown=0, NotChecked=0, Total=3782 [2018-11-14 18:35:30,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-14 18:35:30,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 65. [2018-11-14 18:35:30,668 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 18:35:30,668 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand 65 states. [2018-11-14 18:35:30,669 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand 65 states. [2018-11-14 18:35:30,669 INFO L87 Difference]: Start difference. First operand 95 states. Second operand 65 states. [2018-11-14 18:35:30,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:35:30,675 INFO L93 Difference]: Finished difference Result 95 states and 107 transitions. [2018-11-14 18:35:30,676 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 107 transitions. [2018-11-14 18:35:30,676 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:35:30,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:35:30,677 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand 95 states. [2018-11-14 18:35:30,677 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 95 states. [2018-11-14 18:35:30,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 18:35:30,686 INFO L93 Difference]: Finished difference Result 95 states and 107 transitions. [2018-11-14 18:35:30,686 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 107 transitions. [2018-11-14 18:35:30,687 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 18:35:30,687 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 18:35:30,687 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 18:35:30,687 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 18:35:30,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-11-14 18:35:30,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 71 transitions. [2018-11-14 18:35:30,693 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 71 transitions. Word has length 36 [2018-11-14 18:35:30,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 18:35:30,693 INFO L480 AbstractCegarLoop]: Abstraction has 65 states and 71 transitions. [2018-11-14 18:35:30,693 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-11-14 18:35:30,693 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 71 transitions. [2018-11-14 18:35:30,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-14 18:35:30,699 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 18:35:30,699 INFO L375 BasicCegarLoop]: trace histogram [14, 13, 13, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 18:35:30,699 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 18:35:30,700 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 18:35:30,700 INFO L82 PathProgramCache]: Analyzing trace with hash -744286565, now seen corresponding path program 4 times [2018-11-14 18:35:30,700 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 18:35:30,700 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 18:35:30,728 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 18:35:30,817 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 18:35:30,817 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 18:35:30,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 18:35:30,856 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 18:35:31,708 INFO L256 TraceCheckUtils]: 0: Hoare triple {2199#true} call ULTIMATE.init(); {2199#true} is VALID [2018-11-14 18:35:31,708 INFO L273 TraceCheckUtils]: 1: Hoare triple {2199#true} assume true; {2199#true} is VALID [2018-11-14 18:35:31,708 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2199#true} {2199#true} #43#return; {2199#true} is VALID [2018-11-14 18:35:31,709 INFO L256 TraceCheckUtils]: 3: Hoare triple {2199#true} call #t~ret4 := main(); {2199#true} is VALID [2018-11-14 18:35:31,709 INFO L273 TraceCheckUtils]: 4: Hoare triple {2199#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {2199#true} is VALID [2018-11-14 18:35:31,709 INFO L273 TraceCheckUtils]: 5: Hoare triple {2199#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,710 INFO L273 TraceCheckUtils]: 6: Hoare triple {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,710 INFO L273 TraceCheckUtils]: 7: Hoare triple {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,711 INFO L273 TraceCheckUtils]: 8: Hoare triple {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,712 INFO L273 TraceCheckUtils]: 9: Hoare triple {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,713 INFO L273 TraceCheckUtils]: 10: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,714 INFO L273 TraceCheckUtils]: 11: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,714 INFO L273 TraceCheckUtils]: 12: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,715 INFO L273 TraceCheckUtils]: 13: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:31,716 INFO L273 TraceCheckUtils]: 14: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume true; {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:31,717 INFO L273 TraceCheckUtils]: 15: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:31,718 INFO L273 TraceCheckUtils]: 16: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 18:35:31,719 INFO L273 TraceCheckUtils]: 17: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,722 INFO L273 TraceCheckUtils]: 18: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,722 INFO L273 TraceCheckUtils]: 19: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,723 INFO L273 TraceCheckUtils]: 20: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,724 INFO L273 TraceCheckUtils]: 21: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,725 INFO L273 TraceCheckUtils]: 22: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,727 INFO L273 TraceCheckUtils]: 23: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,731 INFO L273 TraceCheckUtils]: 24: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,733 INFO L273 TraceCheckUtils]: 25: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,733 INFO L273 TraceCheckUtils]: 26: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,734 INFO L273 TraceCheckUtils]: 27: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,734 INFO L273 TraceCheckUtils]: 28: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 18:35:31,735 INFO L273 TraceCheckUtils]: 29: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,736 INFO L273 TraceCheckUtils]: 30: Hoare triple {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,737 INFO L273 TraceCheckUtils]: 31: Hoare triple {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,737 INFO L273 TraceCheckUtils]: 32: Hoare triple {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,738 INFO L273 TraceCheckUtils]: 33: Hoare triple {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,739 INFO L273 TraceCheckUtils]: 34: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,740 INFO L273 TraceCheckUtils]: 35: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,741 INFO L273 TraceCheckUtils]: 36: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,742 INFO L273 TraceCheckUtils]: 37: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,743 INFO L273 TraceCheckUtils]: 38: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,744 INFO L273 TraceCheckUtils]: 39: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,745 INFO L273 TraceCheckUtils]: 40: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,747 INFO L273 TraceCheckUtils]: 41: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,747 INFO L273 TraceCheckUtils]: 42: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,748 INFO L273 TraceCheckUtils]: 43: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,749 INFO L273 TraceCheckUtils]: 44: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 18:35:31,750 INFO L273 TraceCheckUtils]: 45: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 18:35:31,757 INFO L273 TraceCheckUtils]: 46: Hoare triple {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume true; {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 18:35:31,759 INFO L273 TraceCheckUtils]: 47: Hoare triple {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 18:35:31,759 INFO L273 TraceCheckUtils]: 48: Hoare triple {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 18:35:31,760 INFO L273 TraceCheckUtils]: 49: Hoare triple {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,760 INFO L273 TraceCheckUtils]: 50: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,761 INFO L273 TraceCheckUtils]: 51: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,761 INFO L273 TraceCheckUtils]: 52: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,762 INFO L273 TraceCheckUtils]: 53: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,763 INFO L273 TraceCheckUtils]: 54: Hoare triple {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,764 INFO L273 TraceCheckUtils]: 55: Hoare triple {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-14 18:35:31,765 INFO L273 TraceCheckUtils]: 56: Hoare triple {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-14 18:35:31,768 INFO L273 TraceCheckUtils]: 57: Hoare triple {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,769 INFO L273 TraceCheckUtils]: 58: Hoare triple {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:31,770 INFO L273 TraceCheckUtils]: 59: Hoare triple {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2200#false} is VALID [2018-11-14 18:35:31,771 INFO L256 TraceCheckUtils]: 60: Hoare triple {2200#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {2200#false} is VALID [2018-11-14 18:35:31,771 INFO L273 TraceCheckUtils]: 61: Hoare triple {2200#false} ~cond := #in~cond; {2200#false} is VALID [2018-11-14 18:35:31,771 INFO L273 TraceCheckUtils]: 62: Hoare triple {2200#false} assume ~cond == 0bv32; {2200#false} is VALID [2018-11-14 18:35:31,771 INFO L273 TraceCheckUtils]: 63: Hoare triple {2200#false} assume !false; {2200#false} is VALID [2018-11-14 18:35:31,785 INFO L134 CoverageAnalysis]: Checked inductivity of 338 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:35:31,785 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 18:35:33,479 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-14 18:35:35,410 WARN L179 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-14 18:35:35,442 INFO L273 TraceCheckUtils]: 63: Hoare triple {2200#false} assume !false; {2200#false} is VALID [2018-11-14 18:35:35,443 INFO L273 TraceCheckUtils]: 62: Hoare triple {2200#false} assume ~cond == 0bv32; {2200#false} is VALID [2018-11-14 18:35:35,443 INFO L273 TraceCheckUtils]: 61: Hoare triple {2200#false} ~cond := #in~cond; {2200#false} is VALID [2018-11-14 18:35:35,443 INFO L256 TraceCheckUtils]: 60: Hoare triple {2200#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {2200#false} is VALID [2018-11-14 18:35:35,451 INFO L273 TraceCheckUtils]: 59: Hoare triple {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2200#false} is VALID [2018-11-14 18:35:35,451 INFO L273 TraceCheckUtils]: 58: Hoare triple {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume true; {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:35:35,454 INFO L273 TraceCheckUtils]: 57: Hoare triple {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:35:35,454 INFO L273 TraceCheckUtils]: 56: Hoare triple {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:35:35,455 INFO L273 TraceCheckUtils]: 55: Hoare triple {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 18:35:35,455 INFO L273 TraceCheckUtils]: 54: Hoare triple {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,471 INFO L273 TraceCheckUtils]: 53: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,472 INFO L273 TraceCheckUtils]: 52: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:35,472 INFO L273 TraceCheckUtils]: 51: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:35,472 INFO L273 TraceCheckUtils]: 50: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:35,530 INFO L273 TraceCheckUtils]: 49: Hoare triple {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:35,531 INFO L273 TraceCheckUtils]: 48: Hoare triple {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:35,531 INFO L273 TraceCheckUtils]: 47: Hoare triple {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:35,532 INFO L273 TraceCheckUtils]: 46: Hoare triple {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,606 INFO L273 TraceCheckUtils]: 45: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,606 INFO L273 TraceCheckUtils]: 44: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,607 INFO L273 TraceCheckUtils]: 43: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,607 INFO L273 TraceCheckUtils]: 42: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,677 INFO L273 TraceCheckUtils]: 41: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,678 INFO L273 TraceCheckUtils]: 40: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,678 INFO L273 TraceCheckUtils]: 39: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,678 INFO L273 TraceCheckUtils]: 38: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,745 INFO L273 TraceCheckUtils]: 37: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,746 INFO L273 TraceCheckUtils]: 36: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,746 INFO L273 TraceCheckUtils]: 35: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,746 INFO L273 TraceCheckUtils]: 34: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,851 INFO L273 TraceCheckUtils]: 33: Hoare triple {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,852 INFO L273 TraceCheckUtils]: 32: Hoare triple {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,852 INFO L273 TraceCheckUtils]: 31: Hoare triple {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,853 INFO L273 TraceCheckUtils]: 30: Hoare triple {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,905 INFO L273 TraceCheckUtils]: 29: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,905 INFO L273 TraceCheckUtils]: 28: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,906 INFO L273 TraceCheckUtils]: 27: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,906 INFO L273 TraceCheckUtils]: 26: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:35,999 INFO L273 TraceCheckUtils]: 25: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,000 INFO L273 TraceCheckUtils]: 24: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,000 INFO L273 TraceCheckUtils]: 23: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,001 INFO L273 TraceCheckUtils]: 22: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,057 INFO L273 TraceCheckUtils]: 21: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,058 INFO L273 TraceCheckUtils]: 20: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:36,058 INFO L273 TraceCheckUtils]: 19: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:36,059 INFO L273 TraceCheckUtils]: 18: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:36,169 INFO L273 TraceCheckUtils]: 17: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 18:35:36,170 INFO L273 TraceCheckUtils]: 16: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,170 INFO L273 TraceCheckUtils]: 15: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,178 INFO L273 TraceCheckUtils]: 14: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,302 INFO L273 TraceCheckUtils]: 13: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,302 INFO L273 TraceCheckUtils]: 12: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,303 INFO L273 TraceCheckUtils]: 11: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,303 INFO L273 TraceCheckUtils]: 10: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,426 INFO L273 TraceCheckUtils]: 9: Hoare triple {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,426 INFO L273 TraceCheckUtils]: 8: Hoare triple {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,427 INFO L273 TraceCheckUtils]: 7: Hoare triple {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,427 INFO L273 TraceCheckUtils]: 6: Hoare triple {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,429 INFO L273 TraceCheckUtils]: 5: Hoare triple {2199#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 18:35:36,430 INFO L273 TraceCheckUtils]: 4: Hoare triple {2199#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {2199#true} is VALID [2018-11-14 18:35:36,430 INFO L256 TraceCheckUtils]: 3: Hoare triple {2199#true} call #t~ret4 := main(); {2199#true} is VALID [2018-11-14 18:35:36,430 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2199#true} {2199#true} #43#return; {2199#true} is VALID [2018-11-14 18:35:36,431 INFO L273 TraceCheckUtils]: 1: Hoare triple {2199#true} assume true; {2199#true} is VALID [2018-11-14 18:35:36,431 INFO L256 TraceCheckUtils]: 0: Hoare triple {2199#true} call ULTIMATE.init(); {2199#true} is VALID [2018-11-14 18:35:36,444 INFO L134 CoverageAnalysis]: Checked inductivity of 338 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 18:35:36,446 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 18:35:36,446 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 38 [2018-11-14 18:35:36,448 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 64 [2018-11-14 18:35:36,448 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 18:35:36,449 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 38 states. [2018-11-14 18:35:37,621 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 18:35:37,622 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-14 18:35:37,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-14 18:35:37,623 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=245, Invalid=1161, Unknown=0, NotChecked=0, Total=1406 [2018-11-14 18:35:37,623 INFO L87 Difference]: Start difference. First operand 65 states and 71 transitions. Second operand 38 states. [2018-11-14 18:35:38,708 WARN L179 SmtUtils]: Spent 356.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-11-14 18:35:45,278 WARN L179 SmtUtils]: Spent 934.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 56 [2018-11-14 18:35:47,302 WARN L179 SmtUtils]: Spent 1.22 s on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-11-14 18:35:49,451 WARN L179 SmtUtils]: Spent 1.13 s on a formula simplification. DAG size of input: 68 DAG size of output: 27 [2018-11-14 18:35:51,378 WARN L179 SmtUtils]: Spent 809.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 53 [2018-11-14 18:35:53,575 WARN L179 SmtUtils]: Spent 1.01 s on a formula simplification. DAG size of input: 63 DAG size of output: 27 [2018-11-14 18:35:56,573 WARN L179 SmtUtils]: Spent 264.00 ms on a formula simplification that was a NOOP. DAG size: 50 [2018-11-14 18:35:58,454 WARN L179 SmtUtils]: Spent 1.04 s on a formula simplification. DAG size of input: 58 DAG size of output: 24 [2018-11-14 18:35:59,380 WARN L179 SmtUtils]: Spent 617.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 48 [2018-11-14 18:36:01,227 WARN L179 SmtUtils]: Spent 1.21 s on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-11-14 18:36:03,444 WARN L179 SmtUtils]: Spent 1.06 s on a formula simplification. DAG size of input: 66 DAG size of output: 32 [2018-11-14 18:36:05,616 WARN L179 SmtUtils]: Spent 962.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 32 [2018-11-14 18:36:07,501 WARN L179 SmtUtils]: Spent 878.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 29 [2018-11-14 18:36:09,581 WARN L179 SmtUtils]: Spent 1.33 s on a formula simplification. DAG size of input: 64 DAG size of output: 37 [2018-11-14 18:36:12,031 WARN L179 SmtUtils]: Spent 884.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 37 [2018-11-14 18:36:13,820 WARN L179 SmtUtils]: Spent 853.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 34 [2018-11-14 18:36:15,439 WARN L179 SmtUtils]: Spent 939.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 42 [2018-11-14 18:36:17,685 WARN L179 SmtUtils]: Spent 537.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 42 [2018-11-14 18:36:19,019 WARN L179 SmtUtils]: Spent 568.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 39 [2018-11-14 18:36:20,514 WARN L179 SmtUtils]: Spent 820.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 47 [2018-11-14 18:36:22,933 WARN L179 SmtUtils]: Spent 574.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 47 [2018-11-14 18:36:24,213 WARN L179 SmtUtils]: Spent 648.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 44 [2018-11-14 18:36:25,871 WARN L179 SmtUtils]: Spent 955.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 52