java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector-Const.epf -i ../../../trunk/examples/svcomp/array-tiling/rew_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 17:56:24,191 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 17:56:24,196 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 17:56:24,215 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 17:56:24,215 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 17:56:24,216 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 17:56:24,217 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 17:56:24,219 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 17:56:24,221 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 17:56:24,222 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 17:56:24,223 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 17:56:24,223 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 17:56:24,224 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 17:56:24,225 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 17:56:24,226 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 17:56:24,227 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 17:56:24,228 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 17:56:24,230 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 17:56:24,232 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 17:56:24,233 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 17:56:24,234 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 17:56:24,236 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 17:56:24,238 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-14 17:56:24,238 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-14 17:56:24,238 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-14 17:56:24,239 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-14 17:56:24,240 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-14 17:56:24,241 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-14 17:56:24,242 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-14 17:56:24,243 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-14 17:56:24,243 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-14 17:56:24,244 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-14 17:56:24,244 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-14 17:56:24,244 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-14 17:56:24,248 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-14 17:56:24,248 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-14 17:56:24,249 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector-Const.epf [2018-11-14 17:56:24,265 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 17:56:24,265 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 17:56:24,266 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 17:56:24,266 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 17:56:24,266 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 17:56:24,266 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 17:56:24,267 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 17:56:24,267 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 17:56:24,267 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 17:56:24,267 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 17:56:24,268 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 17:56:24,268 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 17:56:24,268 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 17:56:24,268 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 17:56:24,268 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-14 17:56:24,268 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-14 17:56:24,269 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 17:56:24,269 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 17:56:24,269 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-14 17:56:24,269 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 17:56:24,269 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 17:56:24,270 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 17:56:24,270 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 17:56:24,270 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 17:56:24,270 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:56:24,270 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 17:56:24,271 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 17:56:24,271 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 17:56:24,271 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-14 17:56:24,271 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 17:56:24,271 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-14 17:56:24,272 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-14 17:56:24,272 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 17:56:24,317 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 17:56:24,339 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 17:56:24,343 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 17:56:24,344 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 17:56:24,345 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 17:56:24,346 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/rew_true-unreach-call.i [2018-11-14 17:56:24,409 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d54a63547/5c44f2dfc065466b907bd1735ce59a6c/FLAG30b3b73e9 [2018-11-14 17:56:24,882 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 17:56:24,885 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/rew_true-unreach-call.i [2018-11-14 17:56:24,892 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d54a63547/5c44f2dfc065466b907bd1735ce59a6c/FLAG30b3b73e9 [2018-11-14 17:56:24,910 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/d54a63547/5c44f2dfc065466b907bd1735ce59a6c [2018-11-14 17:56:24,919 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 17:56:24,921 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 17:56:24,922 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 17:56:24,922 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 17:56:24,926 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 17:56:24,928 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:56:24" (1/1) ... [2018-11-14 17:56:24,931 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5043f759 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:24, skipping insertion in model container [2018-11-14 17:56:24,931 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:56:24" (1/1) ... [2018-11-14 17:56:24,942 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 17:56:24,965 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 17:56:25,211 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:56:25,217 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 17:56:25,244 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:56:25,266 INFO L195 MainTranslator]: Completed translation [2018-11-14 17:56:25,267 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25 WrapperNode [2018-11-14 17:56:25,267 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 17:56:25,268 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 17:56:25,268 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 17:56:25,268 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 17:56:25,282 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,283 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,292 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,292 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,305 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,311 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,313 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... [2018-11-14 17:56:25,315 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 17:56:25,316 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 17:56:25,316 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 17:56:25,316 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 17:56:25,317 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:56:25,458 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 17:56:25,458 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 17:56:25,459 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 17:56:25,459 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 17:56:25,459 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 17:56:25,459 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-14 17:56:25,459 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 17:56:25,460 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-14 17:56:25,460 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 17:56:25,460 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-14 17:56:25,460 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-14 17:56:25,460 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-14 17:56:25,461 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-14 17:56:25,461 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 17:56:25,461 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 17:56:25,461 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-14 17:56:26,033 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 17:56:26,034 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:56:26 BoogieIcfgContainer [2018-11-14 17:56:26,034 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 17:56:26,035 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 17:56:26,035 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 17:56:26,039 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 17:56:26,039 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 05:56:24" (1/3) ... [2018-11-14 17:56:26,040 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3047ed1a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:56:26, skipping insertion in model container [2018-11-14 17:56:26,040 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:56:25" (2/3) ... [2018-11-14 17:56:26,041 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3047ed1a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:56:26, skipping insertion in model container [2018-11-14 17:56:26,041 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:56:26" (3/3) ... [2018-11-14 17:56:26,043 INFO L112 eAbstractionObserver]: Analyzing ICFG rew_true-unreach-call.i [2018-11-14 17:56:26,051 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 17:56:26,059 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 17:56:26,076 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 17:56:26,111 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 17:56:26,112 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 17:56:26,112 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 17:56:26,112 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 17:56:26,112 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 17:56:26,112 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 17:56:26,113 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 17:56:26,113 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 17:56:26,113 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 17:56:26,132 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states. [2018-11-14 17:56:26,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-14 17:56:26,140 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:56:26,141 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:56:26,143 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:56:26,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:56:26,150 INFO L82 PathProgramCache]: Analyzing trace with hash -780591074, now seen corresponding path program 1 times [2018-11-14 17:56:26,154 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:56:26,154 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:56:26,173 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:56:26,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:26,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:26,255 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:56:26,436 INFO L256 TraceCheckUtils]: 0: Hoare triple {33#true} call ULTIMATE.init(); {33#true} is VALID [2018-11-14 17:56:26,441 INFO L273 TraceCheckUtils]: 1: Hoare triple {33#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {33#true} is VALID [2018-11-14 17:56:26,441 INFO L273 TraceCheckUtils]: 2: Hoare triple {33#true} assume true; {33#true} is VALID [2018-11-14 17:56:26,442 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {33#true} {33#true} #65#return; {33#true} is VALID [2018-11-14 17:56:26,442 INFO L256 TraceCheckUtils]: 4: Hoare triple {33#true} call #t~ret5 := main(); {33#true} is VALID [2018-11-14 17:56:26,443 INFO L273 TraceCheckUtils]: 5: Hoare triple {33#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {33#true} is VALID [2018-11-14 17:56:26,443 INFO L273 TraceCheckUtils]: 6: Hoare triple {33#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {33#true} is VALID [2018-11-14 17:56:26,456 INFO L273 TraceCheckUtils]: 7: Hoare triple {33#true} assume !true; {34#false} is VALID [2018-11-14 17:56:26,457 INFO L273 TraceCheckUtils]: 8: Hoare triple {34#false} ~i~0 := 0bv32; {34#false} is VALID [2018-11-14 17:56:26,457 INFO L273 TraceCheckUtils]: 9: Hoare triple {34#false} assume true; {34#false} is VALID [2018-11-14 17:56:26,458 INFO L273 TraceCheckUtils]: 10: Hoare triple {34#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {34#false} is VALID [2018-11-14 17:56:26,458 INFO L256 TraceCheckUtils]: 11: Hoare triple {34#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {34#false} is VALID [2018-11-14 17:56:26,458 INFO L273 TraceCheckUtils]: 12: Hoare triple {34#false} ~cond := #in~cond; {34#false} is VALID [2018-11-14 17:56:26,459 INFO L273 TraceCheckUtils]: 13: Hoare triple {34#false} assume ~cond == 0bv32; {34#false} is VALID [2018-11-14 17:56:26,459 INFO L273 TraceCheckUtils]: 14: Hoare triple {34#false} assume !false; {34#false} is VALID [2018-11-14 17:56:26,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:26,463 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 17:56:26,471 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:56:26,472 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 17:56:26,478 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 15 [2018-11-14 17:56:26,481 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:56:26,485 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 17:56:26,636 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:26,636 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 17:56:26,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 17:56:26,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:56:26,650 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 2 states. [2018-11-14 17:56:26,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:26,785 INFO L93 Difference]: Finished difference Result 48 states and 57 transitions. [2018-11-14 17:56:26,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 17:56:26,786 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 15 [2018-11-14 17:56:26,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:56:26,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:56:26,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 57 transitions. [2018-11-14 17:56:26,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:56:26,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 57 transitions. [2018-11-14 17:56:26,805 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 57 transitions. [2018-11-14 17:56:27,084 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:27,096 INFO L225 Difference]: With dead ends: 48 [2018-11-14 17:56:27,096 INFO L226 Difference]: Without dead ends: 24 [2018-11-14 17:56:27,100 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:56:27,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-11-14 17:56:27,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-11-14 17:56:27,142 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:56:27,143 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand 24 states. [2018-11-14 17:56:27,144 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-14 17:56:27,144 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-14 17:56:27,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:27,148 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2018-11-14 17:56:27,149 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-14 17:56:27,149 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:27,150 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:27,150 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-14 17:56:27,150 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-14 17:56:27,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:27,155 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2018-11-14 17:56:27,155 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-14 17:56:27,156 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:27,156 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:27,156 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:56:27,156 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:56:27,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-14 17:56:27,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2018-11-14 17:56:27,161 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 15 [2018-11-14 17:56:27,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:56:27,162 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2018-11-14 17:56:27,162 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 17:56:27,162 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-14 17:56:27,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-14 17:56:27,163 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:56:27,164 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:56:27,164 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:56:27,164 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:56:27,165 INFO L82 PathProgramCache]: Analyzing trace with hash 629098255, now seen corresponding path program 1 times [2018-11-14 17:56:27,165 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:56:27,165 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:56:27,191 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:56:27,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:27,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:27,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:56:27,363 INFO L256 TraceCheckUtils]: 0: Hoare triple {218#true} call ULTIMATE.init(); {218#true} is VALID [2018-11-14 17:56:27,363 INFO L273 TraceCheckUtils]: 1: Hoare triple {218#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {218#true} is VALID [2018-11-14 17:56:27,364 INFO L273 TraceCheckUtils]: 2: Hoare triple {218#true} assume true; {218#true} is VALID [2018-11-14 17:56:27,364 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {218#true} {218#true} #65#return; {218#true} is VALID [2018-11-14 17:56:27,365 INFO L256 TraceCheckUtils]: 4: Hoare triple {218#true} call #t~ret5 := main(); {218#true} is VALID [2018-11-14 17:56:27,365 INFO L273 TraceCheckUtils]: 5: Hoare triple {218#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {218#true} is VALID [2018-11-14 17:56:27,367 INFO L273 TraceCheckUtils]: 6: Hoare triple {218#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:27,384 INFO L273 TraceCheckUtils]: 7: Hoare triple {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:27,393 INFO L273 TraceCheckUtils]: 8: Hoare triple {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {219#false} is VALID [2018-11-14 17:56:27,394 INFO L273 TraceCheckUtils]: 9: Hoare triple {219#false} ~i~0 := 0bv32; {219#false} is VALID [2018-11-14 17:56:27,394 INFO L273 TraceCheckUtils]: 10: Hoare triple {219#false} assume true; {219#false} is VALID [2018-11-14 17:56:27,395 INFO L273 TraceCheckUtils]: 11: Hoare triple {219#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {219#false} is VALID [2018-11-14 17:56:27,395 INFO L256 TraceCheckUtils]: 12: Hoare triple {219#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {219#false} is VALID [2018-11-14 17:56:27,395 INFO L273 TraceCheckUtils]: 13: Hoare triple {219#false} ~cond := #in~cond; {219#false} is VALID [2018-11-14 17:56:27,396 INFO L273 TraceCheckUtils]: 14: Hoare triple {219#false} assume ~cond == 0bv32; {219#false} is VALID [2018-11-14 17:56:27,396 INFO L273 TraceCheckUtils]: 15: Hoare triple {219#false} assume !false; {219#false} is VALID [2018-11-14 17:56:27,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:27,399 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 17:56:27,404 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:56:27,405 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-14 17:56:27,406 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-14 17:56:27,407 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:56:27,407 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-14 17:56:27,457 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:27,457 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-14 17:56:27,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-14 17:56:27,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-14 17:56:27,458 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand 3 states. [2018-11-14 17:56:28,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:28,005 INFO L93 Difference]: Finished difference Result 46 states and 52 transitions. [2018-11-14 17:56:28,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-14 17:56:28,006 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-14 17:56:28,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:56:28,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-14 17:56:28,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 52 transitions. [2018-11-14 17:56:28,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-14 17:56:28,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 52 transitions. [2018-11-14 17:56:28,013 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 52 transitions. [2018-11-14 17:56:28,135 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:28,139 INFO L225 Difference]: With dead ends: 46 [2018-11-14 17:56:28,139 INFO L226 Difference]: Without dead ends: 29 [2018-11-14 17:56:28,141 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-14 17:56:28,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-14 17:56:28,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 27. [2018-11-14 17:56:28,153 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:56:28,153 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 27 states. [2018-11-14 17:56:28,153 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 27 states. [2018-11-14 17:56:28,154 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 27 states. [2018-11-14 17:56:28,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:28,156 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2018-11-14 17:56:28,157 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-11-14 17:56:28,157 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:28,157 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:28,158 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 29 states. [2018-11-14 17:56:28,158 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 29 states. [2018-11-14 17:56:28,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:28,161 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2018-11-14 17:56:28,161 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-11-14 17:56:28,161 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:28,162 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:28,162 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:56:28,162 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:56:28,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-14 17:56:28,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2018-11-14 17:56:28,164 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 29 transitions. Word has length 16 [2018-11-14 17:56:28,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:56:28,165 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 29 transitions. [2018-11-14 17:56:28,165 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-14 17:56:28,165 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 29 transitions. [2018-11-14 17:56:28,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-14 17:56:28,166 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:56:28,166 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:56:28,167 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:56:28,167 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:56:28,167 INFO L82 PathProgramCache]: Analyzing trace with hash -1434210682, now seen corresponding path program 1 times [2018-11-14 17:56:28,168 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:56:28,168 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:56:28,186 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:56:28,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:28,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:28,244 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:56:28,529 INFO L256 TraceCheckUtils]: 0: Hoare triple {421#true} call ULTIMATE.init(); {421#true} is VALID [2018-11-14 17:56:28,530 INFO L273 TraceCheckUtils]: 1: Hoare triple {421#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {421#true} is VALID [2018-11-14 17:56:28,530 INFO L273 TraceCheckUtils]: 2: Hoare triple {421#true} assume true; {421#true} is VALID [2018-11-14 17:56:28,530 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {421#true} {421#true} #65#return; {421#true} is VALID [2018-11-14 17:56:28,531 INFO L256 TraceCheckUtils]: 4: Hoare triple {421#true} call #t~ret5 := main(); {421#true} is VALID [2018-11-14 17:56:28,531 INFO L273 TraceCheckUtils]: 5: Hoare triple {421#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {421#true} is VALID [2018-11-14 17:56:28,533 INFO L273 TraceCheckUtils]: 6: Hoare triple {421#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:28,533 INFO L273 TraceCheckUtils]: 7: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:28,534 INFO L273 TraceCheckUtils]: 8: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:28,552 INFO L273 TraceCheckUtils]: 9: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:28,557 INFO L273 TraceCheckUtils]: 10: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-14 17:56:28,558 INFO L273 TraceCheckUtils]: 11: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:28,561 INFO L273 TraceCheckUtils]: 12: Hoare triple {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:28,565 INFO L273 TraceCheckUtils]: 13: Hoare triple {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {422#false} is VALID [2018-11-14 17:56:28,565 INFO L273 TraceCheckUtils]: 14: Hoare triple {422#false} ~i~0 := 0bv32; {422#false} is VALID [2018-11-14 17:56:28,566 INFO L273 TraceCheckUtils]: 15: Hoare triple {422#false} assume true; {422#false} is VALID [2018-11-14 17:56:28,566 INFO L273 TraceCheckUtils]: 16: Hoare triple {422#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {422#false} is VALID [2018-11-14 17:56:28,566 INFO L256 TraceCheckUtils]: 17: Hoare triple {422#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {422#false} is VALID [2018-11-14 17:56:28,567 INFO L273 TraceCheckUtils]: 18: Hoare triple {422#false} ~cond := #in~cond; {422#false} is VALID [2018-11-14 17:56:28,567 INFO L273 TraceCheckUtils]: 19: Hoare triple {422#false} assume ~cond == 0bv32; {422#false} is VALID [2018-11-14 17:56:28,567 INFO L273 TraceCheckUtils]: 20: Hoare triple {422#false} assume !false; {422#false} is VALID [2018-11-14 17:56:28,570 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:28,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:56:28,708 INFO L273 TraceCheckUtils]: 20: Hoare triple {422#false} assume !false; {422#false} is VALID [2018-11-14 17:56:28,708 INFO L273 TraceCheckUtils]: 19: Hoare triple {422#false} assume ~cond == 0bv32; {422#false} is VALID [2018-11-14 17:56:28,709 INFO L273 TraceCheckUtils]: 18: Hoare triple {422#false} ~cond := #in~cond; {422#false} is VALID [2018-11-14 17:56:28,709 INFO L256 TraceCheckUtils]: 17: Hoare triple {422#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {422#false} is VALID [2018-11-14 17:56:28,709 INFO L273 TraceCheckUtils]: 16: Hoare triple {422#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {422#false} is VALID [2018-11-14 17:56:28,709 INFO L273 TraceCheckUtils]: 15: Hoare triple {422#false} assume true; {422#false} is VALID [2018-11-14 17:56:28,710 INFO L273 TraceCheckUtils]: 14: Hoare triple {422#false} ~i~0 := 0bv32; {422#false} is VALID [2018-11-14 17:56:28,711 INFO L273 TraceCheckUtils]: 13: Hoare triple {509#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {422#false} is VALID [2018-11-14 17:56:28,711 INFO L273 TraceCheckUtils]: 12: Hoare triple {509#(bvslt main_~i~0 ~SIZE~0)} assume true; {509#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-14 17:56:28,713 INFO L273 TraceCheckUtils]: 11: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {509#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-14 17:56:28,716 INFO L273 TraceCheckUtils]: 10: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-14 17:56:28,718 INFO L273 TraceCheckUtils]: 9: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-14 17:56:28,725 INFO L273 TraceCheckUtils]: 8: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-14 17:56:28,727 INFO L273 TraceCheckUtils]: 7: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume true; {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-14 17:56:28,729 INFO L273 TraceCheckUtils]: 6: Hoare triple {421#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-14 17:56:28,729 INFO L273 TraceCheckUtils]: 5: Hoare triple {421#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {421#true} is VALID [2018-11-14 17:56:28,729 INFO L256 TraceCheckUtils]: 4: Hoare triple {421#true} call #t~ret5 := main(); {421#true} is VALID [2018-11-14 17:56:28,730 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {421#true} {421#true} #65#return; {421#true} is VALID [2018-11-14 17:56:28,730 INFO L273 TraceCheckUtils]: 2: Hoare triple {421#true} assume true; {421#true} is VALID [2018-11-14 17:56:28,730 INFO L273 TraceCheckUtils]: 1: Hoare triple {421#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {421#true} is VALID [2018-11-14 17:56:28,731 INFO L256 TraceCheckUtils]: 0: Hoare triple {421#true} call ULTIMATE.init(); {421#true} is VALID [2018-11-14 17:56:28,732 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:28,733 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:56:28,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-14 17:56:28,734 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-11-14 17:56:28,735 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:56:28,735 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-14 17:56:28,805 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:28,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-14 17:56:28,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-14 17:56:28,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-14 17:56:28,806 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. Second operand 6 states. [2018-11-14 17:56:29,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:29,449 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-11-14 17:56:29,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-14 17:56:29,449 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-11-14 17:56:29,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:56:29,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-14 17:56:29,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 57 transitions. [2018-11-14 17:56:29,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-14 17:56:29,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 57 transitions. [2018-11-14 17:56:29,456 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 57 transitions. [2018-11-14 17:56:29,595 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:29,597 INFO L225 Difference]: With dead ends: 52 [2018-11-14 17:56:29,597 INFO L226 Difference]: Without dead ends: 40 [2018-11-14 17:56:29,598 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-11-14 17:56:29,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-14 17:56:29,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 31. [2018-11-14 17:56:29,613 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:56:29,613 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 31 states. [2018-11-14 17:56:29,614 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 31 states. [2018-11-14 17:56:29,614 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 31 states. [2018-11-14 17:56:29,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:29,617 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-11-14 17:56:29,617 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 43 transitions. [2018-11-14 17:56:29,618 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:29,618 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:29,618 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 40 states. [2018-11-14 17:56:29,618 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 40 states. [2018-11-14 17:56:29,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:29,621 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-11-14 17:56:29,621 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 43 transitions. [2018-11-14 17:56:29,622 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:29,622 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:29,622 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:56:29,623 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:56:29,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-14 17:56:29,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2018-11-14 17:56:29,625 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 21 [2018-11-14 17:56:29,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:56:29,625 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2018-11-14 17:56:29,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-14 17:56:29,626 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2018-11-14 17:56:29,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-14 17:56:29,627 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:56:29,627 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:56:29,627 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:56:29,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:56:29,628 INFO L82 PathProgramCache]: Analyzing trace with hash 1167828013, now seen corresponding path program 1 times [2018-11-14 17:56:29,628 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:56:29,628 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:56:29,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:56:29,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:29,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:29,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:56:29,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-14 17:56:29,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-14 17:56:29,908 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:29,913 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:29,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:29,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:28 [2018-11-14 17:56:30,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-14 17:56:30,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:30,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-14 17:56:30,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:30,233 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:30,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:30,247 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-11-14 17:56:30,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-11-14 17:56:30,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 5 [2018-11-14 17:56:30,464 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:30,467 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:30,473 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:30,474 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:11 [2018-11-14 17:56:30,479 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:56:30,696 INFO L256 TraceCheckUtils]: 0: Hoare triple {743#true} call ULTIMATE.init(); {743#true} is VALID [2018-11-14 17:56:30,696 INFO L273 TraceCheckUtils]: 1: Hoare triple {743#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {743#true} is VALID [2018-11-14 17:56:30,697 INFO L273 TraceCheckUtils]: 2: Hoare triple {743#true} assume true; {743#true} is VALID [2018-11-14 17:56:30,697 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {743#true} {743#true} #65#return; {743#true} is VALID [2018-11-14 17:56:30,697 INFO L256 TraceCheckUtils]: 4: Hoare triple {743#true} call #t~ret5 := main(); {743#true} is VALID [2018-11-14 17:56:30,697 INFO L273 TraceCheckUtils]: 5: Hoare triple {743#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {743#true} is VALID [2018-11-14 17:56:30,698 INFO L273 TraceCheckUtils]: 6: Hoare triple {743#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,699 INFO L273 TraceCheckUtils]: 7: Hoare triple {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,700 INFO L273 TraceCheckUtils]: 8: Hoare triple {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,701 INFO L273 TraceCheckUtils]: 9: Hoare triple {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,702 INFO L273 TraceCheckUtils]: 10: Hoare triple {766#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {779#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,704 INFO L273 TraceCheckUtils]: 11: Hoare triple {779#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:30,705 INFO L273 TraceCheckUtils]: 12: Hoare triple {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:30,707 INFO L273 TraceCheckUtils]: 13: Hoare triple {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:30,708 INFO L273 TraceCheckUtils]: 14: Hoare triple {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:30,712 INFO L273 TraceCheckUtils]: 15: Hoare triple {783#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-14 17:56:30,713 INFO L273 TraceCheckUtils]: 16: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-14 17:56:30,714 INFO L273 TraceCheckUtils]: 17: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume true; {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-14 17:56:30,716 INFO L273 TraceCheckUtils]: 18: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-14 17:56:30,717 INFO L273 TraceCheckUtils]: 19: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,719 INFO L273 TraceCheckUtils]: 20: Hoare triple {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:30,720 INFO L273 TraceCheckUtils]: 21: Hoare triple {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {816#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-14 17:56:30,722 INFO L256 TraceCheckUtils]: 22: Hoare triple {816#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {820#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:56:30,723 INFO L273 TraceCheckUtils]: 23: Hoare triple {820#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {824#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:56:30,724 INFO L273 TraceCheckUtils]: 24: Hoare triple {824#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {744#false} is VALID [2018-11-14 17:56:30,724 INFO L273 TraceCheckUtils]: 25: Hoare triple {744#false} assume !false; {744#false} is VALID [2018-11-14 17:56:30,730 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:30,730 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:56:31,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-11-14 17:56:31,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 24 [2018-11-14 17:56:31,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 8 [2018-11-14 17:56:31,146 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:31,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2018-11-14 17:56:31,210 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:31,244 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:31,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:31,285 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:31,285 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:22, output treesize:22 [2018-11-14 17:56:31,296 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:56:31,432 INFO L273 TraceCheckUtils]: 25: Hoare triple {744#false} assume !false; {744#false} is VALID [2018-11-14 17:56:31,433 INFO L273 TraceCheckUtils]: 24: Hoare triple {834#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {744#false} is VALID [2018-11-14 17:56:31,435 INFO L273 TraceCheckUtils]: 23: Hoare triple {838#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {834#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 17:56:31,437 INFO L256 TraceCheckUtils]: 22: Hoare triple {842#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {838#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 17:56:31,438 INFO L273 TraceCheckUtils]: 21: Hoare triple {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {842#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-14 17:56:31,438 INFO L273 TraceCheckUtils]: 20: Hoare triple {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume true; {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is VALID [2018-11-14 17:56:31,440 INFO L273 TraceCheckUtils]: 19: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} ~i~0 := 0bv32; {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is VALID [2018-11-14 17:56:31,446 INFO L273 TraceCheckUtils]: 18: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} assume !~bvslt32(~i~0, ~SIZE~0); {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,446 INFO L273 TraceCheckUtils]: 17: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} assume true; {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,447 INFO L273 TraceCheckUtils]: 16: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,464 INFO L273 TraceCheckUtils]: 15: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,465 INFO L273 TraceCheckUtils]: 14: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,465 INFO L273 TraceCheckUtils]: 13: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,466 INFO L273 TraceCheckUtils]: 12: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume true; {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,480 INFO L273 TraceCheckUtils]: 11: Hoare triple {879#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,517 INFO L273 TraceCheckUtils]: 10: Hoare triple {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {879#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:31,518 INFO L273 TraceCheckUtils]: 9: Hoare triple {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:31,519 INFO L273 TraceCheckUtils]: 8: Hoare triple {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:31,520 INFO L273 TraceCheckUtils]: 7: Hoare triple {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} assume true; {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:31,522 INFO L273 TraceCheckUtils]: 6: Hoare triple {743#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {883#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_5 (_ BitVec 32))) (bvsge v_arrayElimCell_5 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:31,523 INFO L273 TraceCheckUtils]: 5: Hoare triple {743#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {743#true} is VALID [2018-11-14 17:56:31,523 INFO L256 TraceCheckUtils]: 4: Hoare triple {743#true} call #t~ret5 := main(); {743#true} is VALID [2018-11-14 17:56:31,524 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {743#true} {743#true} #65#return; {743#true} is VALID [2018-11-14 17:56:31,524 INFO L273 TraceCheckUtils]: 2: Hoare triple {743#true} assume true; {743#true} is VALID [2018-11-14 17:56:31,525 INFO L273 TraceCheckUtils]: 1: Hoare triple {743#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {743#true} is VALID [2018-11-14 17:56:31,525 INFO L256 TraceCheckUtils]: 0: Hoare triple {743#true} call ULTIMATE.init(); {743#true} is VALID [2018-11-14 17:56:31,528 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:31,530 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:56:31,530 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-14 17:56:31,531 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 26 [2018-11-14 17:56:31,531 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:56:31,531 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-14 17:56:31,686 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:31,687 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-14 17:56:31,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-14 17:56:31,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=254, Unknown=0, NotChecked=0, Total=306 [2018-11-14 17:56:31,688 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand 18 states. [2018-11-14 17:56:36,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:36,338 INFO L93 Difference]: Finished difference Result 101 states and 116 transitions. [2018-11-14 17:56:36,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-14 17:56:36,338 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 26 [2018-11-14 17:56:36,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:56:36,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 17:56:36,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 108 transitions. [2018-11-14 17:56:36,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 17:56:36,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 108 transitions. [2018-11-14 17:56:36,351 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 108 transitions. [2018-11-14 17:56:36,964 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:36,970 INFO L225 Difference]: With dead ends: 101 [2018-11-14 17:56:36,970 INFO L226 Difference]: Without dead ends: 99 [2018-11-14 17:56:36,971 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=153, Invalid=659, Unknown=0, NotChecked=0, Total=812 [2018-11-14 17:56:36,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-11-14 17:56:37,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 68. [2018-11-14 17:56:37,099 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:56:37,099 INFO L82 GeneralOperation]: Start isEquivalent. First operand 99 states. Second operand 68 states. [2018-11-14 17:56:37,099 INFO L74 IsIncluded]: Start isIncluded. First operand 99 states. Second operand 68 states. [2018-11-14 17:56:37,100 INFO L87 Difference]: Start difference. First operand 99 states. Second operand 68 states. [2018-11-14 17:56:37,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:37,107 INFO L93 Difference]: Finished difference Result 99 states and 114 transitions. [2018-11-14 17:56:37,107 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 114 transitions. [2018-11-14 17:56:37,109 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:37,109 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:37,109 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand 99 states. [2018-11-14 17:56:37,109 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 99 states. [2018-11-14 17:56:37,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:56:37,116 INFO L93 Difference]: Finished difference Result 99 states and 114 transitions. [2018-11-14 17:56:37,116 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 114 transitions. [2018-11-14 17:56:37,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:56:37,118 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:56:37,118 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:56:37,118 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:56:37,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-11-14 17:56:37,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 77 transitions. [2018-11-14 17:56:37,122 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 77 transitions. Word has length 26 [2018-11-14 17:56:37,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:56:37,123 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 77 transitions. [2018-11-14 17:56:37,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-14 17:56:37,123 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 77 transitions. [2018-11-14 17:56:37,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-14 17:56:37,125 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:56:37,125 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:56:37,125 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:56:37,126 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:56:37,126 INFO L82 PathProgramCache]: Analyzing trace with hash 1835613837, now seen corresponding path program 2 times [2018-11-14 17:56:37,126 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:56:37,126 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:56:37,156 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 17:56:37,257 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:56:37,257 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:56:37,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:56:37,289 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:56:37,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-14 17:56:37,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-14 17:56:37,370 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,373 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,390 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:28 [2018-11-14 17:56:37,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-11-14 17:56:37,578 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:37,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 29 [2018-11-14 17:56:37,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,611 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,636 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,636 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-11-14 17:56:37,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-11-14 17:56:37,713 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:37,716 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:37,718 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:37,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 61 [2018-11-14 17:56:37,731 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,746 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:37,775 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-11-14 17:56:38,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 35 [2018-11-14 17:56:38,028 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,030 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,034 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,037 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,039 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,042 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 106 [2018-11-14 17:56:38,065 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,088 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,171 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,172 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-11-14 17:56:38,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 44 [2018-11-14 17:56:38,295 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,297 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,300 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,303 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,306 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,308 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 109 [2018-11-14 17:56:38,343 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,363 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,387 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,387 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:71, output treesize:47 [2018-11-14 17:56:38,414 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:56:38,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-11-14 17:56:38,595 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,597 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,599 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,601 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,603 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,605 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:56:38,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 77 [2018-11-14 17:56:38,608 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,630 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,655 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:38,655 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-11-14 17:56:39,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 30 [2018-11-14 17:56:39,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 9 [2018-11-14 17:56:39,046 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:39,112 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:39,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:56:39,117 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:11 [2018-11-14 17:56:39,122 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:56:39,236 INFO L256 TraceCheckUtils]: 0: Hoare triple {1355#true} call ULTIMATE.init(); {1355#true} is VALID [2018-11-14 17:56:39,236 INFO L273 TraceCheckUtils]: 1: Hoare triple {1355#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1355#true} is VALID [2018-11-14 17:56:39,237 INFO L273 TraceCheckUtils]: 2: Hoare triple {1355#true} assume true; {1355#true} is VALID [2018-11-14 17:56:39,237 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1355#true} {1355#true} #65#return; {1355#true} is VALID [2018-11-14 17:56:39,237 INFO L256 TraceCheckUtils]: 4: Hoare triple {1355#true} call #t~ret5 := main(); {1355#true} is VALID [2018-11-14 17:56:39,238 INFO L273 TraceCheckUtils]: 5: Hoare triple {1355#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1355#true} is VALID [2018-11-14 17:56:39,252 INFO L273 TraceCheckUtils]: 6: Hoare triple {1355#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:39,253 INFO L273 TraceCheckUtils]: 7: Hoare triple {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:39,254 INFO L273 TraceCheckUtils]: 8: Hoare triple {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:39,254 INFO L273 TraceCheckUtils]: 9: Hoare triple {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:39,255 INFO L273 TraceCheckUtils]: 10: Hoare triple {1378#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1391#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:56:39,256 INFO L273 TraceCheckUtils]: 11: Hoare triple {1391#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1395#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:39,257 INFO L273 TraceCheckUtils]: 12: Hoare triple {1395#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {1395#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:39,258 INFO L273 TraceCheckUtils]: 13: Hoare triple {1395#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1395#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:39,261 INFO L273 TraceCheckUtils]: 14: Hoare triple {1395#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1405#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:39,265 INFO L273 TraceCheckUtils]: 15: Hoare triple {1405#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1409#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:56:39,268 INFO L273 TraceCheckUtils]: 16: Hoare triple {1409#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~val1~0) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1413#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,269 INFO L273 TraceCheckUtils]: 17: Hoare triple {1413#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} assume true; {1413#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,270 INFO L273 TraceCheckUtils]: 18: Hoare triple {1413#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1413#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,272 INFO L273 TraceCheckUtils]: 19: Hoare triple {1413#(and (= main_~val1~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1423#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,274 INFO L273 TraceCheckUtils]: 20: Hoare triple {1423#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1427#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,276 INFO L273 TraceCheckUtils]: 21: Hoare triple {1427#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,277 INFO L273 TraceCheckUtils]: 22: Hoare triple {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} assume true; {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,278 INFO L273 TraceCheckUtils]: 23: Hoare triple {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,279 INFO L273 TraceCheckUtils]: 24: Hoare triple {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} is VALID [2018-11-14 17:56:39,282 INFO L273 TraceCheckUtils]: 25: Hoare triple {1431#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:56:39,283 INFO L273 TraceCheckUtils]: 26: Hoare triple {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:56:39,284 INFO L273 TraceCheckUtils]: 27: Hoare triple {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume true; {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:56:39,285 INFO L273 TraceCheckUtils]: 28: Hoare triple {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume !~bvslt32(~i~0, ~SIZE~0); {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:56:39,286 INFO L273 TraceCheckUtils]: 29: Hoare triple {1444#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} ~i~0 := 0bv32; {1457#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:56:39,288 INFO L273 TraceCheckUtils]: 30: Hoare triple {1457#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume true; {1457#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:56:39,290 INFO L273 TraceCheckUtils]: 31: Hoare triple {1457#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1464#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-14 17:56:39,291 INFO L256 TraceCheckUtils]: 32: Hoare triple {1464#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1468#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:56:39,292 INFO L273 TraceCheckUtils]: 33: Hoare triple {1468#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1472#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:56:39,293 INFO L273 TraceCheckUtils]: 34: Hoare triple {1472#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {1356#false} is VALID [2018-11-14 17:56:39,293 INFO L273 TraceCheckUtils]: 35: Hoare triple {1356#false} assume !false; {1356#false} is VALID [2018-11-14 17:56:39,301 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:39,301 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:56:40,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2018-11-14 17:56:40,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 40 [2018-11-14 17:56:40,362 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 55 [2018-11-14 17:56:40,377 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,377 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,391 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 83 [2018-11-14 17:56:40,509 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,509 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,510 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 38 treesize of output 79 [2018-11-14 17:56:40,550 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:40,561 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,562 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,562 INFO L682 Elim1Store]: detected equality via solver [2018-11-14 17:56:40,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 46 [2018-11-14 17:56:40,565 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-14 17:56:40,617 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:40,647 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:40,673 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:40,712 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:40,737 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:56:40,737 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 2 variables, input treesize:38, output treesize:38 [2018-11-14 17:56:40,750 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:56:40,955 INFO L273 TraceCheckUtils]: 35: Hoare triple {1356#false} assume !false; {1356#false} is VALID [2018-11-14 17:56:40,955 INFO L273 TraceCheckUtils]: 34: Hoare triple {1482#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {1356#false} is VALID [2018-11-14 17:56:40,956 INFO L273 TraceCheckUtils]: 33: Hoare triple {1486#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1482#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 17:56:40,956 INFO L256 TraceCheckUtils]: 32: Hoare triple {1490#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {1486#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 17:56:40,957 INFO L273 TraceCheckUtils]: 31: Hoare triple {1494#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1490#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-14 17:56:40,957 INFO L273 TraceCheckUtils]: 30: Hoare triple {1494#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume true; {1494#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is VALID [2018-11-14 17:56:40,958 INFO L273 TraceCheckUtils]: 29: Hoare triple {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} ~i~0 := 0bv32; {1494#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is VALID [2018-11-14 17:56:40,959 INFO L273 TraceCheckUtils]: 28: Hoare triple {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} assume !~bvslt32(~i~0, ~SIZE~0); {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,960 INFO L273 TraceCheckUtils]: 27: Hoare triple {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} assume true; {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,960 INFO L273 TraceCheckUtils]: 26: Hoare triple {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,981 INFO L273 TraceCheckUtils]: 25: Hoare triple {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1501#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,982 INFO L273 TraceCheckUtils]: 24: Hoare triple {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,982 INFO L273 TraceCheckUtils]: 23: Hoare triple {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,983 INFO L273 TraceCheckUtils]: 22: Hoare triple {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume true; {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:40,992 INFO L273 TraceCheckUtils]: 21: Hoare triple {1527#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1514#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,027 INFO L273 TraceCheckUtils]: 20: Hoare triple {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1527#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,053 INFO L273 TraceCheckUtils]: 19: Hoare triple {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,053 INFO L273 TraceCheckUtils]: 18: Hoare triple {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,054 INFO L273 TraceCheckUtils]: 17: Hoare triple {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume true; {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,072 INFO L273 TraceCheckUtils]: 16: Hoare triple {1544#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1531#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,106 INFO L273 TraceCheckUtils]: 15: Hoare triple {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1544#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,138 INFO L273 TraceCheckUtils]: 14: Hoare triple {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,139 INFO L273 TraceCheckUtils]: 13: Hoare triple {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,139 INFO L273 TraceCheckUtils]: 12: Hoare triple {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} assume true; {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,164 INFO L273 TraceCheckUtils]: 11: Hoare triple {1561#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1548#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,205 INFO L273 TraceCheckUtils]: 10: Hoare triple {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1561#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) main_~val2~0) |main_~#a~0.offset|) main_~low~0)} is VALID [2018-11-14 17:56:41,206 INFO L273 TraceCheckUtils]: 9: Hoare triple {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:41,207 INFO L273 TraceCheckUtils]: 8: Hoare triple {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:41,208 INFO L273 TraceCheckUtils]: 7: Hoare triple {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} assume true; {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:41,209 INFO L273 TraceCheckUtils]: 6: Hoare triple {1355#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {1565#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (forall ((v_arrayElimCell_15 (_ BitVec 32))) (bvsge v_arrayElimCell_15 main_~low~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:56:41,210 INFO L273 TraceCheckUtils]: 5: Hoare triple {1355#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1355#true} is VALID [2018-11-14 17:56:41,210 INFO L256 TraceCheckUtils]: 4: Hoare triple {1355#true} call #t~ret5 := main(); {1355#true} is VALID [2018-11-14 17:56:41,211 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1355#true} {1355#true} #65#return; {1355#true} is VALID [2018-11-14 17:56:41,211 INFO L273 TraceCheckUtils]: 2: Hoare triple {1355#true} assume true; {1355#true} is VALID [2018-11-14 17:56:41,211 INFO L273 TraceCheckUtils]: 1: Hoare triple {1355#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1355#true} is VALID [2018-11-14 17:56:41,212 INFO L256 TraceCheckUtils]: 0: Hoare triple {1355#true} call ULTIMATE.init(); {1355#true} is VALID [2018-11-14 17:56:41,218 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:56:41,220 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:56:41,220 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14] total 28 [2018-11-14 17:56:41,221 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 36 [2018-11-14 17:56:41,221 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:56:41,221 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 28 states. [2018-11-14 17:56:41,603 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:56:41,603 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-11-14 17:56:41,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-11-14 17:56:41,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=625, Unknown=0, NotChecked=0, Total=756 [2018-11-14 17:56:41,604 INFO L87 Difference]: Start difference. First operand 68 states and 77 transitions. Second operand 28 states. [2018-11-14 17:56:43,211 WARN L179 SmtUtils]: Spent 318.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 24 [2018-11-14 17:56:44,724 WARN L179 SmtUtils]: Spent 203.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 25 [2018-11-14 17:56:46,835 WARN L179 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 21 [2018-11-14 17:56:47,238 WARN L179 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 27 [2018-11-14 17:56:48,843 WARN L179 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 22 [2018-11-14 17:56:49,965 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 44 [2018-11-14 17:56:50,706 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 18 [2018-11-14 17:56:55,741 WARN L179 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 47 [2018-11-14 17:56:56,383 WARN L179 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 49 [2018-11-14 17:57:01,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:57:01,018 INFO L93 Difference]: Finished difference Result 227 states and 268 transitions. [2018-11-14 17:57:01,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-11-14 17:57:01,019 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 36 [2018-11-14 17:57:01,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:57:01,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-14 17:57:01,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 212 transitions. [2018-11-14 17:57:01,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-14 17:57:01,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 212 transitions. [2018-11-14 17:57:01,034 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 41 states and 212 transitions. [2018-11-14 17:57:03,415 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 212 edges. 212 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:57:03,428 INFO L225 Difference]: With dead ends: 227 [2018-11-14 17:57:03,428 INFO L226 Difference]: Without dead ends: 225 [2018-11-14 17:57:03,430 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 571 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=550, Invalid=2102, Unknown=0, NotChecked=0, Total=2652 [2018-11-14 17:57:03,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-11-14 17:57:03,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 148. [2018-11-14 17:57:03,715 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:57:03,716 INFO L82 GeneralOperation]: Start isEquivalent. First operand 225 states. Second operand 148 states. [2018-11-14 17:57:03,716 INFO L74 IsIncluded]: Start isIncluded. First operand 225 states. Second operand 148 states. [2018-11-14 17:57:03,716 INFO L87 Difference]: Start difference. First operand 225 states. Second operand 148 states. [2018-11-14 17:57:03,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:57:03,728 INFO L93 Difference]: Finished difference Result 225 states and 266 transitions. [2018-11-14 17:57:03,728 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 266 transitions. [2018-11-14 17:57:03,730 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:57:03,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:57:03,731 INFO L74 IsIncluded]: Start isIncluded. First operand 148 states. Second operand 225 states. [2018-11-14 17:57:03,731 INFO L87 Difference]: Start difference. First operand 148 states. Second operand 225 states. [2018-11-14 17:57:03,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:57:03,742 INFO L93 Difference]: Finished difference Result 225 states and 266 transitions. [2018-11-14 17:57:03,743 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 266 transitions. [2018-11-14 17:57:03,744 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:57:03,744 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:57:03,744 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:57:03,744 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:57:03,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-11-14 17:57:03,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 173 transitions. [2018-11-14 17:57:03,751 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 173 transitions. Word has length 36 [2018-11-14 17:57:03,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:57:03,751 INFO L480 AbstractCegarLoop]: Abstraction has 148 states and 173 transitions. [2018-11-14 17:57:03,751 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-11-14 17:57:03,751 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 173 transitions. [2018-11-14 17:57:03,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-14 17:57:03,753 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:57:03,753 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:57:03,753 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:57:03,753 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:57:03,753 INFO L82 PathProgramCache]: Analyzing trace with hash -1166315301, now seen corresponding path program 1 times [2018-11-14 17:57:03,754 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:57:03,754 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:57:03,780 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:57:03,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:57:03,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:57:03,869 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:57:03,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-14 17:57:03,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-14 17:57:03,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:57:03,966 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:57:03,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:57:03,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-14 17:57:04,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-14 17:57:04,091 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:57:04,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-11-14 17:57:04,094 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:57:04,108 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:57:04,123 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:57:04,124 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-14 17:57:04,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-11-14 17:57:04,594 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:57:04,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 17 [2018-11-14 17:57:04,597 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:57:04,603 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:57:04,609 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:57:04,610 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:35, output treesize:11 [2018-11-14 17:57:04,617 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:57:04,755 INFO L256 TraceCheckUtils]: 0: Hoare triple {2579#true} call ULTIMATE.init(); {2579#true} is VALID [2018-11-14 17:57:04,756 INFO L273 TraceCheckUtils]: 1: Hoare triple {2579#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2579#true} is VALID [2018-11-14 17:57:04,756 INFO L273 TraceCheckUtils]: 2: Hoare triple {2579#true} assume true; {2579#true} is VALID [2018-11-14 17:57:04,756 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2579#true} {2579#true} #65#return; {2579#true} is VALID [2018-11-14 17:57:04,756 INFO L256 TraceCheckUtils]: 4: Hoare triple {2579#true} call #t~ret5 := main(); {2579#true} is VALID [2018-11-14 17:57:04,757 INFO L273 TraceCheckUtils]: 5: Hoare triple {2579#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2579#true} is VALID [2018-11-14 17:57:04,763 INFO L273 TraceCheckUtils]: 6: Hoare triple {2579#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:57:04,764 INFO L273 TraceCheckUtils]: 7: Hoare triple {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:57:04,765 INFO L273 TraceCheckUtils]: 8: Hoare triple {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:57:04,765 INFO L273 TraceCheckUtils]: 9: Hoare triple {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:57:04,766 INFO L273 TraceCheckUtils]: 10: Hoare triple {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-14 17:57:04,766 INFO L273 TraceCheckUtils]: 11: Hoare triple {2602#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,767 INFO L273 TraceCheckUtils]: 12: Hoare triple {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,767 INFO L273 TraceCheckUtils]: 13: Hoare triple {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,768 INFO L273 TraceCheckUtils]: 14: Hoare triple {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,771 INFO L273 TraceCheckUtils]: 15: Hoare triple {2618#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2631#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,772 INFO L273 TraceCheckUtils]: 16: Hoare triple {2631#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 17:57:04,773 INFO L273 TraceCheckUtils]: 17: Hoare triple {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} assume true; {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 17:57:04,773 INFO L273 TraceCheckUtils]: 18: Hoare triple {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 17:57:04,774 INFO L273 TraceCheckUtils]: 19: Hoare triple {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 17:57:04,776 INFO L273 TraceCheckUtils]: 20: Hoare triple {2635#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd main_~val2~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~val2~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv2 32) main_~i~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,777 INFO L273 TraceCheckUtils]: 21: Hoare triple {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,778 INFO L273 TraceCheckUtils]: 22: Hoare triple {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume true; {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,779 INFO L273 TraceCheckUtils]: 23: Hoare triple {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume !~bvslt32(~i~0, ~SIZE~0); {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,780 INFO L273 TraceCheckUtils]: 24: Hoare triple {2648#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} ~i~0 := 0bv32; {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,781 INFO L273 TraceCheckUtils]: 25: Hoare triple {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume true; {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,782 INFO L273 TraceCheckUtils]: 26: Hoare triple {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,786 INFO L256 TraceCheckUtils]: 27: Hoare triple {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} is VALID [2018-11-14 17:57:04,787 INFO L273 TraceCheckUtils]: 28: Hoare triple {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} ~cond := #in~cond; {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} is VALID [2018-11-14 17:57:04,787 INFO L273 TraceCheckUtils]: 29: Hoare triple {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} assume !(~cond == 0bv32); {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} is VALID [2018-11-14 17:57:04,788 INFO L273 TraceCheckUtils]: 30: Hoare triple {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} assume true; {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} is VALID [2018-11-14 17:57:04,789 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {2671#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32)) (|v_main_~#a~0.offset_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv4 32)))) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (bvadd |v_main_~#a~0.offset_BEFORE_CALL_1| (_ bv8 32))))))} {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} #69#return; {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,790 INFO L273 TraceCheckUtils]: 32: Hoare triple {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} havoc #t~mem4; {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-14 17:57:04,790 INFO L273 TraceCheckUtils]: 33: Hoare triple {2661#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2690#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,792 INFO L273 TraceCheckUtils]: 34: Hoare triple {2690#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {2690#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:57:04,794 INFO L273 TraceCheckUtils]: 35: Hoare triple {2690#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2697#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} is VALID [2018-11-14 17:57:04,795 INFO L256 TraceCheckUtils]: 36: Hoare triple {2697#(and (= (bvadd main_~low~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv3 32) |main_#t~mem4|))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2701#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:57:04,795 INFO L273 TraceCheckUtils]: 37: Hoare triple {2701#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {2705#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:57:04,796 INFO L273 TraceCheckUtils]: 38: Hoare triple {2705#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {2580#false} is VALID [2018-11-14 17:57:04,796 INFO L273 TraceCheckUtils]: 39: Hoare triple {2580#false} assume !false; {2580#false} is VALID [2018-11-14 17:57:04,806 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:57:04,806 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:57:11,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-14 17:57:11,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 26 [2018-11-14 17:57:11,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2018-11-14 17:57:11,422 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:57:11,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 6 [2018-11-14 17:57:11,428 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-14 17:57:11,458 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:57:11,477 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-14 17:57:11,496 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-14 17:57:11,496 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:24, output treesize:22 [2018-11-14 17:57:11,520 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:57:11,850 INFO L273 TraceCheckUtils]: 39: Hoare triple {2580#false} assume !false; {2580#false} is VALID [2018-11-14 17:57:11,851 INFO L273 TraceCheckUtils]: 38: Hoare triple {2715#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {2580#false} is VALID [2018-11-14 17:57:11,851 INFO L273 TraceCheckUtils]: 37: Hoare triple {2719#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {2715#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 17:57:11,852 INFO L256 TraceCheckUtils]: 36: Hoare triple {2723#(bvsge |main_#t~mem4| main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2719#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 17:57:11,853 INFO L273 TraceCheckUtils]: 35: Hoare triple {2727#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2723#(bvsge |main_#t~mem4| main_~low~0)} is VALID [2018-11-14 17:57:11,853 INFO L273 TraceCheckUtils]: 34: Hoare triple {2727#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} assume true; {2727#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is VALID [2018-11-14 17:57:13,887 INFO L273 TraceCheckUtils]: 33: Hoare triple {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2727#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~low~0)} is UNKNOWN [2018-11-14 17:57:13,888 INFO L273 TraceCheckUtils]: 32: Hoare triple {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} havoc #t~mem4; {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,889 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {2579#true} {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} #69#return; {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,890 INFO L273 TraceCheckUtils]: 30: Hoare triple {2579#true} assume true; {2579#true} is VALID [2018-11-14 17:57:13,890 INFO L273 TraceCheckUtils]: 29: Hoare triple {2579#true} assume !(~cond == 0bv32); {2579#true} is VALID [2018-11-14 17:57:13,890 INFO L273 TraceCheckUtils]: 28: Hoare triple {2579#true} ~cond := #in~cond; {2579#true} is VALID [2018-11-14 17:57:13,890 INFO L256 TraceCheckUtils]: 27: Hoare triple {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~low~0) then 1bv32 else 0bv32)); {2579#true} is VALID [2018-11-14 17:57:13,890 INFO L273 TraceCheckUtils]: 26: Hoare triple {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,891 INFO L273 TraceCheckUtils]: 25: Hoare triple {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} assume true; {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,892 INFO L273 TraceCheckUtils]: 24: Hoare triple {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} ~i~0 := 0bv32; {2734#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,894 INFO L273 TraceCheckUtils]: 23: Hoare triple {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} assume !~bvslt32(~i~0, ~SIZE~0); {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,897 INFO L273 TraceCheckUtils]: 22: Hoare triple {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} assume true; {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,900 INFO L273 TraceCheckUtils]: 21: Hoare triple {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,927 INFO L273 TraceCheckUtils]: 20: Hoare triple {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2762#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,928 INFO L273 TraceCheckUtils]: 19: Hoare triple {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,928 INFO L273 TraceCheckUtils]: 18: Hoare triple {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,930 INFO L273 TraceCheckUtils]: 17: Hoare triple {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} assume true; {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,942 INFO L273 TraceCheckUtils]: 16: Hoare triple {2788#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2775#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,974 INFO L273 TraceCheckUtils]: 15: Hoare triple {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2788#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) main_~val2~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) main_~low~0)} is VALID [2018-11-14 17:57:13,975 INFO L273 TraceCheckUtils]: 14: Hoare triple {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,975 INFO L273 TraceCheckUtils]: 13: Hoare triple {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,976 INFO L273 TraceCheckUtils]: 12: Hoare triple {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} assume true; {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,980 INFO L273 TraceCheckUtils]: 11: Hoare triple {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2792#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,981 INFO L273 TraceCheckUtils]: 10: Hoare triple {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} call write~intINTTYPE4(~val2~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,982 INFO L273 TraceCheckUtils]: 9: Hoare triple {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~val1~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,982 INFO L273 TraceCheckUtils]: 8: Hoare triple {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,983 INFO L273 TraceCheckUtils]: 7: Hoare triple {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} assume true; {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,984 INFO L273 TraceCheckUtils]: 6: Hoare triple {2579#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~val2~0 := 3bv32;~val1~0 := 0bv32;~low~0 := 2bv32;~i~0 := 0bv32; {2805#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (forall ((v_arrayElimCell_20 (_ BitVec 32))) (bvsge v_arrayElimCell_20 main_~low~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge main_~val2~0 main_~low~0))} is VALID [2018-11-14 17:57:13,984 INFO L273 TraceCheckUtils]: 5: Hoare triple {2579#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2579#true} is VALID [2018-11-14 17:57:13,984 INFO L256 TraceCheckUtils]: 4: Hoare triple {2579#true} call #t~ret5 := main(); {2579#true} is VALID [2018-11-14 17:57:13,984 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2579#true} {2579#true} #65#return; {2579#true} is VALID [2018-11-14 17:57:13,985 INFO L273 TraceCheckUtils]: 2: Hoare triple {2579#true} assume true; {2579#true} is VALID [2018-11-14 17:57:13,985 INFO L273 TraceCheckUtils]: 1: Hoare triple {2579#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2579#true} is VALID [2018-11-14 17:57:13,985 INFO L256 TraceCheckUtils]: 0: Hoare triple {2579#true} call ULTIMATE.init(); {2579#true} is VALID [2018-11-14 17:57:13,990 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:57:13,991 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:57:13,991 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 23 [2018-11-14 17:57:13,993 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 40 [2018-11-14 17:57:13,994 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:57:13,994 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states. [2018-11-14 17:57:16,481 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 72 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-14 17:57:16,481 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-14 17:57:16,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-14 17:57:16,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=433, Unknown=3, NotChecked=0, Total=506 [2018-11-14 17:57:16,482 INFO L87 Difference]: Start difference. First operand 148 states and 173 transitions. Second operand 23 states. [2018-11-14 17:57:19,745 WARN L179 SmtUtils]: Spent 2.03 s on a formula simplification. DAG size of input: 28 DAG size of output: 23 [2018-11-14 17:57:22,017 WARN L179 SmtUtils]: Spent 2.06 s on a formula simplification. DAG size of input: 32 DAG size of output: 23 [2018-11-14 17:57:26,695 WARN L179 SmtUtils]: Spent 2.05 s on a formula simplification. DAG size of input: 28 DAG size of output: 23 [2018-11-14 17:57:30,956 WARN L179 SmtUtils]: Spent 2.06 s on a formula simplification. DAG size of input: 42 DAG size of output: 28 [2018-11-14 17:57:52,264 WARN L179 SmtUtils]: Spent 2.05 s on a formula simplification. DAG size of input: 30 DAG size of output: 23 [2018-11-14 17:57:57,075 WARN L179 SmtUtils]: Spent 2.06 s on a formula simplification. DAG size of input: 32 DAG size of output: 25