java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector-Const.epf -i ../../../trunk/examples/svcomp/array-examples/standard_allDiff2_false-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 17:40:20,859 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 17:40:20,861 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 17:40:20,873 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 17:40:20,874 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 17:40:20,875 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 17:40:20,876 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 17:40:20,878 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 17:40:20,880 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 17:40:20,881 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 17:40:20,882 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 17:40:20,882 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 17:40:20,883 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 17:40:20,884 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 17:40:20,885 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 17:40:20,886 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 17:40:20,887 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 17:40:20,889 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 17:40:20,892 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 17:40:20,894 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 17:40:20,895 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 17:40:20,896 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 17:40:20,899 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-14 17:40:20,909 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector-Const.epf [2018-11-14 17:40:20,938 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 17:40:20,938 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 17:40:20,940 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 17:40:20,940 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 17:40:20,942 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 17:40:20,942 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 17:40:20,942 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 17:40:20,943 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 17:40:20,944 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 17:40:20,944 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 17:40:20,944 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 17:40:20,944 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 17:40:20,944 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 17:40:20,945 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 17:40:20,945 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-14 17:40:20,945 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-14 17:40:20,945 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 17:40:20,945 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 17:40:20,946 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-14 17:40:20,947 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 17:40:20,947 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 17:40:20,947 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 17:40:20,947 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 17:40:20,948 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 17:40:20,948 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:40:20,948 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 17:40:20,948 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 17:40:20,949 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 17:40:20,949 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-14 17:40:20,950 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 17:40:20,950 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-14 17:40:20,950 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-14 17:40:20,951 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 17:40:21,015 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 17:40:21,032 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 17:40:21,037 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 17:40:21,039 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 17:40:21,039 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 17:40:21,040 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_allDiff2_false-unreach-call_ground.i [2018-11-14 17:40:21,124 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8b4dc6a87/44f3249090594d9da9fd0b4e1bba48c4/FLAG9c9973a80 [2018-11-14 17:40:21,576 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 17:40:21,576 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/standard_allDiff2_false-unreach-call_ground.i [2018-11-14 17:40:21,584 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8b4dc6a87/44f3249090594d9da9fd0b4e1bba48c4/FLAG9c9973a80 [2018-11-14 17:40:21,599 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8b4dc6a87/44f3249090594d9da9fd0b4e1bba48c4 [2018-11-14 17:40:21,611 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 17:40:21,613 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 17:40:21,615 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 17:40:21,617 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 17:40:21,621 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 17:40:21,623 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:40:21" (1/1) ... [2018-11-14 17:40:21,627 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b7a10dc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:21, skipping insertion in model container [2018-11-14 17:40:21,627 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:40:21" (1/1) ... [2018-11-14 17:40:21,638 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 17:40:21,669 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 17:40:21,945 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:40:21,951 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 17:40:21,989 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:40:22,016 INFO L195 MainTranslator]: Completed translation [2018-11-14 17:40:22,016 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22 WrapperNode [2018-11-14 17:40:22,017 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 17:40:22,017 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 17:40:22,018 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 17:40:22,018 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 17:40:22,033 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,033 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,042 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,043 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,056 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,067 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,070 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... [2018-11-14 17:40:22,079 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 17:40:22,079 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 17:40:22,080 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 17:40:22,080 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 17:40:22,081 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:40:22,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 17:40:22,216 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 17:40:22,217 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 17:40:22,217 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 17:40:22,217 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 17:40:22,217 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 17:40:22,217 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 17:40:22,217 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-14 17:40:22,218 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-14 17:40:22,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-14 17:40:22,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 17:40:22,218 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 17:40:22,218 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-14 17:40:22,219 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-14 17:40:22,888 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 17:40:22,889 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:40:22 BoogieIcfgContainer [2018-11-14 17:40:22,889 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 17:40:22,890 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 17:40:22,891 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 17:40:22,894 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 17:40:22,894 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 05:40:21" (1/3) ... [2018-11-14 17:40:22,895 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@450a5901 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:40:22, skipping insertion in model container [2018-11-14 17:40:22,895 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:40:22" (2/3) ... [2018-11-14 17:40:22,896 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@450a5901 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:40:22, skipping insertion in model container [2018-11-14 17:40:22,896 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:40:22" (3/3) ... [2018-11-14 17:40:22,898 INFO L112 eAbstractionObserver]: Analyzing ICFG standard_allDiff2_false-unreach-call_ground.i [2018-11-14 17:40:22,908 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 17:40:22,918 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 17:40:22,936 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 17:40:22,969 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 17:40:22,970 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 17:40:22,970 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 17:40:22,970 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 17:40:22,970 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 17:40:22,971 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 17:40:22,971 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 17:40:22,971 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 17:40:22,972 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 17:40:22,989 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states. [2018-11-14 17:40:22,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-14 17:40:22,997 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:22,998 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:23,000 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:23,006 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:23,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1932411887, now seen corresponding path program 1 times [2018-11-14 17:40:23,010 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:23,011 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:23,028 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:40:23,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:23,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:23,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:23,341 INFO L256 TraceCheckUtils]: 0: Hoare triple {36#true} call ULTIMATE.init(); {36#true} is VALID [2018-11-14 17:40:23,344 INFO L273 TraceCheckUtils]: 1: Hoare triple {36#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {36#true} is VALID [2018-11-14 17:40:23,345 INFO L273 TraceCheckUtils]: 2: Hoare triple {36#true} assume true; {36#true} is VALID [2018-11-14 17:40:23,345 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {36#true} {36#true} #87#return; {36#true} is VALID [2018-11-14 17:40:23,346 INFO L256 TraceCheckUtils]: 4: Hoare triple {36#true} call #t~ret8 := main(); {36#true} is VALID [2018-11-14 17:40:23,346 INFO L273 TraceCheckUtils]: 5: Hoare triple {36#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {36#true} is VALID [2018-11-14 17:40:23,347 INFO L273 TraceCheckUtils]: 6: Hoare triple {36#true} assume !true; {37#false} is VALID [2018-11-14 17:40:23,347 INFO L273 TraceCheckUtils]: 7: Hoare triple {37#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {37#false} is VALID [2018-11-14 17:40:23,347 INFO L273 TraceCheckUtils]: 8: Hoare triple {37#false} assume true; {37#false} is VALID [2018-11-14 17:40:23,348 INFO L273 TraceCheckUtils]: 9: Hoare triple {37#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {37#false} is VALID [2018-11-14 17:40:23,348 INFO L273 TraceCheckUtils]: 10: Hoare triple {37#false} assume true; {37#false} is VALID [2018-11-14 17:40:23,348 INFO L273 TraceCheckUtils]: 11: Hoare triple {37#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {37#false} is VALID [2018-11-14 17:40:23,349 INFO L256 TraceCheckUtils]: 12: Hoare triple {37#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {37#false} is VALID [2018-11-14 17:40:23,349 INFO L273 TraceCheckUtils]: 13: Hoare triple {37#false} ~cond := #in~cond; {37#false} is VALID [2018-11-14 17:40:23,349 INFO L273 TraceCheckUtils]: 14: Hoare triple {37#false} assume ~cond == 0bv32; {37#false} is VALID [2018-11-14 17:40:23,350 INFO L273 TraceCheckUtils]: 15: Hoare triple {37#false} assume !false; {37#false} is VALID [2018-11-14 17:40:23,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:40:23,355 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 17:40:23,361 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:40:23,362 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 17:40:23,367 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-11-14 17:40:23,370 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:23,376 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 17:40:23,483 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:23,483 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 17:40:23,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 17:40:23,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:40:23,497 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 2 states. [2018-11-14 17:40:23,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:23,640 INFO L93 Difference]: Finished difference Result 60 states and 81 transitions. [2018-11-14 17:40:23,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 17:40:23,641 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-11-14 17:40:23,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:23,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:40:23,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 81 transitions. [2018-11-14 17:40:23,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:40:23,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 81 transitions. [2018-11-14 17:40:23,661 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 81 transitions. [2018-11-14 17:40:24,005 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:24,018 INFO L225 Difference]: With dead ends: 60 [2018-11-14 17:40:24,019 INFO L226 Difference]: Without dead ends: 28 [2018-11-14 17:40:24,023 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:40:24,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-11-14 17:40:24,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-11-14 17:40:24,084 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:24,085 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand 28 states. [2018-11-14 17:40:24,085 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 17:40:24,085 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 17:40:24,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:24,090 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2018-11-14 17:40:24,090 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 17:40:24,091 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:24,091 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:24,091 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 17:40:24,091 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 17:40:24,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:24,096 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2018-11-14 17:40:24,096 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 17:40:24,097 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:24,097 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:24,097 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:24,097 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:24,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-14 17:40:24,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2018-11-14 17:40:24,107 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 32 transitions. Word has length 16 [2018-11-14 17:40:24,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:24,108 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 32 transitions. [2018-11-14 17:40:24,108 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 17:40:24,108 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 17:40:24,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-14 17:40:24,109 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:24,109 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:24,110 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:24,110 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:24,110 INFO L82 PathProgramCache]: Analyzing trace with hash 1344147956, now seen corresponding path program 1 times [2018-11-14 17:40:24,111 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:24,111 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:24,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:40:24,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:24,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:24,184 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:24,274 INFO L256 TraceCheckUtils]: 0: Hoare triple {255#true} call ULTIMATE.init(); {255#true} is VALID [2018-11-14 17:40:24,275 INFO L273 TraceCheckUtils]: 1: Hoare triple {255#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {255#true} is VALID [2018-11-14 17:40:24,275 INFO L273 TraceCheckUtils]: 2: Hoare triple {255#true} assume true; {255#true} is VALID [2018-11-14 17:40:24,275 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {255#true} {255#true} #87#return; {255#true} is VALID [2018-11-14 17:40:24,275 INFO L256 TraceCheckUtils]: 4: Hoare triple {255#true} call #t~ret8 := main(); {255#true} is VALID [2018-11-14 17:40:24,279 INFO L273 TraceCheckUtils]: 5: Hoare triple {255#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:24,281 INFO L273 TraceCheckUtils]: 6: Hoare triple {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:24,284 INFO L273 TraceCheckUtils]: 7: Hoare triple {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {282#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:24,284 INFO L273 TraceCheckUtils]: 8: Hoare triple {282#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {256#false} is VALID [2018-11-14 17:40:24,284 INFO L273 TraceCheckUtils]: 9: Hoare triple {256#false} assume true; {256#false} is VALID [2018-11-14 17:40:24,285 INFO L273 TraceCheckUtils]: 10: Hoare triple {256#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {256#false} is VALID [2018-11-14 17:40:24,285 INFO L273 TraceCheckUtils]: 11: Hoare triple {256#false} assume true; {256#false} is VALID [2018-11-14 17:40:24,285 INFO L273 TraceCheckUtils]: 12: Hoare triple {256#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {256#false} is VALID [2018-11-14 17:40:24,286 INFO L256 TraceCheckUtils]: 13: Hoare triple {256#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {256#false} is VALID [2018-11-14 17:40:24,286 INFO L273 TraceCheckUtils]: 14: Hoare triple {256#false} ~cond := #in~cond; {256#false} is VALID [2018-11-14 17:40:24,286 INFO L273 TraceCheckUtils]: 15: Hoare triple {256#false} assume ~cond == 0bv32; {256#false} is VALID [2018-11-14 17:40:24,287 INFO L273 TraceCheckUtils]: 16: Hoare triple {256#false} assume !false; {256#false} is VALID [2018-11-14 17:40:24,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:40:24,289 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 17:40:24,296 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:40:24,296 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-14 17:40:24,298 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-11-14 17:40:24,299 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:24,299 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 17:40:24,522 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:24,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 17:40:24,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 17:40:24,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-14 17:40:24,523 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. Second operand 4 states. [2018-11-14 17:40:24,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:24,995 INFO L93 Difference]: Finished difference Result 50 states and 58 transitions. [2018-11-14 17:40:24,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 17:40:24,995 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-11-14 17:40:24,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:24,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:40:24,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 58 transitions. [2018-11-14 17:40:24,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:40:25,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 58 transitions. [2018-11-14 17:40:25,003 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 58 transitions. [2018-11-14 17:40:25,189 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:25,191 INFO L225 Difference]: With dead ends: 50 [2018-11-14 17:40:25,192 INFO L226 Difference]: Without dead ends: 35 [2018-11-14 17:40:25,193 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:40:25,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-14 17:40:25,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 30. [2018-11-14 17:40:25,210 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:25,210 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 30 states. [2018-11-14 17:40:25,210 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 30 states. [2018-11-14 17:40:25,211 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 30 states. [2018-11-14 17:40:25,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:25,214 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-11-14 17:40:25,214 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-14 17:40:25,215 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:25,215 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:25,215 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 35 states. [2018-11-14 17:40:25,216 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 35 states. [2018-11-14 17:40:25,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:25,219 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-11-14 17:40:25,219 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-14 17:40:25,220 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:25,220 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:25,220 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:25,220 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:25,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-14 17:40:25,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2018-11-14 17:40:25,223 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 34 transitions. Word has length 17 [2018-11-14 17:40:25,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:25,223 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 34 transitions. [2018-11-14 17:40:25,223 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 17:40:25,223 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2018-11-14 17:40:25,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-14 17:40:25,224 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:25,225 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:25,225 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:25,225 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:25,225 INFO L82 PathProgramCache]: Analyzing trace with hash -269686762, now seen corresponding path program 1 times [2018-11-14 17:40:25,226 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:25,226 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:25,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:40:25,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:25,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:25,288 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:25,404 INFO L256 TraceCheckUtils]: 0: Hoare triple {488#true} call ULTIMATE.init(); {488#true} is VALID [2018-11-14 17:40:25,405 INFO L273 TraceCheckUtils]: 1: Hoare triple {488#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {488#true} is VALID [2018-11-14 17:40:25,405 INFO L273 TraceCheckUtils]: 2: Hoare triple {488#true} assume true; {488#true} is VALID [2018-11-14 17:40:25,405 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {488#true} {488#true} #87#return; {488#true} is VALID [2018-11-14 17:40:25,406 INFO L256 TraceCheckUtils]: 4: Hoare triple {488#true} call #t~ret8 := main(); {488#true} is VALID [2018-11-14 17:40:25,406 INFO L273 TraceCheckUtils]: 5: Hoare triple {488#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:25,407 INFO L273 TraceCheckUtils]: 6: Hoare triple {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:25,408 INFO L273 TraceCheckUtils]: 7: Hoare triple {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 17:40:25,408 INFO L273 TraceCheckUtils]: 8: Hoare triple {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} assume true; {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 17:40:25,409 INFO L273 TraceCheckUtils]: 9: Hoare triple {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {489#false} is VALID [2018-11-14 17:40:25,409 INFO L273 TraceCheckUtils]: 10: Hoare triple {489#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {489#false} is VALID [2018-11-14 17:40:25,410 INFO L273 TraceCheckUtils]: 11: Hoare triple {489#false} assume true; {489#false} is VALID [2018-11-14 17:40:25,410 INFO L273 TraceCheckUtils]: 12: Hoare triple {489#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {489#false} is VALID [2018-11-14 17:40:25,411 INFO L273 TraceCheckUtils]: 13: Hoare triple {489#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {489#false} is VALID [2018-11-14 17:40:25,411 INFO L273 TraceCheckUtils]: 14: Hoare triple {489#false} assume true; {489#false} is VALID [2018-11-14 17:40:25,412 INFO L273 TraceCheckUtils]: 15: Hoare triple {489#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {489#false} is VALID [2018-11-14 17:40:25,413 INFO L273 TraceCheckUtils]: 16: Hoare triple {489#false} assume true; {489#false} is VALID [2018-11-14 17:40:25,413 INFO L273 TraceCheckUtils]: 17: Hoare triple {489#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {489#false} is VALID [2018-11-14 17:40:25,414 INFO L256 TraceCheckUtils]: 18: Hoare triple {489#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {489#false} is VALID [2018-11-14 17:40:25,414 INFO L273 TraceCheckUtils]: 19: Hoare triple {489#false} ~cond := #in~cond; {489#false} is VALID [2018-11-14 17:40:25,414 INFO L273 TraceCheckUtils]: 20: Hoare triple {489#false} assume ~cond == 0bv32; {489#false} is VALID [2018-11-14 17:40:25,415 INFO L273 TraceCheckUtils]: 21: Hoare triple {489#false} assume !false; {489#false} is VALID [2018-11-14 17:40:25,416 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:40:25,417 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 17:40:25,419 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:40:25,419 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-14 17:40:25,420 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-11-14 17:40:25,420 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:25,421 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 17:40:25,474 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:25,475 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 17:40:25,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 17:40:25,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-14 17:40:25,476 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. Second operand 4 states. [2018-11-14 17:40:25,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:25,877 INFO L93 Difference]: Finished difference Result 61 states and 73 transitions. [2018-11-14 17:40:25,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 17:40:25,878 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-11-14 17:40:25,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:25,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:40:25,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 73 transitions. [2018-11-14 17:40:25,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:40:25,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 73 transitions. [2018-11-14 17:40:25,885 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 73 transitions. [2018-11-14 17:40:26,074 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:26,076 INFO L225 Difference]: With dead ends: 61 [2018-11-14 17:40:26,076 INFO L226 Difference]: Without dead ends: 39 [2018-11-14 17:40:26,076 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:40:26,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-14 17:40:26,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 32. [2018-11-14 17:40:26,097 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:26,097 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 32 states. [2018-11-14 17:40:26,098 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 32 states. [2018-11-14 17:40:26,098 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 32 states. [2018-11-14 17:40:26,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:26,101 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-14 17:40:26,102 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-14 17:40:26,102 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:26,102 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:26,103 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 39 states. [2018-11-14 17:40:26,103 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 39 states. [2018-11-14 17:40:26,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:26,106 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-14 17:40:26,106 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-14 17:40:26,106 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:26,107 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:26,107 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:26,107 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:26,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-14 17:40:26,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 36 transitions. [2018-11-14 17:40:26,109 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 36 transitions. Word has length 22 [2018-11-14 17:40:26,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:26,110 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 36 transitions. [2018-11-14 17:40:26,110 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 17:40:26,110 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 36 transitions. [2018-11-14 17:40:26,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-14 17:40:26,111 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:26,111 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:26,111 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:26,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:26,112 INFO L82 PathProgramCache]: Analyzing trace with hash 417344287, now seen corresponding path program 1 times [2018-11-14 17:40:26,112 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:26,113 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:26,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:40:26,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:26,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:26,195 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:26,283 INFO L256 TraceCheckUtils]: 0: Hoare triple {761#true} call ULTIMATE.init(); {761#true} is VALID [2018-11-14 17:40:26,283 INFO L273 TraceCheckUtils]: 1: Hoare triple {761#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {761#true} is VALID [2018-11-14 17:40:26,284 INFO L273 TraceCheckUtils]: 2: Hoare triple {761#true} assume true; {761#true} is VALID [2018-11-14 17:40:26,284 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {761#true} {761#true} #87#return; {761#true} is VALID [2018-11-14 17:40:26,284 INFO L256 TraceCheckUtils]: 4: Hoare triple {761#true} call #t~ret8 := main(); {761#true} is VALID [2018-11-14 17:40:26,285 INFO L273 TraceCheckUtils]: 5: Hoare triple {761#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,286 INFO L273 TraceCheckUtils]: 6: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,288 INFO L273 TraceCheckUtils]: 7: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,288 INFO L273 TraceCheckUtils]: 8: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,289 INFO L273 TraceCheckUtils]: 9: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,290 INFO L273 TraceCheckUtils]: 10: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,292 INFO L273 TraceCheckUtils]: 11: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,293 INFO L273 TraceCheckUtils]: 12: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,294 INFO L273 TraceCheckUtils]: 13: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:26,294 INFO L273 TraceCheckUtils]: 14: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {809#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:26,295 INFO L273 TraceCheckUtils]: 15: Hoare triple {809#(= (_ bv2 32) main_~i~0)} assume true; {809#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:26,296 INFO L273 TraceCheckUtils]: 16: Hoare triple {809#(= (_ bv2 32) main_~i~0)} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {816#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:26,297 INFO L273 TraceCheckUtils]: 17: Hoare triple {816#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {762#false} is VALID [2018-11-14 17:40:26,297 INFO L273 TraceCheckUtils]: 18: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 17:40:26,297 INFO L273 TraceCheckUtils]: 19: Hoare triple {762#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {762#false} is VALID [2018-11-14 17:40:26,298 INFO L273 TraceCheckUtils]: 20: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 17:40:26,298 INFO L273 TraceCheckUtils]: 21: Hoare triple {762#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {762#false} is VALID [2018-11-14 17:40:26,298 INFO L256 TraceCheckUtils]: 22: Hoare triple {762#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {762#false} is VALID [2018-11-14 17:40:26,299 INFO L273 TraceCheckUtils]: 23: Hoare triple {762#false} ~cond := #in~cond; {762#false} is VALID [2018-11-14 17:40:26,299 INFO L273 TraceCheckUtils]: 24: Hoare triple {762#false} assume ~cond == 0bv32; {762#false} is VALID [2018-11-14 17:40:26,300 INFO L273 TraceCheckUtils]: 25: Hoare triple {762#false} assume !false; {762#false} is VALID [2018-11-14 17:40:26,302 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-14 17:40:26,302 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:40:26,460 INFO L273 TraceCheckUtils]: 25: Hoare triple {762#false} assume !false; {762#false} is VALID [2018-11-14 17:40:26,460 INFO L273 TraceCheckUtils]: 24: Hoare triple {762#false} assume ~cond == 0bv32; {762#false} is VALID [2018-11-14 17:40:26,461 INFO L273 TraceCheckUtils]: 23: Hoare triple {762#false} ~cond := #in~cond; {762#false} is VALID [2018-11-14 17:40:26,461 INFO L256 TraceCheckUtils]: 22: Hoare triple {762#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {762#false} is VALID [2018-11-14 17:40:26,461 INFO L273 TraceCheckUtils]: 21: Hoare triple {762#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {762#false} is VALID [2018-11-14 17:40:26,462 INFO L273 TraceCheckUtils]: 20: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 17:40:26,462 INFO L273 TraceCheckUtils]: 19: Hoare triple {762#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {762#false} is VALID [2018-11-14 17:40:26,462 INFO L273 TraceCheckUtils]: 18: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 17:40:26,463 INFO L273 TraceCheckUtils]: 17: Hoare triple {816#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {762#false} is VALID [2018-11-14 17:40:26,465 INFO L273 TraceCheckUtils]: 16: Hoare triple {871#(bvslt main_~i~0 (_ bv100000 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {816#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:26,465 INFO L273 TraceCheckUtils]: 15: Hoare triple {871#(bvslt main_~i~0 (_ bv100000 32))} assume true; {871#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 17:40:26,466 INFO L273 TraceCheckUtils]: 14: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {871#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 17:40:26,467 INFO L273 TraceCheckUtils]: 13: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,468 INFO L273 TraceCheckUtils]: 12: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,469 INFO L273 TraceCheckUtils]: 11: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,469 INFO L273 TraceCheckUtils]: 10: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,470 INFO L273 TraceCheckUtils]: 9: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,471 INFO L273 TraceCheckUtils]: 8: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,472 INFO L273 TraceCheckUtils]: 7: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,473 INFO L273 TraceCheckUtils]: 6: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,474 INFO L273 TraceCheckUtils]: 5: Hoare triple {761#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:26,474 INFO L256 TraceCheckUtils]: 4: Hoare triple {761#true} call #t~ret8 := main(); {761#true} is VALID [2018-11-14 17:40:26,475 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {761#true} {761#true} #87#return; {761#true} is VALID [2018-11-14 17:40:26,475 INFO L273 TraceCheckUtils]: 2: Hoare triple {761#true} assume true; {761#true} is VALID [2018-11-14 17:40:26,476 INFO L273 TraceCheckUtils]: 1: Hoare triple {761#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {761#true} is VALID [2018-11-14 17:40:26,476 INFO L256 TraceCheckUtils]: 0: Hoare triple {761#true} call ULTIMATE.init(); {761#true} is VALID [2018-11-14 17:40:26,479 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-14 17:40:26,481 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:40:26,481 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2018-11-14 17:40:26,481 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-11-14 17:40:26,482 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:26,482 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-14 17:40:26,606 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:26,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-14 17:40:26,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-14 17:40:26,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-14 17:40:26,607 INFO L87 Difference]: Start difference. First operand 32 states and 36 transitions. Second operand 7 states. [2018-11-14 17:40:27,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:27,171 INFO L93 Difference]: Finished difference Result 70 states and 84 transitions. [2018-11-14 17:40:27,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-14 17:40:27,172 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-11-14 17:40:27,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:27,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 17:40:27,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 82 transitions. [2018-11-14 17:40:27,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 17:40:27,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 82 transitions. [2018-11-14 17:40:27,179 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 82 transitions. [2018-11-14 17:40:27,390 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:27,392 INFO L225 Difference]: With dead ends: 70 [2018-11-14 17:40:27,392 INFO L226 Difference]: Without dead ends: 53 [2018-11-14 17:40:27,393 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2018-11-14 17:40:27,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-14 17:40:27,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-11-14 17:40:27,467 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:27,467 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 53 states. [2018-11-14 17:40:27,467 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-14 17:40:27,468 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-14 17:40:27,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:27,471 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-11-14 17:40:27,471 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-14 17:40:27,471 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:27,472 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:27,472 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-14 17:40:27,472 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-14 17:40:27,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:27,475 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-11-14 17:40:27,475 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-14 17:40:27,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:27,476 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:27,476 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:27,476 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:27,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-11-14 17:40:27,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 63 transitions. [2018-11-14 17:40:27,480 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 63 transitions. Word has length 26 [2018-11-14 17:40:27,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:27,480 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 63 transitions. [2018-11-14 17:40:27,480 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-14 17:40:27,480 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-14 17:40:27,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-14 17:40:27,482 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:27,482 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:27,482 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:27,483 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:27,483 INFO L82 PathProgramCache]: Analyzing trace with hash -1891846581, now seen corresponding path program 2 times [2018-11-14 17:40:27,483 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:27,483 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:27,502 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 17:40:27,570 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:40:27,570 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:40:27,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:27,587 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:27,724 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-14 17:40:27,725 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-14 17:40:27,725 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-14 17:40:27,725 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-14 17:40:27,726 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret8 := main(); {1200#true} is VALID [2018-11-14 17:40:27,727 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,727 INFO L273 TraceCheckUtils]: 6: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,728 INFO L273 TraceCheckUtils]: 7: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,728 INFO L273 TraceCheckUtils]: 8: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,729 INFO L273 TraceCheckUtils]: 9: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,729 INFO L273 TraceCheckUtils]: 10: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,730 INFO L273 TraceCheckUtils]: 11: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,730 INFO L273 TraceCheckUtils]: 12: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,731 INFO L273 TraceCheckUtils]: 13: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,748 INFO L273 TraceCheckUtils]: 14: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1248#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:27,749 INFO L273 TraceCheckUtils]: 15: Hoare triple {1248#(= (_ bv2 32) main_~i~0)} assume true; {1248#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:27,752 INFO L273 TraceCheckUtils]: 16: Hoare triple {1248#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,754 INFO L273 TraceCheckUtils]: 17: Hoare triple {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,757 INFO L273 TraceCheckUtils]: 18: Hoare triple {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,757 INFO L273 TraceCheckUtils]: 19: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,762 INFO L273 TraceCheckUtils]: 20: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,766 INFO L273 TraceCheckUtils]: 21: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,766 INFO L273 TraceCheckUtils]: 22: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,768 INFO L273 TraceCheckUtils]: 23: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,768 INFO L273 TraceCheckUtils]: 24: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,769 INFO L273 TraceCheckUtils]: 25: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,769 INFO L273 TraceCheckUtils]: 26: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,771 INFO L273 TraceCheckUtils]: 27: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,771 INFO L273 TraceCheckUtils]: 28: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,772 INFO L273 TraceCheckUtils]: 29: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,773 INFO L273 TraceCheckUtils]: 30: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,773 INFO L273 TraceCheckUtils]: 31: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,774 INFO L273 TraceCheckUtils]: 32: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-14 17:40:27,774 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 17:40:27,774 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1201#false} is VALID [2018-11-14 17:40:27,774 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 17:40:27,774 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1201#false} is VALID [2018-11-14 17:40:27,775 INFO L256 TraceCheckUtils]: 37: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-14 17:40:27,775 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-14 17:40:27,775 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume ~cond == 0bv32; {1201#false} is VALID [2018-11-14 17:40:27,776 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-14 17:40:27,780 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-14 17:40:27,781 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:40:27,902 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-14 17:40:27,903 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume ~cond == 0bv32; {1201#false} is VALID [2018-11-14 17:40:27,903 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-14 17:40:27,904 INFO L256 TraceCheckUtils]: 37: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-14 17:40:27,904 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1201#false} is VALID [2018-11-14 17:40:27,904 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 17:40:27,905 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1201#false} is VALID [2018-11-14 17:40:27,905 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 17:40:27,906 INFO L273 TraceCheckUtils]: 32: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-14 17:40:27,910 INFO L273 TraceCheckUtils]: 31: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,911 INFO L273 TraceCheckUtils]: 30: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,911 INFO L273 TraceCheckUtils]: 29: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,912 INFO L273 TraceCheckUtils]: 28: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,912 INFO L273 TraceCheckUtils]: 27: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,912 INFO L273 TraceCheckUtils]: 26: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,913 INFO L273 TraceCheckUtils]: 25: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,914 INFO L273 TraceCheckUtils]: 24: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,914 INFO L273 TraceCheckUtils]: 23: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,915 INFO L273 TraceCheckUtils]: 22: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,916 INFO L273 TraceCheckUtils]: 21: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,917 INFO L273 TraceCheckUtils]: 20: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,917 INFO L273 TraceCheckUtils]: 19: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,918 INFO L273 TraceCheckUtils]: 18: Hoare triple {1395#(bvsge main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,919 INFO L273 TraceCheckUtils]: 17: Hoare triple {1395#(bvsge main_~j~0 (_ bv0 32))} assume true; {1395#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,921 INFO L273 TraceCheckUtils]: 16: Hoare triple {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1395#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,922 INFO L273 TraceCheckUtils]: 15: Hoare triple {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,925 INFO L273 TraceCheckUtils]: 14: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:27,926 INFO L273 TraceCheckUtils]: 13: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,927 INFO L273 TraceCheckUtils]: 12: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume true; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,927 INFO L273 TraceCheckUtils]: 11: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,927 INFO L273 TraceCheckUtils]: 10: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,928 INFO L273 TraceCheckUtils]: 9: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,928 INFO L273 TraceCheckUtils]: 8: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume true; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,929 INFO L273 TraceCheckUtils]: 7: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,929 INFO L273 TraceCheckUtils]: 6: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume true; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,931 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:27,932 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret8 := main(); {1200#true} is VALID [2018-11-14 17:40:27,932 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-14 17:40:27,932 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-14 17:40:27,932 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-14 17:40:27,933 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-14 17:40:27,935 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-14 17:40:27,937 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:40:27,937 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-11-14 17:40:27,938 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 41 [2018-11-14 17:40:27,938 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:27,939 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-14 17:40:27,997 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:27,998 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-14 17:40:27,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-14 17:40:27,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-14 17:40:27,999 INFO L87 Difference]: Start difference. First operand 53 states and 63 transitions. Second operand 9 states. [2018-11-14 17:40:28,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:28,882 INFO L93 Difference]: Finished difference Result 110 states and 134 transitions. [2018-11-14 17:40:28,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-14 17:40:28,883 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 41 [2018-11-14 17:40:28,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:28,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-14 17:40:28,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 125 transitions. [2018-11-14 17:40:28,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-14 17:40:28,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 125 transitions. [2018-11-14 17:40:28,893 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 125 transitions. [2018-11-14 17:40:29,101 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:29,103 INFO L225 Difference]: With dead ends: 110 [2018-11-14 17:40:29,103 INFO L226 Difference]: Without dead ends: 68 [2018-11-14 17:40:29,104 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=133, Invalid=287, Unknown=0, NotChecked=0, Total=420 [2018-11-14 17:40:29,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-11-14 17:40:29,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 63. [2018-11-14 17:40:29,185 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:29,186 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand 63 states. [2018-11-14 17:40:29,186 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand 63 states. [2018-11-14 17:40:29,186 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 63 states. [2018-11-14 17:40:29,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:29,189 INFO L93 Difference]: Finished difference Result 68 states and 81 transitions. [2018-11-14 17:40:29,189 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 81 transitions. [2018-11-14 17:40:29,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:29,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:29,191 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand 68 states. [2018-11-14 17:40:29,191 INFO L87 Difference]: Start difference. First operand 63 states. Second operand 68 states. [2018-11-14 17:40:29,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:29,195 INFO L93 Difference]: Finished difference Result 68 states and 81 transitions. [2018-11-14 17:40:29,195 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 81 transitions. [2018-11-14 17:40:29,196 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:29,196 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:29,196 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:29,196 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:29,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-11-14 17:40:29,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 74 transitions. [2018-11-14 17:40:29,199 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 74 transitions. Word has length 41 [2018-11-14 17:40:29,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:29,200 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 74 transitions. [2018-11-14 17:40:29,200 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-14 17:40:29,200 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 74 transitions. [2018-11-14 17:40:29,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-14 17:40:29,202 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:29,202 INFO L375 BasicCegarLoop]: trace histogram [9, 5, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:29,202 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:29,203 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:29,203 INFO L82 PathProgramCache]: Analyzing trace with hash -1223729539, now seen corresponding path program 3 times [2018-11-14 17:40:29,203 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:29,204 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:29,222 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 17:40:29,293 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-14 17:40:29,293 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:40:29,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:29,319 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:29,613 INFO L256 TraceCheckUtils]: 0: Hoare triple {1844#true} call ULTIMATE.init(); {1844#true} is VALID [2018-11-14 17:40:29,613 INFO L273 TraceCheckUtils]: 1: Hoare triple {1844#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1844#true} is VALID [2018-11-14 17:40:29,613 INFO L273 TraceCheckUtils]: 2: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,614 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1844#true} {1844#true} #87#return; {1844#true} is VALID [2018-11-14 17:40:29,614 INFO L256 TraceCheckUtils]: 4: Hoare triple {1844#true} call #t~ret8 := main(); {1844#true} is VALID [2018-11-14 17:40:29,614 INFO L273 TraceCheckUtils]: 5: Hoare triple {1844#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:29,614 INFO L273 TraceCheckUtils]: 6: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,615 INFO L273 TraceCheckUtils]: 7: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 17:40:29,615 INFO L273 TraceCheckUtils]: 8: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,615 INFO L273 TraceCheckUtils]: 9: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:29,615 INFO L273 TraceCheckUtils]: 10: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:29,615 INFO L273 TraceCheckUtils]: 11: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:29,616 INFO L273 TraceCheckUtils]: 12: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,616 INFO L273 TraceCheckUtils]: 13: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 17:40:29,616 INFO L273 TraceCheckUtils]: 14: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 17:40:29,616 INFO L273 TraceCheckUtils]: 15: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,617 INFO L273 TraceCheckUtils]: 16: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 17:40:29,617 INFO L273 TraceCheckUtils]: 17: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,617 INFO L273 TraceCheckUtils]: 18: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:29,617 INFO L273 TraceCheckUtils]: 19: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:29,618 INFO L273 TraceCheckUtils]: 20: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:29,618 INFO L273 TraceCheckUtils]: 21: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,618 INFO L273 TraceCheckUtils]: 22: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:29,619 INFO L273 TraceCheckUtils]: 23: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:29,619 INFO L273 TraceCheckUtils]: 24: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:29,619 INFO L273 TraceCheckUtils]: 25: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,619 INFO L273 TraceCheckUtils]: 26: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 17:40:29,620 INFO L273 TraceCheckUtils]: 27: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 17:40:29,620 INFO L273 TraceCheckUtils]: 28: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,620 INFO L273 TraceCheckUtils]: 29: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 17:40:29,620 INFO L273 TraceCheckUtils]: 30: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,621 INFO L273 TraceCheckUtils]: 31: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:29,621 INFO L273 TraceCheckUtils]: 32: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:29,621 INFO L273 TraceCheckUtils]: 33: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:29,621 INFO L273 TraceCheckUtils]: 34: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,622 INFO L273 TraceCheckUtils]: 35: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 17:40:29,622 INFO L273 TraceCheckUtils]: 36: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 17:40:29,622 INFO L273 TraceCheckUtils]: 37: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:29,646 INFO L273 TraceCheckUtils]: 38: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:40:29,660 INFO L273 TraceCheckUtils]: 39: Hoare triple {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume true; {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:40:29,665 INFO L273 TraceCheckUtils]: 40: Hoare triple {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:40:29,666 INFO L273 TraceCheckUtils]: 41: Hoare triple {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:40:29,695 INFO L273 TraceCheckUtils]: 42: Hoare triple {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:29,696 INFO L273 TraceCheckUtils]: 43: Hoare triple {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:29,698 INFO L273 TraceCheckUtils]: 44: Hoare triple {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1984#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:29,705 INFO L273 TraceCheckUtils]: 45: Hoare triple {1984#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:29,706 INFO L273 TraceCheckUtils]: 46: Hoare triple {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:29,708 INFO L273 TraceCheckUtils]: 47: Hoare triple {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1995#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:29,708 INFO L273 TraceCheckUtils]: 48: Hoare triple {1995#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1845#false} is VALID [2018-11-14 17:40:29,708 INFO L273 TraceCheckUtils]: 49: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 17:40:29,709 INFO L273 TraceCheckUtils]: 50: Hoare triple {1845#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1845#false} is VALID [2018-11-14 17:40:29,709 INFO L273 TraceCheckUtils]: 51: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 17:40:29,709 INFO L273 TraceCheckUtils]: 52: Hoare triple {1845#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1845#false} is VALID [2018-11-14 17:40:29,709 INFO L256 TraceCheckUtils]: 53: Hoare triple {1845#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1845#false} is VALID [2018-11-14 17:40:29,709 INFO L273 TraceCheckUtils]: 54: Hoare triple {1845#false} ~cond := #in~cond; {1845#false} is VALID [2018-11-14 17:40:29,710 INFO L273 TraceCheckUtils]: 55: Hoare triple {1845#false} assume ~cond == 0bv32; {1845#false} is VALID [2018-11-14 17:40:29,710 INFO L273 TraceCheckUtils]: 56: Hoare triple {1845#false} assume !false; {1845#false} is VALID [2018-11-14 17:40:29,716 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 47 proven. 2 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2018-11-14 17:40:29,717 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:40:30,294 INFO L273 TraceCheckUtils]: 56: Hoare triple {1845#false} assume !false; {1845#false} is VALID [2018-11-14 17:40:30,295 INFO L273 TraceCheckUtils]: 55: Hoare triple {1845#false} assume ~cond == 0bv32; {1845#false} is VALID [2018-11-14 17:40:30,295 INFO L273 TraceCheckUtils]: 54: Hoare triple {1845#false} ~cond := #in~cond; {1845#false} is VALID [2018-11-14 17:40:30,295 INFO L256 TraceCheckUtils]: 53: Hoare triple {1845#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1845#false} is VALID [2018-11-14 17:40:30,296 INFO L273 TraceCheckUtils]: 52: Hoare triple {1845#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1845#false} is VALID [2018-11-14 17:40:30,296 INFO L273 TraceCheckUtils]: 51: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 17:40:30,296 INFO L273 TraceCheckUtils]: 50: Hoare triple {1845#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1845#false} is VALID [2018-11-14 17:40:30,297 INFO L273 TraceCheckUtils]: 49: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 17:40:30,299 INFO L273 TraceCheckUtils]: 48: Hoare triple {1995#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1845#false} is VALID [2018-11-14 17:40:30,302 INFO L273 TraceCheckUtils]: 47: Hoare triple {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1995#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:30,303 INFO L273 TraceCheckUtils]: 46: Hoare triple {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume true; {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:40:30,304 INFO L273 TraceCheckUtils]: 45: Hoare triple {2057#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:40:30,304 INFO L273 TraceCheckUtils]: 44: Hoare triple {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {2057#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:40:30,305 INFO L273 TraceCheckUtils]: 43: Hoare triple {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume true; {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:30,305 INFO L273 TraceCheckUtils]: 42: Hoare triple {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:30,306 INFO L273 TraceCheckUtils]: 41: Hoare triple {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:30,307 INFO L273 TraceCheckUtils]: 40: Hoare triple {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:30,308 INFO L273 TraceCheckUtils]: 39: Hoare triple {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:40:30,311 INFO L273 TraceCheckUtils]: 38: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:40:30,312 INFO L273 TraceCheckUtils]: 37: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,312 INFO L273 TraceCheckUtils]: 36: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 17:40:30,313 INFO L273 TraceCheckUtils]: 35: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 17:40:30,313 INFO L273 TraceCheckUtils]: 34: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,313 INFO L273 TraceCheckUtils]: 33: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:30,313 INFO L273 TraceCheckUtils]: 32: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:30,314 INFO L273 TraceCheckUtils]: 31: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:30,314 INFO L273 TraceCheckUtils]: 30: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,314 INFO L273 TraceCheckUtils]: 29: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 17:40:30,314 INFO L273 TraceCheckUtils]: 28: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,314 INFO L273 TraceCheckUtils]: 27: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 17:40:30,315 INFO L273 TraceCheckUtils]: 26: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 17:40:30,315 INFO L273 TraceCheckUtils]: 25: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,315 INFO L273 TraceCheckUtils]: 24: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:30,315 INFO L273 TraceCheckUtils]: 23: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:30,315 INFO L273 TraceCheckUtils]: 22: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:30,316 INFO L273 TraceCheckUtils]: 21: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,316 INFO L273 TraceCheckUtils]: 20: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:30,316 INFO L273 TraceCheckUtils]: 19: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:30,316 INFO L273 TraceCheckUtils]: 18: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:30,316 INFO L273 TraceCheckUtils]: 17: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,317 INFO L273 TraceCheckUtils]: 16: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 17:40:30,317 INFO L273 TraceCheckUtils]: 15: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,317 INFO L273 TraceCheckUtils]: 14: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 17:40:30,317 INFO L273 TraceCheckUtils]: 13: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 17:40:30,317 INFO L273 TraceCheckUtils]: 12: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,318 INFO L273 TraceCheckUtils]: 11: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 17:40:30,318 INFO L273 TraceCheckUtils]: 10: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:30,318 INFO L273 TraceCheckUtils]: 9: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 17:40:30,318 INFO L273 TraceCheckUtils]: 8: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,319 INFO L273 TraceCheckUtils]: 7: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 17:40:30,319 INFO L273 TraceCheckUtils]: 6: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,319 INFO L273 TraceCheckUtils]: 5: Hoare triple {1844#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1844#true} is VALID [2018-11-14 17:40:30,319 INFO L256 TraceCheckUtils]: 4: Hoare triple {1844#true} call #t~ret8 := main(); {1844#true} is VALID [2018-11-14 17:40:30,320 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1844#true} {1844#true} #87#return; {1844#true} is VALID [2018-11-14 17:40:30,320 INFO L273 TraceCheckUtils]: 2: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 17:40:30,320 INFO L273 TraceCheckUtils]: 1: Hoare triple {1844#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1844#true} is VALID [2018-11-14 17:40:30,320 INFO L256 TraceCheckUtils]: 0: Hoare triple {1844#true} call ULTIMATE.init(); {1844#true} is VALID [2018-11-14 17:40:30,325 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 47 proven. 2 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2018-11-14 17:40:30,326 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:40:30,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-11-14 17:40:30,327 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-11-14 17:40:30,328 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:30,331 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-14 17:40:30,446 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:30,446 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-14 17:40:30,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-14 17:40:30,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-11-14 17:40:30,447 INFO L87 Difference]: Start difference. First operand 63 states and 74 transitions. Second operand 13 states. [2018-11-14 17:40:35,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:35,367 INFO L93 Difference]: Finished difference Result 320 states and 416 transitions. [2018-11-14 17:40:35,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-14 17:40:35,367 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-11-14 17:40:35,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:35,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 17:40:35,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 182 transitions. [2018-11-14 17:40:35,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 17:40:35,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 182 transitions. [2018-11-14 17:40:35,377 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states and 182 transitions. [2018-11-14 17:40:36,042 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 182 edges. 182 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:36,050 INFO L225 Difference]: With dead ends: 320 [2018-11-14 17:40:36,050 INFO L226 Difference]: Without dead ends: 260 [2018-11-14 17:40:36,051 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 322 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=413, Invalid=993, Unknown=0, NotChecked=0, Total=1406 [2018-11-14 17:40:36,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2018-11-14 17:40:36,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 116. [2018-11-14 17:40:36,310 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:36,310 INFO L82 GeneralOperation]: Start isEquivalent. First operand 260 states. Second operand 116 states. [2018-11-14 17:40:36,310 INFO L74 IsIncluded]: Start isIncluded. First operand 260 states. Second operand 116 states. [2018-11-14 17:40:36,310 INFO L87 Difference]: Start difference. First operand 260 states. Second operand 116 states. [2018-11-14 17:40:36,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:36,321 INFO L93 Difference]: Finished difference Result 260 states and 337 transitions. [2018-11-14 17:40:36,321 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 337 transitions. [2018-11-14 17:40:36,322 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:36,322 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:36,322 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand 260 states. [2018-11-14 17:40:36,323 INFO L87 Difference]: Start difference. First operand 116 states. Second operand 260 states. [2018-11-14 17:40:36,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:36,333 INFO L93 Difference]: Finished difference Result 260 states and 337 transitions. [2018-11-14 17:40:36,333 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 337 transitions. [2018-11-14 17:40:36,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:36,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:36,334 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:36,334 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:36,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-11-14 17:40:36,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 147 transitions. [2018-11-14 17:40:36,339 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 147 transitions. Word has length 57 [2018-11-14 17:40:36,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:36,339 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 147 transitions. [2018-11-14 17:40:36,339 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-14 17:40:36,339 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 147 transitions. [2018-11-14 17:40:36,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-14 17:40:36,340 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:36,340 INFO L375 BasicCegarLoop]: trace histogram [12, 8, 8, 8, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:36,341 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:36,341 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:36,341 INFO L82 PathProgramCache]: Analyzing trace with hash 1715077016, now seen corresponding path program 4 times [2018-11-14 17:40:36,341 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:36,342 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:36,359 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 17:40:36,433 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 17:40:36,433 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:40:36,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:36,473 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:36,623 INFO L256 TraceCheckUtils]: 0: Hoare triple {3345#true} call ULTIMATE.init(); {3345#true} is VALID [2018-11-14 17:40:36,624 INFO L273 TraceCheckUtils]: 1: Hoare triple {3345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3345#true} is VALID [2018-11-14 17:40:36,624 INFO L273 TraceCheckUtils]: 2: Hoare triple {3345#true} assume true; {3345#true} is VALID [2018-11-14 17:40:36,625 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3345#true} {3345#true} #87#return; {3345#true} is VALID [2018-11-14 17:40:36,625 INFO L256 TraceCheckUtils]: 4: Hoare triple {3345#true} call #t~ret8 := main(); {3345#true} is VALID [2018-11-14 17:40:36,641 INFO L273 TraceCheckUtils]: 5: Hoare triple {3345#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,644 INFO L273 TraceCheckUtils]: 6: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,644 INFO L273 TraceCheckUtils]: 7: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,645 INFO L273 TraceCheckUtils]: 8: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,645 INFO L273 TraceCheckUtils]: 9: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,645 INFO L273 TraceCheckUtils]: 10: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,646 INFO L273 TraceCheckUtils]: 11: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,646 INFO L273 TraceCheckUtils]: 12: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,646 INFO L273 TraceCheckUtils]: 13: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,647 INFO L273 TraceCheckUtils]: 14: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,647 INFO L273 TraceCheckUtils]: 15: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,648 INFO L273 TraceCheckUtils]: 16: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,648 INFO L273 TraceCheckUtils]: 17: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,649 INFO L273 TraceCheckUtils]: 18: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,649 INFO L273 TraceCheckUtils]: 19: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,650 INFO L273 TraceCheckUtils]: 20: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,651 INFO L273 TraceCheckUtils]: 21: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,651 INFO L273 TraceCheckUtils]: 22: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,652 INFO L273 TraceCheckUtils]: 23: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,652 INFO L273 TraceCheckUtils]: 24: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,653 INFO L273 TraceCheckUtils]: 25: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,653 INFO L273 TraceCheckUtils]: 26: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:40:36,654 INFO L273 TraceCheckUtils]: 27: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,655 INFO L273 TraceCheckUtils]: 28: Hoare triple {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,656 INFO L273 TraceCheckUtils]: 29: Hoare triple {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,656 INFO L273 TraceCheckUtils]: 30: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,657 INFO L273 TraceCheckUtils]: 31: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,665 INFO L273 TraceCheckUtils]: 32: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,666 INFO L273 TraceCheckUtils]: 33: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,666 INFO L273 TraceCheckUtils]: 34: Hoare triple {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,667 INFO L273 TraceCheckUtils]: 35: Hoare triple {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,667 INFO L273 TraceCheckUtils]: 36: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,667 INFO L273 TraceCheckUtils]: 37: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume true; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,668 INFO L273 TraceCheckUtils]: 38: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3346#false} is VALID [2018-11-14 17:40:36,668 INFO L273 TraceCheckUtils]: 39: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,668 INFO L273 TraceCheckUtils]: 40: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,668 INFO L273 TraceCheckUtils]: 41: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,668 INFO L273 TraceCheckUtils]: 42: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,669 INFO L273 TraceCheckUtils]: 43: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,669 INFO L273 TraceCheckUtils]: 44: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,669 INFO L273 TraceCheckUtils]: 45: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,669 INFO L273 TraceCheckUtils]: 46: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,670 INFO L273 TraceCheckUtils]: 47: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,670 INFO L273 TraceCheckUtils]: 48: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,670 INFO L273 TraceCheckUtils]: 49: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,671 INFO L273 TraceCheckUtils]: 50: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,671 INFO L273 TraceCheckUtils]: 51: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,671 INFO L273 TraceCheckUtils]: 52: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,671 INFO L273 TraceCheckUtils]: 53: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,671 INFO L273 TraceCheckUtils]: 54: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,672 INFO L273 TraceCheckUtils]: 55: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,672 INFO L273 TraceCheckUtils]: 56: Hoare triple {3346#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 17:40:36,672 INFO L273 TraceCheckUtils]: 57: Hoare triple {3346#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3346#false} is VALID [2018-11-14 17:40:36,672 INFO L273 TraceCheckUtils]: 58: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,672 INFO L273 TraceCheckUtils]: 59: Hoare triple {3346#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 17:40:36,673 INFO L273 TraceCheckUtils]: 60: Hoare triple {3346#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {3346#false} is VALID [2018-11-14 17:40:36,673 INFO L273 TraceCheckUtils]: 61: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,673 INFO L273 TraceCheckUtils]: 62: Hoare triple {3346#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {3346#false} is VALID [2018-11-14 17:40:36,673 INFO L273 TraceCheckUtils]: 63: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,673 INFO L273 TraceCheckUtils]: 64: Hoare triple {3346#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,674 INFO L256 TraceCheckUtils]: 65: Hoare triple {3346#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {3346#false} is VALID [2018-11-14 17:40:36,674 INFO L273 TraceCheckUtils]: 66: Hoare triple {3346#false} ~cond := #in~cond; {3346#false} is VALID [2018-11-14 17:40:36,674 INFO L273 TraceCheckUtils]: 67: Hoare triple {3346#false} assume ~cond == 0bv32; {3346#false} is VALID [2018-11-14 17:40:36,674 INFO L273 TraceCheckUtils]: 68: Hoare triple {3346#false} assume !false; {3346#false} is VALID [2018-11-14 17:40:36,680 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 113 proven. 59 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-14 17:40:36,681 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:40:36,927 INFO L273 TraceCheckUtils]: 68: Hoare triple {3346#false} assume !false; {3346#false} is VALID [2018-11-14 17:40:36,927 INFO L273 TraceCheckUtils]: 67: Hoare triple {3346#false} assume ~cond == 0bv32; {3346#false} is VALID [2018-11-14 17:40:36,928 INFO L273 TraceCheckUtils]: 66: Hoare triple {3346#false} ~cond := #in~cond; {3346#false} is VALID [2018-11-14 17:40:36,928 INFO L256 TraceCheckUtils]: 65: Hoare triple {3346#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {3346#false} is VALID [2018-11-14 17:40:36,928 INFO L273 TraceCheckUtils]: 64: Hoare triple {3346#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,928 INFO L273 TraceCheckUtils]: 63: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,929 INFO L273 TraceCheckUtils]: 62: Hoare triple {3346#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {3346#false} is VALID [2018-11-14 17:40:36,929 INFO L273 TraceCheckUtils]: 61: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,929 INFO L273 TraceCheckUtils]: 60: Hoare triple {3346#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {3346#false} is VALID [2018-11-14 17:40:36,929 INFO L273 TraceCheckUtils]: 59: Hoare triple {3346#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 17:40:36,932 INFO L273 TraceCheckUtils]: 58: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,932 INFO L273 TraceCheckUtils]: 57: Hoare triple {3346#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3346#false} is VALID [2018-11-14 17:40:36,932 INFO L273 TraceCheckUtils]: 56: Hoare triple {3346#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 17:40:36,932 INFO L273 TraceCheckUtils]: 55: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,933 INFO L273 TraceCheckUtils]: 54: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,933 INFO L273 TraceCheckUtils]: 53: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,933 INFO L273 TraceCheckUtils]: 52: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,933 INFO L273 TraceCheckUtils]: 51: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,933 INFO L273 TraceCheckUtils]: 50: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,934 INFO L273 TraceCheckUtils]: 49: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,934 INFO L273 TraceCheckUtils]: 48: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,934 INFO L273 TraceCheckUtils]: 47: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,934 INFO L273 TraceCheckUtils]: 46: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,934 INFO L273 TraceCheckUtils]: 45: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,935 INFO L273 TraceCheckUtils]: 44: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,935 INFO L273 TraceCheckUtils]: 43: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,935 INFO L273 TraceCheckUtils]: 42: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 17:40:36,935 INFO L273 TraceCheckUtils]: 41: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 17:40:36,935 INFO L273 TraceCheckUtils]: 40: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 17:40:36,935 INFO L273 TraceCheckUtils]: 39: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 17:40:36,936 INFO L273 TraceCheckUtils]: 38: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3346#false} is VALID [2018-11-14 17:40:36,936 INFO L273 TraceCheckUtils]: 37: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume true; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,936 INFO L273 TraceCheckUtils]: 36: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,937 INFO L273 TraceCheckUtils]: 35: Hoare triple {3659#(bvsge main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,937 INFO L273 TraceCheckUtils]: 34: Hoare triple {3659#(bvsge main_~j~0 (_ bv0 32))} assume true; {3659#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,938 INFO L273 TraceCheckUtils]: 33: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3659#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,938 INFO L273 TraceCheckUtils]: 32: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,939 INFO L273 TraceCheckUtils]: 31: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,939 INFO L273 TraceCheckUtils]: 30: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,943 INFO L273 TraceCheckUtils]: 29: Hoare triple {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,944 INFO L273 TraceCheckUtils]: 28: Hoare triple {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,946 INFO L273 TraceCheckUtils]: 27: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,947 INFO L273 TraceCheckUtils]: 26: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,947 INFO L273 TraceCheckUtils]: 25: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,947 INFO L273 TraceCheckUtils]: 24: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,948 INFO L273 TraceCheckUtils]: 23: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,948 INFO L273 TraceCheckUtils]: 22: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,948 INFO L273 TraceCheckUtils]: 21: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,949 INFO L273 TraceCheckUtils]: 20: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,949 INFO L273 TraceCheckUtils]: 19: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,949 INFO L273 TraceCheckUtils]: 18: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,950 INFO L273 TraceCheckUtils]: 17: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,950 INFO L273 TraceCheckUtils]: 16: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,951 INFO L273 TraceCheckUtils]: 15: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,954 INFO L273 TraceCheckUtils]: 14: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:40:36,954 INFO L273 TraceCheckUtils]: 13: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,955 INFO L273 TraceCheckUtils]: 12: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume true; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,955 INFO L273 TraceCheckUtils]: 11: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,956 INFO L273 TraceCheckUtils]: 10: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,956 INFO L273 TraceCheckUtils]: 9: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,956 INFO L273 TraceCheckUtils]: 8: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume true; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,957 INFO L273 TraceCheckUtils]: 7: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,957 INFO L273 TraceCheckUtils]: 6: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume true; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,958 INFO L273 TraceCheckUtils]: 5: Hoare triple {3345#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 17:40:36,958 INFO L256 TraceCheckUtils]: 4: Hoare triple {3345#true} call #t~ret8 := main(); {3345#true} is VALID [2018-11-14 17:40:36,958 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3345#true} {3345#true} #87#return; {3345#true} is VALID [2018-11-14 17:40:36,959 INFO L273 TraceCheckUtils]: 2: Hoare triple {3345#true} assume true; {3345#true} is VALID [2018-11-14 17:40:36,959 INFO L273 TraceCheckUtils]: 1: Hoare triple {3345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3345#true} is VALID [2018-11-14 17:40:36,959 INFO L256 TraceCheckUtils]: 0: Hoare triple {3345#true} call ULTIMATE.init(); {3345#true} is VALID [2018-11-14 17:40:36,963 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 113 proven. 59 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-14 17:40:36,965 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:40:36,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-11-14 17:40:36,966 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 69 [2018-11-14 17:40:36,966 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:36,966 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-14 17:40:37,069 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:37,069 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-14 17:40:37,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-14 17:40:37,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2018-11-14 17:40:37,070 INFO L87 Difference]: Start difference. First operand 116 states and 147 transitions. Second operand 13 states. [2018-11-14 17:40:39,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:39,868 INFO L93 Difference]: Finished difference Result 294 states and 380 transitions. [2018-11-14 17:40:39,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-14 17:40:39,868 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 69 [2018-11-14 17:40:39,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:40:39,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 17:40:39,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 206 transitions. [2018-11-14 17:40:39,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 17:40:39,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 206 transitions. [2018-11-14 17:40:39,879 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states and 206 transitions. [2018-11-14 17:40:40,328 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 206 edges. 206 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:40,333 INFO L225 Difference]: With dead ends: 294 [2018-11-14 17:40:40,334 INFO L226 Difference]: Without dead ends: 207 [2018-11-14 17:40:40,336 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=330, Invalid=1002, Unknown=0, NotChecked=0, Total=1332 [2018-11-14 17:40:40,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-11-14 17:40:40,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 172. [2018-11-14 17:40:40,691 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:40:40,691 INFO L82 GeneralOperation]: Start isEquivalent. First operand 207 states. Second operand 172 states. [2018-11-14 17:40:40,691 INFO L74 IsIncluded]: Start isIncluded. First operand 207 states. Second operand 172 states. [2018-11-14 17:40:40,691 INFO L87 Difference]: Start difference. First operand 207 states. Second operand 172 states. [2018-11-14 17:40:40,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:40,701 INFO L93 Difference]: Finished difference Result 207 states and 266 transitions. [2018-11-14 17:40:40,702 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 266 transitions. [2018-11-14 17:40:40,702 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:40,703 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:40,703 INFO L74 IsIncluded]: Start isIncluded. First operand 172 states. Second operand 207 states. [2018-11-14 17:40:40,703 INFO L87 Difference]: Start difference. First operand 172 states. Second operand 207 states. [2018-11-14 17:40:40,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:40:40,711 INFO L93 Difference]: Finished difference Result 207 states and 266 transitions. [2018-11-14 17:40:40,711 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 266 transitions. [2018-11-14 17:40:40,712 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:40:40,712 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:40:40,712 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:40:40,712 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:40:40,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-14 17:40:40,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 221 transitions. [2018-11-14 17:40:40,719 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 221 transitions. Word has length 69 [2018-11-14 17:40:40,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:40:40,719 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 221 transitions. [2018-11-14 17:40:40,719 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-14 17:40:40,719 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 221 transitions. [2018-11-14 17:40:40,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-14 17:40:40,720 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:40:40,721 INFO L375 BasicCegarLoop]: trace histogram [14, 10, 10, 10, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:40:40,721 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:40:40,721 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:40:40,721 INFO L82 PathProgramCache]: Analyzing trace with hash 1686959430, now seen corresponding path program 5 times [2018-11-14 17:40:40,722 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:40:40,722 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:40:40,749 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2018-11-14 17:40:41,159 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-11-14 17:40:41,159 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:40:41,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:40:41,198 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:40:41,982 INFO L256 TraceCheckUtils]: 0: Hoare triple {4841#true} call ULTIMATE.init(); {4841#true} is VALID [2018-11-14 17:40:41,983 INFO L273 TraceCheckUtils]: 1: Hoare triple {4841#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4841#true} is VALID [2018-11-14 17:40:41,983 INFO L273 TraceCheckUtils]: 2: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:41,983 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4841#true} {4841#true} #87#return; {4841#true} is VALID [2018-11-14 17:40:41,984 INFO L256 TraceCheckUtils]: 4: Hoare triple {4841#true} call #t~ret8 := main(); {4841#true} is VALID [2018-11-14 17:40:41,984 INFO L273 TraceCheckUtils]: 5: Hoare triple {4841#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {4841#true} is VALID [2018-11-14 17:40:41,984 INFO L273 TraceCheckUtils]: 6: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:41,984 INFO L273 TraceCheckUtils]: 7: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4841#true} is VALID [2018-11-14 17:40:41,985 INFO L273 TraceCheckUtils]: 8: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:41,985 INFO L273 TraceCheckUtils]: 9: Hoare triple {4841#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4841#true} is VALID [2018-11-14 17:40:41,985 INFO L273 TraceCheckUtils]: 10: Hoare triple {4841#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4841#true} is VALID [2018-11-14 17:40:41,985 INFO L273 TraceCheckUtils]: 11: Hoare triple {4841#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4841#true} is VALID [2018-11-14 17:40:41,986 INFO L273 TraceCheckUtils]: 12: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:41,986 INFO L273 TraceCheckUtils]: 13: Hoare triple {4841#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4841#true} is VALID [2018-11-14 17:40:41,986 INFO L273 TraceCheckUtils]: 14: Hoare triple {4841#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4841#true} is VALID [2018-11-14 17:40:41,986 INFO L273 TraceCheckUtils]: 15: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:42,005 INFO L273 TraceCheckUtils]: 16: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:40:42,019 INFO L273 TraceCheckUtils]: 17: Hoare triple {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume true; {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:40:42,033 INFO L273 TraceCheckUtils]: 18: Hoare triple {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:40:42,038 INFO L273 TraceCheckUtils]: 19: Hoare triple {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:40:42,063 INFO L273 TraceCheckUtils]: 20: Hoare triple {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:40:42,063 INFO L273 TraceCheckUtils]: 21: Hoare triple {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume true; {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:40:42,064 INFO L273 TraceCheckUtils]: 22: Hoare triple {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:40:42,065 INFO L273 TraceCheckUtils]: 23: Hoare triple {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:40:42,098 INFO L273 TraceCheckUtils]: 24: Hoare triple {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,099 INFO L273 TraceCheckUtils]: 25: Hoare triple {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,099 INFO L273 TraceCheckUtils]: 26: Hoare triple {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4929#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,105 INFO L273 TraceCheckUtils]: 27: Hoare triple {4929#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} is VALID [2018-11-14 17:40:42,106 INFO L273 TraceCheckUtils]: 28: Hoare triple {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} assume true; {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} is VALID [2018-11-14 17:40:42,107 INFO L273 TraceCheckUtils]: 29: Hoare triple {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,108 INFO L273 TraceCheckUtils]: 30: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,108 INFO L273 TraceCheckUtils]: 31: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,109 INFO L273 TraceCheckUtils]: 32: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,109 INFO L273 TraceCheckUtils]: 33: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,110 INFO L273 TraceCheckUtils]: 34: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,111 INFO L273 TraceCheckUtils]: 35: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,111 INFO L273 TraceCheckUtils]: 36: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,112 INFO L273 TraceCheckUtils]: 37: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,113 INFO L273 TraceCheckUtils]: 38: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,116 INFO L273 TraceCheckUtils]: 39: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,117 INFO L273 TraceCheckUtils]: 40: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,117 INFO L273 TraceCheckUtils]: 41: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,118 INFO L273 TraceCheckUtils]: 42: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,118 INFO L273 TraceCheckUtils]: 43: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:40:42,122 INFO L273 TraceCheckUtils]: 44: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,123 INFO L273 TraceCheckUtils]: 45: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,124 INFO L273 TraceCheckUtils]: 46: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,124 INFO L273 TraceCheckUtils]: 47: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,125 INFO L273 TraceCheckUtils]: 48: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,126 INFO L273 TraceCheckUtils]: 49: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,126 INFO L273 TraceCheckUtils]: 50: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,127 INFO L273 TraceCheckUtils]: 51: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,128 INFO L273 TraceCheckUtils]: 52: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,129 INFO L273 TraceCheckUtils]: 53: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,130 INFO L273 TraceCheckUtils]: 54: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,131 INFO L273 TraceCheckUtils]: 55: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,132 INFO L273 TraceCheckUtils]: 56: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,133 INFO L273 TraceCheckUtils]: 57: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,134 INFO L273 TraceCheckUtils]: 58: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,135 INFO L273 TraceCheckUtils]: 59: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,136 INFO L273 TraceCheckUtils]: 60: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,137 INFO L273 TraceCheckUtils]: 61: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,138 INFO L273 TraceCheckUtils]: 62: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,139 INFO L273 TraceCheckUtils]: 63: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,139 INFO L273 TraceCheckUtils]: 64: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,144 INFO L273 TraceCheckUtils]: 65: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,145 INFO L273 TraceCheckUtils]: 66: Hoare triple {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 17:40:42,147 INFO L273 TraceCheckUtils]: 67: Hoare triple {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {5057#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:42,148 INFO L273 TraceCheckUtils]: 68: Hoare triple {5057#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {4842#false} is VALID [2018-11-14 17:40:42,148 INFO L273 TraceCheckUtils]: 69: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 17:40:42,148 INFO L273 TraceCheckUtils]: 70: Hoare triple {4842#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {4842#false} is VALID [2018-11-14 17:40:42,149 INFO L273 TraceCheckUtils]: 71: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 17:40:42,149 INFO L273 TraceCheckUtils]: 72: Hoare triple {4842#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {4842#false} is VALID [2018-11-14 17:40:42,150 INFO L256 TraceCheckUtils]: 73: Hoare triple {4842#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {4842#false} is VALID [2018-11-14 17:40:42,150 INFO L273 TraceCheckUtils]: 74: Hoare triple {4842#false} ~cond := #in~cond; {4842#false} is VALID [2018-11-14 17:40:42,150 INFO L273 TraceCheckUtils]: 75: Hoare triple {4842#false} assume ~cond == 0bv32; {4842#false} is VALID [2018-11-14 17:40:42,151 INFO L273 TraceCheckUtils]: 76: Hoare triple {4842#false} assume !false; {4842#false} is VALID [2018-11-14 17:40:42,172 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 81 proven. 163 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-14 17:40:42,172 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:40:43,067 INFO L273 TraceCheckUtils]: 76: Hoare triple {4842#false} assume !false; {4842#false} is VALID [2018-11-14 17:40:43,068 INFO L273 TraceCheckUtils]: 75: Hoare triple {4842#false} assume ~cond == 0bv32; {4842#false} is VALID [2018-11-14 17:40:43,068 INFO L273 TraceCheckUtils]: 74: Hoare triple {4842#false} ~cond := #in~cond; {4842#false} is VALID [2018-11-14 17:40:43,069 INFO L256 TraceCheckUtils]: 73: Hoare triple {4842#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {4842#false} is VALID [2018-11-14 17:40:43,069 INFO L273 TraceCheckUtils]: 72: Hoare triple {4842#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {4842#false} is VALID [2018-11-14 17:40:43,069 INFO L273 TraceCheckUtils]: 71: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 17:40:43,069 INFO L273 TraceCheckUtils]: 70: Hoare triple {4842#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {4842#false} is VALID [2018-11-14 17:40:43,070 INFO L273 TraceCheckUtils]: 69: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 17:40:43,072 INFO L273 TraceCheckUtils]: 68: Hoare triple {5057#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {4842#false} is VALID [2018-11-14 17:40:43,072 INFO L273 TraceCheckUtils]: 67: Hoare triple {5112#(bvslt main_~i~0 (_ bv100000 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {5057#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:40:43,072 INFO L273 TraceCheckUtils]: 66: Hoare triple {5112#(bvslt main_~i~0 (_ bv100000 32))} assume true; {5112#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 17:40:43,073 INFO L273 TraceCheckUtils]: 65: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5112#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 17:40:43,073 INFO L273 TraceCheckUtils]: 64: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,073 INFO L273 TraceCheckUtils]: 63: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,074 INFO L273 TraceCheckUtils]: 62: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,074 INFO L273 TraceCheckUtils]: 61: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,074 INFO L273 TraceCheckUtils]: 60: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,075 INFO L273 TraceCheckUtils]: 59: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,075 INFO L273 TraceCheckUtils]: 58: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,075 INFO L273 TraceCheckUtils]: 57: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,076 INFO L273 TraceCheckUtils]: 56: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,076 INFO L273 TraceCheckUtils]: 55: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,077 INFO L273 TraceCheckUtils]: 54: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,078 INFO L273 TraceCheckUtils]: 53: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,078 INFO L273 TraceCheckUtils]: 52: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,079 INFO L273 TraceCheckUtils]: 51: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,079 INFO L273 TraceCheckUtils]: 50: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,080 INFO L273 TraceCheckUtils]: 49: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,080 INFO L273 TraceCheckUtils]: 48: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,081 INFO L273 TraceCheckUtils]: 47: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,081 INFO L273 TraceCheckUtils]: 46: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,082 INFO L273 TraceCheckUtils]: 45: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,088 INFO L273 TraceCheckUtils]: 44: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,088 INFO L273 TraceCheckUtils]: 43: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,088 INFO L273 TraceCheckUtils]: 42: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,089 INFO L273 TraceCheckUtils]: 41: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,089 INFO L273 TraceCheckUtils]: 40: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,089 INFO L273 TraceCheckUtils]: 39: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,090 INFO L273 TraceCheckUtils]: 38: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,090 INFO L273 TraceCheckUtils]: 37: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,090 INFO L273 TraceCheckUtils]: 36: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,091 INFO L273 TraceCheckUtils]: 35: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,091 INFO L273 TraceCheckUtils]: 34: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,091 INFO L273 TraceCheckUtils]: 33: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,092 INFO L273 TraceCheckUtils]: 32: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,092 INFO L273 TraceCheckUtils]: 31: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,093 INFO L273 TraceCheckUtils]: 30: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,094 INFO L273 TraceCheckUtils]: 29: Hoare triple {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 17:40:43,094 INFO L273 TraceCheckUtils]: 28: Hoare triple {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,102 INFO L273 TraceCheckUtils]: 27: Hoare triple {5236#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,102 INFO L273 TraceCheckUtils]: 26: Hoare triple {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {5236#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,103 INFO L273 TraceCheckUtils]: 25: Hoare triple {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume true; {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,103 INFO L273 TraceCheckUtils]: 24: Hoare triple {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,104 INFO L273 TraceCheckUtils]: 23: Hoare triple {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,104 INFO L273 TraceCheckUtils]: 22: Hoare triple {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,104 INFO L273 TraceCheckUtils]: 21: Hoare triple {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume true; {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,108 INFO L273 TraceCheckUtils]: 20: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,108 INFO L273 TraceCheckUtils]: 19: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,109 INFO L273 TraceCheckUtils]: 18: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,109 INFO L273 TraceCheckUtils]: 17: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume true; {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,112 INFO L273 TraceCheckUtils]: 16: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:40:43,112 INFO L273 TraceCheckUtils]: 15: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:43,112 INFO L273 TraceCheckUtils]: 14: Hoare triple {4841#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4841#true} is VALID [2018-11-14 17:40:43,112 INFO L273 TraceCheckUtils]: 13: Hoare triple {4841#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4841#true} is VALID [2018-11-14 17:40:43,112 INFO L273 TraceCheckUtils]: 12: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 11: Hoare triple {4841#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 10: Hoare triple {4841#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 9: Hoare triple {4841#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 8: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 7: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 6: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L273 TraceCheckUtils]: 5: Hoare triple {4841#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {4841#true} is VALID [2018-11-14 17:40:43,113 INFO L256 TraceCheckUtils]: 4: Hoare triple {4841#true} call #t~ret8 := main(); {4841#true} is VALID [2018-11-14 17:40:43,114 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4841#true} {4841#true} #87#return; {4841#true} is VALID [2018-11-14 17:40:43,114 INFO L273 TraceCheckUtils]: 2: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 17:40:43,114 INFO L273 TraceCheckUtils]: 1: Hoare triple {4841#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4841#true} is VALID [2018-11-14 17:40:43,114 INFO L256 TraceCheckUtils]: 0: Hoare triple {4841#true} call ULTIMATE.init(); {4841#true} is VALID [2018-11-14 17:40:43,122 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 81 proven. 163 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-14 17:40:43,126 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:40:43,126 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 22 [2018-11-14 17:40:43,127 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 77 [2018-11-14 17:40:43,128 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:40:43,128 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-14 17:40:43,355 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:40:43,355 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-14 17:40:43,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-14 17:40:43,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-11-14 17:40:43,356 INFO L87 Difference]: Start difference. First operand 172 states and 221 transitions. Second operand 22 states. [2018-11-14 17:40:43,727 WARN L179 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 21 [2018-11-14 17:40:44,608 WARN L179 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 13 [2018-11-14 17:40:45,918 WARN L179 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 24 [2018-11-14 17:40:47,240 WARN L179 SmtUtils]: Spent 219.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2018-11-14 17:40:47,793 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 18 [2018-11-14 17:40:52,621 WARN L179 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 27 [2018-11-14 17:40:52,987 WARN L179 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 18 [2018-11-14 17:40:53,353 WARN L179 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 21 [2018-11-14 17:40:56,644 WARN L179 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 26 [2018-11-14 17:40:57,880 WARN L179 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 20 [2018-11-14 17:40:58,756 WARN L179 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 18 [2018-11-14 17:41:00,823 WARN L179 SmtUtils]: Spent 168.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 26 [2018-11-14 17:41:01,573 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 20 [2018-11-14 17:41:02,444 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 21 [2018-11-14 17:41:02,812 WARN L179 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 20 [2018-11-14 17:41:04,546 WARN L179 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 20 [2018-11-14 17:41:05,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:05,147 INFO L93 Difference]: Finished difference Result 1236 states and 1626 transitions. [2018-11-14 17:41:05,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2018-11-14 17:41:05,147 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 77 [2018-11-14 17:41:05,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:41:05,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 17:41:05,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 370 transitions. [2018-11-14 17:41:05,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 17:41:05,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 370 transitions. [2018-11-14 17:41:05,163 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 90 states and 370 transitions. [2018-11-14 17:41:07,222 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 370 edges. 370 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:07,299 INFO L225 Difference]: With dead ends: 1236 [2018-11-14 17:41:07,299 INFO L226 Difference]: Without dead ends: 1051 [2018-11-14 17:41:07,303 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 163 SyntacticMatches, 3 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3948 ImplicationChecksByTransitivity, 11.6s TimeCoverageRelationStatistics Valid=2691, Invalid=8229, Unknown=0, NotChecked=0, Total=10920 [2018-11-14 17:41:07,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1051 states. [2018-11-14 17:41:07,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1051 to 637. [2018-11-14 17:41:07,930 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:41:07,930 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1051 states. Second operand 637 states. [2018-11-14 17:41:07,931 INFO L74 IsIncluded]: Start isIncluded. First operand 1051 states. Second operand 637 states. [2018-11-14 17:41:07,931 INFO L87 Difference]: Start difference. First operand 1051 states. Second operand 637 states. [2018-11-14 17:41:07,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:07,991 INFO L93 Difference]: Finished difference Result 1051 states and 1360 transitions. [2018-11-14 17:41:07,991 INFO L276 IsEmpty]: Start isEmpty. Operand 1051 states and 1360 transitions. [2018-11-14 17:41:07,993 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:07,994 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:07,994 INFO L74 IsIncluded]: Start isIncluded. First operand 637 states. Second operand 1051 states. [2018-11-14 17:41:07,994 INFO L87 Difference]: Start difference. First operand 637 states. Second operand 1051 states. [2018-11-14 17:41:08,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:08,058 INFO L93 Difference]: Finished difference Result 1051 states and 1360 transitions. [2018-11-14 17:41:08,059 INFO L276 IsEmpty]: Start isEmpty. Operand 1051 states and 1360 transitions. [2018-11-14 17:41:08,061 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:08,061 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:08,062 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:41:08,062 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:41:08,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 637 states. [2018-11-14 17:41:08,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 637 states to 637 states and 845 transitions. [2018-11-14 17:41:08,095 INFO L78 Accepts]: Start accepts. Automaton has 637 states and 845 transitions. Word has length 77 [2018-11-14 17:41:08,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:41:08,096 INFO L480 AbstractCegarLoop]: Abstraction has 637 states and 845 transitions. [2018-11-14 17:41:08,096 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-14 17:41:08,096 INFO L276 IsEmpty]: Start isEmpty. Operand 637 states and 845 transitions. [2018-11-14 17:41:08,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-11-14 17:41:08,098 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:41:08,099 INFO L375 BasicCegarLoop]: trace histogram [21, 17, 17, 17, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:41:08,099 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:41:08,099 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:41:08,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1913183663, now seen corresponding path program 6 times [2018-11-14 17:41:08,100 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:41:08,100 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:41:08,131 INFO L101 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2018-11-14 17:41:08,891 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-11-14 17:41:08,891 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:41:08,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:41:08,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:41:09,342 INFO L256 TraceCheckUtils]: 0: Hoare triple {10035#true} call ULTIMATE.init(); {10035#true} is VALID [2018-11-14 17:41:09,343 INFO L273 TraceCheckUtils]: 1: Hoare triple {10035#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10035#true} is VALID [2018-11-14 17:41:09,343 INFO L273 TraceCheckUtils]: 2: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,343 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10035#true} {10035#true} #87#return; {10035#true} is VALID [2018-11-14 17:41:09,344 INFO L256 TraceCheckUtils]: 4: Hoare triple {10035#true} call #t~ret8 := main(); {10035#true} is VALID [2018-11-14 17:41:09,344 INFO L273 TraceCheckUtils]: 5: Hoare triple {10035#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,344 INFO L273 TraceCheckUtils]: 6: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,344 INFO L273 TraceCheckUtils]: 7: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 17:41:09,345 INFO L273 TraceCheckUtils]: 8: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,345 INFO L273 TraceCheckUtils]: 9: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,345 INFO L273 TraceCheckUtils]: 10: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,345 INFO L273 TraceCheckUtils]: 11: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,345 INFO L273 TraceCheckUtils]: 12: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 13: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 14: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 15: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 16: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 17: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 18: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,346 INFO L273 TraceCheckUtils]: 19: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 20: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 21: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 22: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 23: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 24: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 25: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 26: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,347 INFO L273 TraceCheckUtils]: 27: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 28: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 29: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 30: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 31: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 32: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 33: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 34: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,348 INFO L273 TraceCheckUtils]: 35: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 36: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 37: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 38: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 39: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 40: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 41: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 42: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 17:41:09,349 INFO L273 TraceCheckUtils]: 43: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 44: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 45: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 46: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 47: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 48: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 49: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 50: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,350 INFO L273 TraceCheckUtils]: 51: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 52: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 53: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 54: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 55: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 56: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 57: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 58: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 59: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,351 INFO L273 TraceCheckUtils]: 60: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 61: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 62: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 63: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 64: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 65: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 66: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 67: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:09,352 INFO L273 TraceCheckUtils]: 68: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:09,353 INFO L273 TraceCheckUtils]: 69: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:09,353 INFO L273 TraceCheckUtils]: 70: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,353 INFO L273 TraceCheckUtils]: 71: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 17:41:09,353 INFO L273 TraceCheckUtils]: 72: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 17:41:09,353 INFO L273 TraceCheckUtils]: 73: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:09,378 INFO L273 TraceCheckUtils]: 74: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,379 INFO L273 TraceCheckUtils]: 75: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume true; {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,379 INFO L273 TraceCheckUtils]: 76: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,379 INFO L273 TraceCheckUtils]: 77: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,403 INFO L273 TraceCheckUtils]: 78: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,403 INFO L273 TraceCheckUtils]: 79: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} assume true; {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,403 INFO L273 TraceCheckUtils]: 80: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,404 INFO L273 TraceCheckUtils]: 81: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,423 INFO L273 TraceCheckUtils]: 82: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 17:41:09,424 INFO L273 TraceCheckUtils]: 83: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} assume true; {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 17:41:09,424 INFO L273 TraceCheckUtils]: 84: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 17:41:09,425 INFO L273 TraceCheckUtils]: 85: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 17:41:09,446 INFO L273 TraceCheckUtils]: 86: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,446 INFO L273 TraceCheckUtils]: 87: Hoare triple {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} assume true; {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} is VALID [2018-11-14 17:41:09,447 INFO L273 TraceCheckUtils]: 88: Hoare triple {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 17:41:09,447 INFO L273 TraceCheckUtils]: 89: Hoare triple {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 17:41:09,475 INFO L273 TraceCheckUtils]: 90: Hoare triple {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:09,476 INFO L273 TraceCheckUtils]: 91: Hoare triple {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:09,476 INFO L273 TraceCheckUtils]: 92: Hoare triple {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10322#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:09,483 INFO L273 TraceCheckUtils]: 93: Hoare triple {10322#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} is VALID [2018-11-14 17:41:09,484 INFO L273 TraceCheckUtils]: 94: Hoare triple {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} assume true; {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} is VALID [2018-11-14 17:41:09,485 INFO L273 TraceCheckUtils]: 95: Hoare triple {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {10333#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 96: Hoare triple {10333#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 97: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 98: Hoare triple {10036#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 99: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 100: Hoare triple {10036#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L256 TraceCheckUtils]: 101: Hoare triple {10036#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 102: Hoare triple {10036#false} ~cond := #in~cond; {10036#false} is VALID [2018-11-14 17:41:09,486 INFO L273 TraceCheckUtils]: 103: Hoare triple {10036#false} assume ~cond == 0bv32; {10036#false} is VALID [2018-11-14 17:41:09,487 INFO L273 TraceCheckUtils]: 104: Hoare triple {10036#false} assume !false; {10036#false} is VALID [2018-11-14 17:41:09,497 INFO L134 CoverageAnalysis]: Checked inductivity of 718 backedges. 275 proven. 32 refuted. 0 times theorem prover too weak. 411 trivial. 0 not checked. [2018-11-14 17:41:09,497 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:41:10,283 INFO L273 TraceCheckUtils]: 104: Hoare triple {10036#false} assume !false; {10036#false} is VALID [2018-11-14 17:41:10,283 INFO L273 TraceCheckUtils]: 103: Hoare triple {10036#false} assume ~cond == 0bv32; {10036#false} is VALID [2018-11-14 17:41:10,283 INFO L273 TraceCheckUtils]: 102: Hoare triple {10036#false} ~cond := #in~cond; {10036#false} is VALID [2018-11-14 17:41:10,283 INFO L256 TraceCheckUtils]: 101: Hoare triple {10036#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {10036#false} is VALID [2018-11-14 17:41:10,283 INFO L273 TraceCheckUtils]: 100: Hoare triple {10036#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {10036#false} is VALID [2018-11-14 17:41:10,283 INFO L273 TraceCheckUtils]: 99: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 17:41:10,284 INFO L273 TraceCheckUtils]: 98: Hoare triple {10036#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {10036#false} is VALID [2018-11-14 17:41:10,284 INFO L273 TraceCheckUtils]: 97: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 17:41:10,284 INFO L273 TraceCheckUtils]: 96: Hoare triple {10333#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {10036#false} is VALID [2018-11-14 17:41:10,284 INFO L273 TraceCheckUtils]: 95: Hoare triple {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {10333#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:10,285 INFO L273 TraceCheckUtils]: 94: Hoare triple {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume true; {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:10,285 INFO L273 TraceCheckUtils]: 93: Hoare triple {10395#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:10,302 INFO L273 TraceCheckUtils]: 92: Hoare triple {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10395#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:10,303 INFO L273 TraceCheckUtils]: 91: Hoare triple {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume true; {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:10,303 INFO L273 TraceCheckUtils]: 90: Hoare triple {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:10,304 INFO L273 TraceCheckUtils]: 89: Hoare triple {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:10,304 INFO L273 TraceCheckUtils]: 88: Hoare triple {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:10,305 INFO L273 TraceCheckUtils]: 87: Hoare triple {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:10,308 INFO L273 TraceCheckUtils]: 86: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:10,308 INFO L273 TraceCheckUtils]: 85: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,309 INFO L273 TraceCheckUtils]: 84: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,309 INFO L273 TraceCheckUtils]: 83: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} assume true; {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,314 INFO L273 TraceCheckUtils]: 82: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,314 INFO L273 TraceCheckUtils]: 81: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,314 INFO L273 TraceCheckUtils]: 80: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,315 INFO L273 TraceCheckUtils]: 79: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume true; {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,318 INFO L273 TraceCheckUtils]: 78: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,319 INFO L273 TraceCheckUtils]: 77: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,319 INFO L273 TraceCheckUtils]: 76: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,319 INFO L273 TraceCheckUtils]: 75: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} assume true; {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,322 INFO L273 TraceCheckUtils]: 74: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:10,322 INFO L273 TraceCheckUtils]: 73: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 72: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 71: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 70: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 69: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 68: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 67: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 66: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,323 INFO L273 TraceCheckUtils]: 65: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 64: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 63: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 62: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 61: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 60: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 59: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 58: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,324 INFO L273 TraceCheckUtils]: 57: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 56: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 55: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 54: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 53: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 52: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 51: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 50: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,325 INFO L273 TraceCheckUtils]: 49: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 48: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 47: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 46: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 45: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 44: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 43: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 42: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 17:41:10,326 INFO L273 TraceCheckUtils]: 41: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 40: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 39: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 38: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 37: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 36: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 35: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 34: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,327 INFO L273 TraceCheckUtils]: 33: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 32: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 31: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 30: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 29: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 28: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 27: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,328 INFO L273 TraceCheckUtils]: 26: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,329 INFO L273 TraceCheckUtils]: 25: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,329 INFO L273 TraceCheckUtils]: 24: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,329 INFO L273 TraceCheckUtils]: 23: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,329 INFO L273 TraceCheckUtils]: 22: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,329 INFO L273 TraceCheckUtils]: 21: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,329 INFO L273 TraceCheckUtils]: 20: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,330 INFO L273 TraceCheckUtils]: 19: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,330 INFO L273 TraceCheckUtils]: 18: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,330 INFO L273 TraceCheckUtils]: 17: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,330 INFO L273 TraceCheckUtils]: 16: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 17:41:10,330 INFO L273 TraceCheckUtils]: 15: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,330 INFO L273 TraceCheckUtils]: 14: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 17:41:10,331 INFO L273 TraceCheckUtils]: 13: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 17:41:10,331 INFO L273 TraceCheckUtils]: 12: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,331 INFO L273 TraceCheckUtils]: 11: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 17:41:10,331 INFO L273 TraceCheckUtils]: 10: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,331 INFO L273 TraceCheckUtils]: 9: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 17:41:10,332 INFO L273 TraceCheckUtils]: 8: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,332 INFO L273 TraceCheckUtils]: 7: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 17:41:10,332 INFO L273 TraceCheckUtils]: 6: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,332 INFO L273 TraceCheckUtils]: 5: Hoare triple {10035#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {10035#true} is VALID [2018-11-14 17:41:10,332 INFO L256 TraceCheckUtils]: 4: Hoare triple {10035#true} call #t~ret8 := main(); {10035#true} is VALID [2018-11-14 17:41:10,332 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10035#true} {10035#true} #87#return; {10035#true} is VALID [2018-11-14 17:41:10,333 INFO L273 TraceCheckUtils]: 2: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 17:41:10,333 INFO L273 TraceCheckUtils]: 1: Hoare triple {10035#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10035#true} is VALID [2018-11-14 17:41:10,333 INFO L256 TraceCheckUtils]: 0: Hoare triple {10035#true} call ULTIMATE.init(); {10035#true} is VALID [2018-11-14 17:41:10,347 INFO L134 CoverageAnalysis]: Checked inductivity of 718 backedges. 275 proven. 32 refuted. 0 times theorem prover too weak. 411 trivial. 0 not checked. [2018-11-14 17:41:10,350 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:41:10,350 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-14 17:41:10,351 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 105 [2018-11-14 17:41:10,351 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:41:10,352 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 17:41:10,617 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:10,618 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 17:41:10,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 17:41:10,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2018-11-14 17:41:10,619 INFO L87 Difference]: Start difference. First operand 637 states and 845 transitions. Second operand 19 states. [2018-11-14 17:41:10,926 WARN L179 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 19 [2018-11-14 17:41:14,791 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 24 [2018-11-14 17:41:16,309 WARN L179 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 14 [2018-11-14 17:41:16,827 WARN L179 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 17 [2018-11-14 17:41:17,848 WARN L179 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 17 [2018-11-14 17:41:18,615 WARN L179 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 18 [2018-11-14 17:41:19,147 WARN L179 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 19 [2018-11-14 17:41:19,890 WARN L179 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 18 [2018-11-14 17:41:20,409 WARN L179 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 19 [2018-11-14 17:41:20,865 WARN L179 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 19 [2018-11-14 17:41:21,889 WARN L179 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 24 [2018-11-14 17:41:27,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:27,964 INFO L93 Difference]: Finished difference Result 3778 states and 5110 transitions. [2018-11-14 17:41:27,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-11-14 17:41:27,964 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 105 [2018-11-14 17:41:27,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:41:27,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 17:41:27,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 304 transitions. [2018-11-14 17:41:27,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 17:41:27,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 304 transitions. [2018-11-14 17:41:27,973 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 62 states and 304 transitions. [2018-11-14 17:41:29,575 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 304 edges. 304 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:30,142 INFO L225 Difference]: With dead ends: 3778 [2018-11-14 17:41:30,142 INFO L226 Difference]: Without dead ends: 3222 [2018-11-14 17:41:30,146 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 287 GetRequests, 219 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1473 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=1343, Invalid=3487, Unknown=0, NotChecked=0, Total=4830 [2018-11-14 17:41:30,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3222 states. [2018-11-14 17:41:32,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3222 to 1061. [2018-11-14 17:41:32,012 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:41:32,012 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3222 states. Second operand 1061 states. [2018-11-14 17:41:32,012 INFO L74 IsIncluded]: Start isIncluded. First operand 3222 states. Second operand 1061 states. [2018-11-14 17:41:32,012 INFO L87 Difference]: Start difference. First operand 3222 states. Second operand 1061 states. [2018-11-14 17:41:32,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:32,590 INFO L93 Difference]: Finished difference Result 3222 states and 4347 transitions. [2018-11-14 17:41:32,590 INFO L276 IsEmpty]: Start isEmpty. Operand 3222 states and 4347 transitions. [2018-11-14 17:41:32,597 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:32,598 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:32,598 INFO L74 IsIncluded]: Start isIncluded. First operand 1061 states. Second operand 3222 states. [2018-11-14 17:41:32,598 INFO L87 Difference]: Start difference. First operand 1061 states. Second operand 3222 states. [2018-11-14 17:41:33,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:33,189 INFO L93 Difference]: Finished difference Result 3222 states and 4347 transitions. [2018-11-14 17:41:33,190 INFO L276 IsEmpty]: Start isEmpty. Operand 3222 states and 4347 transitions. [2018-11-14 17:41:33,197 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:33,197 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:33,197 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:41:33,197 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:41:33,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1061 states. [2018-11-14 17:41:33,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1392 transitions. [2018-11-14 17:41:33,267 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1392 transitions. Word has length 105 [2018-11-14 17:41:33,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:41:33,268 INFO L480 AbstractCegarLoop]: Abstraction has 1061 states and 1392 transitions. [2018-11-14 17:41:33,268 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 17:41:33,268 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1392 transitions. [2018-11-14 17:41:33,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-14 17:41:33,271 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:41:33,272 INFO L375 BasicCegarLoop]: trace histogram [27, 23, 23, 23, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:41:33,272 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:41:33,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:41:33,272 INFO L82 PathProgramCache]: Analyzing trace with hash -1662494363, now seen corresponding path program 7 times [2018-11-14 17:41:33,273 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:41:33,273 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:41:33,300 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:41:33,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:41:33,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:41:33,499 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:41:33,640 INFO L256 TraceCheckUtils]: 0: Hoare triple {23378#true} call ULTIMATE.init(); {23378#true} is VALID [2018-11-14 17:41:33,640 INFO L273 TraceCheckUtils]: 1: Hoare triple {23378#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {23378#true} is VALID [2018-11-14 17:41:33,640 INFO L273 TraceCheckUtils]: 2: Hoare triple {23378#true} assume true; {23378#true} is VALID [2018-11-14 17:41:33,641 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {23378#true} {23378#true} #87#return; {23378#true} is VALID [2018-11-14 17:41:33,641 INFO L256 TraceCheckUtils]: 4: Hoare triple {23378#true} call #t~ret8 := main(); {23378#true} is VALID [2018-11-14 17:41:33,659 INFO L273 TraceCheckUtils]: 5: Hoare triple {23378#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,667 INFO L273 TraceCheckUtils]: 6: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,677 INFO L273 TraceCheckUtils]: 7: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,677 INFO L273 TraceCheckUtils]: 8: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,678 INFO L273 TraceCheckUtils]: 9: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,678 INFO L273 TraceCheckUtils]: 10: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,678 INFO L273 TraceCheckUtils]: 11: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,679 INFO L273 TraceCheckUtils]: 12: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,679 INFO L273 TraceCheckUtils]: 13: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,679 INFO L273 TraceCheckUtils]: 14: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23426#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:33,680 INFO L273 TraceCheckUtils]: 15: Hoare triple {23426#(= (_ bv2 32) main_~i~0)} assume true; {23426#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:33,681 INFO L273 TraceCheckUtils]: 16: Hoare triple {23426#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,681 INFO L273 TraceCheckUtils]: 17: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,682 INFO L273 TraceCheckUtils]: 18: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,682 INFO L273 TraceCheckUtils]: 19: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:33,683 INFO L273 TraceCheckUtils]: 20: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:33,684 INFO L273 TraceCheckUtils]: 21: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} assume true; {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:33,684 INFO L273 TraceCheckUtils]: 22: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:33,685 INFO L273 TraceCheckUtils]: 23: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:33,685 INFO L273 TraceCheckUtils]: 24: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23459#(= (_ bv4294967295 32) main_~j~0)} is VALID [2018-11-14 17:41:33,686 INFO L273 TraceCheckUtils]: 25: Hoare triple {23459#(= (_ bv4294967295 32) main_~j~0)} assume true; {23459#(= (_ bv4294967295 32) main_~j~0)} is VALID [2018-11-14 17:41:33,687 INFO L273 TraceCheckUtils]: 26: Hoare triple {23459#(= (_ bv4294967295 32) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,687 INFO L273 TraceCheckUtils]: 27: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,687 INFO L273 TraceCheckUtils]: 28: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,687 INFO L273 TraceCheckUtils]: 29: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,687 INFO L273 TraceCheckUtils]: 30: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,688 INFO L273 TraceCheckUtils]: 31: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,688 INFO L273 TraceCheckUtils]: 32: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,688 INFO L273 TraceCheckUtils]: 33: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,688 INFO L273 TraceCheckUtils]: 34: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,688 INFO L273 TraceCheckUtils]: 35: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,689 INFO L273 TraceCheckUtils]: 36: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,689 INFO L273 TraceCheckUtils]: 37: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,689 INFO L273 TraceCheckUtils]: 38: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,689 INFO L273 TraceCheckUtils]: 39: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,689 INFO L273 TraceCheckUtils]: 40: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,690 INFO L273 TraceCheckUtils]: 41: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,690 INFO L273 TraceCheckUtils]: 42: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,690 INFO L273 TraceCheckUtils]: 43: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 17:41:33,690 INFO L273 TraceCheckUtils]: 44: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,690 INFO L273 TraceCheckUtils]: 45: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 17:41:33,690 INFO L273 TraceCheckUtils]: 46: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,691 INFO L273 TraceCheckUtils]: 47: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,691 INFO L273 TraceCheckUtils]: 48: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,691 INFO L273 TraceCheckUtils]: 49: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,691 INFO L273 TraceCheckUtils]: 50: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,691 INFO L273 TraceCheckUtils]: 51: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,691 INFO L273 TraceCheckUtils]: 52: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 53: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 54: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 55: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 56: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 57: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 58: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 59: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 60: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,692 INFO L273 TraceCheckUtils]: 61: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 62: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 63: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 64: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 65: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 66: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 67: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 68: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,693 INFO L273 TraceCheckUtils]: 69: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 70: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 71: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 72: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 73: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 74: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 75: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 76: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 77: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,694 INFO L273 TraceCheckUtils]: 78: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,695 INFO L273 TraceCheckUtils]: 79: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,695 INFO L273 TraceCheckUtils]: 80: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,695 INFO L273 TraceCheckUtils]: 81: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,695 INFO L273 TraceCheckUtils]: 82: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,695 INFO L273 TraceCheckUtils]: 83: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,695 INFO L273 TraceCheckUtils]: 84: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,696 INFO L273 TraceCheckUtils]: 85: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,696 INFO L273 TraceCheckUtils]: 86: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,696 INFO L273 TraceCheckUtils]: 87: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,696 INFO L273 TraceCheckUtils]: 88: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,696 INFO L273 TraceCheckUtils]: 89: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,696 INFO L273 TraceCheckUtils]: 90: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 91: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 92: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 93: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 94: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 95: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 96: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,697 INFO L273 TraceCheckUtils]: 97: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,698 INFO L273 TraceCheckUtils]: 98: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,698 INFO L273 TraceCheckUtils]: 99: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,698 INFO L273 TraceCheckUtils]: 100: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,698 INFO L273 TraceCheckUtils]: 101: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,698 INFO L273 TraceCheckUtils]: 102: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,698 INFO L273 TraceCheckUtils]: 103: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,699 INFO L273 TraceCheckUtils]: 104: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,699 INFO L273 TraceCheckUtils]: 105: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,699 INFO L273 TraceCheckUtils]: 106: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,699 INFO L273 TraceCheckUtils]: 107: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,699 INFO L273 TraceCheckUtils]: 108: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,699 INFO L273 TraceCheckUtils]: 109: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,700 INFO L273 TraceCheckUtils]: 110: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,700 INFO L273 TraceCheckUtils]: 111: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,700 INFO L273 TraceCheckUtils]: 112: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,700 INFO L273 TraceCheckUtils]: 113: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,700 INFO L273 TraceCheckUtils]: 114: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 115: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 116: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 117: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 118: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 119: Hoare triple {23379#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 120: Hoare triple {23379#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {23379#false} is VALID [2018-11-14 17:41:33,701 INFO L273 TraceCheckUtils]: 121: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,702 INFO L273 TraceCheckUtils]: 122: Hoare triple {23379#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {23379#false} is VALID [2018-11-14 17:41:33,702 INFO L273 TraceCheckUtils]: 123: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,702 INFO L273 TraceCheckUtils]: 124: Hoare triple {23379#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,702 INFO L256 TraceCheckUtils]: 125: Hoare triple {23379#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {23379#false} is VALID [2018-11-14 17:41:33,702 INFO L273 TraceCheckUtils]: 126: Hoare triple {23379#false} ~cond := #in~cond; {23379#false} is VALID [2018-11-14 17:41:33,702 INFO L273 TraceCheckUtils]: 127: Hoare triple {23379#false} assume ~cond == 0bv32; {23379#false} is VALID [2018-11-14 17:41:33,703 INFO L273 TraceCheckUtils]: 128: Hoare triple {23379#false} assume !false; {23379#false} is VALID [2018-11-14 17:41:33,713 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 355 proven. 26 refuted. 0 times theorem prover too weak. 853 trivial. 0 not checked. [2018-11-14 17:41:33,714 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:41:33,989 INFO L273 TraceCheckUtils]: 128: Hoare triple {23379#false} assume !false; {23379#false} is VALID [2018-11-14 17:41:33,990 INFO L273 TraceCheckUtils]: 127: Hoare triple {23379#false} assume ~cond == 0bv32; {23379#false} is VALID [2018-11-14 17:41:33,990 INFO L273 TraceCheckUtils]: 126: Hoare triple {23379#false} ~cond := #in~cond; {23379#false} is VALID [2018-11-14 17:41:33,990 INFO L256 TraceCheckUtils]: 125: Hoare triple {23379#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {23379#false} is VALID [2018-11-14 17:41:33,990 INFO L273 TraceCheckUtils]: 124: Hoare triple {23379#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,991 INFO L273 TraceCheckUtils]: 123: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,991 INFO L273 TraceCheckUtils]: 122: Hoare triple {23379#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {23379#false} is VALID [2018-11-14 17:41:33,991 INFO L273 TraceCheckUtils]: 121: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,991 INFO L273 TraceCheckUtils]: 120: Hoare triple {23379#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {23379#false} is VALID [2018-11-14 17:41:33,991 INFO L273 TraceCheckUtils]: 119: Hoare triple {23379#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,991 INFO L273 TraceCheckUtils]: 118: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,992 INFO L273 TraceCheckUtils]: 117: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 17:41:33,992 INFO L273 TraceCheckUtils]: 116: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,992 INFO L273 TraceCheckUtils]: 115: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,992 INFO L273 TraceCheckUtils]: 114: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,992 INFO L273 TraceCheckUtils]: 113: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,992 INFO L273 TraceCheckUtils]: 112: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 111: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 110: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 109: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 108: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 107: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 106: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 105: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,993 INFO L273 TraceCheckUtils]: 104: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 103: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 102: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 101: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 100: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 99: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 98: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 97: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,994 INFO L273 TraceCheckUtils]: 96: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 95: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 94: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 93: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 92: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 91: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 90: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 89: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 88: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,995 INFO L273 TraceCheckUtils]: 87: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 86: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 85: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 84: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 83: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 82: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 81: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 80: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 79: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,996 INFO L273 TraceCheckUtils]: 78: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 77: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 76: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 75: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 74: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 73: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 72: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 71: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:33,997 INFO L273 TraceCheckUtils]: 70: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 69: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 68: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 67: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 66: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 65: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 64: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 63: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 62: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,998 INFO L273 TraceCheckUtils]: 61: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 60: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 59: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 58: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 57: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 56: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 55: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 54: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:33,999 INFO L273 TraceCheckUtils]: 53: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 52: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 51: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 50: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 49: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 48: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 47: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 46: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,000 INFO L273 TraceCheckUtils]: 45: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 44: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 43: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 42: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 41: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 40: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 39: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 38: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 37: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,001 INFO L273 TraceCheckUtils]: 36: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 35: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 34: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 33: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 32: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 31: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 30: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 29: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 28: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 17:41:34,002 INFO L273 TraceCheckUtils]: 27: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 17:41:34,003 INFO L273 TraceCheckUtils]: 26: Hoare triple {24078#(not (bvsge main_~j~0 (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 17:41:34,003 INFO L273 TraceCheckUtils]: 25: Hoare triple {24078#(not (bvsge main_~j~0 (_ bv0 32)))} assume true; {24078#(not (bvsge main_~j~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:34,004 INFO L273 TraceCheckUtils]: 24: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {24078#(not (bvsge main_~j~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:34,004 INFO L273 TraceCheckUtils]: 23: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,004 INFO L273 TraceCheckUtils]: 22: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,004 INFO L273 TraceCheckUtils]: 21: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,007 INFO L273 TraceCheckUtils]: 20: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,008 INFO L273 TraceCheckUtils]: 19: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,008 INFO L273 TraceCheckUtils]: 18: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,008 INFO L273 TraceCheckUtils]: 17: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,011 INFO L273 TraceCheckUtils]: 16: Hoare triple {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,012 INFO L273 TraceCheckUtils]: 15: Hoare triple {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} assume true; {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,015 INFO L273 TraceCheckUtils]: 14: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,015 INFO L273 TraceCheckUtils]: 13: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,016 INFO L273 TraceCheckUtils]: 12: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,016 INFO L273 TraceCheckUtils]: 11: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,016 INFO L273 TraceCheckUtils]: 10: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,017 INFO L273 TraceCheckUtils]: 9: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,017 INFO L273 TraceCheckUtils]: 8: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,017 INFO L273 TraceCheckUtils]: 7: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,017 INFO L273 TraceCheckUtils]: 6: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,018 INFO L273 TraceCheckUtils]: 5: Hoare triple {23378#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:34,019 INFO L256 TraceCheckUtils]: 4: Hoare triple {23378#true} call #t~ret8 := main(); {23378#true} is VALID [2018-11-14 17:41:34,019 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {23378#true} {23378#true} #87#return; {23378#true} is VALID [2018-11-14 17:41:34,019 INFO L273 TraceCheckUtils]: 2: Hoare triple {23378#true} assume true; {23378#true} is VALID [2018-11-14 17:41:34,019 INFO L273 TraceCheckUtils]: 1: Hoare triple {23378#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {23378#true} is VALID [2018-11-14 17:41:34,019 INFO L256 TraceCheckUtils]: 0: Hoare triple {23378#true} call ULTIMATE.init(); {23378#true} is VALID [2018-11-14 17:41:34,030 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 355 proven. 26 refuted. 0 times theorem prover too weak. 853 trivial. 0 not checked. [2018-11-14 17:41:34,032 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:41:34,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-14 17:41:34,032 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-11-14 17:41:34,033 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:41:34,033 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-14 17:41:34,127 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:34,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-14 17:41:34,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-14 17:41:34,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-14 17:41:34,128 INFO L87 Difference]: Start difference. First operand 1061 states and 1392 transitions. Second operand 12 states. [2018-11-14 17:41:35,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:35,680 INFO L93 Difference]: Finished difference Result 1523 states and 1994 transitions. [2018-11-14 17:41:35,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-14 17:41:35,681 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-11-14 17:41:35,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:41:35,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 17:41:35,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 87 transitions. [2018-11-14 17:41:35,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 17:41:35,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 87 transitions. [2018-11-14 17:41:35,684 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 87 transitions. [2018-11-14 17:41:35,808 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:35,824 INFO L225 Difference]: With dead ends: 1523 [2018-11-14 17:41:35,824 INFO L226 Difference]: Without dead ends: 479 [2018-11-14 17:41:35,827 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 262 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=68, Invalid=204, Unknown=0, NotChecked=0, Total=272 [2018-11-14 17:41:35,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2018-11-14 17:41:36,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 476. [2018-11-14 17:41:36,346 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:41:36,346 INFO L82 GeneralOperation]: Start isEquivalent. First operand 479 states. Second operand 476 states. [2018-11-14 17:41:36,346 INFO L74 IsIncluded]: Start isIncluded. First operand 479 states. Second operand 476 states. [2018-11-14 17:41:36,346 INFO L87 Difference]: Start difference. First operand 479 states. Second operand 476 states. [2018-11-14 17:41:36,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:36,359 INFO L93 Difference]: Finished difference Result 479 states and 619 transitions. [2018-11-14 17:41:36,360 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 619 transitions. [2018-11-14 17:41:36,361 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:36,361 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:36,361 INFO L74 IsIncluded]: Start isIncluded. First operand 476 states. Second operand 479 states. [2018-11-14 17:41:36,361 INFO L87 Difference]: Start difference. First operand 476 states. Second operand 479 states. [2018-11-14 17:41:36,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:36,375 INFO L93 Difference]: Finished difference Result 479 states and 619 transitions. [2018-11-14 17:41:36,376 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 619 transitions. [2018-11-14 17:41:36,376 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:36,377 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:36,377 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:41:36,377 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:41:36,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states. [2018-11-14 17:41:36,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 616 transitions. [2018-11-14 17:41:36,393 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 616 transitions. Word has length 129 [2018-11-14 17:41:36,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:41:36,393 INFO L480 AbstractCegarLoop]: Abstraction has 476 states and 616 transitions. [2018-11-14 17:41:36,393 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-14 17:41:36,393 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 616 transitions. [2018-11-14 17:41:36,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-14 17:41:36,396 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:41:36,396 INFO L375 BasicCegarLoop]: trace histogram [42, 34, 34, 34, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:41:36,396 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:41:36,396 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:41:36,397 INFO L82 PathProgramCache]: Analyzing trace with hash -1707958948, now seen corresponding path program 8 times [2018-11-14 17:41:36,397 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:41:36,397 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:41:36,421 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 17:41:36,716 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:41:36,717 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:41:36,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:41:36,816 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:41:37,041 INFO L256 TraceCheckUtils]: 0: Hoare triple {27701#true} call ULTIMATE.init(); {27701#true} is VALID [2018-11-14 17:41:37,041 INFO L273 TraceCheckUtils]: 1: Hoare triple {27701#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {27701#true} is VALID [2018-11-14 17:41:37,041 INFO L273 TraceCheckUtils]: 2: Hoare triple {27701#true} assume true; {27701#true} is VALID [2018-11-14 17:41:37,042 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {27701#true} {27701#true} #87#return; {27701#true} is VALID [2018-11-14 17:41:37,042 INFO L256 TraceCheckUtils]: 4: Hoare triple {27701#true} call #t~ret8 := main(); {27701#true} is VALID [2018-11-14 17:41:37,043 INFO L273 TraceCheckUtils]: 5: Hoare triple {27701#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,043 INFO L273 TraceCheckUtils]: 6: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,043 INFO L273 TraceCheckUtils]: 7: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,043 INFO L273 TraceCheckUtils]: 8: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,044 INFO L273 TraceCheckUtils]: 9: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,044 INFO L273 TraceCheckUtils]: 10: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,044 INFO L273 TraceCheckUtils]: 11: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,045 INFO L273 TraceCheckUtils]: 12: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,046 INFO L273 TraceCheckUtils]: 13: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,046 INFO L273 TraceCheckUtils]: 14: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,047 INFO L273 TraceCheckUtils]: 15: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,047 INFO L273 TraceCheckUtils]: 16: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,048 INFO L273 TraceCheckUtils]: 17: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,048 INFO L273 TraceCheckUtils]: 18: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,049 INFO L273 TraceCheckUtils]: 19: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,049 INFO L273 TraceCheckUtils]: 20: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,050 INFO L273 TraceCheckUtils]: 21: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,050 INFO L273 TraceCheckUtils]: 22: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,051 INFO L273 TraceCheckUtils]: 23: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,051 INFO L273 TraceCheckUtils]: 24: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,052 INFO L273 TraceCheckUtils]: 25: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,052 INFO L273 TraceCheckUtils]: 26: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 17:41:37,053 INFO L273 TraceCheckUtils]: 27: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,054 INFO L273 TraceCheckUtils]: 28: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,054 INFO L273 TraceCheckUtils]: 29: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,055 INFO L273 TraceCheckUtils]: 30: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,055 INFO L273 TraceCheckUtils]: 31: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,056 INFO L273 TraceCheckUtils]: 32: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,056 INFO L273 TraceCheckUtils]: 33: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,057 INFO L273 TraceCheckUtils]: 34: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,057 INFO L273 TraceCheckUtils]: 35: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,058 INFO L273 TraceCheckUtils]: 36: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,058 INFO L273 TraceCheckUtils]: 37: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,059 INFO L273 TraceCheckUtils]: 38: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,059 INFO L273 TraceCheckUtils]: 39: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,060 INFO L273 TraceCheckUtils]: 40: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,060 INFO L273 TraceCheckUtils]: 41: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,061 INFO L273 TraceCheckUtils]: 42: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,061 INFO L273 TraceCheckUtils]: 43: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,062 INFO L273 TraceCheckUtils]: 44: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27841#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-14 17:41:37,063 INFO L273 TraceCheckUtils]: 45: Hoare triple {27841#(= (_ bv4 32) main_~i~0)} assume true; {27841#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-14 17:41:37,064 INFO L273 TraceCheckUtils]: 46: Hoare triple {27841#(= (_ bv4 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,064 INFO L273 TraceCheckUtils]: 47: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,065 INFO L273 TraceCheckUtils]: 48: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,065 INFO L273 TraceCheckUtils]: 49: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,066 INFO L273 TraceCheckUtils]: 50: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,066 INFO L273 TraceCheckUtils]: 51: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,067 INFO L273 TraceCheckUtils]: 52: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,067 INFO L273 TraceCheckUtils]: 53: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,068 INFO L273 TraceCheckUtils]: 54: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,069 INFO L273 TraceCheckUtils]: 55: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,069 INFO L273 TraceCheckUtils]: 56: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,070 INFO L273 TraceCheckUtils]: 57: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:37,071 INFO L273 TraceCheckUtils]: 58: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27887#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:37,071 INFO L273 TraceCheckUtils]: 59: Hoare triple {27887#(= main_~j~0 (_ bv0 32))} assume true; {27887#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:37,072 INFO L273 TraceCheckUtils]: 60: Hoare triple {27887#(= main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:37,072 INFO L273 TraceCheckUtils]: 61: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:37,073 INFO L273 TraceCheckUtils]: 62: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume true; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:37,073 INFO L273 TraceCheckUtils]: 63: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:37,074 INFO L273 TraceCheckUtils]: 64: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,074 INFO L273 TraceCheckUtils]: 65: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,074 INFO L273 TraceCheckUtils]: 66: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,074 INFO L273 TraceCheckUtils]: 67: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,074 INFO L273 TraceCheckUtils]: 68: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,075 INFO L273 TraceCheckUtils]: 69: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,075 INFO L273 TraceCheckUtils]: 70: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,075 INFO L273 TraceCheckUtils]: 71: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,075 INFO L273 TraceCheckUtils]: 72: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,075 INFO L273 TraceCheckUtils]: 73: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,076 INFO L273 TraceCheckUtils]: 74: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,076 INFO L273 TraceCheckUtils]: 75: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,076 INFO L273 TraceCheckUtils]: 76: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,076 INFO L273 TraceCheckUtils]: 77: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:37,076 INFO L273 TraceCheckUtils]: 78: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:37,077 INFO L273 TraceCheckUtils]: 79: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,077 INFO L273 TraceCheckUtils]: 80: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:37,077 INFO L273 TraceCheckUtils]: 81: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,077 INFO L273 TraceCheckUtils]: 82: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,077 INFO L273 TraceCheckUtils]: 83: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,078 INFO L273 TraceCheckUtils]: 84: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,078 INFO L273 TraceCheckUtils]: 85: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,078 INFO L273 TraceCheckUtils]: 86: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,078 INFO L273 TraceCheckUtils]: 87: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,078 INFO L273 TraceCheckUtils]: 88: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 89: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 90: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 91: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 92: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 93: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 94: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 95: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,079 INFO L273 TraceCheckUtils]: 96: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 97: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 98: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 99: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 100: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 101: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 102: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 103: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 104: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,080 INFO L273 TraceCheckUtils]: 105: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 106: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 107: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 108: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 109: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 110: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 111: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 112: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 113: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,081 INFO L273 TraceCheckUtils]: 114: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 115: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 116: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 117: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 118: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 119: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 120: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 121: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,082 INFO L273 TraceCheckUtils]: 122: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 123: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 124: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 125: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 126: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 127: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 128: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 129: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 130: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,083 INFO L273 TraceCheckUtils]: 131: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 132: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 133: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 134: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 135: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 136: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 137: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 138: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:37,084 INFO L273 TraceCheckUtils]: 139: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 140: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 141: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 142: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 143: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 144: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 145: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 146: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 147: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,085 INFO L273 TraceCheckUtils]: 148: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 149: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 150: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 151: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 152: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 153: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 154: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 155: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,086 INFO L273 TraceCheckUtils]: 156: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 157: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 158: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 159: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 160: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 161: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 162: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 163: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,087 INFO L273 TraceCheckUtils]: 164: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 165: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 166: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 167: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 168: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 169: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 170: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 171: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 172: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,088 INFO L273 TraceCheckUtils]: 173: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 174: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 175: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 176: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 177: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 178: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 179: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 180: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:37,089 INFO L273 TraceCheckUtils]: 181: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 182: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 183: Hoare triple {27702#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 184: Hoare triple {27702#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 185: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 186: Hoare triple {27702#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 187: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 188: Hoare triple {27702#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L256 TraceCheckUtils]: 189: Hoare triple {27702#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {27702#false} is VALID [2018-11-14 17:41:37,090 INFO L273 TraceCheckUtils]: 190: Hoare triple {27702#false} ~cond := #in~cond; {27702#false} is VALID [2018-11-14 17:41:37,091 INFO L273 TraceCheckUtils]: 191: Hoare triple {27702#false} assume ~cond == 0bv32; {27702#false} is VALID [2018-11-14 17:41:37,091 INFO L273 TraceCheckUtils]: 192: Hoare triple {27702#false} assume !false; {27702#false} is VALID [2018-11-14 17:41:37,112 INFO L134 CoverageAnalysis]: Checked inductivity of 2944 backedges. 1260 proven. 226 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-11-14 17:41:37,112 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:41:38,058 INFO L273 TraceCheckUtils]: 192: Hoare triple {27702#false} assume !false; {27702#false} is VALID [2018-11-14 17:41:38,058 INFO L273 TraceCheckUtils]: 191: Hoare triple {27702#false} assume ~cond == 0bv32; {27702#false} is VALID [2018-11-14 17:41:38,058 INFO L273 TraceCheckUtils]: 190: Hoare triple {27702#false} ~cond := #in~cond; {27702#false} is VALID [2018-11-14 17:41:38,058 INFO L256 TraceCheckUtils]: 189: Hoare triple {27702#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 188: Hoare triple {27702#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 187: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 186: Hoare triple {27702#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 185: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 184: Hoare triple {27702#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 183: Hoare triple {27702#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:38,059 INFO L273 TraceCheckUtils]: 182: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,060 INFO L273 TraceCheckUtils]: 181: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:38,060 INFO L273 TraceCheckUtils]: 180: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:38,060 INFO L273 TraceCheckUtils]: 179: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,060 INFO L273 TraceCheckUtils]: 178: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,060 INFO L273 TraceCheckUtils]: 177: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,060 INFO L273 TraceCheckUtils]: 176: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 175: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 174: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 173: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 172: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 171: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 170: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 169: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,061 INFO L273 TraceCheckUtils]: 168: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 167: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 166: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 165: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 164: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 163: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 162: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 161: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 160: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,062 INFO L273 TraceCheckUtils]: 159: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 158: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 157: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 156: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 155: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 154: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 153: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 152: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,063 INFO L273 TraceCheckUtils]: 151: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 150: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 149: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 148: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 147: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 146: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 145: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 144: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 143: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,064 INFO L273 TraceCheckUtils]: 142: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 141: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 140: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 139: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 138: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 137: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 136: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 135: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:38,065 INFO L273 TraceCheckUtils]: 134: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 133: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 132: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 131: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 130: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 129: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 128: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 127: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 126: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,066 INFO L273 TraceCheckUtils]: 125: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 124: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 123: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 122: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 121: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 120: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 119: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 118: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 117: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,067 INFO L273 TraceCheckUtils]: 116: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 115: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 114: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 113: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 112: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 111: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 110: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,068 INFO L273 TraceCheckUtils]: 109: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:38,069 INFO L273 TraceCheckUtils]: 108: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,069 INFO L273 TraceCheckUtils]: 107: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:38,069 INFO L273 TraceCheckUtils]: 106: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:38,069 INFO L273 TraceCheckUtils]: 105: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,069 INFO L273 TraceCheckUtils]: 104: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,070 INFO L273 TraceCheckUtils]: 103: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,070 INFO L273 TraceCheckUtils]: 102: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,070 INFO L273 TraceCheckUtils]: 101: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,070 INFO L273 TraceCheckUtils]: 100: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,070 INFO L273 TraceCheckUtils]: 99: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,070 INFO L273 TraceCheckUtils]: 98: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,071 INFO L273 TraceCheckUtils]: 97: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,071 INFO L273 TraceCheckUtils]: 96: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,071 INFO L273 TraceCheckUtils]: 95: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,071 INFO L273 TraceCheckUtils]: 94: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,071 INFO L273 TraceCheckUtils]: 93: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,071 INFO L273 TraceCheckUtils]: 92: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,072 INFO L273 TraceCheckUtils]: 91: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,072 INFO L273 TraceCheckUtils]: 90: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,072 INFO L273 TraceCheckUtils]: 89: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,072 INFO L273 TraceCheckUtils]: 88: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,072 INFO L273 TraceCheckUtils]: 87: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,072 INFO L273 TraceCheckUtils]: 86: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,073 INFO L273 TraceCheckUtils]: 85: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,073 INFO L273 TraceCheckUtils]: 84: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,073 INFO L273 TraceCheckUtils]: 83: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,073 INFO L273 TraceCheckUtils]: 82: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,073 INFO L273 TraceCheckUtils]: 81: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,073 INFO L273 TraceCheckUtils]: 80: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 79: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 78: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 77: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 76: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 75: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 74: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,074 INFO L273 TraceCheckUtils]: 73: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,075 INFO L273 TraceCheckUtils]: 72: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,075 INFO L273 TraceCheckUtils]: 71: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,075 INFO L273 TraceCheckUtils]: 70: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,075 INFO L273 TraceCheckUtils]: 69: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,075 INFO L273 TraceCheckUtils]: 68: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,075 INFO L273 TraceCheckUtils]: 67: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 17:41:38,076 INFO L273 TraceCheckUtils]: 66: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 17:41:38,076 INFO L273 TraceCheckUtils]: 65: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 17:41:38,076 INFO L273 TraceCheckUtils]: 64: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 17:41:38,090 INFO L273 TraceCheckUtils]: 63: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 17:41:38,091 INFO L273 TraceCheckUtils]: 62: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume true; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:38,094 INFO L273 TraceCheckUtils]: 61: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:38,096 INFO L273 TraceCheckUtils]: 60: Hoare triple {28687#(bvsge main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:38,096 INFO L273 TraceCheckUtils]: 59: Hoare triple {28687#(bvsge main_~j~0 (_ bv0 32))} assume true; {28687#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:38,096 INFO L273 TraceCheckUtils]: 58: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28687#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 17:41:38,097 INFO L273 TraceCheckUtils]: 57: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,097 INFO L273 TraceCheckUtils]: 56: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,097 INFO L273 TraceCheckUtils]: 55: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,100 INFO L273 TraceCheckUtils]: 54: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,101 INFO L273 TraceCheckUtils]: 53: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,101 INFO L273 TraceCheckUtils]: 52: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,102 INFO L273 TraceCheckUtils]: 51: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,105 INFO L273 TraceCheckUtils]: 50: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,105 INFO L273 TraceCheckUtils]: 49: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,105 INFO L273 TraceCheckUtils]: 48: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,106 INFO L273 TraceCheckUtils]: 47: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,108 INFO L273 TraceCheckUtils]: 46: Hoare triple {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,109 INFO L273 TraceCheckUtils]: 45: Hoare triple {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} assume true; {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,112 INFO L273 TraceCheckUtils]: 44: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,112 INFO L273 TraceCheckUtils]: 43: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,112 INFO L273 TraceCheckUtils]: 42: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,113 INFO L273 TraceCheckUtils]: 41: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,113 INFO L273 TraceCheckUtils]: 40: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,113 INFO L273 TraceCheckUtils]: 39: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,113 INFO L273 TraceCheckUtils]: 38: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,114 INFO L273 TraceCheckUtils]: 37: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,114 INFO L273 TraceCheckUtils]: 36: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,114 INFO L273 TraceCheckUtils]: 35: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,115 INFO L273 TraceCheckUtils]: 34: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,115 INFO L273 TraceCheckUtils]: 33: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,115 INFO L273 TraceCheckUtils]: 32: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,116 INFO L273 TraceCheckUtils]: 31: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,116 INFO L273 TraceCheckUtils]: 30: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,116 INFO L273 TraceCheckUtils]: 29: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,117 INFO L273 TraceCheckUtils]: 28: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,120 INFO L273 TraceCheckUtils]: 27: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,121 INFO L273 TraceCheckUtils]: 26: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,121 INFO L273 TraceCheckUtils]: 25: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,121 INFO L273 TraceCheckUtils]: 24: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,122 INFO L273 TraceCheckUtils]: 23: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,122 INFO L273 TraceCheckUtils]: 22: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,122 INFO L273 TraceCheckUtils]: 21: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,123 INFO L273 TraceCheckUtils]: 20: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,123 INFO L273 TraceCheckUtils]: 19: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,123 INFO L273 TraceCheckUtils]: 18: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,124 INFO L273 TraceCheckUtils]: 17: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,124 INFO L273 TraceCheckUtils]: 16: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,124 INFO L273 TraceCheckUtils]: 15: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,128 INFO L273 TraceCheckUtils]: 14: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,129 INFO L273 TraceCheckUtils]: 13: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,129 INFO L273 TraceCheckUtils]: 12: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,129 INFO L273 TraceCheckUtils]: 11: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,130 INFO L273 TraceCheckUtils]: 10: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,130 INFO L273 TraceCheckUtils]: 9: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,130 INFO L273 TraceCheckUtils]: 8: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,131 INFO L273 TraceCheckUtils]: 7: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,131 INFO L273 TraceCheckUtils]: 6: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,131 INFO L273 TraceCheckUtils]: 5: Hoare triple {27701#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 17:41:38,132 INFO L256 TraceCheckUtils]: 4: Hoare triple {27701#true} call #t~ret8 := main(); {27701#true} is VALID [2018-11-14 17:41:38,132 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {27701#true} {27701#true} #87#return; {27701#true} is VALID [2018-11-14 17:41:38,132 INFO L273 TraceCheckUtils]: 2: Hoare triple {27701#true} assume true; {27701#true} is VALID [2018-11-14 17:41:38,132 INFO L273 TraceCheckUtils]: 1: Hoare triple {27701#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {27701#true} is VALID [2018-11-14 17:41:38,132 INFO L256 TraceCheckUtils]: 0: Hoare triple {27701#true} call ULTIMATE.init(); {27701#true} is VALID [2018-11-14 17:41:38,155 INFO L134 CoverageAnalysis]: Checked inductivity of 2944 backedges. 1260 proven. 226 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-11-14 17:41:38,157 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:41:38,158 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-14 17:41:38,158 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 193 [2018-11-14 17:41:38,159 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:41:38,159 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 17:41:38,358 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:38,358 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 17:41:38,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 17:41:38,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-14 17:41:38,359 INFO L87 Difference]: Start difference. First operand 476 states and 616 transitions. Second operand 19 states. [2018-11-14 17:41:44,612 WARN L179 SmtUtils]: Spent 112.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-11-14 17:41:45,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:45,943 INFO L93 Difference]: Finished difference Result 1134 states and 1490 transitions. [2018-11-14 17:41:45,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-11-14 17:41:45,944 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 193 [2018-11-14 17:41:45,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:41:45,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 17:41:45,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 292 transitions. [2018-11-14 17:41:45,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 17:41:45,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 292 transitions. [2018-11-14 17:41:45,949 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 59 states and 292 transitions. [2018-11-14 17:41:46,581 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 292 edges. 292 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:46,608 INFO L225 Difference]: With dead ends: 1134 [2018-11-14 17:41:46,609 INFO L226 Difference]: Without dead ends: 750 [2018-11-14 17:41:46,611 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 435 GetRequests, 368 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1294 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=737, Invalid=3955, Unknown=0, NotChecked=0, Total=4692 [2018-11-14 17:41:46,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 750 states. [2018-11-14 17:41:47,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 750 to 677. [2018-11-14 17:41:47,410 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:41:47,411 INFO L82 GeneralOperation]: Start isEquivalent. First operand 750 states. Second operand 677 states. [2018-11-14 17:41:47,411 INFO L74 IsIncluded]: Start isIncluded. First operand 750 states. Second operand 677 states. [2018-11-14 17:41:47,411 INFO L87 Difference]: Start difference. First operand 750 states. Second operand 677 states. [2018-11-14 17:41:47,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:47,437 INFO L93 Difference]: Finished difference Result 750 states and 972 transitions. [2018-11-14 17:41:47,437 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 972 transitions. [2018-11-14 17:41:47,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:47,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:47,439 INFO L74 IsIncluded]: Start isIncluded. First operand 677 states. Second operand 750 states. [2018-11-14 17:41:47,439 INFO L87 Difference]: Start difference. First operand 677 states. Second operand 750 states. [2018-11-14 17:41:47,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:41:47,470 INFO L93 Difference]: Finished difference Result 750 states and 972 transitions. [2018-11-14 17:41:47,470 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 972 transitions. [2018-11-14 17:41:47,471 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:41:47,471 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:41:47,471 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:41:47,471 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:41:47,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 677 states. [2018-11-14 17:41:47,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 677 states to 677 states and 872 transitions. [2018-11-14 17:41:47,501 INFO L78 Accepts]: Start accepts. Automaton has 677 states and 872 transitions. Word has length 193 [2018-11-14 17:41:47,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:41:47,501 INFO L480 AbstractCegarLoop]: Abstraction has 677 states and 872 transitions. [2018-11-14 17:41:47,501 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 17:41:47,502 INFO L276 IsEmpty]: Start isEmpty. Operand 677 states and 872 transitions. [2018-11-14 17:41:47,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-14 17:41:47,504 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:41:47,505 INFO L375 BasicCegarLoop]: trace histogram [44, 36, 36, 36, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:41:47,505 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:41:47,505 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:41:47,505 INFO L82 PathProgramCache]: Analyzing trace with hash -429402308, now seen corresponding path program 9 times [2018-11-14 17:41:47,506 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 17:41:47,506 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 17:41:47,529 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 17:41:48,293 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-14 17:41:48,293 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:41:48,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:41:48,358 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:41:49,289 INFO L256 TraceCheckUtils]: 0: Hoare triple {32804#true} call ULTIMATE.init(); {32804#true} is VALID [2018-11-14 17:41:49,289 INFO L273 TraceCheckUtils]: 1: Hoare triple {32804#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {32804#true} is VALID [2018-11-14 17:41:49,289 INFO L273 TraceCheckUtils]: 2: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,289 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {32804#true} {32804#true} #87#return; {32804#true} is VALID [2018-11-14 17:41:49,290 INFO L256 TraceCheckUtils]: 4: Hoare triple {32804#true} call #t~ret8 := main(); {32804#true} is VALID [2018-11-14 17:41:49,290 INFO L273 TraceCheckUtils]: 5: Hoare triple {32804#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,290 INFO L273 TraceCheckUtils]: 6: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,290 INFO L273 TraceCheckUtils]: 7: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 8: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 9: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 10: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 11: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 12: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 13: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 14: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 15: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,291 INFO L273 TraceCheckUtils]: 16: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 17: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 18: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 19: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 20: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 21: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 22: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 23: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,292 INFO L273 TraceCheckUtils]: 24: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 25: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 26: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 27: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 28: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 29: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 30: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 31: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 32: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,293 INFO L273 TraceCheckUtils]: 33: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 34: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 35: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 36: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 37: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 38: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 39: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 40: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,294 INFO L273 TraceCheckUtils]: 41: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 42: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 43: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 44: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 45: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 46: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 47: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 48: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 49: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,295 INFO L273 TraceCheckUtils]: 50: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 51: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 52: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 53: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 54: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 55: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 56: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 57: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,296 INFO L273 TraceCheckUtils]: 58: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 59: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 60: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 61: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 62: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 63: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 64: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 65: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 66: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,297 INFO L273 TraceCheckUtils]: 67: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 68: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 69: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 70: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 71: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 72: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 73: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 74: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,298 INFO L273 TraceCheckUtils]: 75: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 76: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 77: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 78: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 79: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 80: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 81: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 82: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 83: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,299 INFO L273 TraceCheckUtils]: 84: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 85: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 86: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 87: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 88: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 89: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 90: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 91: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,300 INFO L273 TraceCheckUtils]: 92: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 93: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 94: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 95: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 96: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 97: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 98: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 99: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,301 INFO L273 TraceCheckUtils]: 100: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 101: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 102: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 103: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 104: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 105: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 106: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 107: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 108: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,302 INFO L273 TraceCheckUtils]: 109: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 110: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 111: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 112: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 113: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 114: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 115: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:49,303 INFO L273 TraceCheckUtils]: 116: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:49,320 INFO L273 TraceCheckUtils]: 117: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,321 INFO L273 TraceCheckUtils]: 118: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume true; {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,321 INFO L273 TraceCheckUtils]: 119: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,322 INFO L273 TraceCheckUtils]: 120: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,348 INFO L273 TraceCheckUtils]: 121: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,349 INFO L273 TraceCheckUtils]: 122: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume true; {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,349 INFO L273 TraceCheckUtils]: 123: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,350 INFO L273 TraceCheckUtils]: 124: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,377 INFO L273 TraceCheckUtils]: 125: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,378 INFO L273 TraceCheckUtils]: 126: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} assume true; {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,379 INFO L273 TraceCheckUtils]: 127: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,379 INFO L273 TraceCheckUtils]: 128: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,404 INFO L273 TraceCheckUtils]: 129: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,405 INFO L273 TraceCheckUtils]: 130: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume true; {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,406 INFO L273 TraceCheckUtils]: 131: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,406 INFO L273 TraceCheckUtils]: 132: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,431 INFO L273 TraceCheckUtils]: 133: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,432 INFO L273 TraceCheckUtils]: 134: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} assume true; {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,432 INFO L273 TraceCheckUtils]: 135: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,433 INFO L273 TraceCheckUtils]: 136: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 17:41:49,455 INFO L273 TraceCheckUtils]: 137: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,456 INFO L273 TraceCheckUtils]: 138: Hoare triple {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} assume true; {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,457 INFO L273 TraceCheckUtils]: 139: Hoare triple {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,457 INFO L273 TraceCheckUtils]: 140: Hoare triple {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,481 INFO L273 TraceCheckUtils]: 141: Hoare triple {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,481 INFO L273 TraceCheckUtils]: 142: Hoare triple {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} assume true; {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,483 INFO L273 TraceCheckUtils]: 143: Hoare triple {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33246#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,494 INFO L273 TraceCheckUtils]: 144: Hoare triple {33246#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:49,495 INFO L273 TraceCheckUtils]: 145: Hoare triple {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} assume true; {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:49,499 INFO L273 TraceCheckUtils]: 146: Hoare triple {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,500 INFO L273 TraceCheckUtils]: 147: Hoare triple {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume true; {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 17:41:49,500 INFO L273 TraceCheckUtils]: 148: Hoare triple {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,501 INFO L273 TraceCheckUtils]: 149: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,501 INFO L273 TraceCheckUtils]: 150: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,502 INFO L273 TraceCheckUtils]: 151: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,503 INFO L273 TraceCheckUtils]: 152: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,503 INFO L273 TraceCheckUtils]: 153: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,504 INFO L273 TraceCheckUtils]: 154: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,505 INFO L273 TraceCheckUtils]: 155: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,506 INFO L273 TraceCheckUtils]: 156: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,507 INFO L273 TraceCheckUtils]: 157: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,507 INFO L273 TraceCheckUtils]: 158: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,508 INFO L273 TraceCheckUtils]: 159: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,509 INFO L273 TraceCheckUtils]: 160: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,510 INFO L273 TraceCheckUtils]: 161: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,510 INFO L273 TraceCheckUtils]: 162: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,511 INFO L273 TraceCheckUtils]: 163: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,512 INFO L273 TraceCheckUtils]: 164: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,513 INFO L273 TraceCheckUtils]: 165: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,514 INFO L273 TraceCheckUtils]: 166: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,514 INFO L273 TraceCheckUtils]: 167: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,515 INFO L273 TraceCheckUtils]: 168: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,516 INFO L273 TraceCheckUtils]: 169: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,517 INFO L273 TraceCheckUtils]: 170: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,518 INFO L273 TraceCheckUtils]: 171: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,519 INFO L273 TraceCheckUtils]: 172: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,519 INFO L273 TraceCheckUtils]: 173: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,520 INFO L273 TraceCheckUtils]: 174: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,521 INFO L273 TraceCheckUtils]: 175: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,522 INFO L273 TraceCheckUtils]: 176: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,523 INFO L273 TraceCheckUtils]: 177: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,523 INFO L273 TraceCheckUtils]: 178: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,524 INFO L273 TraceCheckUtils]: 179: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,525 INFO L273 TraceCheckUtils]: 180: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,526 INFO L273 TraceCheckUtils]: 181: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,526 INFO L273 TraceCheckUtils]: 182: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,527 INFO L273 TraceCheckUtils]: 183: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,528 INFO L273 TraceCheckUtils]: 184: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,529 INFO L273 TraceCheckUtils]: 185: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,530 INFO L273 TraceCheckUtils]: 186: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,530 INFO L273 TraceCheckUtils]: 187: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,531 INFO L273 TraceCheckUtils]: 188: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,536 INFO L273 TraceCheckUtils]: 189: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,536 INFO L273 TraceCheckUtils]: 190: Hoare triple {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} assume true; {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} is VALID [2018-11-14 17:41:49,538 INFO L273 TraceCheckUtils]: 191: Hoare triple {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {33395#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:49,538 INFO L273 TraceCheckUtils]: 192: Hoare triple {33395#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {32805#false} is VALID [2018-11-14 17:41:49,538 INFO L273 TraceCheckUtils]: 193: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L273 TraceCheckUtils]: 194: Hoare triple {32805#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L273 TraceCheckUtils]: 195: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L273 TraceCheckUtils]: 196: Hoare triple {32805#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L256 TraceCheckUtils]: 197: Hoare triple {32805#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L273 TraceCheckUtils]: 198: Hoare triple {32805#false} ~cond := #in~cond; {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L273 TraceCheckUtils]: 199: Hoare triple {32805#false} assume ~cond == 0bv32; {32805#false} is VALID [2018-11-14 17:41:49,539 INFO L273 TraceCheckUtils]: 200: Hoare triple {32805#false} assume !false; {32805#false} is VALID [2018-11-14 17:41:49,587 INFO L134 CoverageAnalysis]: Checked inductivity of 3252 backedges. 1618 proven. 367 refuted. 0 times theorem prover too weak. 1267 trivial. 0 not checked. [2018-11-14 17:41:49,587 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 17:41:51,214 INFO L273 TraceCheckUtils]: 200: Hoare triple {32805#false} assume !false; {32805#false} is VALID [2018-11-14 17:41:51,215 INFO L273 TraceCheckUtils]: 199: Hoare triple {32805#false} assume ~cond == 0bv32; {32805#false} is VALID [2018-11-14 17:41:51,215 INFO L273 TraceCheckUtils]: 198: Hoare triple {32805#false} ~cond := #in~cond; {32805#false} is VALID [2018-11-14 17:41:51,215 INFO L256 TraceCheckUtils]: 197: Hoare triple {32805#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {32805#false} is VALID [2018-11-14 17:41:51,215 INFO L273 TraceCheckUtils]: 196: Hoare triple {32805#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {32805#false} is VALID [2018-11-14 17:41:51,216 INFO L273 TraceCheckUtils]: 195: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 17:41:51,216 INFO L273 TraceCheckUtils]: 194: Hoare triple {32805#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {32805#false} is VALID [2018-11-14 17:41:51,216 INFO L273 TraceCheckUtils]: 193: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 17:41:51,216 INFO L273 TraceCheckUtils]: 192: Hoare triple {33395#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {32805#false} is VALID [2018-11-14 17:41:51,217 INFO L273 TraceCheckUtils]: 191: Hoare triple {33450#(bvslt main_~i~0 (_ bv100000 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {33395#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 17:41:51,217 INFO L273 TraceCheckUtils]: 190: Hoare triple {33450#(bvslt main_~i~0 (_ bv100000 32))} assume true; {33450#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 17:41:51,218 INFO L273 TraceCheckUtils]: 189: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33450#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 17:41:51,218 INFO L273 TraceCheckUtils]: 188: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,218 INFO L273 TraceCheckUtils]: 187: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,218 INFO L273 TraceCheckUtils]: 186: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,219 INFO L273 TraceCheckUtils]: 185: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,219 INFO L273 TraceCheckUtils]: 184: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,220 INFO L273 TraceCheckUtils]: 183: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,220 INFO L273 TraceCheckUtils]: 182: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,221 INFO L273 TraceCheckUtils]: 181: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,221 INFO L273 TraceCheckUtils]: 180: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,222 INFO L273 TraceCheckUtils]: 179: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,222 INFO L273 TraceCheckUtils]: 178: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,223 INFO L273 TraceCheckUtils]: 177: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,223 INFO L273 TraceCheckUtils]: 176: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,224 INFO L273 TraceCheckUtils]: 175: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,224 INFO L273 TraceCheckUtils]: 174: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,225 INFO L273 TraceCheckUtils]: 173: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,225 INFO L273 TraceCheckUtils]: 172: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,226 INFO L273 TraceCheckUtils]: 171: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,227 INFO L273 TraceCheckUtils]: 170: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,227 INFO L273 TraceCheckUtils]: 169: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,239 INFO L273 TraceCheckUtils]: 168: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,240 INFO L273 TraceCheckUtils]: 167: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,240 INFO L273 TraceCheckUtils]: 166: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,241 INFO L273 TraceCheckUtils]: 165: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,241 INFO L273 TraceCheckUtils]: 164: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,241 INFO L273 TraceCheckUtils]: 163: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,242 INFO L273 TraceCheckUtils]: 162: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,242 INFO L273 TraceCheckUtils]: 161: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,242 INFO L273 TraceCheckUtils]: 160: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,243 INFO L273 TraceCheckUtils]: 159: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,243 INFO L273 TraceCheckUtils]: 158: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,243 INFO L273 TraceCheckUtils]: 157: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,243 INFO L273 TraceCheckUtils]: 156: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,244 INFO L273 TraceCheckUtils]: 155: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,244 INFO L273 TraceCheckUtils]: 154: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,245 INFO L273 TraceCheckUtils]: 153: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,245 INFO L273 TraceCheckUtils]: 152: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,246 INFO L273 TraceCheckUtils]: 151: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,246 INFO L273 TraceCheckUtils]: 150: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,247 INFO L273 TraceCheckUtils]: 149: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,248 INFO L273 TraceCheckUtils]: 148: Hoare triple {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 17:41:51,248 INFO L273 TraceCheckUtils]: 147: Hoare triple {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:51,249 INFO L273 TraceCheckUtils]: 146: Hoare triple {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:51,250 INFO L273 TraceCheckUtils]: 145: Hoare triple {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume true; {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:51,257 INFO L273 TraceCheckUtils]: 144: Hoare triple {33595#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 17:41:51,258 INFO L273 TraceCheckUtils]: 143: Hoare triple {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33595#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,258 INFO L273 TraceCheckUtils]: 142: Hoare triple {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,259 INFO L273 TraceCheckUtils]: 141: Hoare triple {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,259 INFO L273 TraceCheckUtils]: 140: Hoare triple {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,260 INFO L273 TraceCheckUtils]: 139: Hoare triple {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,260 INFO L273 TraceCheckUtils]: 138: Hoare triple {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:51,264 INFO L273 TraceCheckUtils]: 137: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 17:41:51,264 INFO L273 TraceCheckUtils]: 136: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,265 INFO L273 TraceCheckUtils]: 135: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,265 INFO L273 TraceCheckUtils]: 134: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,269 INFO L273 TraceCheckUtils]: 133: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,270 INFO L273 TraceCheckUtils]: 132: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,270 INFO L273 TraceCheckUtils]: 131: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,271 INFO L273 TraceCheckUtils]: 130: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume true; {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,275 INFO L273 TraceCheckUtils]: 129: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,275 INFO L273 TraceCheckUtils]: 128: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,276 INFO L273 TraceCheckUtils]: 127: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,276 INFO L273 TraceCheckUtils]: 126: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,281 INFO L273 TraceCheckUtils]: 125: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 17:41:51,281 INFO L273 TraceCheckUtils]: 124: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,282 INFO L273 TraceCheckUtils]: 123: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,282 INFO L273 TraceCheckUtils]: 122: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,286 INFO L273 TraceCheckUtils]: 121: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,286 INFO L273 TraceCheckUtils]: 120: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,287 INFO L273 TraceCheckUtils]: 119: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,287 INFO L273 TraceCheckUtils]: 118: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} assume true; {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,290 INFO L273 TraceCheckUtils]: 117: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 17:41:51,290 INFO L273 TraceCheckUtils]: 116: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 115: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 114: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 113: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 112: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 111: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 110: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 109: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,291 INFO L273 TraceCheckUtils]: 108: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 107: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 106: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 105: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 104: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 103: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 102: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,292 INFO L273 TraceCheckUtils]: 101: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,293 INFO L273 TraceCheckUtils]: 100: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,293 INFO L273 TraceCheckUtils]: 99: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,293 INFO L273 TraceCheckUtils]: 98: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,293 INFO L273 TraceCheckUtils]: 97: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,293 INFO L273 TraceCheckUtils]: 96: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,294 INFO L273 TraceCheckUtils]: 95: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,294 INFO L273 TraceCheckUtils]: 94: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,294 INFO L273 TraceCheckUtils]: 93: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,294 INFO L273 TraceCheckUtils]: 92: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,294 INFO L273 TraceCheckUtils]: 91: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,294 INFO L273 TraceCheckUtils]: 90: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,295 INFO L273 TraceCheckUtils]: 89: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,295 INFO L273 TraceCheckUtils]: 88: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:51,295 INFO L273 TraceCheckUtils]: 87: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,295 INFO L273 TraceCheckUtils]: 86: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:51,295 INFO L273 TraceCheckUtils]: 85: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:51,295 INFO L273 TraceCheckUtils]: 84: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,296 INFO L273 TraceCheckUtils]: 83: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,296 INFO L273 TraceCheckUtils]: 82: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,296 INFO L273 TraceCheckUtils]: 81: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,296 INFO L273 TraceCheckUtils]: 80: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,296 INFO L273 TraceCheckUtils]: 79: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,297 INFO L273 TraceCheckUtils]: 78: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,297 INFO L273 TraceCheckUtils]: 77: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,297 INFO L273 TraceCheckUtils]: 76: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,297 INFO L273 TraceCheckUtils]: 75: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,297 INFO L273 TraceCheckUtils]: 74: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,297 INFO L273 TraceCheckUtils]: 73: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,298 INFO L273 TraceCheckUtils]: 72: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,298 INFO L273 TraceCheckUtils]: 71: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,298 INFO L273 TraceCheckUtils]: 70: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,298 INFO L273 TraceCheckUtils]: 69: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,298 INFO L273 TraceCheckUtils]: 68: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,299 INFO L273 TraceCheckUtils]: 67: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:51,299 INFO L273 TraceCheckUtils]: 66: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,299 INFO L273 TraceCheckUtils]: 65: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:51,299 INFO L273 TraceCheckUtils]: 64: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:51,299 INFO L273 TraceCheckUtils]: 63: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,299 INFO L273 TraceCheckUtils]: 62: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,300 INFO L273 TraceCheckUtils]: 61: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,300 INFO L273 TraceCheckUtils]: 60: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,300 INFO L273 TraceCheckUtils]: 59: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,300 INFO L273 TraceCheckUtils]: 58: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,300 INFO L273 TraceCheckUtils]: 57: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,301 INFO L273 TraceCheckUtils]: 56: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,301 INFO L273 TraceCheckUtils]: 55: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,301 INFO L273 TraceCheckUtils]: 54: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,301 INFO L273 TraceCheckUtils]: 53: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,301 INFO L273 TraceCheckUtils]: 52: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,302 INFO L273 TraceCheckUtils]: 51: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,302 INFO L273 TraceCheckUtils]: 50: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,302 INFO L273 TraceCheckUtils]: 49: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,302 INFO L273 TraceCheckUtils]: 48: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,302 INFO L273 TraceCheckUtils]: 47: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,302 INFO L273 TraceCheckUtils]: 46: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:51,303 INFO L273 TraceCheckUtils]: 45: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,303 INFO L273 TraceCheckUtils]: 44: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:51,303 INFO L273 TraceCheckUtils]: 43: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:51,303 INFO L273 TraceCheckUtils]: 42: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,303 INFO L273 TraceCheckUtils]: 41: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,303 INFO L273 TraceCheckUtils]: 40: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,304 INFO L273 TraceCheckUtils]: 39: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,304 INFO L273 TraceCheckUtils]: 38: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,304 INFO L273 TraceCheckUtils]: 37: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,304 INFO L273 TraceCheckUtils]: 36: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,304 INFO L273 TraceCheckUtils]: 35: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,304 INFO L273 TraceCheckUtils]: 34: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,305 INFO L273 TraceCheckUtils]: 33: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,305 INFO L273 TraceCheckUtils]: 32: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,305 INFO L273 TraceCheckUtils]: 31: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,305 INFO L273 TraceCheckUtils]: 30: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,305 INFO L273 TraceCheckUtils]: 29: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:51,305 INFO L273 TraceCheckUtils]: 28: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,306 INFO L273 TraceCheckUtils]: 27: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:51,306 INFO L273 TraceCheckUtils]: 26: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:51,306 INFO L273 TraceCheckUtils]: 25: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,306 INFO L273 TraceCheckUtils]: 24: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,306 INFO L273 TraceCheckUtils]: 23: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,306 INFO L273 TraceCheckUtils]: 22: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,307 INFO L273 TraceCheckUtils]: 21: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,307 INFO L273 TraceCheckUtils]: 20: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,307 INFO L273 TraceCheckUtils]: 19: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,307 INFO L273 TraceCheckUtils]: 18: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,307 INFO L273 TraceCheckUtils]: 17: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,307 INFO L273 TraceCheckUtils]: 16: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 15: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 14: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 13: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 12: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 11: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 10: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,308 INFO L273 TraceCheckUtils]: 9: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 17:41:51,309 INFO L273 TraceCheckUtils]: 8: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,309 INFO L273 TraceCheckUtils]: 7: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 17:41:51,309 INFO L273 TraceCheckUtils]: 6: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,309 INFO L273 TraceCheckUtils]: 5: Hoare triple {32804#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {32804#true} is VALID [2018-11-14 17:41:51,309 INFO L256 TraceCheckUtils]: 4: Hoare triple {32804#true} call #t~ret8 := main(); {32804#true} is VALID [2018-11-14 17:41:51,310 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {32804#true} {32804#true} #87#return; {32804#true} is VALID [2018-11-14 17:41:51,310 INFO L273 TraceCheckUtils]: 2: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 17:41:51,310 INFO L273 TraceCheckUtils]: 1: Hoare triple {32804#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {32804#true} is VALID [2018-11-14 17:41:51,310 INFO L256 TraceCheckUtils]: 0: Hoare triple {32804#true} call ULTIMATE.init(); {32804#true} is VALID [2018-11-14 17:41:51,364 INFO L134 CoverageAnalysis]: Checked inductivity of 3252 backedges. 1636 proven. 349 refuted. 0 times theorem prover too weak. 1267 trivial. 0 not checked. [2018-11-14 17:41:51,369 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:41:51,370 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 29 [2018-11-14 17:41:51,370 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 201 [2018-11-14 17:41:51,373 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:41:51,373 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 29 states. [2018-11-14 17:41:51,786 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:41:51,786 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-11-14 17:41:51,787 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-11-14 17:41:51,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=631, Unknown=0, NotChecked=0, Total=812 [2018-11-14 17:41:51,787 INFO L87 Difference]: Start difference. First operand 677 states and 872 transitions. Second operand 29 states. [2018-11-14 17:41:52,451 WARN L179 SmtUtils]: Spent 242.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 21