java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 16:46:08,656 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 16:46:08,661 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 16:46:08,673 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 16:46:08,673 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 16:46:08,675 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 16:46:08,676 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 16:46:08,678 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 16:46:08,679 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 16:46:08,680 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 16:46:08,681 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 16:46:08,681 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 16:46:08,682 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 16:46:08,683 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 16:46:08,684 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 16:46:08,685 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 16:46:08,686 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 16:46:08,688 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 16:46:08,690 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 16:46:08,692 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 16:46:08,693 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 16:46:08,694 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 16:46:08,697 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-14 16:46:08,706 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-14 16:46:08,725 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 16:46:08,725 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 16:46:08,726 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 16:46:08,726 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 16:46:08,730 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 16:46:08,731 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 16:46:08,731 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 16:46:08,731 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 16:46:08,731 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 16:46:08,731 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 16:46:08,732 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 16:46:08,732 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 16:46:08,732 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 16:46:08,732 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 16:46:08,732 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-14 16:46:08,734 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-14 16:46:08,734 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 16:46:08,734 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 16:46:08,734 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 16:46:08,735 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 16:46:08,735 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 16:46:08,735 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 16:46:08,735 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 16:46:08,735 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 16:46:08,737 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 16:46:08,737 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 16:46:08,737 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 16:46:08,737 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-14 16:46:08,738 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 16:46:08,738 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-14 16:46:08,738 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-14 16:46:08,738 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 16:46:08,794 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 16:46:08,815 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 16:46:08,818 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 16:46:08,820 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 16:46:08,820 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 16:46:08,822 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i [2018-11-14 16:46:08,891 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/162a6936b/eddffb61e00a4846ba57a8a181735773/FLAG77ab0520b [2018-11-14 16:46:09,308 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 16:46:09,309 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i [2018-11-14 16:46:09,315 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/162a6936b/eddffb61e00a4846ba57a8a181735773/FLAG77ab0520b [2018-11-14 16:46:09,328 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/162a6936b/eddffb61e00a4846ba57a8a181735773 [2018-11-14 16:46:09,339 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 16:46:09,341 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 16:46:09,342 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 16:46:09,342 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 16:46:09,346 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 16:46:09,348 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,351 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4580dabd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09, skipping insertion in model container [2018-11-14 16:46:09,351 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,361 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 16:46:09,383 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 16:46:09,634 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 16:46:09,640 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 16:46:09,663 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 16:46:09,680 INFO L195 MainTranslator]: Completed translation [2018-11-14 16:46:09,681 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09 WrapperNode [2018-11-14 16:46:09,681 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 16:46:09,682 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 16:46:09,682 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 16:46:09,682 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 16:46:09,697 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,697 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,705 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,705 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,713 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,720 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,722 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... [2018-11-14 16:46:09,725 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 16:46:09,725 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 16:46:09,725 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 16:46:09,726 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 16:46:09,727 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 16:46:09,875 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 16:46:09,875 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 16:46:09,876 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 16:46:09,876 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 16:46:09,876 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 16:46:09,876 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-14 16:46:09,876 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 16:46:09,877 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-14 16:46:09,879 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 16:46:09,879 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 16:46:09,879 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 16:46:10,452 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 16:46:10,453 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 04:46:10 BoogieIcfgContainer [2018-11-14 16:46:10,453 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 16:46:10,454 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 16:46:10,454 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 16:46:10,460 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 16:46:10,460 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 04:46:09" (1/3) ... [2018-11-14 16:46:10,461 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12d56684 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 04:46:10, skipping insertion in model container [2018-11-14 16:46:10,462 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:46:09" (2/3) ... [2018-11-14 16:46:10,462 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12d56684 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 04:46:10, skipping insertion in model container [2018-11-14 16:46:10,462 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 04:46:10" (3/3) ... [2018-11-14 16:46:10,465 INFO L112 eAbstractionObserver]: Analyzing ICFG half_true-unreach-call_true-termination.i [2018-11-14 16:46:10,476 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 16:46:10,487 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 16:46:10,507 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 16:46:10,545 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 16:46:10,545 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 16:46:10,546 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 16:46:10,546 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 16:46:10,546 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 16:46:10,546 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 16:46:10,546 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 16:46:10,546 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 16:46:10,546 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 16:46:10,566 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-11-14 16:46:10,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-11-14 16:46:10,573 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:10,574 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:10,577 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:10,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:10,583 INFO L82 PathProgramCache]: Analyzing trace with hash 439143249, now seen corresponding path program 1 times [2018-11-14 16:46:10,589 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:10,590 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:10,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:46:10,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:10,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:10,702 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:10,777 INFO L256 TraceCheckUtils]: 0: Hoare triple {25#true} call ULTIMATE.init(); {25#true} is VALID [2018-11-14 16:46:10,780 INFO L273 TraceCheckUtils]: 1: Hoare triple {25#true} assume true; {25#true} is VALID [2018-11-14 16:46:10,781 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} #43#return; {25#true} is VALID [2018-11-14 16:46:10,781 INFO L256 TraceCheckUtils]: 3: Hoare triple {25#true} call #t~ret4 := main(); {25#true} is VALID [2018-11-14 16:46:10,782 INFO L273 TraceCheckUtils]: 4: Hoare triple {25#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {25#true} is VALID [2018-11-14 16:46:10,782 INFO L273 TraceCheckUtils]: 5: Hoare triple {25#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {25#true} is VALID [2018-11-14 16:46:10,792 INFO L273 TraceCheckUtils]: 6: Hoare triple {25#true} assume !true; {26#false} is VALID [2018-11-14 16:46:10,792 INFO L256 TraceCheckUtils]: 7: Hoare triple {26#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {26#false} is VALID [2018-11-14 16:46:10,793 INFO L273 TraceCheckUtils]: 8: Hoare triple {26#false} ~cond := #in~cond; {26#false} is VALID [2018-11-14 16:46:10,793 INFO L273 TraceCheckUtils]: 9: Hoare triple {26#false} assume ~cond == 0bv32; {26#false} is VALID [2018-11-14 16:46:10,794 INFO L273 TraceCheckUtils]: 10: Hoare triple {26#false} assume !false; {26#false} is VALID [2018-11-14 16:46:10,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:10,797 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 16:46:10,802 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 16:46:10,803 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 16:46:10,809 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-11-14 16:46:10,813 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:46:10,817 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 16:46:10,858 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:10,858 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 16:46:10,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 16:46:10,867 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 16:46:10,869 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 2 states. [2018-11-14 16:46:10,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:10,965 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2018-11-14 16:46:10,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 16:46:10,965 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-11-14 16:46:10,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:46:10,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 16:46:10,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 39 transitions. [2018-11-14 16:46:10,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 16:46:10,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 39 transitions. [2018-11-14 16:46:10,986 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 39 transitions. [2018-11-14 16:46:11,344 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:11,354 INFO L225 Difference]: With dead ends: 34 [2018-11-14 16:46:11,355 INFO L226 Difference]: Without dead ends: 15 [2018-11-14 16:46:11,358 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 16:46:11,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2018-11-14 16:46:11,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-11-14 16:46:11,418 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:46:11,418 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand 15 states. [2018-11-14 16:46:11,419 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand 15 states. [2018-11-14 16:46:11,419 INFO L87 Difference]: Start difference. First operand 15 states. Second operand 15 states. [2018-11-14 16:46:11,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:11,422 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2018-11-14 16:46:11,422 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-11-14 16:46:11,423 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:11,423 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:11,423 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand 15 states. [2018-11-14 16:46:11,423 INFO L87 Difference]: Start difference. First operand 15 states. Second operand 15 states. [2018-11-14 16:46:11,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:11,426 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2018-11-14 16:46:11,427 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-11-14 16:46:11,429 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:11,429 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:11,429 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:46:11,430 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:46:11,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-14 16:46:11,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2018-11-14 16:46:11,433 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 11 [2018-11-14 16:46:11,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:46:11,434 INFO L480 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2018-11-14 16:46:11,434 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 16:46:11,434 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2018-11-14 16:46:11,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-11-14 16:46:11,435 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:11,435 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:11,435 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:11,436 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:11,436 INFO L82 PathProgramCache]: Analyzing trace with hash 299545522, now seen corresponding path program 1 times [2018-11-14 16:46:11,436 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:11,436 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:11,452 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:46:11,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:11,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:11,481 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:11,809 INFO L256 TraceCheckUtils]: 0: Hoare triple {154#true} call ULTIMATE.init(); {154#true} is VALID [2018-11-14 16:46:11,809 INFO L273 TraceCheckUtils]: 1: Hoare triple {154#true} assume true; {154#true} is VALID [2018-11-14 16:46:11,810 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {154#true} {154#true} #43#return; {154#true} is VALID [2018-11-14 16:46:11,810 INFO L256 TraceCheckUtils]: 3: Hoare triple {154#true} call #t~ret4 := main(); {154#true} is VALID [2018-11-14 16:46:11,811 INFO L273 TraceCheckUtils]: 4: Hoare triple {154#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {171#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 16:46:11,812 INFO L273 TraceCheckUtils]: 5: Hoare triple {171#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:11,812 INFO L273 TraceCheckUtils]: 6: Hoare triple {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:11,813 INFO L273 TraceCheckUtils]: 7: Hoare triple {175#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {182#(and (= main_~n~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (not (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:11,815 INFO L256 TraceCheckUtils]: 8: Hoare triple {182#(and (= main_~n~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (not (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0))))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {186#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 16:46:11,817 INFO L273 TraceCheckUtils]: 9: Hoare triple {186#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {190#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 16:46:11,818 INFO L273 TraceCheckUtils]: 10: Hoare triple {190#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {155#false} is VALID [2018-11-14 16:46:11,818 INFO L273 TraceCheckUtils]: 11: Hoare triple {155#false} assume !false; {155#false} is VALID [2018-11-14 16:46:11,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:11,822 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 16:46:11,824 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 16:46:11,825 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-14 16:46:11,826 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 12 [2018-11-14 16:46:11,827 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:46:11,827 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-14 16:46:11,854 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 12 edges. 12 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:11,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-14 16:46:11,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-14 16:46:11,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-14 16:46:11,856 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand 7 states. [2018-11-14 16:46:12,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:12,543 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2018-11-14 16:46:12,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-14 16:46:12,543 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 12 [2018-11-14 16:46:12,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:46:12,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 16:46:12,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2018-11-14 16:46:12,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 16:46:12,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 34 transitions. [2018-11-14 16:46:12,550 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 34 transitions. [2018-11-14 16:46:12,727 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:12,729 INFO L225 Difference]: With dead ends: 30 [2018-11-14 16:46:12,729 INFO L226 Difference]: Without dead ends: 18 [2018-11-14 16:46:12,730 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-11-14 16:46:12,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-11-14 16:46:12,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-11-14 16:46:12,744 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:46:12,744 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand 18 states. [2018-11-14 16:46:12,744 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-14 16:46:12,744 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-14 16:46:12,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:12,746 INFO L93 Difference]: Finished difference Result 18 states and 19 transitions. [2018-11-14 16:46:12,746 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-11-14 16:46:12,748 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:12,748 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:12,748 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-14 16:46:12,748 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-14 16:46:12,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:12,751 INFO L93 Difference]: Finished difference Result 18 states and 19 transitions. [2018-11-14 16:46:12,751 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-11-14 16:46:12,752 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:12,752 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:12,752 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:46:12,752 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:46:12,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 16:46:12,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-11-14 16:46:12,755 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 12 [2018-11-14 16:46:12,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:46:12,755 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 19 transitions. [2018-11-14 16:46:12,755 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-14 16:46:12,755 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 19 transitions. [2018-11-14 16:46:12,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-14 16:46:12,756 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:12,756 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:12,756 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:12,757 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:12,757 INFO L82 PathProgramCache]: Analyzing trace with hash 2077692347, now seen corresponding path program 1 times [2018-11-14 16:46:12,757 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:12,757 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:12,773 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:46:12,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:12,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:12,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:13,090 INFO L256 TraceCheckUtils]: 0: Hoare triple {305#true} call ULTIMATE.init(); {305#true} is VALID [2018-11-14 16:46:13,091 INFO L273 TraceCheckUtils]: 1: Hoare triple {305#true} assume true; {305#true} is VALID [2018-11-14 16:46:13,091 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {305#true} {305#true} #43#return; {305#true} is VALID [2018-11-14 16:46:13,092 INFO L256 TraceCheckUtils]: 3: Hoare triple {305#true} call #t~ret4 := main(); {305#true} is VALID [2018-11-14 16:46:13,093 INFO L273 TraceCheckUtils]: 4: Hoare triple {305#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {305#true} is VALID [2018-11-14 16:46:13,094 INFO L273 TraceCheckUtils]: 5: Hoare triple {305#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:13,094 INFO L273 TraceCheckUtils]: 6: Hoare triple {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:13,095 INFO L273 TraceCheckUtils]: 7: Hoare triple {325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:13,096 INFO L273 TraceCheckUtils]: 8: Hoare triple {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:13,098 INFO L273 TraceCheckUtils]: 9: Hoare triple {332#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:13,104 INFO L273 TraceCheckUtils]: 10: Hoare triple {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:13,106 INFO L273 TraceCheckUtils]: 11: Hoare triple {339#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {306#false} is VALID [2018-11-14 16:46:13,106 INFO L256 TraceCheckUtils]: 12: Hoare triple {306#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {306#false} is VALID [2018-11-14 16:46:13,107 INFO L273 TraceCheckUtils]: 13: Hoare triple {306#false} ~cond := #in~cond; {306#false} is VALID [2018-11-14 16:46:13,107 INFO L273 TraceCheckUtils]: 14: Hoare triple {306#false} assume ~cond == 0bv32; {306#false} is VALID [2018-11-14 16:46:13,107 INFO L273 TraceCheckUtils]: 15: Hoare triple {306#false} assume !false; {306#false} is VALID [2018-11-14 16:46:13,110 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:13,110 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:46:13,276 INFO L273 TraceCheckUtils]: 15: Hoare triple {306#false} assume !false; {306#false} is VALID [2018-11-14 16:46:13,276 INFO L273 TraceCheckUtils]: 14: Hoare triple {306#false} assume ~cond == 0bv32; {306#false} is VALID [2018-11-14 16:46:13,276 INFO L273 TraceCheckUtils]: 13: Hoare triple {306#false} ~cond := #in~cond; {306#false} is VALID [2018-11-14 16:46:13,277 INFO L256 TraceCheckUtils]: 12: Hoare triple {306#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {306#false} is VALID [2018-11-14 16:46:13,277 INFO L273 TraceCheckUtils]: 11: Hoare triple {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {306#false} is VALID [2018-11-14 16:46:13,278 INFO L273 TraceCheckUtils]: 10: Hoare triple {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume true; {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:13,280 INFO L273 TraceCheckUtils]: 9: Hoare triple {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {370#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:13,281 INFO L273 TraceCheckUtils]: 8: Hoare triple {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:13,286 INFO L273 TraceCheckUtils]: 7: Hoare triple {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {377#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:13,287 INFO L273 TraceCheckUtils]: 6: Hoare triple {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:13,300 INFO L273 TraceCheckUtils]: 5: Hoare triple {305#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {384#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:13,301 INFO L273 TraceCheckUtils]: 4: Hoare triple {305#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {305#true} is VALID [2018-11-14 16:46:13,301 INFO L256 TraceCheckUtils]: 3: Hoare triple {305#true} call #t~ret4 := main(); {305#true} is VALID [2018-11-14 16:46:13,301 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {305#true} {305#true} #43#return; {305#true} is VALID [2018-11-14 16:46:13,302 INFO L273 TraceCheckUtils]: 1: Hoare triple {305#true} assume true; {305#true} is VALID [2018-11-14 16:46:13,302 INFO L256 TraceCheckUtils]: 0: Hoare triple {305#true} call ULTIMATE.init(); {305#true} is VALID [2018-11-14 16:46:13,303 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:13,306 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:46:13,306 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-14 16:46:13,306 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2018-11-14 16:46:13,307 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:46:13,307 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-14 16:46:13,367 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:13,368 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-14 16:46:13,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-14 16:46:13,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-11-14 16:46:13,369 INFO L87 Difference]: Start difference. First operand 18 states and 19 transitions. Second operand 8 states. [2018-11-14 16:46:13,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:13,921 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2018-11-14 16:46:13,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-14 16:46:13,921 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2018-11-14 16:46:13,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:46:13,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-14 16:46:13,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 45 transitions. [2018-11-14 16:46:13,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-14 16:46:13,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 45 transitions. [2018-11-14 16:46:13,928 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 45 transitions. [2018-11-14 16:46:14,010 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:14,011 INFO L225 Difference]: With dead ends: 38 [2018-11-14 16:46:14,012 INFO L226 Difference]: Without dead ends: 29 [2018-11-14 16:46:14,012 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-14 16:46:14,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-14 16:46:14,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-11-14 16:46:14,029 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:46:14,029 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 29 states. [2018-11-14 16:46:14,029 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-14 16:46:14,030 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-14 16:46:14,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:14,032 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2018-11-14 16:46:14,033 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-11-14 16:46:14,033 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:14,033 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:14,034 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-14 16:46:14,034 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-14 16:46:14,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:14,042 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2018-11-14 16:46:14,042 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-11-14 16:46:14,043 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:14,043 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:14,043 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:46:14,043 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:46:14,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-14 16:46:14,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 32 transitions. [2018-11-14 16:46:14,046 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 32 transitions. Word has length 16 [2018-11-14 16:46:14,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:46:14,046 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 32 transitions. [2018-11-14 16:46:14,046 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-14 16:46:14,047 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-11-14 16:46:14,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-14 16:46:14,047 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:14,048 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:14,048 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:14,048 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:14,048 INFO L82 PathProgramCache]: Analyzing trace with hash -2068472574, now seen corresponding path program 1 times [2018-11-14 16:46:14,049 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:14,049 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:14,071 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:46:14,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:14,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:14,108 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:14,584 INFO L256 TraceCheckUtils]: 0: Hoare triple {560#true} call ULTIMATE.init(); {560#true} is VALID [2018-11-14 16:46:14,585 INFO L273 TraceCheckUtils]: 1: Hoare triple {560#true} assume true; {560#true} is VALID [2018-11-14 16:46:14,585 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {560#true} {560#true} #43#return; {560#true} is VALID [2018-11-14 16:46:14,586 INFO L256 TraceCheckUtils]: 3: Hoare triple {560#true} call #t~ret4 := main(); {560#true} is VALID [2018-11-14 16:46:14,586 INFO L273 TraceCheckUtils]: 4: Hoare triple {560#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {577#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 16:46:14,587 INFO L273 TraceCheckUtils]: 5: Hoare triple {577#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:14,588 INFO L273 TraceCheckUtils]: 6: Hoare triple {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:14,590 INFO L273 TraceCheckUtils]: 7: Hoare triple {581#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {588#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:14,591 INFO L273 TraceCheckUtils]: 8: Hoare triple {588#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {592#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:14,592 INFO L273 TraceCheckUtils]: 9: Hoare triple {592#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:14,592 INFO L273 TraceCheckUtils]: 10: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:14,593 INFO L273 TraceCheckUtils]: 11: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:14,594 INFO L273 TraceCheckUtils]: 12: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:14,595 INFO L273 TraceCheckUtils]: 13: Hoare triple {596#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:14,597 INFO L273 TraceCheckUtils]: 14: Hoare triple {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume true; {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:14,598 INFO L273 TraceCheckUtils]: 15: Hoare triple {609#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {616#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0))) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:14,601 INFO L256 TraceCheckUtils]: 16: Hoare triple {616#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0))) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {620#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 16:46:14,602 INFO L273 TraceCheckUtils]: 17: Hoare triple {620#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {624#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 16:46:14,603 INFO L273 TraceCheckUtils]: 18: Hoare triple {624#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {561#false} is VALID [2018-11-14 16:46:14,603 INFO L273 TraceCheckUtils]: 19: Hoare triple {561#false} assume !false; {561#false} is VALID [2018-11-14 16:46:14,606 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:14,606 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:46:15,378 INFO L273 TraceCheckUtils]: 19: Hoare triple {561#false} assume !false; {561#false} is VALID [2018-11-14 16:46:15,379 INFO L273 TraceCheckUtils]: 18: Hoare triple {634#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {561#false} is VALID [2018-11-14 16:46:15,380 INFO L273 TraceCheckUtils]: 17: Hoare triple {638#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {634#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 16:46:15,381 INFO L256 TraceCheckUtils]: 16: Hoare triple {642#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {638#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 16:46:15,382 INFO L273 TraceCheckUtils]: 15: Hoare triple {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {642#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,382 INFO L273 TraceCheckUtils]: 14: Hoare triple {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume true; {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,384 INFO L273 TraceCheckUtils]: 13: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {646#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,385 INFO L273 TraceCheckUtils]: 12: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,386 INFO L273 TraceCheckUtils]: 11: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,386 INFO L273 TraceCheckUtils]: 10: Hoare triple {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume true; {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,419 INFO L273 TraceCheckUtils]: 9: Hoare triple {666#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {653#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,421 INFO L273 TraceCheckUtils]: 8: Hoare triple {670#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {666#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,422 INFO L273 TraceCheckUtils]: 7: Hoare triple {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {670#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:15,423 INFO L273 TraceCheckUtils]: 6: Hoare triple {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:15,425 INFO L273 TraceCheckUtils]: 5: Hoare triple {577#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {674#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:15,425 INFO L273 TraceCheckUtils]: 4: Hoare triple {560#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {577#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 16:46:15,425 INFO L256 TraceCheckUtils]: 3: Hoare triple {560#true} call #t~ret4 := main(); {560#true} is VALID [2018-11-14 16:46:15,426 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {560#true} {560#true} #43#return; {560#true} is VALID [2018-11-14 16:46:15,426 INFO L273 TraceCheckUtils]: 1: Hoare triple {560#true} assume true; {560#true} is VALID [2018-11-14 16:46:15,426 INFO L256 TraceCheckUtils]: 0: Hoare triple {560#true} call ULTIMATE.init(); {560#true} is VALID [2018-11-14 16:46:15,429 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:15,431 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:46:15,431 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-14 16:46:15,431 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 20 [2018-11-14 16:46:15,432 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:46:15,432 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 16:46:15,670 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:15,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 16:46:15,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 16:46:15,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=278, Unknown=0, NotChecked=0, Total=342 [2018-11-14 16:46:15,671 INFO L87 Difference]: Start difference. First operand 29 states and 32 transitions. Second operand 19 states. [2018-11-14 16:46:16,726 WARN L179 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-14 16:46:17,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:17,325 INFO L93 Difference]: Finished difference Result 52 states and 58 transitions. [2018-11-14 16:46:17,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-14 16:46:17,325 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 20 [2018-11-14 16:46:17,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:46:17,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 16:46:17,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 50 transitions. [2018-11-14 16:46:17,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 16:46:17,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 50 transitions. [2018-11-14 16:46:17,332 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 50 transitions. [2018-11-14 16:46:17,477 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:17,479 INFO L225 Difference]: With dead ends: 52 [2018-11-14 16:46:17,480 INFO L226 Difference]: Without dead ends: 36 [2018-11-14 16:46:17,481 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=126, Invalid=524, Unknown=0, NotChecked=0, Total=650 [2018-11-14 16:46:17,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-11-14 16:46:17,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2018-11-14 16:46:17,510 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:46:17,510 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand 33 states. [2018-11-14 16:46:17,511 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand 33 states. [2018-11-14 16:46:17,511 INFO L87 Difference]: Start difference. First operand 36 states. Second operand 33 states. [2018-11-14 16:46:17,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:17,515 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2018-11-14 16:46:17,515 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-11-14 16:46:17,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:17,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:17,516 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 36 states. [2018-11-14 16:46:17,516 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 36 states. [2018-11-14 16:46:17,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:17,519 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2018-11-14 16:46:17,519 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-11-14 16:46:17,520 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:17,520 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:17,520 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:46:17,520 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:46:17,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-14 16:46:17,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2018-11-14 16:46:17,523 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 35 transitions. Word has length 20 [2018-11-14 16:46:17,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:46:17,523 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 35 transitions. [2018-11-14 16:46:17,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 16:46:17,523 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 35 transitions. [2018-11-14 16:46:17,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-14 16:46:17,524 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:17,525 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:17,525 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:17,525 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:17,525 INFO L82 PathProgramCache]: Analyzing trace with hash 1335055195, now seen corresponding path program 2 times [2018-11-14 16:46:17,526 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:17,526 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:17,543 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 16:46:17,599 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 16:46:17,599 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 16:46:17,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:17,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:18,208 INFO L256 TraceCheckUtils]: 0: Hoare triple {901#true} call ULTIMATE.init(); {901#true} is VALID [2018-11-14 16:46:18,208 INFO L273 TraceCheckUtils]: 1: Hoare triple {901#true} assume true; {901#true} is VALID [2018-11-14 16:46:18,208 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {901#true} {901#true} #43#return; {901#true} is VALID [2018-11-14 16:46:18,209 INFO L256 TraceCheckUtils]: 3: Hoare triple {901#true} call #t~ret4 := main(); {901#true} is VALID [2018-11-14 16:46:18,209 INFO L273 TraceCheckUtils]: 4: Hoare triple {901#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {901#true} is VALID [2018-11-14 16:46:18,209 INFO L273 TraceCheckUtils]: 5: Hoare triple {901#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,210 INFO L273 TraceCheckUtils]: 6: Hoare triple {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,211 INFO L273 TraceCheckUtils]: 7: Hoare triple {921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,211 INFO L273 TraceCheckUtils]: 8: Hoare triple {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,212 INFO L273 TraceCheckUtils]: 9: Hoare triple {928#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:18,217 INFO L273 TraceCheckUtils]: 10: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:18,218 INFO L273 TraceCheckUtils]: 11: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:18,218 INFO L273 TraceCheckUtils]: 12: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:18,220 INFO L273 TraceCheckUtils]: 13: Hoare triple {935#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:18,220 INFO L273 TraceCheckUtils]: 14: Hoare triple {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume true; {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:18,221 INFO L273 TraceCheckUtils]: 15: Hoare triple {948#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:18,222 INFO L273 TraceCheckUtils]: 16: Hoare triple {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:18,222 INFO L273 TraceCheckUtils]: 17: Hoare triple {955#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,223 INFO L273 TraceCheckUtils]: 18: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,224 INFO L273 TraceCheckUtils]: 19: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,225 INFO L273 TraceCheckUtils]: 20: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,226 INFO L273 TraceCheckUtils]: 21: Hoare triple {962#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,227 INFO L273 TraceCheckUtils]: 22: Hoare triple {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,228 INFO L273 TraceCheckUtils]: 23: Hoare triple {975#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,229 INFO L273 TraceCheckUtils]: 24: Hoare triple {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:18,231 INFO L273 TraceCheckUtils]: 25: Hoare triple {982#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:18,247 INFO L273 TraceCheckUtils]: 26: Hoare triple {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:18,249 INFO L273 TraceCheckUtils]: 27: Hoare triple {989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {902#false} is VALID [2018-11-14 16:46:18,249 INFO L256 TraceCheckUtils]: 28: Hoare triple {902#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {902#false} is VALID [2018-11-14 16:46:18,249 INFO L273 TraceCheckUtils]: 29: Hoare triple {902#false} ~cond := #in~cond; {902#false} is VALID [2018-11-14 16:46:18,250 INFO L273 TraceCheckUtils]: 30: Hoare triple {902#false} assume ~cond == 0bv32; {902#false} is VALID [2018-11-14 16:46:18,250 INFO L273 TraceCheckUtils]: 31: Hoare triple {902#false} assume !false; {902#false} is VALID [2018-11-14 16:46:18,255 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:18,255 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:46:19,307 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 14 [2018-11-14 16:46:19,342 INFO L273 TraceCheckUtils]: 31: Hoare triple {902#false} assume !false; {902#false} is VALID [2018-11-14 16:46:19,343 INFO L273 TraceCheckUtils]: 30: Hoare triple {902#false} assume ~cond == 0bv32; {902#false} is VALID [2018-11-14 16:46:19,343 INFO L273 TraceCheckUtils]: 29: Hoare triple {902#false} ~cond := #in~cond; {902#false} is VALID [2018-11-14 16:46:19,344 INFO L256 TraceCheckUtils]: 28: Hoare triple {902#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {902#false} is VALID [2018-11-14 16:46:19,347 INFO L273 TraceCheckUtils]: 27: Hoare triple {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {902#false} is VALID [2018-11-14 16:46:19,347 INFO L273 TraceCheckUtils]: 26: Hoare triple {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume true; {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:19,349 INFO L273 TraceCheckUtils]: 25: Hoare triple {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1020#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:19,349 INFO L273 TraceCheckUtils]: 24: Hoare triple {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:19,350 INFO L273 TraceCheckUtils]: 23: Hoare triple {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1027#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:46:19,350 INFO L273 TraceCheckUtils]: 22: Hoare triple {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,382 INFO L273 TraceCheckUtils]: 21: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1034#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,383 INFO L273 TraceCheckUtils]: 20: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:19,384 INFO L273 TraceCheckUtils]: 19: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:19,384 INFO L273 TraceCheckUtils]: 18: Hoare triple {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:19,429 INFO L273 TraceCheckUtils]: 17: Hoare triple {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1041#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:19,430 INFO L273 TraceCheckUtils]: 16: Hoare triple {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:19,431 INFO L273 TraceCheckUtils]: 15: Hoare triple {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1054#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:19,431 INFO L273 TraceCheckUtils]: 14: Hoare triple {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,487 INFO L273 TraceCheckUtils]: 13: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1061#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,487 INFO L273 TraceCheckUtils]: 12: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,489 INFO L273 TraceCheckUtils]: 11: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,490 INFO L273 TraceCheckUtils]: 10: Hoare triple {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,569 INFO L273 TraceCheckUtils]: 9: Hoare triple {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1068#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,570 INFO L273 TraceCheckUtils]: 8: Hoare triple {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,570 INFO L273 TraceCheckUtils]: 7: Hoare triple {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1081#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,571 INFO L273 TraceCheckUtils]: 6: Hoare triple {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,572 INFO L273 TraceCheckUtils]: 5: Hoare triple {901#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1088#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:19,572 INFO L273 TraceCheckUtils]: 4: Hoare triple {901#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {901#true} is VALID [2018-11-14 16:46:19,573 INFO L256 TraceCheckUtils]: 3: Hoare triple {901#true} call #t~ret4 := main(); {901#true} is VALID [2018-11-14 16:46:19,573 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {901#true} {901#true} #43#return; {901#true} is VALID [2018-11-14 16:46:19,573 INFO L273 TraceCheckUtils]: 1: Hoare triple {901#true} assume true; {901#true} is VALID [2018-11-14 16:46:19,573 INFO L256 TraceCheckUtils]: 0: Hoare triple {901#true} call ULTIMATE.init(); {901#true} is VALID [2018-11-14 16:46:19,578 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:19,579 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:46:19,580 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-14 16:46:19,580 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-14 16:46:19,581 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:46:19,581 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-14 16:46:19,872 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:19,873 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-14 16:46:19,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-14 16:46:19,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2018-11-14 16:46:19,874 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. Second operand 20 states. [2018-11-14 16:46:21,756 WARN L179 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 24 [2018-11-14 16:46:22,613 WARN L179 SmtUtils]: Spent 557.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 25 [2018-11-14 16:46:23,161 WARN L179 SmtUtils]: Spent 282.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 15 [2018-11-14 16:46:23,476 WARN L179 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 21 [2018-11-14 16:46:23,891 WARN L179 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 15 [2018-11-14 16:46:24,946 WARN L179 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 12 [2018-11-14 16:46:25,535 WARN L179 SmtUtils]: Spent 293.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 24 [2018-11-14 16:46:26,012 WARN L179 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 20 [2018-11-14 16:46:26,442 WARN L179 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 16 [2018-11-14 16:46:26,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:26,630 INFO L93 Difference]: Finished difference Result 81 states and 96 transitions. [2018-11-14 16:46:26,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-14 16:46:26,631 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-11-14 16:46:26,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:46:26,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 16:46:26,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2018-11-14 16:46:26,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 16:46:26,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 85 transitions. [2018-11-14 16:46:26,638 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 85 transitions. [2018-11-14 16:46:28,310 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:28,313 INFO L225 Difference]: With dead ends: 81 [2018-11-14 16:46:28,313 INFO L226 Difference]: Without dead ends: 65 [2018-11-14 16:46:28,314 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=237, Invalid=755, Unknown=0, NotChecked=0, Total=992 [2018-11-14 16:46:28,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-11-14 16:46:28,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 61. [2018-11-14 16:46:28,533 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:46:28,533 INFO L82 GeneralOperation]: Start isEquivalent. First operand 65 states. Second operand 61 states. [2018-11-14 16:46:28,533 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand 61 states. [2018-11-14 16:46:28,533 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 61 states. [2018-11-14 16:46:28,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:28,536 INFO L93 Difference]: Finished difference Result 65 states and 72 transitions. [2018-11-14 16:46:28,537 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 72 transitions. [2018-11-14 16:46:28,537 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:28,538 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:28,538 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 65 states. [2018-11-14 16:46:28,538 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 65 states. [2018-11-14 16:46:28,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:28,541 INFO L93 Difference]: Finished difference Result 65 states and 72 transitions. [2018-11-14 16:46:28,541 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 72 transitions. [2018-11-14 16:46:28,542 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:28,542 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:28,543 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:46:28,543 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:46:28,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-14 16:46:28,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 68 transitions. [2018-11-14 16:46:28,546 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 68 transitions. Word has length 32 [2018-11-14 16:46:28,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:46:28,546 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 68 transitions. [2018-11-14 16:46:28,546 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-14 16:46:28,547 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2018-11-14 16:46:28,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-14 16:46:28,548 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:28,548 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:28,548 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:28,549 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:28,549 INFO L82 PathProgramCache]: Analyzing trace with hash 1794670498, now seen corresponding path program 3 times [2018-11-14 16:46:28,549 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:28,549 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:28,569 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 16:46:28,800 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-11-14 16:46:28,800 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 16:46:28,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:28,827 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:29,746 INFO L256 TraceCheckUtils]: 0: Hoare triple {1454#true} call ULTIMATE.init(); {1454#true} is VALID [2018-11-14 16:46:29,747 INFO L273 TraceCheckUtils]: 1: Hoare triple {1454#true} assume true; {1454#true} is VALID [2018-11-14 16:46:29,747 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1454#true} {1454#true} #43#return; {1454#true} is VALID [2018-11-14 16:46:29,747 INFO L256 TraceCheckUtils]: 3: Hoare triple {1454#true} call #t~ret4 := main(); {1454#true} is VALID [2018-11-14 16:46:29,748 INFO L273 TraceCheckUtils]: 4: Hoare triple {1454#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1471#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 16:46:29,748 INFO L273 TraceCheckUtils]: 5: Hoare triple {1471#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,749 INFO L273 TraceCheckUtils]: 6: Hoare triple {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,750 INFO L273 TraceCheckUtils]: 7: Hoare triple {1475#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1482#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,751 INFO L273 TraceCheckUtils]: 8: Hoare triple {1482#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1486#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,753 INFO L273 TraceCheckUtils]: 9: Hoare triple {1486#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,754 INFO L273 TraceCheckUtils]: 10: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,755 INFO L273 TraceCheckUtils]: 11: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,756 INFO L273 TraceCheckUtils]: 12: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,758 INFO L273 TraceCheckUtils]: 13: Hoare triple {1490#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:29,759 INFO L273 TraceCheckUtils]: 14: Hoare triple {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume true; {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:29,762 INFO L273 TraceCheckUtils]: 15: Hoare triple {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:29,764 INFO L273 TraceCheckUtils]: 16: Hoare triple {1503#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1513#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:29,766 INFO L273 TraceCheckUtils]: 17: Hoare triple {1513#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,767 INFO L273 TraceCheckUtils]: 18: Hoare triple {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,768 INFO L273 TraceCheckUtils]: 19: Hoare triple {1517#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,769 INFO L273 TraceCheckUtils]: 20: Hoare triple {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:29,771 INFO L273 TraceCheckUtils]: 21: Hoare triple {1524#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:29,772 INFO L273 TraceCheckUtils]: 22: Hoare triple {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:29,773 INFO L273 TraceCheckUtils]: 23: Hoare triple {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:29,775 INFO L273 TraceCheckUtils]: 24: Hoare triple {1531#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1541#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:29,778 INFO L273 TraceCheckUtils]: 25: Hoare triple {1541#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,779 INFO L273 TraceCheckUtils]: 26: Hoare triple {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,781 INFO L273 TraceCheckUtils]: 27: Hoare triple {1545#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,782 INFO L273 TraceCheckUtils]: 28: Hoare triple {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:29,784 INFO L273 TraceCheckUtils]: 29: Hoare triple {1552#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:29,785 INFO L273 TraceCheckUtils]: 30: Hoare triple {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:29,786 INFO L273 TraceCheckUtils]: 31: Hoare triple {1559#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1566#(and (bvslt (_ bv5 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:29,788 INFO L256 TraceCheckUtils]: 32: Hoare triple {1566#(and (bvslt (_ bv5 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0))))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1570#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 16:46:29,791 INFO L273 TraceCheckUtils]: 33: Hoare triple {1570#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1574#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 16:46:29,791 INFO L273 TraceCheckUtils]: 34: Hoare triple {1574#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume ~cond == 0bv32; {1455#false} is VALID [2018-11-14 16:46:29,792 INFO L273 TraceCheckUtils]: 35: Hoare triple {1455#false} assume !false; {1455#false} is VALID [2018-11-14 16:46:29,796 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:29,796 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:46:32,748 WARN L179 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 20 [2018-11-14 16:46:32,820 INFO L273 TraceCheckUtils]: 35: Hoare triple {1455#false} assume !false; {1455#false} is VALID [2018-11-14 16:46:32,821 INFO L273 TraceCheckUtils]: 34: Hoare triple {1584#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume ~cond == 0bv32; {1455#false} is VALID [2018-11-14 16:46:32,822 INFO L273 TraceCheckUtils]: 33: Hoare triple {1588#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1584#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-14 16:46:32,823 INFO L256 TraceCheckUtils]: 32: Hoare triple {1592#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1588#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-14 16:46:32,824 INFO L273 TraceCheckUtils]: 31: Hoare triple {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1592#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,825 INFO L273 TraceCheckUtils]: 30: Hoare triple {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume true; {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,830 INFO L273 TraceCheckUtils]: 29: Hoare triple {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1596#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,831 INFO L273 TraceCheckUtils]: 28: Hoare triple {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,837 INFO L273 TraceCheckUtils]: 27: Hoare triple {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1603#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,838 INFO L273 TraceCheckUtils]: 26: Hoare triple {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:32,858 INFO L273 TraceCheckUtils]: 25: Hoare triple {1617#(or (= main_~n~0 main_~k~0) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1610#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:32,859 INFO L273 TraceCheckUtils]: 24: Hoare triple {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1617#(or (= main_~n~0 main_~k~0) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,860 INFO L273 TraceCheckUtils]: 23: Hoare triple {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,860 INFO L273 TraceCheckUtils]: 22: Hoare triple {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume true; {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,899 INFO L273 TraceCheckUtils]: 21: Hoare triple {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1621#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,900 INFO L273 TraceCheckUtils]: 20: Hoare triple {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,900 INFO L273 TraceCheckUtils]: 19: Hoare triple {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1631#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,901 INFO L273 TraceCheckUtils]: 18: Hoare triple {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:32,958 INFO L273 TraceCheckUtils]: 17: Hoare triple {1645#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1638#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:32,986 INFO L273 TraceCheckUtils]: 16: Hoare triple {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1645#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,987 INFO L273 TraceCheckUtils]: 15: Hoare triple {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:32,987 INFO L273 TraceCheckUtils]: 14: Hoare triple {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume true; {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:33,066 INFO L273 TraceCheckUtils]: 13: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1649#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-14 16:46:33,067 INFO L273 TraceCheckUtils]: 12: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,067 INFO L273 TraceCheckUtils]: 11: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,067 INFO L273 TraceCheckUtils]: 10: Hoare triple {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,150 INFO L273 TraceCheckUtils]: 9: Hoare triple {1672#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1659#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,177 INFO L273 TraceCheckUtils]: 8: Hoare triple {1676#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1672#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,178 INFO L273 TraceCheckUtils]: 7: Hoare triple {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1676#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,178 INFO L273 TraceCheckUtils]: 6: Hoare triple {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,180 INFO L273 TraceCheckUtils]: 5: Hoare triple {1471#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1680#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:46:33,180 INFO L273 TraceCheckUtils]: 4: Hoare triple {1454#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1471#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-14 16:46:33,181 INFO L256 TraceCheckUtils]: 3: Hoare triple {1454#true} call #t~ret4 := main(); {1454#true} is VALID [2018-11-14 16:46:33,181 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1454#true} {1454#true} #43#return; {1454#true} is VALID [2018-11-14 16:46:33,182 INFO L273 TraceCheckUtils]: 1: Hoare triple {1454#true} assume true; {1454#true} is VALID [2018-11-14 16:46:33,182 INFO L256 TraceCheckUtils]: 0: Hoare triple {1454#true} call ULTIMATE.init(); {1454#true} is VALID [2018-11-14 16:46:33,188 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:33,191 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:46:33,192 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 35 [2018-11-14 16:46:33,192 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 36 [2018-11-14 16:46:33,193 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:46:33,193 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 35 states. [2018-11-14 16:46:33,674 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:33,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-11-14 16:46:33,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-11-14 16:46:33,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-11-14 16:46:33,675 INFO L87 Difference]: Start difference. First operand 61 states and 68 transitions. Second operand 35 states. [2018-11-14 16:46:34,577 WARN L179 SmtUtils]: Spent 286.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-11-14 16:46:37,315 WARN L179 SmtUtils]: Spent 275.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-14 16:46:38,044 WARN L179 SmtUtils]: Spent 252.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-14 16:46:38,755 WARN L179 SmtUtils]: Spent 212.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-14 16:46:39,261 WARN L179 SmtUtils]: Spent 198.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-14 16:46:40,161 WARN L179 SmtUtils]: Spent 540.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2018-11-14 16:46:40,554 WARN L179 SmtUtils]: Spent 180.00 ms on a formula simplification that was a NOOP. DAG size: 35 [2018-11-14 16:46:41,257 WARN L179 SmtUtils]: Spent 252.00 ms on a formula simplification that was a NOOP. DAG size: 41 [2018-11-14 16:46:41,687 WARN L179 SmtUtils]: Spent 155.00 ms on a formula simplification that was a NOOP. DAG size: 35 [2018-11-14 16:46:42,530 WARN L179 SmtUtils]: Spent 519.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 39 [2018-11-14 16:46:43,471 WARN L179 SmtUtils]: Spent 458.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 40 [2018-11-14 16:46:43,921 WARN L179 SmtUtils]: Spent 178.00 ms on a formula simplification that was a NOOP. DAG size: 39 [2018-11-14 16:46:44,439 WARN L179 SmtUtils]: Spent 158.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-14 16:46:44,915 WARN L179 SmtUtils]: Spent 153.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-14 16:46:45,455 WARN L179 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-14 16:46:45,864 WARN L179 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-14 16:46:46,886 WARN L179 SmtUtils]: Spent 428.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 35 [2018-11-14 16:46:47,281 WARN L179 SmtUtils]: Spent 159.00 ms on a formula simplification that was a NOOP. DAG size: 37 [2018-11-14 16:46:47,758 WARN L179 SmtUtils]: Spent 133.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-14 16:46:48,225 WARN L179 SmtUtils]: Spent 134.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-14 16:46:49,103 WARN L179 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 32 [2018-11-14 16:46:50,128 WARN L179 SmtUtils]: Spent 400.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 34 [2018-11-14 16:46:50,530 WARN L179 SmtUtils]: Spent 145.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-14 16:46:51,657 WARN L179 SmtUtils]: Spent 635.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 47 [2018-11-14 16:46:51,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:51,870 INFO L93 Difference]: Finished difference Result 127 states and 149 transitions. [2018-11-14 16:46:51,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-14 16:46:51,870 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 36 [2018-11-14 16:46:51,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:46:51,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-14 16:46:51,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 93 transitions. [2018-11-14 16:46:51,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-14 16:46:51,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 93 transitions. [2018-11-14 16:46:51,877 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 43 states and 93 transitions. [2018-11-14 16:46:58,159 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 93 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:46:58,162 INFO L225 Difference]: With dead ends: 127 [2018-11-14 16:46:58,162 INFO L226 Difference]: Without dead ends: 95 [2018-11-14 16:46:58,165 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 14.2s TimeCoverageRelationStatistics Valid=784, Invalid=2998, Unknown=0, NotChecked=0, Total=3782 [2018-11-14 16:46:58,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-11-14 16:46:58,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 65. [2018-11-14 16:46:58,306 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:46:58,306 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand 65 states. [2018-11-14 16:46:58,307 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand 65 states. [2018-11-14 16:46:58,307 INFO L87 Difference]: Start difference. First operand 95 states. Second operand 65 states. [2018-11-14 16:46:58,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:58,311 INFO L93 Difference]: Finished difference Result 95 states and 107 transitions. [2018-11-14 16:46:58,311 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 107 transitions. [2018-11-14 16:46:58,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:58,312 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:58,312 INFO L74 IsIncluded]: Start isIncluded. First operand 65 states. Second operand 95 states. [2018-11-14 16:46:58,312 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 95 states. [2018-11-14 16:46:58,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:46:58,316 INFO L93 Difference]: Finished difference Result 95 states and 107 transitions. [2018-11-14 16:46:58,316 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 107 transitions. [2018-11-14 16:46:58,317 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:46:58,317 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:46:58,317 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:46:58,317 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:46:58,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-11-14 16:46:58,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 71 transitions. [2018-11-14 16:46:58,320 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 71 transitions. Word has length 36 [2018-11-14 16:46:58,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:46:58,320 INFO L480 AbstractCegarLoop]: Abstraction has 65 states and 71 transitions. [2018-11-14 16:46:58,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-11-14 16:46:58,320 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 71 transitions. [2018-11-14 16:46:58,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-14 16:46:58,322 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:46:58,322 INFO L375 BasicCegarLoop]: trace histogram [14, 13, 13, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:46:58,322 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:46:58,322 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:46:58,323 INFO L82 PathProgramCache]: Analyzing trace with hash -744286565, now seen corresponding path program 4 times [2018-11-14 16:46:58,323 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:46:58,323 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:46:58,348 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 16:46:58,426 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 16:46:58,427 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 16:46:58,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:46:58,462 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:46:59,310 INFO L256 TraceCheckUtils]: 0: Hoare triple {2199#true} call ULTIMATE.init(); {2199#true} is VALID [2018-11-14 16:46:59,310 INFO L273 TraceCheckUtils]: 1: Hoare triple {2199#true} assume true; {2199#true} is VALID [2018-11-14 16:46:59,310 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2199#true} {2199#true} #43#return; {2199#true} is VALID [2018-11-14 16:46:59,311 INFO L256 TraceCheckUtils]: 3: Hoare triple {2199#true} call #t~ret4 := main(); {2199#true} is VALID [2018-11-14 16:46:59,311 INFO L273 TraceCheckUtils]: 4: Hoare triple {2199#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {2199#true} is VALID [2018-11-14 16:46:59,312 INFO L273 TraceCheckUtils]: 5: Hoare triple {2199#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,312 INFO L273 TraceCheckUtils]: 6: Hoare triple {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,313 INFO L273 TraceCheckUtils]: 7: Hoare triple {2219#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,313 INFO L273 TraceCheckUtils]: 8: Hoare triple {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,314 INFO L273 TraceCheckUtils]: 9: Hoare triple {2226#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,315 INFO L273 TraceCheckUtils]: 10: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,315 INFO L273 TraceCheckUtils]: 11: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,316 INFO L273 TraceCheckUtils]: 12: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,317 INFO L273 TraceCheckUtils]: 13: Hoare triple {2233#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:59,318 INFO L273 TraceCheckUtils]: 14: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume true; {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:59,319 INFO L273 TraceCheckUtils]: 15: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:59,320 INFO L273 TraceCheckUtils]: 16: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-14 16:46:59,321 INFO L273 TraceCheckUtils]: 17: Hoare triple {2246#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,324 INFO L273 TraceCheckUtils]: 18: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,324 INFO L273 TraceCheckUtils]: 19: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,325 INFO L273 TraceCheckUtils]: 20: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,325 INFO L273 TraceCheckUtils]: 21: Hoare triple {2259#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,327 INFO L273 TraceCheckUtils]: 22: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,329 INFO L273 TraceCheckUtils]: 23: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,333 INFO L273 TraceCheckUtils]: 24: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,335 INFO L273 TraceCheckUtils]: 25: Hoare triple {2272#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,335 INFO L273 TraceCheckUtils]: 26: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,336 INFO L273 TraceCheckUtils]: 27: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,336 INFO L273 TraceCheckUtils]: 28: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 16:46:59,337 INFO L273 TraceCheckUtils]: 29: Hoare triple {2285#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,338 INFO L273 TraceCheckUtils]: 30: Hoare triple {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,338 INFO L273 TraceCheckUtils]: 31: Hoare triple {2298#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,339 INFO L273 TraceCheckUtils]: 32: Hoare triple {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,340 INFO L273 TraceCheckUtils]: 33: Hoare triple {2305#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,341 INFO L273 TraceCheckUtils]: 34: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,342 INFO L273 TraceCheckUtils]: 35: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,343 INFO L273 TraceCheckUtils]: 36: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,344 INFO L273 TraceCheckUtils]: 37: Hoare triple {2312#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,345 INFO L273 TraceCheckUtils]: 38: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,346 INFO L273 TraceCheckUtils]: 39: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,346 INFO L273 TraceCheckUtils]: 40: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,347 INFO L273 TraceCheckUtils]: 41: Hoare triple {2325#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,348 INFO L273 TraceCheckUtils]: 42: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume true; {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,349 INFO L273 TraceCheckUtils]: 43: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,349 INFO L273 TraceCheckUtils]: 44: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-14 16:46:59,350 INFO L273 TraceCheckUtils]: 45: Hoare triple {2338#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 16:46:59,357 INFO L273 TraceCheckUtils]: 46: Hoare triple {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume true; {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 16:46:59,358 INFO L273 TraceCheckUtils]: 47: Hoare triple {2351#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 16:46:59,359 INFO L273 TraceCheckUtils]: 48: Hoare triple {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-14 16:46:59,359 INFO L273 TraceCheckUtils]: 49: Hoare triple {2358#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,360 INFO L273 TraceCheckUtils]: 50: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,361 INFO L273 TraceCheckUtils]: 51: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,361 INFO L273 TraceCheckUtils]: 52: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,362 INFO L273 TraceCheckUtils]: 53: Hoare triple {2365#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,363 INFO L273 TraceCheckUtils]: 54: Hoare triple {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,364 INFO L273 TraceCheckUtils]: 55: Hoare triple {2378#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-14 16:46:59,365 INFO L273 TraceCheckUtils]: 56: Hoare triple {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-14 16:46:59,368 INFO L273 TraceCheckUtils]: 57: Hoare triple {2385#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,369 INFO L273 TraceCheckUtils]: 58: Hoare triple {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:46:59,370 INFO L273 TraceCheckUtils]: 59: Hoare triple {2392#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2200#false} is VALID [2018-11-14 16:46:59,371 INFO L256 TraceCheckUtils]: 60: Hoare triple {2200#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {2200#false} is VALID [2018-11-14 16:46:59,371 INFO L273 TraceCheckUtils]: 61: Hoare triple {2200#false} ~cond := #in~cond; {2200#false} is VALID [2018-11-14 16:46:59,371 INFO L273 TraceCheckUtils]: 62: Hoare triple {2200#false} assume ~cond == 0bv32; {2200#false} is VALID [2018-11-14 16:46:59,371 INFO L273 TraceCheckUtils]: 63: Hoare triple {2200#false} assume !false; {2200#false} is VALID [2018-11-14 16:46:59,384 INFO L134 CoverageAnalysis]: Checked inductivity of 338 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:46:59,384 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:47:01,117 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-14 16:47:03,069 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-14 16:47:03,089 INFO L273 TraceCheckUtils]: 63: Hoare triple {2200#false} assume !false; {2200#false} is VALID [2018-11-14 16:47:03,089 INFO L273 TraceCheckUtils]: 62: Hoare triple {2200#false} assume ~cond == 0bv32; {2200#false} is VALID [2018-11-14 16:47:03,089 INFO L273 TraceCheckUtils]: 61: Hoare triple {2200#false} ~cond := #in~cond; {2200#false} is VALID [2018-11-14 16:47:03,090 INFO L256 TraceCheckUtils]: 60: Hoare triple {2200#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {2200#false} is VALID [2018-11-14 16:47:03,090 INFO L273 TraceCheckUtils]: 59: Hoare triple {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2200#false} is VALID [2018-11-14 16:47:03,090 INFO L273 TraceCheckUtils]: 58: Hoare triple {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume true; {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:47:03,092 INFO L273 TraceCheckUtils]: 57: Hoare triple {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2423#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:47:03,093 INFO L273 TraceCheckUtils]: 56: Hoare triple {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:47:03,093 INFO L273 TraceCheckUtils]: 55: Hoare triple {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2430#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-14 16:47:03,094 INFO L273 TraceCheckUtils]: 54: Hoare triple {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,112 INFO L273 TraceCheckUtils]: 53: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2437#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,112 INFO L273 TraceCheckUtils]: 52: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,113 INFO L273 TraceCheckUtils]: 51: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,113 INFO L273 TraceCheckUtils]: 50: Hoare triple {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,171 INFO L273 TraceCheckUtils]: 49: Hoare triple {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2444#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,171 INFO L273 TraceCheckUtils]: 48: Hoare triple {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,172 INFO L273 TraceCheckUtils]: 47: Hoare triple {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2457#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,172 INFO L273 TraceCheckUtils]: 46: Hoare triple {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,248 INFO L273 TraceCheckUtils]: 45: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2464#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,248 INFO L273 TraceCheckUtils]: 44: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,249 INFO L273 TraceCheckUtils]: 43: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,249 INFO L273 TraceCheckUtils]: 42: Hoare triple {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,321 INFO L273 TraceCheckUtils]: 41: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2471#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,322 INFO L273 TraceCheckUtils]: 40: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,322 INFO L273 TraceCheckUtils]: 39: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,323 INFO L273 TraceCheckUtils]: 38: Hoare triple {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,391 INFO L273 TraceCheckUtils]: 37: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2484#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,392 INFO L273 TraceCheckUtils]: 36: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,392 INFO L273 TraceCheckUtils]: 35: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,393 INFO L273 TraceCheckUtils]: 34: Hoare triple {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,499 INFO L273 TraceCheckUtils]: 33: Hoare triple {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2497#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,500 INFO L273 TraceCheckUtils]: 32: Hoare triple {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,500 INFO L273 TraceCheckUtils]: 31: Hoare triple {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2510#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,501 INFO L273 TraceCheckUtils]: 30: Hoare triple {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,554 INFO L273 TraceCheckUtils]: 29: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2517#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,554 INFO L273 TraceCheckUtils]: 28: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,555 INFO L273 TraceCheckUtils]: 27: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,555 INFO L273 TraceCheckUtils]: 26: Hoare triple {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,647 INFO L273 TraceCheckUtils]: 25: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2524#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,648 INFO L273 TraceCheckUtils]: 24: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,648 INFO L273 TraceCheckUtils]: 23: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,649 INFO L273 TraceCheckUtils]: 22: Hoare triple {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,706 INFO L273 TraceCheckUtils]: 21: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2537#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,707 INFO L273 TraceCheckUtils]: 20: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,708 INFO L273 TraceCheckUtils]: 19: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,708 INFO L273 TraceCheckUtils]: 18: Hoare triple {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume true; {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,820 INFO L273 TraceCheckUtils]: 17: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2550#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-14 16:47:03,821 INFO L273 TraceCheckUtils]: 16: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,821 INFO L273 TraceCheckUtils]: 15: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,822 INFO L273 TraceCheckUtils]: 14: Hoare triple {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,949 INFO L273 TraceCheckUtils]: 13: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2563#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,950 INFO L273 TraceCheckUtils]: 12: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(~bvsrem32(~i~0, 2bv32) == 0bv32); {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,950 INFO L273 TraceCheckUtils]: 11: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:03,951 INFO L273 TraceCheckUtils]: 10: Hoare triple {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume true; {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:04,076 INFO L273 TraceCheckUtils]: 9: Hoare triple {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2576#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:04,077 INFO L273 TraceCheckUtils]: 8: Hoare triple {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} assume ~bvsrem32(~i~0, 2bv32) == 0bv32;#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:04,078 INFO L273 TraceCheckUtils]: 7: Hoare triple {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2589#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:04,078 INFO L273 TraceCheckUtils]: 6: Hoare triple {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume true; {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:04,080 INFO L273 TraceCheckUtils]: 5: Hoare triple {2199#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {2596#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-14 16:47:04,080 INFO L273 TraceCheckUtils]: 4: Hoare triple {2199#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {2199#true} is VALID [2018-11-14 16:47:04,080 INFO L256 TraceCheckUtils]: 3: Hoare triple {2199#true} call #t~ret4 := main(); {2199#true} is VALID [2018-11-14 16:47:04,081 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2199#true} {2199#true} #43#return; {2199#true} is VALID [2018-11-14 16:47:04,081 INFO L273 TraceCheckUtils]: 1: Hoare triple {2199#true} assume true; {2199#true} is VALID [2018-11-14 16:47:04,081 INFO L256 TraceCheckUtils]: 0: Hoare triple {2199#true} call ULTIMATE.init(); {2199#true} is VALID [2018-11-14 16:47:04,094 INFO L134 CoverageAnalysis]: Checked inductivity of 338 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:47:04,097 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:47:04,097 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 38 [2018-11-14 16:47:04,099 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 64 [2018-11-14 16:47:04,100 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:47:04,100 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 38 states. [2018-11-14 16:47:05,265 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:47:05,266 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-14 16:47:05,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-14 16:47:05,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=245, Invalid=1161, Unknown=0, NotChecked=0, Total=1406 [2018-11-14 16:47:05,267 INFO L87 Difference]: Start difference. First operand 65 states and 71 transitions. Second operand 38 states. [2018-11-14 16:47:06,432 WARN L179 SmtUtils]: Spent 358.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-11-14 16:47:12,928 WARN L179 SmtUtils]: Spent 906.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 56 [2018-11-14 16:47:14,918 WARN L179 SmtUtils]: Spent 1.21 s on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-11-14 16:47:17,012 WARN L179 SmtUtils]: Spent 1.10 s on a formula simplification. DAG size of input: 68 DAG size of output: 27 [2018-11-14 16:47:18,933 WARN L179 SmtUtils]: Spent 799.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 53 [2018-11-14 16:47:21,179 WARN L179 SmtUtils]: Spent 1.03 s on a formula simplification. DAG size of input: 63 DAG size of output: 27 [2018-11-14 16:47:24,268 WARN L179 SmtUtils]: Spent 268.00 ms on a formula simplification that was a NOOP. DAG size: 50 [2018-11-14 16:47:26,169 WARN L179 SmtUtils]: Spent 1.04 s on a formula simplification. DAG size of input: 58 DAG size of output: 24 [2018-11-14 16:47:27,143 WARN L179 SmtUtils]: Spent 649.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 48 [2018-11-14 16:47:29,054 WARN L179 SmtUtils]: Spent 1.27 s on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-11-14 16:47:31,328 WARN L179 SmtUtils]: Spent 1.07 s on a formula simplification. DAG size of input: 66 DAG size of output: 32 [2018-11-14 16:47:33,593 WARN L179 SmtUtils]: Spent 984.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 32 [2018-11-14 16:47:35,518 WARN L179 SmtUtils]: Spent 890.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 29 [2018-11-14 16:47:37,639 WARN L179 SmtUtils]: Spent 1.34 s on a formula simplification. DAG size of input: 64 DAG size of output: 37 [2018-11-14 16:47:40,178 WARN L179 SmtUtils]: Spent 901.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 37 [2018-11-14 16:47:42,085 WARN L179 SmtUtils]: Spent 920.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 34 [2018-11-14 16:47:43,764 WARN L179 SmtUtils]: Spent 967.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 42 [2018-11-14 16:47:46,111 WARN L179 SmtUtils]: Spent 565.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 42 [2018-11-14 16:47:47,534 WARN L179 SmtUtils]: Spent 609.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 39 [2018-11-14 16:47:49,090 WARN L179 SmtUtils]: Spent 847.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 47 [2018-11-14 16:47:51,637 WARN L179 SmtUtils]: Spent 622.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 47 [2018-11-14 16:47:52,990 WARN L179 SmtUtils]: Spent 675.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 44 [2018-11-14 16:47:54,715 WARN L179 SmtUtils]: Spent 989.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 52