java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-examples/standard_allDiff2_false-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 15:49:17,086 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 15:49:17,088 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 15:49:17,107 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 15:49:17,107 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 15:49:17,108 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 15:49:17,109 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 15:49:17,112 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 15:49:17,114 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 15:49:17,115 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 15:49:17,124 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 15:49:17,125 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 15:49:17,126 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 15:49:17,129 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 15:49:17,130 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 15:49:17,131 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 15:49:17,133 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 15:49:17,137 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 15:49:17,140 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 15:49:17,144 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 15:49:17,145 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 15:49:17,148 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 15:49:17,150 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-14 15:49:17,150 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-14 15:49:17,150 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-14 15:49:17,153 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-14 15:49:17,155 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-14 15:49:17,156 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-14 15:49:17,157 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-14 15:49:17,160 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-14 15:49:17,162 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-14 15:49:17,163 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-14 15:49:17,163 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-14 15:49:17,164 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-14 15:49:17,167 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-14 15:49:17,167 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-14 15:49:17,168 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-14 15:49:17,195 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 15:49:17,196 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 15:49:17,196 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 15:49:17,197 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 15:49:17,197 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 15:49:17,198 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 15:49:17,198 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 15:49:17,198 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 15:49:17,198 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 15:49:17,198 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 15:49:17,199 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 15:49:17,199 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 15:49:17,199 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 15:49:17,199 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 15:49:17,199 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-14 15:49:17,200 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-14 15:49:17,200 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 15:49:17,200 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 15:49:17,200 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 15:49:17,203 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 15:49:17,203 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 15:49:17,203 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 15:49:17,203 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 15:49:17,203 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 15:49:17,204 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 15:49:17,204 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 15:49:17,204 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 15:49:17,204 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-14 15:49:17,205 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 15:49:17,205 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-14 15:49:17,205 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-14 15:49:17,206 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 15:49:17,280 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 15:49:17,293 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 15:49:17,297 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 15:49:17,298 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 15:49:17,299 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 15:49:17,300 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_allDiff2_false-unreach-call_ground.i [2018-11-14 15:49:17,362 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3882b8652/a7a89b6e756146fc97ed72b4be810e62/FLAG451b8bb52 [2018-11-14 15:49:17,835 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 15:49:17,835 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/standard_allDiff2_false-unreach-call_ground.i [2018-11-14 15:49:17,841 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3882b8652/a7a89b6e756146fc97ed72b4be810e62/FLAG451b8bb52 [2018-11-14 15:49:17,857 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3882b8652/a7a89b6e756146fc97ed72b4be810e62 [2018-11-14 15:49:17,868 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 15:49:17,870 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 15:49:17,871 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 15:49:17,871 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 15:49:17,875 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 15:49:17,877 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:49:17" (1/1) ... [2018-11-14 15:49:17,880 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@39b8652e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:17, skipping insertion in model container [2018-11-14 15:49:17,881 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 03:49:17" (1/1) ... [2018-11-14 15:49:17,891 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 15:49:17,914 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 15:49:18,110 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 15:49:18,116 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 15:49:18,144 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 15:49:18,169 INFO L195 MainTranslator]: Completed translation [2018-11-14 15:49:18,170 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18 WrapperNode [2018-11-14 15:49:18,170 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 15:49:18,171 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 15:49:18,171 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 15:49:18,171 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 15:49:18,185 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,185 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,195 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,196 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,210 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,218 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,219 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... [2018-11-14 15:49:18,222 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 15:49:18,223 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 15:49:18,223 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 15:49:18,223 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 15:49:18,224 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 15:49:18,361 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 15:49:18,361 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 15:49:18,361 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 15:49:18,362 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 15:49:18,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 15:49:18,362 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 15:49:18,362 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 15:49:18,362 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-14 15:49:18,363 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-14 15:49:18,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-14 15:49:18,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 15:49:18,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 15:49:18,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-14 15:49:18,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-14 15:49:18,980 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 15:49:18,981 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:49:18 BoogieIcfgContainer [2018-11-14 15:49:18,981 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 15:49:18,982 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 15:49:18,982 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 15:49:18,985 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 15:49:18,986 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 03:49:17" (1/3) ... [2018-11-14 15:49:18,987 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d86edc0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:49:18, skipping insertion in model container [2018-11-14 15:49:18,987 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 03:49:18" (2/3) ... [2018-11-14 15:49:18,987 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7d86edc0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 03:49:18, skipping insertion in model container [2018-11-14 15:49:18,988 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 03:49:18" (3/3) ... [2018-11-14 15:49:18,990 INFO L112 eAbstractionObserver]: Analyzing ICFG standard_allDiff2_false-unreach-call_ground.i [2018-11-14 15:49:18,999 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 15:49:19,007 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 15:49:19,026 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 15:49:19,059 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 15:49:19,060 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 15:49:19,060 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 15:49:19,060 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 15:49:19,061 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 15:49:19,061 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 15:49:19,061 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 15:49:19,061 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 15:49:19,061 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 15:49:19,078 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states. [2018-11-14 15:49:19,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-14 15:49:19,085 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:19,086 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:19,088 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:19,094 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:19,095 INFO L82 PathProgramCache]: Analyzing trace with hash 1932411887, now seen corresponding path program 1 times [2018-11-14 15:49:19,100 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:19,101 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:19,126 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 15:49:19,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:19,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:19,211 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:19,479 INFO L256 TraceCheckUtils]: 0: Hoare triple {36#true} call ULTIMATE.init(); {36#true} is VALID [2018-11-14 15:49:19,482 INFO L273 TraceCheckUtils]: 1: Hoare triple {36#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {36#true} is VALID [2018-11-14 15:49:19,483 INFO L273 TraceCheckUtils]: 2: Hoare triple {36#true} assume true; {36#true} is VALID [2018-11-14 15:49:19,483 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {36#true} {36#true} #87#return; {36#true} is VALID [2018-11-14 15:49:19,484 INFO L256 TraceCheckUtils]: 4: Hoare triple {36#true} call #t~ret8 := main(); {36#true} is VALID [2018-11-14 15:49:19,484 INFO L273 TraceCheckUtils]: 5: Hoare triple {36#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {36#true} is VALID [2018-11-14 15:49:19,492 INFO L273 TraceCheckUtils]: 6: Hoare triple {36#true} assume !true; {37#false} is VALID [2018-11-14 15:49:19,492 INFO L273 TraceCheckUtils]: 7: Hoare triple {37#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {37#false} is VALID [2018-11-14 15:49:19,492 INFO L273 TraceCheckUtils]: 8: Hoare triple {37#false} assume true; {37#false} is VALID [2018-11-14 15:49:19,493 INFO L273 TraceCheckUtils]: 9: Hoare triple {37#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {37#false} is VALID [2018-11-14 15:49:19,493 INFO L273 TraceCheckUtils]: 10: Hoare triple {37#false} assume true; {37#false} is VALID [2018-11-14 15:49:19,493 INFO L273 TraceCheckUtils]: 11: Hoare triple {37#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {37#false} is VALID [2018-11-14 15:49:19,494 INFO L256 TraceCheckUtils]: 12: Hoare triple {37#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {37#false} is VALID [2018-11-14 15:49:19,494 INFO L273 TraceCheckUtils]: 13: Hoare triple {37#false} ~cond := #in~cond; {37#false} is VALID [2018-11-14 15:49:19,494 INFO L273 TraceCheckUtils]: 14: Hoare triple {37#false} assume ~cond == 0bv32; {37#false} is VALID [2018-11-14 15:49:19,495 INFO L273 TraceCheckUtils]: 15: Hoare triple {37#false} assume !false; {37#false} is VALID [2018-11-14 15:49:19,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 15:49:19,499 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 15:49:19,503 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 15:49:19,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 15:49:19,508 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-11-14 15:49:19,511 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:19,515 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 15:49:19,651 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:19,652 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 15:49:19,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 15:49:19,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 15:49:19,663 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 2 states. [2018-11-14 15:49:19,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:19,802 INFO L93 Difference]: Finished difference Result 60 states and 81 transitions. [2018-11-14 15:49:19,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 15:49:19,803 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-11-14 15:49:19,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:19,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 15:49:19,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 81 transitions. [2018-11-14 15:49:19,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 15:49:19,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 81 transitions. [2018-11-14 15:49:19,822 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 81 transitions. [2018-11-14 15:49:20,148 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 81 edges. 81 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:20,161 INFO L225 Difference]: With dead ends: 60 [2018-11-14 15:49:20,161 INFO L226 Difference]: Without dead ends: 28 [2018-11-14 15:49:20,165 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 15:49:20,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-11-14 15:49:20,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-11-14 15:49:20,234 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:20,234 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand 28 states. [2018-11-14 15:49:20,235 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 15:49:20,235 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 15:49:20,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:20,239 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2018-11-14 15:49:20,240 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 15:49:20,240 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:20,240 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:20,241 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 15:49:20,241 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 15:49:20,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:20,245 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2018-11-14 15:49:20,246 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 15:49:20,246 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:20,247 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:20,247 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:20,247 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:20,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-14 15:49:20,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2018-11-14 15:49:20,253 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 32 transitions. Word has length 16 [2018-11-14 15:49:20,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:20,254 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 32 transitions. [2018-11-14 15:49:20,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 15:49:20,255 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 15:49:20,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-14 15:49:20,256 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:20,256 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:20,256 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:20,257 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:20,261 INFO L82 PathProgramCache]: Analyzing trace with hash 1344147956, now seen corresponding path program 1 times [2018-11-14 15:49:20,261 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:20,262 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:20,289 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 15:49:20,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:20,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:20,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:20,421 INFO L256 TraceCheckUtils]: 0: Hoare triple {255#true} call ULTIMATE.init(); {255#true} is VALID [2018-11-14 15:49:20,422 INFO L273 TraceCheckUtils]: 1: Hoare triple {255#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {255#true} is VALID [2018-11-14 15:49:20,422 INFO L273 TraceCheckUtils]: 2: Hoare triple {255#true} assume true; {255#true} is VALID [2018-11-14 15:49:20,422 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {255#true} {255#true} #87#return; {255#true} is VALID [2018-11-14 15:49:20,423 INFO L256 TraceCheckUtils]: 4: Hoare triple {255#true} call #t~ret8 := main(); {255#true} is VALID [2018-11-14 15:49:20,425 INFO L273 TraceCheckUtils]: 5: Hoare triple {255#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:20,428 INFO L273 TraceCheckUtils]: 6: Hoare triple {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:20,430 INFO L273 TraceCheckUtils]: 7: Hoare triple {275#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {282#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:20,430 INFO L273 TraceCheckUtils]: 8: Hoare triple {282#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {256#false} is VALID [2018-11-14 15:49:20,431 INFO L273 TraceCheckUtils]: 9: Hoare triple {256#false} assume true; {256#false} is VALID [2018-11-14 15:49:20,431 INFO L273 TraceCheckUtils]: 10: Hoare triple {256#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {256#false} is VALID [2018-11-14 15:49:20,431 INFO L273 TraceCheckUtils]: 11: Hoare triple {256#false} assume true; {256#false} is VALID [2018-11-14 15:49:20,432 INFO L273 TraceCheckUtils]: 12: Hoare triple {256#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {256#false} is VALID [2018-11-14 15:49:20,432 INFO L256 TraceCheckUtils]: 13: Hoare triple {256#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {256#false} is VALID [2018-11-14 15:49:20,432 INFO L273 TraceCheckUtils]: 14: Hoare triple {256#false} ~cond := #in~cond; {256#false} is VALID [2018-11-14 15:49:20,433 INFO L273 TraceCheckUtils]: 15: Hoare triple {256#false} assume ~cond == 0bv32; {256#false} is VALID [2018-11-14 15:49:20,433 INFO L273 TraceCheckUtils]: 16: Hoare triple {256#false} assume !false; {256#false} is VALID [2018-11-14 15:49:20,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 15:49:20,435 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 15:49:20,437 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 15:49:20,438 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-14 15:49:20,439 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-11-14 15:49:20,447 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:20,448 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 15:49:20,691 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:20,691 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 15:49:20,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 15:49:20,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-14 15:49:20,692 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. Second operand 4 states. [2018-11-14 15:49:21,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:21,223 INFO L93 Difference]: Finished difference Result 50 states and 58 transitions. [2018-11-14 15:49:21,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 15:49:21,224 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-11-14 15:49:21,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:21,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 15:49:21,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 58 transitions. [2018-11-14 15:49:21,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 15:49:21,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 58 transitions. [2018-11-14 15:49:21,231 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 58 transitions. [2018-11-14 15:49:21,357 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:21,359 INFO L225 Difference]: With dead ends: 50 [2018-11-14 15:49:21,359 INFO L226 Difference]: Without dead ends: 35 [2018-11-14 15:49:21,360 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 15:49:21,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-14 15:49:21,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 30. [2018-11-14 15:49:21,377 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:21,377 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 30 states. [2018-11-14 15:49:21,377 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 30 states. [2018-11-14 15:49:21,377 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 30 states. [2018-11-14 15:49:21,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:21,380 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-11-14 15:49:21,381 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-14 15:49:21,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:21,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:21,382 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 35 states. [2018-11-14 15:49:21,382 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 35 states. [2018-11-14 15:49:21,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:21,385 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-11-14 15:49:21,386 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-14 15:49:21,386 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:21,386 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:21,387 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:21,387 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:21,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-14 15:49:21,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2018-11-14 15:49:21,390 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 34 transitions. Word has length 17 [2018-11-14 15:49:21,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:21,390 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 34 transitions. [2018-11-14 15:49:21,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 15:49:21,390 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2018-11-14 15:49:21,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-14 15:49:21,391 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:21,392 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:21,392 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:21,392 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:21,393 INFO L82 PathProgramCache]: Analyzing trace with hash -269686762, now seen corresponding path program 1 times [2018-11-14 15:49:21,393 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:21,393 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:21,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 15:49:21,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:21,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:21,465 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:21,561 INFO L256 TraceCheckUtils]: 0: Hoare triple {488#true} call ULTIMATE.init(); {488#true} is VALID [2018-11-14 15:49:21,561 INFO L273 TraceCheckUtils]: 1: Hoare triple {488#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {488#true} is VALID [2018-11-14 15:49:21,562 INFO L273 TraceCheckUtils]: 2: Hoare triple {488#true} assume true; {488#true} is VALID [2018-11-14 15:49:21,562 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {488#true} {488#true} #87#return; {488#true} is VALID [2018-11-14 15:49:21,562 INFO L256 TraceCheckUtils]: 4: Hoare triple {488#true} call #t~ret8 := main(); {488#true} is VALID [2018-11-14 15:49:21,563 INFO L273 TraceCheckUtils]: 5: Hoare triple {488#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:21,563 INFO L273 TraceCheckUtils]: 6: Hoare triple {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:21,564 INFO L273 TraceCheckUtils]: 7: Hoare triple {508#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 15:49:21,568 INFO L273 TraceCheckUtils]: 8: Hoare triple {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} assume true; {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 15:49:21,569 INFO L273 TraceCheckUtils]: 9: Hoare triple {515#(and (= main_~j~0 (_ bv0 32)) (not (= main_~r~0 (_ bv0 32))))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {489#false} is VALID [2018-11-14 15:49:21,569 INFO L273 TraceCheckUtils]: 10: Hoare triple {489#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {489#false} is VALID [2018-11-14 15:49:21,569 INFO L273 TraceCheckUtils]: 11: Hoare triple {489#false} assume true; {489#false} is VALID [2018-11-14 15:49:21,569 INFO L273 TraceCheckUtils]: 12: Hoare triple {489#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {489#false} is VALID [2018-11-14 15:49:21,570 INFO L273 TraceCheckUtils]: 13: Hoare triple {489#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {489#false} is VALID [2018-11-14 15:49:21,570 INFO L273 TraceCheckUtils]: 14: Hoare triple {489#false} assume true; {489#false} is VALID [2018-11-14 15:49:21,571 INFO L273 TraceCheckUtils]: 15: Hoare triple {489#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {489#false} is VALID [2018-11-14 15:49:21,571 INFO L273 TraceCheckUtils]: 16: Hoare triple {489#false} assume true; {489#false} is VALID [2018-11-14 15:49:21,571 INFO L273 TraceCheckUtils]: 17: Hoare triple {489#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {489#false} is VALID [2018-11-14 15:49:21,572 INFO L256 TraceCheckUtils]: 18: Hoare triple {489#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {489#false} is VALID [2018-11-14 15:49:21,572 INFO L273 TraceCheckUtils]: 19: Hoare triple {489#false} ~cond := #in~cond; {489#false} is VALID [2018-11-14 15:49:21,573 INFO L273 TraceCheckUtils]: 20: Hoare triple {489#false} assume ~cond == 0bv32; {489#false} is VALID [2018-11-14 15:49:21,573 INFO L273 TraceCheckUtils]: 21: Hoare triple {489#false} assume !false; {489#false} is VALID [2018-11-14 15:49:21,575 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 15:49:21,575 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 15:49:21,577 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 15:49:21,577 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-14 15:49:21,578 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-11-14 15:49:21,578 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:21,578 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 15:49:21,624 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:21,625 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 15:49:21,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 15:49:21,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-14 15:49:21,626 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. Second operand 4 states. [2018-11-14 15:49:22,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:22,017 INFO L93 Difference]: Finished difference Result 61 states and 73 transitions. [2018-11-14 15:49:22,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 15:49:22,017 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-11-14 15:49:22,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:22,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 15:49:22,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 73 transitions. [2018-11-14 15:49:22,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 15:49:22,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 73 transitions. [2018-11-14 15:49:22,024 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 73 transitions. [2018-11-14 15:49:22,153 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:22,155 INFO L225 Difference]: With dead ends: 61 [2018-11-14 15:49:22,155 INFO L226 Difference]: Without dead ends: 39 [2018-11-14 15:49:22,156 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 15:49:22,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-14 15:49:22,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 32. [2018-11-14 15:49:22,175 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:22,176 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 32 states. [2018-11-14 15:49:22,176 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 32 states. [2018-11-14 15:49:22,176 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 32 states. [2018-11-14 15:49:22,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:22,180 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-14 15:49:22,180 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-14 15:49:22,181 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:22,181 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:22,181 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 39 states. [2018-11-14 15:49:22,181 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 39 states. [2018-11-14 15:49:22,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:22,184 INFO L93 Difference]: Finished difference Result 39 states and 46 transitions. [2018-11-14 15:49:22,184 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-14 15:49:22,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:22,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:22,185 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:22,185 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:22,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-14 15:49:22,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 36 transitions. [2018-11-14 15:49:22,188 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 36 transitions. Word has length 22 [2018-11-14 15:49:22,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:22,188 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 36 transitions. [2018-11-14 15:49:22,188 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 15:49:22,188 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 36 transitions. [2018-11-14 15:49:22,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-14 15:49:22,189 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:22,190 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:22,190 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:22,190 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:22,190 INFO L82 PathProgramCache]: Analyzing trace with hash 417344287, now seen corresponding path program 1 times [2018-11-14 15:49:22,191 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:22,191 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:22,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 15:49:22,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:22,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:22,276 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:22,373 INFO L256 TraceCheckUtils]: 0: Hoare triple {761#true} call ULTIMATE.init(); {761#true} is VALID [2018-11-14 15:49:22,373 INFO L273 TraceCheckUtils]: 1: Hoare triple {761#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {761#true} is VALID [2018-11-14 15:49:22,374 INFO L273 TraceCheckUtils]: 2: Hoare triple {761#true} assume true; {761#true} is VALID [2018-11-14 15:49:22,374 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {761#true} {761#true} #87#return; {761#true} is VALID [2018-11-14 15:49:22,374 INFO L256 TraceCheckUtils]: 4: Hoare triple {761#true} call #t~ret8 := main(); {761#true} is VALID [2018-11-14 15:49:22,375 INFO L273 TraceCheckUtils]: 5: Hoare triple {761#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,375 INFO L273 TraceCheckUtils]: 6: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,377 INFO L273 TraceCheckUtils]: 7: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,378 INFO L273 TraceCheckUtils]: 8: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,379 INFO L273 TraceCheckUtils]: 9: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,380 INFO L273 TraceCheckUtils]: 10: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,381 INFO L273 TraceCheckUtils]: 11: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,382 INFO L273 TraceCheckUtils]: 12: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,383 INFO L273 TraceCheckUtils]: 13: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:22,383 INFO L273 TraceCheckUtils]: 14: Hoare triple {781#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {809#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:22,384 INFO L273 TraceCheckUtils]: 15: Hoare triple {809#(= (_ bv2 32) main_~i~0)} assume true; {809#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:22,384 INFO L273 TraceCheckUtils]: 16: Hoare triple {809#(= (_ bv2 32) main_~i~0)} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {816#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:22,385 INFO L273 TraceCheckUtils]: 17: Hoare triple {816#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {762#false} is VALID [2018-11-14 15:49:22,385 INFO L273 TraceCheckUtils]: 18: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 15:49:22,386 INFO L273 TraceCheckUtils]: 19: Hoare triple {762#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {762#false} is VALID [2018-11-14 15:49:22,386 INFO L273 TraceCheckUtils]: 20: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 15:49:22,386 INFO L273 TraceCheckUtils]: 21: Hoare triple {762#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {762#false} is VALID [2018-11-14 15:49:22,387 INFO L256 TraceCheckUtils]: 22: Hoare triple {762#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {762#false} is VALID [2018-11-14 15:49:22,387 INFO L273 TraceCheckUtils]: 23: Hoare triple {762#false} ~cond := #in~cond; {762#false} is VALID [2018-11-14 15:49:22,387 INFO L273 TraceCheckUtils]: 24: Hoare triple {762#false} assume ~cond == 0bv32; {762#false} is VALID [2018-11-14 15:49:22,388 INFO L273 TraceCheckUtils]: 25: Hoare triple {762#false} assume !false; {762#false} is VALID [2018-11-14 15:49:22,389 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-14 15:49:22,390 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:49:22,701 INFO L273 TraceCheckUtils]: 25: Hoare triple {762#false} assume !false; {762#false} is VALID [2018-11-14 15:49:22,702 INFO L273 TraceCheckUtils]: 24: Hoare triple {762#false} assume ~cond == 0bv32; {762#false} is VALID [2018-11-14 15:49:22,702 INFO L273 TraceCheckUtils]: 23: Hoare triple {762#false} ~cond := #in~cond; {762#false} is VALID [2018-11-14 15:49:22,702 INFO L256 TraceCheckUtils]: 22: Hoare triple {762#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {762#false} is VALID [2018-11-14 15:49:22,702 INFO L273 TraceCheckUtils]: 21: Hoare triple {762#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {762#false} is VALID [2018-11-14 15:49:22,703 INFO L273 TraceCheckUtils]: 20: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 15:49:22,703 INFO L273 TraceCheckUtils]: 19: Hoare triple {762#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {762#false} is VALID [2018-11-14 15:49:22,703 INFO L273 TraceCheckUtils]: 18: Hoare triple {762#false} assume true; {762#false} is VALID [2018-11-14 15:49:22,704 INFO L273 TraceCheckUtils]: 17: Hoare triple {816#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {762#false} is VALID [2018-11-14 15:49:22,704 INFO L273 TraceCheckUtils]: 16: Hoare triple {871#(bvslt main_~i~0 (_ bv100000 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {816#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:22,705 INFO L273 TraceCheckUtils]: 15: Hoare triple {871#(bvslt main_~i~0 (_ bv100000 32))} assume true; {871#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 15:49:22,706 INFO L273 TraceCheckUtils]: 14: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {871#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 15:49:22,706 INFO L273 TraceCheckUtils]: 13: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,707 INFO L273 TraceCheckUtils]: 12: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,708 INFO L273 TraceCheckUtils]: 11: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,708 INFO L273 TraceCheckUtils]: 10: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,709 INFO L273 TraceCheckUtils]: 9: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,710 INFO L273 TraceCheckUtils]: 8: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,711 INFO L273 TraceCheckUtils]: 7: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,712 INFO L273 TraceCheckUtils]: 6: Hoare triple {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,713 INFO L273 TraceCheckUtils]: 5: Hoare triple {761#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {878#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:22,714 INFO L256 TraceCheckUtils]: 4: Hoare triple {761#true} call #t~ret8 := main(); {761#true} is VALID [2018-11-14 15:49:22,714 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {761#true} {761#true} #87#return; {761#true} is VALID [2018-11-14 15:49:22,714 INFO L273 TraceCheckUtils]: 2: Hoare triple {761#true} assume true; {761#true} is VALID [2018-11-14 15:49:22,715 INFO L273 TraceCheckUtils]: 1: Hoare triple {761#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {761#true} is VALID [2018-11-14 15:49:22,715 INFO L256 TraceCheckUtils]: 0: Hoare triple {761#true} call ULTIMATE.init(); {761#true} is VALID [2018-11-14 15:49:22,718 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (5)] Exception during sending of exit command (exit): Broken pipe [2018-11-14 15:49:22,722 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:49:22,722 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2018-11-14 15:49:22,722 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-11-14 15:49:22,724 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:22,724 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-14 15:49:22,845 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:22,846 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-14 15:49:22,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-14 15:49:22,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-14 15:49:22,847 INFO L87 Difference]: Start difference. First operand 32 states and 36 transitions. Second operand 7 states. [2018-11-14 15:49:23,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:23,377 INFO L93 Difference]: Finished difference Result 70 states and 84 transitions. [2018-11-14 15:49:23,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-14 15:49:23,378 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-11-14 15:49:23,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:23,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 15:49:23,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 82 transitions. [2018-11-14 15:49:23,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 15:49:23,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 82 transitions. [2018-11-14 15:49:23,392 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 82 transitions. [2018-11-14 15:49:23,633 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 82 edges. 82 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:23,635 INFO L225 Difference]: With dead ends: 70 [2018-11-14 15:49:23,636 INFO L226 Difference]: Without dead ends: 53 [2018-11-14 15:49:23,636 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2018-11-14 15:49:23,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-14 15:49:23,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-11-14 15:49:23,699 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:23,700 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 53 states. [2018-11-14 15:49:23,700 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-14 15:49:23,700 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-14 15:49:23,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:23,703 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-11-14 15:49:23,703 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-14 15:49:23,704 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:23,704 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:23,704 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 53 states. [2018-11-14 15:49:23,704 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 53 states. [2018-11-14 15:49:23,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:23,707 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-11-14 15:49:23,707 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-14 15:49:23,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:23,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:23,709 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:23,709 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:23,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-11-14 15:49:23,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 63 transitions. [2018-11-14 15:49:23,712 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 63 transitions. Word has length 26 [2018-11-14 15:49:23,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:23,712 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 63 transitions. [2018-11-14 15:49:23,712 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-14 15:49:23,712 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-11-14 15:49:23,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-14 15:49:23,714 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:23,714 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:23,714 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:23,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:23,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1891846581, now seen corresponding path program 2 times [2018-11-14 15:49:23,715 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:23,715 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:23,741 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 15:49:23,799 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 15:49:23,800 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:49:23,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:23,817 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:23,985 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-14 15:49:23,985 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-14 15:49:23,986 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-14 15:49:23,986 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-14 15:49:23,986 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret8 := main(); {1200#true} is VALID [2018-11-14 15:49:23,987 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,987 INFO L273 TraceCheckUtils]: 6: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,988 INFO L273 TraceCheckUtils]: 7: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,989 INFO L273 TraceCheckUtils]: 8: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,989 INFO L273 TraceCheckUtils]: 9: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,989 INFO L273 TraceCheckUtils]: 10: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,990 INFO L273 TraceCheckUtils]: 11: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,990 INFO L273 TraceCheckUtils]: 12: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:23,991 INFO L273 TraceCheckUtils]: 13: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:24,008 INFO L273 TraceCheckUtils]: 14: Hoare triple {1220#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1248#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:24,009 INFO L273 TraceCheckUtils]: 15: Hoare triple {1248#(= (_ bv2 32) main_~i~0)} assume true; {1248#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:24,009 INFO L273 TraceCheckUtils]: 16: Hoare triple {1248#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:24,010 INFO L273 TraceCheckUtils]: 17: Hoare triple {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:24,012 INFO L273 TraceCheckUtils]: 18: Hoare triple {1255#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,013 INFO L273 TraceCheckUtils]: 19: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,013 INFO L273 TraceCheckUtils]: 20: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,017 INFO L273 TraceCheckUtils]: 21: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,017 INFO L273 TraceCheckUtils]: 22: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,018 INFO L273 TraceCheckUtils]: 23: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,018 INFO L273 TraceCheckUtils]: 24: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,018 INFO L273 TraceCheckUtils]: 25: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,019 INFO L273 TraceCheckUtils]: 26: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,019 INFO L273 TraceCheckUtils]: 27: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,020 INFO L273 TraceCheckUtils]: 28: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,020 INFO L273 TraceCheckUtils]: 29: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,021 INFO L273 TraceCheckUtils]: 30: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,021 INFO L273 TraceCheckUtils]: 31: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,022 INFO L273 TraceCheckUtils]: 32: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-14 15:49:24,022 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 15:49:24,022 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1201#false} is VALID [2018-11-14 15:49:24,023 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 15:49:24,023 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1201#false} is VALID [2018-11-14 15:49:24,024 INFO L256 TraceCheckUtils]: 37: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-14 15:49:24,024 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-14 15:49:24,024 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume ~cond == 0bv32; {1201#false} is VALID [2018-11-14 15:49:24,025 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-14 15:49:24,029 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-14 15:49:24,029 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:49:24,166 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-14 15:49:24,167 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume ~cond == 0bv32; {1201#false} is VALID [2018-11-14 15:49:24,167 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-14 15:49:24,168 INFO L256 TraceCheckUtils]: 37: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-14 15:49:24,168 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1201#false} is VALID [2018-11-14 15:49:24,168 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 15:49:24,169 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1201#false} is VALID [2018-11-14 15:49:24,169 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume true; {1201#false} is VALID [2018-11-14 15:49:24,170 INFO L273 TraceCheckUtils]: 32: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-14 15:49:24,170 INFO L273 TraceCheckUtils]: 31: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,170 INFO L273 TraceCheckUtils]: 30: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,171 INFO L273 TraceCheckUtils]: 29: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,171 INFO L273 TraceCheckUtils]: 28: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,172 INFO L273 TraceCheckUtils]: 27: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,172 INFO L273 TraceCheckUtils]: 26: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,173 INFO L273 TraceCheckUtils]: 25: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,174 INFO L273 TraceCheckUtils]: 24: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,182 INFO L273 TraceCheckUtils]: 23: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,183 INFO L273 TraceCheckUtils]: 22: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,183 INFO L273 TraceCheckUtils]: 21: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,184 INFO L273 TraceCheckUtils]: 20: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} assume true; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,184 INFO L273 TraceCheckUtils]: 19: Hoare triple {1262#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,185 INFO L273 TraceCheckUtils]: 18: Hoare triple {1395#(bvsge main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1262#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,185 INFO L273 TraceCheckUtils]: 17: Hoare triple {1395#(bvsge main_~j~0 (_ bv0 32))} assume true; {1395#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,187 INFO L273 TraceCheckUtils]: 16: Hoare triple {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1395#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,188 INFO L273 TraceCheckUtils]: 15: Hoare triple {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:24,190 INFO L273 TraceCheckUtils]: 14: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1402#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:24,191 INFO L273 TraceCheckUtils]: 13: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,192 INFO L273 TraceCheckUtils]: 12: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume true; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,192 INFO L273 TraceCheckUtils]: 11: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,193 INFO L273 TraceCheckUtils]: 10: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,193 INFO L273 TraceCheckUtils]: 9: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,194 INFO L273 TraceCheckUtils]: 8: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume true; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,194 INFO L273 TraceCheckUtils]: 7: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,195 INFO L273 TraceCheckUtils]: 6: Hoare triple {1409#(bvsge main_~i~0 (_ bv0 32))} assume true; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,196 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1409#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:24,196 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret8 := main(); {1200#true} is VALID [2018-11-14 15:49:24,196 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-14 15:49:24,197 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-14 15:49:24,197 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-14 15:49:24,197 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-14 15:49:24,201 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-11-14 15:49:24,203 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:49:24,203 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-11-14 15:49:24,203 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 41 [2018-11-14 15:49:24,204 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:24,204 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-14 15:49:24,265 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:24,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-14 15:49:24,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-14 15:49:24,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-11-14 15:49:24,266 INFO L87 Difference]: Start difference. First operand 53 states and 63 transitions. Second operand 9 states. [2018-11-14 15:49:25,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:25,336 INFO L93 Difference]: Finished difference Result 110 states and 134 transitions. [2018-11-14 15:49:25,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-14 15:49:25,337 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 41 [2018-11-14 15:49:25,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:25,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-14 15:49:25,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 125 transitions. [2018-11-14 15:49:25,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-14 15:49:25,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 125 transitions. [2018-11-14 15:49:25,347 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 125 transitions. [2018-11-14 15:49:25,576 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:25,579 INFO L225 Difference]: With dead ends: 110 [2018-11-14 15:49:25,580 INFO L226 Difference]: Without dead ends: 68 [2018-11-14 15:49:25,581 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=133, Invalid=287, Unknown=0, NotChecked=0, Total=420 [2018-11-14 15:49:25,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-11-14 15:49:25,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 63. [2018-11-14 15:49:25,655 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:25,655 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand 63 states. [2018-11-14 15:49:25,656 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand 63 states. [2018-11-14 15:49:25,656 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 63 states. [2018-11-14 15:49:25,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:25,660 INFO L93 Difference]: Finished difference Result 68 states and 81 transitions. [2018-11-14 15:49:25,660 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 81 transitions. [2018-11-14 15:49:25,661 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:25,661 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:25,661 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand 68 states. [2018-11-14 15:49:25,661 INFO L87 Difference]: Start difference. First operand 63 states. Second operand 68 states. [2018-11-14 15:49:25,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:25,664 INFO L93 Difference]: Finished difference Result 68 states and 81 transitions. [2018-11-14 15:49:25,665 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 81 transitions. [2018-11-14 15:49:25,665 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:25,666 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:25,666 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:25,666 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:25,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-11-14 15:49:25,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 74 transitions. [2018-11-14 15:49:25,669 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 74 transitions. Word has length 41 [2018-11-14 15:49:25,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:25,669 INFO L480 AbstractCegarLoop]: Abstraction has 63 states and 74 transitions. [2018-11-14 15:49:25,669 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-14 15:49:25,669 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 74 transitions. [2018-11-14 15:49:25,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-14 15:49:25,671 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:25,671 INFO L375 BasicCegarLoop]: trace histogram [9, 5, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:25,671 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:25,672 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:25,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1223729539, now seen corresponding path program 3 times [2018-11-14 15:49:25,672 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:25,673 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:25,694 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 15:49:25,760 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-14 15:49:25,760 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:49:25,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:25,785 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:26,053 INFO L256 TraceCheckUtils]: 0: Hoare triple {1844#true} call ULTIMATE.init(); {1844#true} is VALID [2018-11-14 15:49:26,054 INFO L273 TraceCheckUtils]: 1: Hoare triple {1844#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1844#true} is VALID [2018-11-14 15:49:26,054 INFO L273 TraceCheckUtils]: 2: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,054 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1844#true} {1844#true} #87#return; {1844#true} is VALID [2018-11-14 15:49:26,054 INFO L256 TraceCheckUtils]: 4: Hoare triple {1844#true} call #t~ret8 := main(); {1844#true} is VALID [2018-11-14 15:49:26,054 INFO L273 TraceCheckUtils]: 5: Hoare triple {1844#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,055 INFO L273 TraceCheckUtils]: 6: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,055 INFO L273 TraceCheckUtils]: 7: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 15:49:26,055 INFO L273 TraceCheckUtils]: 8: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,055 INFO L273 TraceCheckUtils]: 9: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,055 INFO L273 TraceCheckUtils]: 10: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,056 INFO L273 TraceCheckUtils]: 11: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,056 INFO L273 TraceCheckUtils]: 12: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,056 INFO L273 TraceCheckUtils]: 13: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 15:49:26,056 INFO L273 TraceCheckUtils]: 14: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 15:49:26,056 INFO L273 TraceCheckUtils]: 15: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,057 INFO L273 TraceCheckUtils]: 16: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 15:49:26,057 INFO L273 TraceCheckUtils]: 17: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,057 INFO L273 TraceCheckUtils]: 18: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,058 INFO L273 TraceCheckUtils]: 19: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,058 INFO L273 TraceCheckUtils]: 20: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,058 INFO L273 TraceCheckUtils]: 21: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,058 INFO L273 TraceCheckUtils]: 22: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,059 INFO L273 TraceCheckUtils]: 23: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,059 INFO L273 TraceCheckUtils]: 24: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,059 INFO L273 TraceCheckUtils]: 25: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,059 INFO L273 TraceCheckUtils]: 26: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 15:49:26,060 INFO L273 TraceCheckUtils]: 27: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 15:49:26,060 INFO L273 TraceCheckUtils]: 28: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,060 INFO L273 TraceCheckUtils]: 29: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 15:49:26,060 INFO L273 TraceCheckUtils]: 30: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,061 INFO L273 TraceCheckUtils]: 31: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,061 INFO L273 TraceCheckUtils]: 32: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,061 INFO L273 TraceCheckUtils]: 33: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,062 INFO L273 TraceCheckUtils]: 34: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,062 INFO L273 TraceCheckUtils]: 35: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 15:49:26,062 INFO L273 TraceCheckUtils]: 36: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 15:49:26,062 INFO L273 TraceCheckUtils]: 37: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,082 INFO L273 TraceCheckUtils]: 38: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:49:26,091 INFO L273 TraceCheckUtils]: 39: Hoare triple {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume true; {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:49:26,105 INFO L273 TraceCheckUtils]: 40: Hoare triple {1963#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:49:26,114 INFO L273 TraceCheckUtils]: 41: Hoare triple {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:49:26,147 INFO L273 TraceCheckUtils]: 42: Hoare triple {1970#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,148 INFO L273 TraceCheckUtils]: 43: Hoare triple {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,150 INFO L273 TraceCheckUtils]: 44: Hoare triple {1977#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1984#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,155 INFO L273 TraceCheckUtils]: 45: Hoare triple {1984#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,156 INFO L273 TraceCheckUtils]: 46: Hoare triple {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,158 INFO L273 TraceCheckUtils]: 47: Hoare triple {1988#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1995#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:26,159 INFO L273 TraceCheckUtils]: 48: Hoare triple {1995#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1845#false} is VALID [2018-11-14 15:49:26,159 INFO L273 TraceCheckUtils]: 49: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 15:49:26,159 INFO L273 TraceCheckUtils]: 50: Hoare triple {1845#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1845#false} is VALID [2018-11-14 15:49:26,160 INFO L273 TraceCheckUtils]: 51: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 15:49:26,160 INFO L273 TraceCheckUtils]: 52: Hoare triple {1845#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1845#false} is VALID [2018-11-14 15:49:26,160 INFO L256 TraceCheckUtils]: 53: Hoare triple {1845#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1845#false} is VALID [2018-11-14 15:49:26,161 INFO L273 TraceCheckUtils]: 54: Hoare triple {1845#false} ~cond := #in~cond; {1845#false} is VALID [2018-11-14 15:49:26,161 INFO L273 TraceCheckUtils]: 55: Hoare triple {1845#false} assume ~cond == 0bv32; {1845#false} is VALID [2018-11-14 15:49:26,161 INFO L273 TraceCheckUtils]: 56: Hoare triple {1845#false} assume !false; {1845#false} is VALID [2018-11-14 15:49:26,167 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 47 proven. 2 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2018-11-14 15:49:26,168 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:49:26,771 INFO L273 TraceCheckUtils]: 56: Hoare triple {1845#false} assume !false; {1845#false} is VALID [2018-11-14 15:49:26,772 INFO L273 TraceCheckUtils]: 55: Hoare triple {1845#false} assume ~cond == 0bv32; {1845#false} is VALID [2018-11-14 15:49:26,772 INFO L273 TraceCheckUtils]: 54: Hoare triple {1845#false} ~cond := #in~cond; {1845#false} is VALID [2018-11-14 15:49:26,772 INFO L256 TraceCheckUtils]: 53: Hoare triple {1845#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {1845#false} is VALID [2018-11-14 15:49:26,773 INFO L273 TraceCheckUtils]: 52: Hoare triple {1845#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {1845#false} is VALID [2018-11-14 15:49:26,773 INFO L273 TraceCheckUtils]: 51: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 15:49:26,773 INFO L273 TraceCheckUtils]: 50: Hoare triple {1845#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {1845#false} is VALID [2018-11-14 15:49:26,774 INFO L273 TraceCheckUtils]: 49: Hoare triple {1845#false} assume true; {1845#false} is VALID [2018-11-14 15:49:26,777 INFO L273 TraceCheckUtils]: 48: Hoare triple {1995#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {1845#false} is VALID [2018-11-14 15:49:26,781 INFO L273 TraceCheckUtils]: 47: Hoare triple {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {1995#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:26,783 INFO L273 TraceCheckUtils]: 46: Hoare triple {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume true; {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:49:26,783 INFO L273 TraceCheckUtils]: 45: Hoare triple {2057#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2050#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:49:26,784 INFO L273 TraceCheckUtils]: 44: Hoare triple {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {2057#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:49:26,784 INFO L273 TraceCheckUtils]: 43: Hoare triple {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume true; {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:26,785 INFO L273 TraceCheckUtils]: 42: Hoare triple {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {2061#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:26,785 INFO L273 TraceCheckUtils]: 41: Hoare triple {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,786 INFO L273 TraceCheckUtils]: 40: Hoare triple {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {2068#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:26,787 INFO L273 TraceCheckUtils]: 39: Hoare triple {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:49:26,791 INFO L273 TraceCheckUtils]: 38: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {2075#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:49:26,791 INFO L273 TraceCheckUtils]: 37: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,792 INFO L273 TraceCheckUtils]: 36: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 15:49:26,792 INFO L273 TraceCheckUtils]: 35: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 15:49:26,792 INFO L273 TraceCheckUtils]: 34: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,792 INFO L273 TraceCheckUtils]: 33: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,793 INFO L273 TraceCheckUtils]: 32: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,793 INFO L273 TraceCheckUtils]: 31: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,793 INFO L273 TraceCheckUtils]: 30: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,793 INFO L273 TraceCheckUtils]: 29: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 15:49:26,793 INFO L273 TraceCheckUtils]: 28: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,794 INFO L273 TraceCheckUtils]: 27: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 15:49:26,794 INFO L273 TraceCheckUtils]: 26: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 15:49:26,794 INFO L273 TraceCheckUtils]: 25: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,794 INFO L273 TraceCheckUtils]: 24: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,795 INFO L273 TraceCheckUtils]: 23: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,795 INFO L273 TraceCheckUtils]: 22: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,795 INFO L273 TraceCheckUtils]: 21: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,795 INFO L273 TraceCheckUtils]: 20: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,795 INFO L273 TraceCheckUtils]: 19: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,795 INFO L273 TraceCheckUtils]: 18: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,796 INFO L273 TraceCheckUtils]: 17: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,796 INFO L273 TraceCheckUtils]: 16: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 15:49:26,796 INFO L273 TraceCheckUtils]: 15: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,796 INFO L273 TraceCheckUtils]: 14: Hoare triple {1844#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1844#true} is VALID [2018-11-14 15:49:26,796 INFO L273 TraceCheckUtils]: 13: Hoare triple {1844#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {1844#true} is VALID [2018-11-14 15:49:26,797 INFO L273 TraceCheckUtils]: 12: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,797 INFO L273 TraceCheckUtils]: 11: Hoare triple {1844#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {1844#true} is VALID [2018-11-14 15:49:26,797 INFO L273 TraceCheckUtils]: 10: Hoare triple {1844#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,797 INFO L273 TraceCheckUtils]: 9: Hoare triple {1844#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1844#true} is VALID [2018-11-14 15:49:26,798 INFO L273 TraceCheckUtils]: 8: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,798 INFO L273 TraceCheckUtils]: 7: Hoare triple {1844#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {1844#true} is VALID [2018-11-14 15:49:26,798 INFO L273 TraceCheckUtils]: 6: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,798 INFO L273 TraceCheckUtils]: 5: Hoare triple {1844#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {1844#true} is VALID [2018-11-14 15:49:26,799 INFO L256 TraceCheckUtils]: 4: Hoare triple {1844#true} call #t~ret8 := main(); {1844#true} is VALID [2018-11-14 15:49:26,799 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1844#true} {1844#true} #87#return; {1844#true} is VALID [2018-11-14 15:49:26,799 INFO L273 TraceCheckUtils]: 2: Hoare triple {1844#true} assume true; {1844#true} is VALID [2018-11-14 15:49:26,799 INFO L273 TraceCheckUtils]: 1: Hoare triple {1844#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1844#true} is VALID [2018-11-14 15:49:26,799 INFO L256 TraceCheckUtils]: 0: Hoare triple {1844#true} call ULTIMATE.init(); {1844#true} is VALID [2018-11-14 15:49:26,804 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 47 proven. 2 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2018-11-14 15:49:26,805 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:49:26,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-11-14 15:49:26,806 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-11-14 15:49:26,807 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:26,807 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-14 15:49:26,911 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:26,912 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-14 15:49:26,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-14 15:49:26,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-11-14 15:49:26,912 INFO L87 Difference]: Start difference. First operand 63 states and 74 transitions. Second operand 13 states. [2018-11-14 15:49:31,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:31,571 INFO L93 Difference]: Finished difference Result 320 states and 416 transitions. [2018-11-14 15:49:31,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-14 15:49:31,572 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-11-14 15:49:31,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:31,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 15:49:31,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 182 transitions. [2018-11-14 15:49:31,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 15:49:31,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 182 transitions. [2018-11-14 15:49:31,582 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states and 182 transitions. [2018-11-14 15:49:32,229 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 182 edges. 182 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:32,236 INFO L225 Difference]: With dead ends: 320 [2018-11-14 15:49:32,237 INFO L226 Difference]: Without dead ends: 260 [2018-11-14 15:49:32,238 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 322 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=413, Invalid=993, Unknown=0, NotChecked=0, Total=1406 [2018-11-14 15:49:32,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2018-11-14 15:49:32,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 116. [2018-11-14 15:49:32,454 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:32,454 INFO L82 GeneralOperation]: Start isEquivalent. First operand 260 states. Second operand 116 states. [2018-11-14 15:49:32,454 INFO L74 IsIncluded]: Start isIncluded. First operand 260 states. Second operand 116 states. [2018-11-14 15:49:32,455 INFO L87 Difference]: Start difference. First operand 260 states. Second operand 116 states. [2018-11-14 15:49:32,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:32,466 INFO L93 Difference]: Finished difference Result 260 states and 337 transitions. [2018-11-14 15:49:32,466 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 337 transitions. [2018-11-14 15:49:32,467 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:32,467 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:32,468 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand 260 states. [2018-11-14 15:49:32,468 INFO L87 Difference]: Start difference. First operand 116 states. Second operand 260 states. [2018-11-14 15:49:32,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:32,478 INFO L93 Difference]: Finished difference Result 260 states and 337 transitions. [2018-11-14 15:49:32,478 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 337 transitions. [2018-11-14 15:49:32,479 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:32,479 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:32,479 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:32,479 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:32,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-11-14 15:49:32,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 147 transitions. [2018-11-14 15:49:32,484 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 147 transitions. Word has length 57 [2018-11-14 15:49:32,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:32,484 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 147 transitions. [2018-11-14 15:49:32,484 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-14 15:49:32,484 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 147 transitions. [2018-11-14 15:49:32,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-11-14 15:49:32,485 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:32,486 INFO L375 BasicCegarLoop]: trace histogram [12, 8, 8, 8, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:32,486 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:32,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:32,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1715077016, now seen corresponding path program 4 times [2018-11-14 15:49:32,487 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:32,487 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:32,510 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 15:49:32,592 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 15:49:32,593 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:49:32,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:32,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:32,739 INFO L256 TraceCheckUtils]: 0: Hoare triple {3345#true} call ULTIMATE.init(); {3345#true} is VALID [2018-11-14 15:49:32,739 INFO L273 TraceCheckUtils]: 1: Hoare triple {3345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3345#true} is VALID [2018-11-14 15:49:32,740 INFO L273 TraceCheckUtils]: 2: Hoare triple {3345#true} assume true; {3345#true} is VALID [2018-11-14 15:49:32,740 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3345#true} {3345#true} #87#return; {3345#true} is VALID [2018-11-14 15:49:32,740 INFO L256 TraceCheckUtils]: 4: Hoare triple {3345#true} call #t~ret8 := main(); {3345#true} is VALID [2018-11-14 15:49:32,741 INFO L273 TraceCheckUtils]: 5: Hoare triple {3345#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,742 INFO L273 TraceCheckUtils]: 6: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,743 INFO L273 TraceCheckUtils]: 7: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,743 INFO L273 TraceCheckUtils]: 8: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,744 INFO L273 TraceCheckUtils]: 9: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,744 INFO L273 TraceCheckUtils]: 10: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,745 INFO L273 TraceCheckUtils]: 11: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,745 INFO L273 TraceCheckUtils]: 12: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,746 INFO L273 TraceCheckUtils]: 13: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,747 INFO L273 TraceCheckUtils]: 14: Hoare triple {3365#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,747 INFO L273 TraceCheckUtils]: 15: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,748 INFO L273 TraceCheckUtils]: 16: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,748 INFO L273 TraceCheckUtils]: 17: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,749 INFO L273 TraceCheckUtils]: 18: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,750 INFO L273 TraceCheckUtils]: 19: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,750 INFO L273 TraceCheckUtils]: 20: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,751 INFO L273 TraceCheckUtils]: 21: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,751 INFO L273 TraceCheckUtils]: 22: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,752 INFO L273 TraceCheckUtils]: 23: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,752 INFO L273 TraceCheckUtils]: 24: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,753 INFO L273 TraceCheckUtils]: 25: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume true; {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,753 INFO L273 TraceCheckUtils]: 26: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3393#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:49:32,754 INFO L273 TraceCheckUtils]: 27: Hoare triple {3393#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,755 INFO L273 TraceCheckUtils]: 28: Hoare triple {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,756 INFO L273 TraceCheckUtils]: 29: Hoare triple {3433#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,756 INFO L273 TraceCheckUtils]: 30: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,757 INFO L273 TraceCheckUtils]: 31: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,757 INFO L273 TraceCheckUtils]: 32: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,758 INFO L273 TraceCheckUtils]: 33: Hoare triple {3440#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,759 INFO L273 TraceCheckUtils]: 34: Hoare triple {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:32,760 INFO L273 TraceCheckUtils]: 35: Hoare triple {3453#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:32,760 INFO L273 TraceCheckUtils]: 36: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:32,761 INFO L273 TraceCheckUtils]: 37: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume true; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:32,761 INFO L273 TraceCheckUtils]: 38: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3346#false} is VALID [2018-11-14 15:49:32,761 INFO L273 TraceCheckUtils]: 39: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,762 INFO L273 TraceCheckUtils]: 40: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:32,762 INFO L273 TraceCheckUtils]: 41: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:32,762 INFO L273 TraceCheckUtils]: 42: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:32,762 INFO L273 TraceCheckUtils]: 43: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,763 INFO L273 TraceCheckUtils]: 44: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:32,763 INFO L273 TraceCheckUtils]: 45: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:32,763 INFO L273 TraceCheckUtils]: 46: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:32,764 INFO L273 TraceCheckUtils]: 47: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,764 INFO L273 TraceCheckUtils]: 48: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:32,764 INFO L273 TraceCheckUtils]: 49: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:32,765 INFO L273 TraceCheckUtils]: 50: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:32,765 INFO L273 TraceCheckUtils]: 51: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,765 INFO L273 TraceCheckUtils]: 52: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:32,766 INFO L273 TraceCheckUtils]: 53: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:32,766 INFO L273 TraceCheckUtils]: 54: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:32,766 INFO L273 TraceCheckUtils]: 55: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,766 INFO L273 TraceCheckUtils]: 56: Hoare triple {3346#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 15:49:32,766 INFO L273 TraceCheckUtils]: 57: Hoare triple {3346#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3346#false} is VALID [2018-11-14 15:49:32,767 INFO L273 TraceCheckUtils]: 58: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,767 INFO L273 TraceCheckUtils]: 59: Hoare triple {3346#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 15:49:32,767 INFO L273 TraceCheckUtils]: 60: Hoare triple {3346#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {3346#false} is VALID [2018-11-14 15:49:32,767 INFO L273 TraceCheckUtils]: 61: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,767 INFO L273 TraceCheckUtils]: 62: Hoare triple {3346#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {3346#false} is VALID [2018-11-14 15:49:32,768 INFO L273 TraceCheckUtils]: 63: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:32,768 INFO L273 TraceCheckUtils]: 64: Hoare triple {3346#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:32,768 INFO L256 TraceCheckUtils]: 65: Hoare triple {3346#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {3346#false} is VALID [2018-11-14 15:49:32,768 INFO L273 TraceCheckUtils]: 66: Hoare triple {3346#false} ~cond := #in~cond; {3346#false} is VALID [2018-11-14 15:49:32,768 INFO L273 TraceCheckUtils]: 67: Hoare triple {3346#false} assume ~cond == 0bv32; {3346#false} is VALID [2018-11-14 15:49:32,769 INFO L273 TraceCheckUtils]: 68: Hoare triple {3346#false} assume !false; {3346#false} is VALID [2018-11-14 15:49:32,773 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 113 proven. 59 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-14 15:49:32,773 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:49:33,005 INFO L273 TraceCheckUtils]: 68: Hoare triple {3346#false} assume !false; {3346#false} is VALID [2018-11-14 15:49:33,006 INFO L273 TraceCheckUtils]: 67: Hoare triple {3346#false} assume ~cond == 0bv32; {3346#false} is VALID [2018-11-14 15:49:33,006 INFO L273 TraceCheckUtils]: 66: Hoare triple {3346#false} ~cond := #in~cond; {3346#false} is VALID [2018-11-14 15:49:33,006 INFO L256 TraceCheckUtils]: 65: Hoare triple {3346#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {3346#false} is VALID [2018-11-14 15:49:33,006 INFO L273 TraceCheckUtils]: 64: Hoare triple {3346#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:33,007 INFO L273 TraceCheckUtils]: 63: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,007 INFO L273 TraceCheckUtils]: 62: Hoare triple {3346#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {3346#false} is VALID [2018-11-14 15:49:33,007 INFO L273 TraceCheckUtils]: 61: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,007 INFO L273 TraceCheckUtils]: 60: Hoare triple {3346#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {3346#false} is VALID [2018-11-14 15:49:33,007 INFO L273 TraceCheckUtils]: 59: Hoare triple {3346#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 15:49:33,008 INFO L273 TraceCheckUtils]: 58: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,008 INFO L273 TraceCheckUtils]: 57: Hoare triple {3346#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3346#false} is VALID [2018-11-14 15:49:33,008 INFO L273 TraceCheckUtils]: 56: Hoare triple {3346#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3346#false} is VALID [2018-11-14 15:49:33,008 INFO L273 TraceCheckUtils]: 55: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,008 INFO L273 TraceCheckUtils]: 54: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:33,009 INFO L273 TraceCheckUtils]: 53: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:33,009 INFO L273 TraceCheckUtils]: 52: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:33,009 INFO L273 TraceCheckUtils]: 51: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,009 INFO L273 TraceCheckUtils]: 50: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:33,009 INFO L273 TraceCheckUtils]: 49: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:33,010 INFO L273 TraceCheckUtils]: 48: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:33,010 INFO L273 TraceCheckUtils]: 47: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,010 INFO L273 TraceCheckUtils]: 46: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:33,010 INFO L273 TraceCheckUtils]: 45: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:33,010 INFO L273 TraceCheckUtils]: 44: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:33,011 INFO L273 TraceCheckUtils]: 43: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,011 INFO L273 TraceCheckUtils]: 42: Hoare triple {3346#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3346#false} is VALID [2018-11-14 15:49:33,011 INFO L273 TraceCheckUtils]: 41: Hoare triple {3346#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3346#false} is VALID [2018-11-14 15:49:33,011 INFO L273 TraceCheckUtils]: 40: Hoare triple {3346#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3346#false} is VALID [2018-11-14 15:49:33,011 INFO L273 TraceCheckUtils]: 39: Hoare triple {3346#false} assume true; {3346#false} is VALID [2018-11-14 15:49:33,017 INFO L273 TraceCheckUtils]: 38: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3346#false} is VALID [2018-11-14 15:49:33,017 INFO L273 TraceCheckUtils]: 37: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} assume true; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,018 INFO L273 TraceCheckUtils]: 36: Hoare triple {3460#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,018 INFO L273 TraceCheckUtils]: 35: Hoare triple {3659#(bvsge main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3460#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,018 INFO L273 TraceCheckUtils]: 34: Hoare triple {3659#(bvsge main_~j~0 (_ bv0 32))} assume true; {3659#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,019 INFO L273 TraceCheckUtils]: 33: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3659#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,019 INFO L273 TraceCheckUtils]: 32: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,020 INFO L273 TraceCheckUtils]: 31: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,020 INFO L273 TraceCheckUtils]: 30: Hoare triple {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,025 INFO L273 TraceCheckUtils]: 29: Hoare triple {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3666#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,025 INFO L273 TraceCheckUtils]: 28: Hoare triple {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,028 INFO L273 TraceCheckUtils]: 27: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3679#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,028 INFO L273 TraceCheckUtils]: 26: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,029 INFO L273 TraceCheckUtils]: 25: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,029 INFO L273 TraceCheckUtils]: 24: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,029 INFO L273 TraceCheckUtils]: 23: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,030 INFO L273 TraceCheckUtils]: 22: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,030 INFO L273 TraceCheckUtils]: 21: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,030 INFO L273 TraceCheckUtils]: 20: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,031 INFO L273 TraceCheckUtils]: 19: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,031 INFO L273 TraceCheckUtils]: 18: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,032 INFO L273 TraceCheckUtils]: 17: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,032 INFO L273 TraceCheckUtils]: 16: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,033 INFO L273 TraceCheckUtils]: 15: Hoare triple {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,036 INFO L273 TraceCheckUtils]: 14: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3686#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:49:33,036 INFO L273 TraceCheckUtils]: 13: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,037 INFO L273 TraceCheckUtils]: 12: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume true; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,037 INFO L273 TraceCheckUtils]: 11: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,038 INFO L273 TraceCheckUtils]: 10: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,038 INFO L273 TraceCheckUtils]: 9: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,038 INFO L273 TraceCheckUtils]: 8: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume true; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,039 INFO L273 TraceCheckUtils]: 7: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,039 INFO L273 TraceCheckUtils]: 6: Hoare triple {3726#(bvsge main_~i~0 (_ bv0 32))} assume true; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,040 INFO L273 TraceCheckUtils]: 5: Hoare triple {3345#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {3726#(bvsge main_~i~0 (_ bv0 32))} is VALID [2018-11-14 15:49:33,040 INFO L256 TraceCheckUtils]: 4: Hoare triple {3345#true} call #t~ret8 := main(); {3345#true} is VALID [2018-11-14 15:49:33,040 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3345#true} {3345#true} #87#return; {3345#true} is VALID [2018-11-14 15:49:33,041 INFO L273 TraceCheckUtils]: 2: Hoare triple {3345#true} assume true; {3345#true} is VALID [2018-11-14 15:49:33,041 INFO L273 TraceCheckUtils]: 1: Hoare triple {3345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {3345#true} is VALID [2018-11-14 15:49:33,041 INFO L256 TraceCheckUtils]: 0: Hoare triple {3345#true} call ULTIMATE.init(); {3345#true} is VALID [2018-11-14 15:49:33,046 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 113 proven. 59 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-11-14 15:49:33,047 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:49:33,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-11-14 15:49:33,048 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 69 [2018-11-14 15:49:33,048 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:33,048 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-14 15:49:33,143 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:33,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-14 15:49:33,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-14 15:49:33,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2018-11-14 15:49:33,144 INFO L87 Difference]: Start difference. First operand 116 states and 147 transitions. Second operand 13 states. [2018-11-14 15:49:36,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:36,040 INFO L93 Difference]: Finished difference Result 294 states and 380 transitions. [2018-11-14 15:49:36,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-14 15:49:36,040 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 69 [2018-11-14 15:49:36,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:49:36,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 15:49:36,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 206 transitions. [2018-11-14 15:49:36,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 15:49:36,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 206 transitions. [2018-11-14 15:49:36,053 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 32 states and 206 transitions. [2018-11-14 15:49:36,501 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 206 edges. 206 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:36,506 INFO L225 Difference]: With dead ends: 294 [2018-11-14 15:49:36,507 INFO L226 Difference]: Without dead ends: 207 [2018-11-14 15:49:36,508 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=330, Invalid=1002, Unknown=0, NotChecked=0, Total=1332 [2018-11-14 15:49:36,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-11-14 15:49:36,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 172. [2018-11-14 15:49:36,877 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:49:36,877 INFO L82 GeneralOperation]: Start isEquivalent. First operand 207 states. Second operand 172 states. [2018-11-14 15:49:36,877 INFO L74 IsIncluded]: Start isIncluded. First operand 207 states. Second operand 172 states. [2018-11-14 15:49:36,878 INFO L87 Difference]: Start difference. First operand 207 states. Second operand 172 states. [2018-11-14 15:49:36,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:36,888 INFO L93 Difference]: Finished difference Result 207 states and 266 transitions. [2018-11-14 15:49:36,888 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 266 transitions. [2018-11-14 15:49:36,889 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:36,889 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:36,889 INFO L74 IsIncluded]: Start isIncluded. First operand 172 states. Second operand 207 states. [2018-11-14 15:49:36,890 INFO L87 Difference]: Start difference. First operand 172 states. Second operand 207 states. [2018-11-14 15:49:36,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:49:36,899 INFO L93 Difference]: Finished difference Result 207 states and 266 transitions. [2018-11-14 15:49:36,899 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 266 transitions. [2018-11-14 15:49:36,900 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:49:36,900 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:49:36,900 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:49:36,900 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:49:36,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-11-14 15:49:36,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 221 transitions. [2018-11-14 15:49:36,907 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 221 transitions. Word has length 69 [2018-11-14 15:49:36,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:49:36,907 INFO L480 AbstractCegarLoop]: Abstraction has 172 states and 221 transitions. [2018-11-14 15:49:36,907 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-14 15:49:36,907 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 221 transitions. [2018-11-14 15:49:36,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-11-14 15:49:36,908 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:49:36,909 INFO L375 BasicCegarLoop]: trace histogram [14, 10, 10, 10, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:49:36,909 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:49:36,909 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:49:36,909 INFO L82 PathProgramCache]: Analyzing trace with hash 1686959430, now seen corresponding path program 5 times [2018-11-14 15:49:36,910 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:49:36,910 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:49:36,935 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2018-11-14 15:49:37,342 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2018-11-14 15:49:37,343 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:49:37,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:49:37,380 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:49:38,136 INFO L256 TraceCheckUtils]: 0: Hoare triple {4841#true} call ULTIMATE.init(); {4841#true} is VALID [2018-11-14 15:49:38,137 INFO L273 TraceCheckUtils]: 1: Hoare triple {4841#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4841#true} is VALID [2018-11-14 15:49:38,137 INFO L273 TraceCheckUtils]: 2: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:38,137 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4841#true} {4841#true} #87#return; {4841#true} is VALID [2018-11-14 15:49:38,138 INFO L256 TraceCheckUtils]: 4: Hoare triple {4841#true} call #t~ret8 := main(); {4841#true} is VALID [2018-11-14 15:49:38,138 INFO L273 TraceCheckUtils]: 5: Hoare triple {4841#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {4841#true} is VALID [2018-11-14 15:49:38,138 INFO L273 TraceCheckUtils]: 6: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:38,139 INFO L273 TraceCheckUtils]: 7: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4841#true} is VALID [2018-11-14 15:49:38,139 INFO L273 TraceCheckUtils]: 8: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:38,139 INFO L273 TraceCheckUtils]: 9: Hoare triple {4841#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4841#true} is VALID [2018-11-14 15:49:38,139 INFO L273 TraceCheckUtils]: 10: Hoare triple {4841#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4841#true} is VALID [2018-11-14 15:49:38,139 INFO L273 TraceCheckUtils]: 11: Hoare triple {4841#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4841#true} is VALID [2018-11-14 15:49:38,139 INFO L273 TraceCheckUtils]: 12: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:38,140 INFO L273 TraceCheckUtils]: 13: Hoare triple {4841#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4841#true} is VALID [2018-11-14 15:49:38,140 INFO L273 TraceCheckUtils]: 14: Hoare triple {4841#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4841#true} is VALID [2018-11-14 15:49:38,140 INFO L273 TraceCheckUtils]: 15: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:38,152 INFO L273 TraceCheckUtils]: 16: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:49:38,152 INFO L273 TraceCheckUtils]: 17: Hoare triple {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume true; {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:49:38,153 INFO L273 TraceCheckUtils]: 18: Hoare triple {4894#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:49:38,154 INFO L273 TraceCheckUtils]: 19: Hoare triple {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:49:38,183 INFO L273 TraceCheckUtils]: 20: Hoare triple {4901#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:49:38,184 INFO L273 TraceCheckUtils]: 21: Hoare triple {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume true; {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:49:38,185 INFO L273 TraceCheckUtils]: 22: Hoare triple {4908#(and (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:49:38,185 INFO L273 TraceCheckUtils]: 23: Hoare triple {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:49:38,230 INFO L273 TraceCheckUtils]: 24: Hoare triple {4915#(and (bvsge main_~j~0 (_ bv0 32)) (bvsge (bvadd main_~j~0 (_ bv1 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,230 INFO L273 TraceCheckUtils]: 25: Hoare triple {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,231 INFO L273 TraceCheckUtils]: 26: Hoare triple {4922#(and (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4929#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,237 INFO L273 TraceCheckUtils]: 27: Hoare triple {4929#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} is VALID [2018-11-14 15:49:38,238 INFO L273 TraceCheckUtils]: 28: Hoare triple {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} assume true; {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} is VALID [2018-11-14 15:49:38,239 INFO L273 TraceCheckUtils]: 29: Hoare triple {4933#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,256 INFO L273 TraceCheckUtils]: 30: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,272 INFO L273 TraceCheckUtils]: 31: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,287 INFO L273 TraceCheckUtils]: 32: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,290 INFO L273 TraceCheckUtils]: 33: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,290 INFO L273 TraceCheckUtils]: 34: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,291 INFO L273 TraceCheckUtils]: 35: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,292 INFO L273 TraceCheckUtils]: 36: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,292 INFO L273 TraceCheckUtils]: 37: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,293 INFO L273 TraceCheckUtils]: 38: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,295 INFO L273 TraceCheckUtils]: 39: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,296 INFO L273 TraceCheckUtils]: 40: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,296 INFO L273 TraceCheckUtils]: 41: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,297 INFO L273 TraceCheckUtils]: 42: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,297 INFO L273 TraceCheckUtils]: 43: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:49:38,301 INFO L273 TraceCheckUtils]: 44: Hoare triple {4940#(and (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,302 INFO L273 TraceCheckUtils]: 45: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,302 INFO L273 TraceCheckUtils]: 46: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,303 INFO L273 TraceCheckUtils]: 47: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,303 INFO L273 TraceCheckUtils]: 48: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,304 INFO L273 TraceCheckUtils]: 49: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,305 INFO L273 TraceCheckUtils]: 50: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,305 INFO L273 TraceCheckUtils]: 51: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,306 INFO L273 TraceCheckUtils]: 52: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,307 INFO L273 TraceCheckUtils]: 53: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,308 INFO L273 TraceCheckUtils]: 54: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,309 INFO L273 TraceCheckUtils]: 55: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,310 INFO L273 TraceCheckUtils]: 56: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,311 INFO L273 TraceCheckUtils]: 57: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,312 INFO L273 TraceCheckUtils]: 58: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,313 INFO L273 TraceCheckUtils]: 59: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,314 INFO L273 TraceCheckUtils]: 60: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,315 INFO L273 TraceCheckUtils]: 61: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,316 INFO L273 TraceCheckUtils]: 62: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,317 INFO L273 TraceCheckUtils]: 63: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,318 INFO L273 TraceCheckUtils]: 64: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,322 INFO L273 TraceCheckUtils]: 65: Hoare triple {4986#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,323 INFO L273 TraceCheckUtils]: 66: Hoare triple {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-14 15:49:38,325 INFO L273 TraceCheckUtils]: 67: Hoare triple {5050#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {5057#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:38,325 INFO L273 TraceCheckUtils]: 68: Hoare triple {5057#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {4842#false} is VALID [2018-11-14 15:49:38,325 INFO L273 TraceCheckUtils]: 69: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 15:49:38,325 INFO L273 TraceCheckUtils]: 70: Hoare triple {4842#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {4842#false} is VALID [2018-11-14 15:49:38,326 INFO L273 TraceCheckUtils]: 71: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 15:49:38,326 INFO L273 TraceCheckUtils]: 72: Hoare triple {4842#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {4842#false} is VALID [2018-11-14 15:49:38,326 INFO L256 TraceCheckUtils]: 73: Hoare triple {4842#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {4842#false} is VALID [2018-11-14 15:49:38,326 INFO L273 TraceCheckUtils]: 74: Hoare triple {4842#false} ~cond := #in~cond; {4842#false} is VALID [2018-11-14 15:49:38,327 INFO L273 TraceCheckUtils]: 75: Hoare triple {4842#false} assume ~cond == 0bv32; {4842#false} is VALID [2018-11-14 15:49:38,327 INFO L273 TraceCheckUtils]: 76: Hoare triple {4842#false} assume !false; {4842#false} is VALID [2018-11-14 15:49:38,360 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 81 proven. 163 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-14 15:49:38,360 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:49:39,220 INFO L273 TraceCheckUtils]: 76: Hoare triple {4842#false} assume !false; {4842#false} is VALID [2018-11-14 15:49:39,220 INFO L273 TraceCheckUtils]: 75: Hoare triple {4842#false} assume ~cond == 0bv32; {4842#false} is VALID [2018-11-14 15:49:39,220 INFO L273 TraceCheckUtils]: 74: Hoare triple {4842#false} ~cond := #in~cond; {4842#false} is VALID [2018-11-14 15:49:39,220 INFO L256 TraceCheckUtils]: 73: Hoare triple {4842#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {4842#false} is VALID [2018-11-14 15:49:39,221 INFO L273 TraceCheckUtils]: 72: Hoare triple {4842#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {4842#false} is VALID [2018-11-14 15:49:39,221 INFO L273 TraceCheckUtils]: 71: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 15:49:39,221 INFO L273 TraceCheckUtils]: 70: Hoare triple {4842#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {4842#false} is VALID [2018-11-14 15:49:39,221 INFO L273 TraceCheckUtils]: 69: Hoare triple {4842#false} assume true; {4842#false} is VALID [2018-11-14 15:49:39,222 INFO L273 TraceCheckUtils]: 68: Hoare triple {5057#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {4842#false} is VALID [2018-11-14 15:49:39,222 INFO L273 TraceCheckUtils]: 67: Hoare triple {5112#(bvslt main_~i~0 (_ bv100000 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {5057#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:49:39,222 INFO L273 TraceCheckUtils]: 66: Hoare triple {5112#(bvslt main_~i~0 (_ bv100000 32))} assume true; {5112#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 15:49:39,223 INFO L273 TraceCheckUtils]: 65: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5112#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 15:49:39,224 INFO L273 TraceCheckUtils]: 64: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,225 INFO L273 TraceCheckUtils]: 63: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,225 INFO L273 TraceCheckUtils]: 62: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,225 INFO L273 TraceCheckUtils]: 61: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,226 INFO L273 TraceCheckUtils]: 60: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,226 INFO L273 TraceCheckUtils]: 59: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,226 INFO L273 TraceCheckUtils]: 58: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,227 INFO L273 TraceCheckUtils]: 57: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,227 INFO L273 TraceCheckUtils]: 56: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,227 INFO L273 TraceCheckUtils]: 55: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,227 INFO L273 TraceCheckUtils]: 54: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,228 INFO L273 TraceCheckUtils]: 53: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,228 INFO L273 TraceCheckUtils]: 52: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,229 INFO L273 TraceCheckUtils]: 51: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,229 INFO L273 TraceCheckUtils]: 50: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,230 INFO L273 TraceCheckUtils]: 49: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,230 INFO L273 TraceCheckUtils]: 48: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,231 INFO L273 TraceCheckUtils]: 47: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,231 INFO L273 TraceCheckUtils]: 46: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,232 INFO L273 TraceCheckUtils]: 45: Hoare triple {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,238 INFO L273 TraceCheckUtils]: 44: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5119#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,238 INFO L273 TraceCheckUtils]: 43: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,239 INFO L273 TraceCheckUtils]: 42: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,239 INFO L273 TraceCheckUtils]: 41: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,239 INFO L273 TraceCheckUtils]: 40: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,240 INFO L273 TraceCheckUtils]: 39: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,240 INFO L273 TraceCheckUtils]: 38: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,240 INFO L273 TraceCheckUtils]: 37: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,241 INFO L273 TraceCheckUtils]: 36: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,241 INFO L273 TraceCheckUtils]: 35: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,241 INFO L273 TraceCheckUtils]: 34: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,242 INFO L273 TraceCheckUtils]: 33: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,242 INFO L273 TraceCheckUtils]: 32: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,243 INFO L273 TraceCheckUtils]: 31: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,243 INFO L273 TraceCheckUtils]: 30: Hoare triple {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} assume true; {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,244 INFO L273 TraceCheckUtils]: 29: Hoare triple {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {5183#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-14 15:49:39,252 INFO L273 TraceCheckUtils]: 28: Hoare triple {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,258 INFO L273 TraceCheckUtils]: 27: Hoare triple {5236#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5229#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,258 INFO L273 TraceCheckUtils]: 26: Hoare triple {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {5236#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,259 INFO L273 TraceCheckUtils]: 25: Hoare triple {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume true; {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,259 INFO L273 TraceCheckUtils]: 24: Hoare triple {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5240#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,260 INFO L273 TraceCheckUtils]: 23: Hoare triple {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,260 INFO L273 TraceCheckUtils]: 22: Hoare triple {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5247#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,260 INFO L273 TraceCheckUtils]: 21: Hoare triple {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume true; {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,263 INFO L273 TraceCheckUtils]: 20: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {5254#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,264 INFO L273 TraceCheckUtils]: 19: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,265 INFO L273 TraceCheckUtils]: 18: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,265 INFO L273 TraceCheckUtils]: 17: Hoare triple {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} assume true; {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,268 INFO L273 TraceCheckUtils]: 16: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {5261#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:49:39,268 INFO L273 TraceCheckUtils]: 15: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:39,268 INFO L273 TraceCheckUtils]: 14: Hoare triple {4841#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4841#true} is VALID [2018-11-14 15:49:39,268 INFO L273 TraceCheckUtils]: 13: Hoare triple {4841#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {4841#true} is VALID [2018-11-14 15:49:39,269 INFO L273 TraceCheckUtils]: 12: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:39,269 INFO L273 TraceCheckUtils]: 11: Hoare triple {4841#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {4841#true} is VALID [2018-11-14 15:49:39,269 INFO L273 TraceCheckUtils]: 10: Hoare triple {4841#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {4841#true} is VALID [2018-11-14 15:49:39,269 INFO L273 TraceCheckUtils]: 9: Hoare triple {4841#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4841#true} is VALID [2018-11-14 15:49:39,269 INFO L273 TraceCheckUtils]: 8: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L273 TraceCheckUtils]: 7: Hoare triple {4841#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L273 TraceCheckUtils]: 6: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L273 TraceCheckUtils]: 5: Hoare triple {4841#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L256 TraceCheckUtils]: 4: Hoare triple {4841#true} call #t~ret8 := main(); {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4841#true} {4841#true} #87#return; {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L273 TraceCheckUtils]: 2: Hoare triple {4841#true} assume true; {4841#true} is VALID [2018-11-14 15:49:39,270 INFO L273 TraceCheckUtils]: 1: Hoare triple {4841#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4841#true} is VALID [2018-11-14 15:49:39,271 INFO L256 TraceCheckUtils]: 0: Hoare triple {4841#true} call ULTIMATE.init(); {4841#true} is VALID [2018-11-14 15:49:39,278 INFO L134 CoverageAnalysis]: Checked inductivity of 298 backedges. 81 proven. 163 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-11-14 15:49:39,283 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:49:39,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 22 [2018-11-14 15:49:39,284 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 77 [2018-11-14 15:49:39,284 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:49:39,284 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-14 15:49:39,511 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:49:39,511 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-14 15:49:39,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-14 15:49:39,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2018-11-14 15:49:39,513 INFO L87 Difference]: Start difference. First operand 172 states and 221 transitions. Second operand 22 states. [2018-11-14 15:49:39,872 WARN L179 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 21 [2018-11-14 15:49:41,967 WARN L179 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 24 [2018-11-14 15:49:43,231 WARN L179 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 30 [2018-11-14 15:49:43,788 WARN L179 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 18 [2018-11-14 15:49:48,640 WARN L179 SmtUtils]: Spent 179.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 27 [2018-11-14 15:49:49,010 WARN L179 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 18 [2018-11-14 15:49:49,395 WARN L179 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 21 [2018-11-14 15:49:52,645 WARN L179 SmtUtils]: Spent 215.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 26 [2018-11-14 15:49:53,840 WARN L179 SmtUtils]: Spent 135.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 20 [2018-11-14 15:49:54,732 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 18 [2018-11-14 15:49:55,898 WARN L179 SmtUtils]: Spent 197.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 16 [2018-11-14 15:49:56,883 WARN L179 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 26 [2018-11-14 15:49:57,635 WARN L179 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 20 [2018-11-14 15:49:58,453 WARN L179 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 21 [2018-11-14 15:49:58,815 WARN L179 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 20 [2018-11-14 15:50:00,545 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 20 [2018-11-14 15:50:01,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:01,205 INFO L93 Difference]: Finished difference Result 1236 states and 1626 transitions. [2018-11-14 15:50:01,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2018-11-14 15:50:01,206 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 77 [2018-11-14 15:50:01,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:50:01,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 15:50:01,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 370 transitions. [2018-11-14 15:50:01,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 15:50:01,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 370 transitions. [2018-11-14 15:50:01,222 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 90 states and 370 transitions. [2018-11-14 15:50:03,248 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 370 edges. 370 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:03,330 INFO L225 Difference]: With dead ends: 1236 [2018-11-14 15:50:03,331 INFO L226 Difference]: Without dead ends: 1051 [2018-11-14 15:50:03,336 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 269 GetRequests, 163 SyntacticMatches, 3 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3948 ImplicationChecksByTransitivity, 11.6s TimeCoverageRelationStatistics Valid=2691, Invalid=8229, Unknown=0, NotChecked=0, Total=10920 [2018-11-14 15:50:03,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1051 states. [2018-11-14 15:50:04,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1051 to 637. [2018-11-14 15:50:04,014 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:50:04,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1051 states. Second operand 637 states. [2018-11-14 15:50:04,014 INFO L74 IsIncluded]: Start isIncluded. First operand 1051 states. Second operand 637 states. [2018-11-14 15:50:04,014 INFO L87 Difference]: Start difference. First operand 1051 states. Second operand 637 states. [2018-11-14 15:50:04,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:04,076 INFO L93 Difference]: Finished difference Result 1051 states and 1360 transitions. [2018-11-14 15:50:04,076 INFO L276 IsEmpty]: Start isEmpty. Operand 1051 states and 1360 transitions. [2018-11-14 15:50:04,078 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:04,078 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:04,079 INFO L74 IsIncluded]: Start isIncluded. First operand 637 states. Second operand 1051 states. [2018-11-14 15:50:04,079 INFO L87 Difference]: Start difference. First operand 637 states. Second operand 1051 states. [2018-11-14 15:50:04,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:04,144 INFO L93 Difference]: Finished difference Result 1051 states and 1360 transitions. [2018-11-14 15:50:04,144 INFO L276 IsEmpty]: Start isEmpty. Operand 1051 states and 1360 transitions. [2018-11-14 15:50:04,146 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:04,146 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:04,147 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:50:04,147 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:50:04,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 637 states. [2018-11-14 15:50:04,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 637 states to 637 states and 845 transitions. [2018-11-14 15:50:04,178 INFO L78 Accepts]: Start accepts. Automaton has 637 states and 845 transitions. Word has length 77 [2018-11-14 15:50:04,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:50:04,179 INFO L480 AbstractCegarLoop]: Abstraction has 637 states and 845 transitions. [2018-11-14 15:50:04,179 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-14 15:50:04,179 INFO L276 IsEmpty]: Start isEmpty. Operand 637 states and 845 transitions. [2018-11-14 15:50:04,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-11-14 15:50:04,181 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:50:04,181 INFO L375 BasicCegarLoop]: trace histogram [21, 17, 17, 17, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:50:04,182 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:50:04,182 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:50:04,182 INFO L82 PathProgramCache]: Analyzing trace with hash 1913183663, now seen corresponding path program 6 times [2018-11-14 15:50:04,183 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:50:04,183 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:50:04,211 INFO L101 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2018-11-14 15:50:04,862 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2018-11-14 15:50:04,862 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:50:04,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:50:04,910 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:50:05,301 INFO L256 TraceCheckUtils]: 0: Hoare triple {10035#true} call ULTIMATE.init(); {10035#true} is VALID [2018-11-14 15:50:05,302 INFO L273 TraceCheckUtils]: 1: Hoare triple {10035#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10035#true} is VALID [2018-11-14 15:50:05,302 INFO L273 TraceCheckUtils]: 2: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,302 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10035#true} {10035#true} #87#return; {10035#true} is VALID [2018-11-14 15:50:05,302 INFO L256 TraceCheckUtils]: 4: Hoare triple {10035#true} call #t~ret8 := main(); {10035#true} is VALID [2018-11-14 15:50:05,303 INFO L273 TraceCheckUtils]: 5: Hoare triple {10035#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,303 INFO L273 TraceCheckUtils]: 6: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,303 INFO L273 TraceCheckUtils]: 7: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 15:50:05,303 INFO L273 TraceCheckUtils]: 8: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,303 INFO L273 TraceCheckUtils]: 9: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 10: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 11: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 12: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 13: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 14: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 15: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,304 INFO L273 TraceCheckUtils]: 16: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 17: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 18: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 19: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 20: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 21: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 22: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 23: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,305 INFO L273 TraceCheckUtils]: 24: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 25: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 26: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 27: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 28: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 29: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 30: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 31: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,306 INFO L273 TraceCheckUtils]: 32: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 33: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 34: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 35: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 36: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 37: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 38: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 39: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,307 INFO L273 TraceCheckUtils]: 40: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 41: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 42: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 43: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 44: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 45: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 46: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 47: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,308 INFO L273 TraceCheckUtils]: 48: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 49: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 50: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 51: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 52: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 53: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 54: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 55: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,309 INFO L273 TraceCheckUtils]: 56: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 57: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 58: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 59: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 60: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 61: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 62: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 63: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,310 INFO L273 TraceCheckUtils]: 64: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 65: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 66: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 67: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 68: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 69: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 70: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,311 INFO L273 TraceCheckUtils]: 71: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 15:50:05,312 INFO L273 TraceCheckUtils]: 72: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 15:50:05,312 INFO L273 TraceCheckUtils]: 73: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:05,328 INFO L273 TraceCheckUtils]: 74: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,337 INFO L273 TraceCheckUtils]: 75: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume true; {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,338 INFO L273 TraceCheckUtils]: 76: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,338 INFO L273 TraceCheckUtils]: 77: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,361 INFO L273 TraceCheckUtils]: 78: Hoare triple {10262#(= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,362 INFO L273 TraceCheckUtils]: 79: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} assume true; {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,362 INFO L273 TraceCheckUtils]: 80: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,363 INFO L273 TraceCheckUtils]: 81: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,385 INFO L273 TraceCheckUtils]: 82: Hoare triple {10275#(= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 15:50:05,385 INFO L273 TraceCheckUtils]: 83: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} assume true; {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 15:50:05,386 INFO L273 TraceCheckUtils]: 84: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 15:50:05,386 INFO L273 TraceCheckUtils]: 85: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} is VALID [2018-11-14 15:50:05,405 INFO L273 TraceCheckUtils]: 86: Hoare triple {10288#(= (bvadd main_~j~0 (_ bv3 32)) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,405 INFO L273 TraceCheckUtils]: 87: Hoare triple {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} assume true; {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} is VALID [2018-11-14 15:50:05,406 INFO L273 TraceCheckUtils]: 88: Hoare triple {10301#(= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 15:50:05,406 INFO L273 TraceCheckUtils]: 89: Hoare triple {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 15:50:05,439 INFO L273 TraceCheckUtils]: 90: Hoare triple {10308#(and (bvsge main_~j~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:05,440 INFO L273 TraceCheckUtils]: 91: Hoare triple {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume true; {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:05,440 INFO L273 TraceCheckUtils]: 92: Hoare triple {10315#(and (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10322#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:05,445 INFO L273 TraceCheckUtils]: 93: Hoare triple {10322#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))) (bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} is VALID [2018-11-14 15:50:05,445 INFO L273 TraceCheckUtils]: 94: Hoare triple {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} assume true; {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} is VALID [2018-11-14 15:50:05,447 INFO L273 TraceCheckUtils]: 95: Hoare triple {10326#(and (bvsge (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)) (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {10333#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:05,447 INFO L273 TraceCheckUtils]: 96: Hoare triple {10333#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {10036#false} is VALID [2018-11-14 15:50:05,447 INFO L273 TraceCheckUtils]: 97: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L273 TraceCheckUtils]: 98: Hoare triple {10036#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L273 TraceCheckUtils]: 99: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L273 TraceCheckUtils]: 100: Hoare triple {10036#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L256 TraceCheckUtils]: 101: Hoare triple {10036#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L273 TraceCheckUtils]: 102: Hoare triple {10036#false} ~cond := #in~cond; {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L273 TraceCheckUtils]: 103: Hoare triple {10036#false} assume ~cond == 0bv32; {10036#false} is VALID [2018-11-14 15:50:05,448 INFO L273 TraceCheckUtils]: 104: Hoare triple {10036#false} assume !false; {10036#false} is VALID [2018-11-14 15:50:05,459 INFO L134 CoverageAnalysis]: Checked inductivity of 718 backedges. 275 proven. 32 refuted. 0 times theorem prover too weak. 411 trivial. 0 not checked. [2018-11-14 15:50:05,459 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:50:06,255 INFO L273 TraceCheckUtils]: 104: Hoare triple {10036#false} assume !false; {10036#false} is VALID [2018-11-14 15:50:06,255 INFO L273 TraceCheckUtils]: 103: Hoare triple {10036#false} assume ~cond == 0bv32; {10036#false} is VALID [2018-11-14 15:50:06,255 INFO L273 TraceCheckUtils]: 102: Hoare triple {10036#false} ~cond := #in~cond; {10036#false} is VALID [2018-11-14 15:50:06,255 INFO L256 TraceCheckUtils]: 101: Hoare triple {10036#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {10036#false} is VALID [2018-11-14 15:50:06,255 INFO L273 TraceCheckUtils]: 100: Hoare triple {10036#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {10036#false} is VALID [2018-11-14 15:50:06,256 INFO L273 TraceCheckUtils]: 99: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 15:50:06,256 INFO L273 TraceCheckUtils]: 98: Hoare triple {10036#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {10036#false} is VALID [2018-11-14 15:50:06,256 INFO L273 TraceCheckUtils]: 97: Hoare triple {10036#false} assume true; {10036#false} is VALID [2018-11-14 15:50:06,256 INFO L273 TraceCheckUtils]: 96: Hoare triple {10333#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {10036#false} is VALID [2018-11-14 15:50:06,257 INFO L273 TraceCheckUtils]: 95: Hoare triple {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {10333#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:06,257 INFO L273 TraceCheckUtils]: 94: Hoare triple {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume true; {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:06,257 INFO L273 TraceCheckUtils]: 93: Hoare triple {10395#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10388#(or (bvslt main_~i~0 (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:06,258 INFO L273 TraceCheckUtils]: 92: Hoare triple {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10395#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:06,258 INFO L273 TraceCheckUtils]: 91: Hoare triple {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} assume true; {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:06,259 INFO L273 TraceCheckUtils]: 90: Hoare triple {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10399#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:06,259 INFO L273 TraceCheckUtils]: 89: Hoare triple {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:06,260 INFO L273 TraceCheckUtils]: 88: Hoare triple {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10406#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:06,260 INFO L273 TraceCheckUtils]: 87: Hoare triple {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:06,264 INFO L273 TraceCheckUtils]: 86: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10413#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:06,264 INFO L273 TraceCheckUtils]: 85: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,265 INFO L273 TraceCheckUtils]: 84: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,265 INFO L273 TraceCheckUtils]: 83: Hoare triple {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} assume true; {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,269 INFO L273 TraceCheckUtils]: 82: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10420#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,270 INFO L273 TraceCheckUtils]: 81: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,270 INFO L273 TraceCheckUtils]: 80: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,270 INFO L273 TraceCheckUtils]: 79: Hoare triple {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume true; {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,274 INFO L273 TraceCheckUtils]: 78: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10433#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,275 INFO L273 TraceCheckUtils]: 77: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,275 INFO L273 TraceCheckUtils]: 76: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,275 INFO L273 TraceCheckUtils]: 75: Hoare triple {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} assume true; {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,278 INFO L273 TraceCheckUtils]: 74: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10446#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:06,278 INFO L273 TraceCheckUtils]: 73: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 72: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 71: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 70: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 69: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 68: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 67: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 66: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,279 INFO L273 TraceCheckUtils]: 65: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,280 INFO L273 TraceCheckUtils]: 64: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,280 INFO L273 TraceCheckUtils]: 63: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,280 INFO L273 TraceCheckUtils]: 62: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,280 INFO L273 TraceCheckUtils]: 61: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,280 INFO L273 TraceCheckUtils]: 60: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,280 INFO L273 TraceCheckUtils]: 59: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,281 INFO L273 TraceCheckUtils]: 58: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,281 INFO L273 TraceCheckUtils]: 57: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,281 INFO L273 TraceCheckUtils]: 56: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,281 INFO L273 TraceCheckUtils]: 55: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,281 INFO L273 TraceCheckUtils]: 54: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,281 INFO L273 TraceCheckUtils]: 53: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,282 INFO L273 TraceCheckUtils]: 52: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,282 INFO L273 TraceCheckUtils]: 51: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,282 INFO L273 TraceCheckUtils]: 50: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,282 INFO L273 TraceCheckUtils]: 49: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,282 INFO L273 TraceCheckUtils]: 48: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,282 INFO L273 TraceCheckUtils]: 47: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,283 INFO L273 TraceCheckUtils]: 46: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,283 INFO L273 TraceCheckUtils]: 45: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 15:50:06,283 INFO L273 TraceCheckUtils]: 44: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,283 INFO L273 TraceCheckUtils]: 43: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 15:50:06,283 INFO L273 TraceCheckUtils]: 42: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 15:50:06,283 INFO L273 TraceCheckUtils]: 41: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,284 INFO L273 TraceCheckUtils]: 40: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,284 INFO L273 TraceCheckUtils]: 39: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,284 INFO L273 TraceCheckUtils]: 38: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,284 INFO L273 TraceCheckUtils]: 37: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,284 INFO L273 TraceCheckUtils]: 36: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,285 INFO L273 TraceCheckUtils]: 35: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,285 INFO L273 TraceCheckUtils]: 34: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,285 INFO L273 TraceCheckUtils]: 33: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,285 INFO L273 TraceCheckUtils]: 32: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,285 INFO L273 TraceCheckUtils]: 31: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,285 INFO L273 TraceCheckUtils]: 30: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,286 INFO L273 TraceCheckUtils]: 29: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,286 INFO L273 TraceCheckUtils]: 28: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,286 INFO L273 TraceCheckUtils]: 27: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,286 INFO L273 TraceCheckUtils]: 26: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,286 INFO L273 TraceCheckUtils]: 25: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,286 INFO L273 TraceCheckUtils]: 24: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,287 INFO L273 TraceCheckUtils]: 23: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,287 INFO L273 TraceCheckUtils]: 22: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,287 INFO L273 TraceCheckUtils]: 21: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,287 INFO L273 TraceCheckUtils]: 20: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,287 INFO L273 TraceCheckUtils]: 19: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,287 INFO L273 TraceCheckUtils]: 18: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,288 INFO L273 TraceCheckUtils]: 17: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,288 INFO L273 TraceCheckUtils]: 16: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 15:50:06,288 INFO L273 TraceCheckUtils]: 15: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,288 INFO L273 TraceCheckUtils]: 14: Hoare triple {10035#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10035#true} is VALID [2018-11-14 15:50:06,288 INFO L273 TraceCheckUtils]: 13: Hoare triple {10035#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {10035#true} is VALID [2018-11-14 15:50:06,289 INFO L273 TraceCheckUtils]: 12: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,289 INFO L273 TraceCheckUtils]: 11: Hoare triple {10035#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {10035#true} is VALID [2018-11-14 15:50:06,289 INFO L273 TraceCheckUtils]: 10: Hoare triple {10035#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,289 INFO L273 TraceCheckUtils]: 9: Hoare triple {10035#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {10035#true} is VALID [2018-11-14 15:50:06,289 INFO L273 TraceCheckUtils]: 8: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,289 INFO L273 TraceCheckUtils]: 7: Hoare triple {10035#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {10035#true} is VALID [2018-11-14 15:50:06,290 INFO L273 TraceCheckUtils]: 6: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,290 INFO L273 TraceCheckUtils]: 5: Hoare triple {10035#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {10035#true} is VALID [2018-11-14 15:50:06,290 INFO L256 TraceCheckUtils]: 4: Hoare triple {10035#true} call #t~ret8 := main(); {10035#true} is VALID [2018-11-14 15:50:06,290 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10035#true} {10035#true} #87#return; {10035#true} is VALID [2018-11-14 15:50:06,290 INFO L273 TraceCheckUtils]: 2: Hoare triple {10035#true} assume true; {10035#true} is VALID [2018-11-14 15:50:06,290 INFO L273 TraceCheckUtils]: 1: Hoare triple {10035#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10035#true} is VALID [2018-11-14 15:50:06,291 INFO L256 TraceCheckUtils]: 0: Hoare triple {10035#true} call ULTIMATE.init(); {10035#true} is VALID [2018-11-14 15:50:06,305 INFO L134 CoverageAnalysis]: Checked inductivity of 718 backedges. 275 proven. 32 refuted. 0 times theorem prover too weak. 411 trivial. 0 not checked. [2018-11-14 15:50:06,306 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:50:06,307 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-14 15:50:06,307 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 105 [2018-11-14 15:50:06,308 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:50:06,308 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 15:50:06,587 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:06,587 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 15:50:06,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 15:50:06,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2018-11-14 15:50:06,588 INFO L87 Difference]: Start difference. First operand 637 states and 845 transitions. Second operand 19 states. [2018-11-14 15:50:06,884 WARN L179 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 19 [2018-11-14 15:50:10,517 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 24 [2018-11-14 15:50:12,133 WARN L179 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 14 [2018-11-14 15:50:12,810 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 17 [2018-11-14 15:50:13,830 WARN L179 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 17 [2018-11-14 15:50:14,584 WARN L179 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 18 [2018-11-14 15:50:15,120 WARN L179 SmtUtils]: Spent 163.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 19 [2018-11-14 15:50:15,857 WARN L179 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 18 [2018-11-14 15:50:16,391 WARN L179 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 19 [2018-11-14 15:50:17,870 WARN L179 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 24 [2018-11-14 15:50:23,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:23,704 INFO L93 Difference]: Finished difference Result 3778 states and 5110 transitions. [2018-11-14 15:50:23,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-11-14 15:50:23,704 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 105 [2018-11-14 15:50:23,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:50:23,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 15:50:23,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 304 transitions. [2018-11-14 15:50:23,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 15:50:23,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 304 transitions. [2018-11-14 15:50:23,713 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 62 states and 304 transitions. [2018-11-14 15:50:25,115 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 304 edges. 304 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:25,575 INFO L225 Difference]: With dead ends: 3778 [2018-11-14 15:50:25,575 INFO L226 Difference]: Without dead ends: 3222 [2018-11-14 15:50:25,578 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 287 GetRequests, 219 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1473 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=1343, Invalid=3487, Unknown=0, NotChecked=0, Total=4830 [2018-11-14 15:50:25,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3222 states. [2018-11-14 15:50:26,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3222 to 1061. [2018-11-14 15:50:26,694 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:50:26,694 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3222 states. Second operand 1061 states. [2018-11-14 15:50:26,694 INFO L74 IsIncluded]: Start isIncluded. First operand 3222 states. Second operand 1061 states. [2018-11-14 15:50:26,694 INFO L87 Difference]: Start difference. First operand 3222 states. Second operand 1061 states. [2018-11-14 15:50:27,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:27,218 INFO L93 Difference]: Finished difference Result 3222 states and 4347 transitions. [2018-11-14 15:50:27,219 INFO L276 IsEmpty]: Start isEmpty. Operand 3222 states and 4347 transitions. [2018-11-14 15:50:27,225 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:27,226 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:27,226 INFO L74 IsIncluded]: Start isIncluded. First operand 1061 states. Second operand 3222 states. [2018-11-14 15:50:27,226 INFO L87 Difference]: Start difference. First operand 1061 states. Second operand 3222 states. [2018-11-14 15:50:27,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:27,812 INFO L93 Difference]: Finished difference Result 3222 states and 4347 transitions. [2018-11-14 15:50:27,812 INFO L276 IsEmpty]: Start isEmpty. Operand 3222 states and 4347 transitions. [2018-11-14 15:50:27,819 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:27,820 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:27,820 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:50:27,820 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:50:27,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1061 states. [2018-11-14 15:50:27,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1392 transitions. [2018-11-14 15:50:27,894 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1392 transitions. Word has length 105 [2018-11-14 15:50:27,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:50:27,894 INFO L480 AbstractCegarLoop]: Abstraction has 1061 states and 1392 transitions. [2018-11-14 15:50:27,894 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 15:50:27,895 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1392 transitions. [2018-11-14 15:50:27,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-11-14 15:50:27,898 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:50:27,898 INFO L375 BasicCegarLoop]: trace histogram [27, 23, 23, 23, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:50:27,899 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:50:27,899 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:50:27,899 INFO L82 PathProgramCache]: Analyzing trace with hash -1662494363, now seen corresponding path program 7 times [2018-11-14 15:50:27,899 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:50:27,900 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:50:27,927 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 15:50:28,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:50:28,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:50:28,213 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:50:28,608 INFO L256 TraceCheckUtils]: 0: Hoare triple {23378#true} call ULTIMATE.init(); {23378#true} is VALID [2018-11-14 15:50:28,609 INFO L273 TraceCheckUtils]: 1: Hoare triple {23378#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {23378#true} is VALID [2018-11-14 15:50:28,609 INFO L273 TraceCheckUtils]: 2: Hoare triple {23378#true} assume true; {23378#true} is VALID [2018-11-14 15:50:28,609 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {23378#true} {23378#true} #87#return; {23378#true} is VALID [2018-11-14 15:50:28,609 INFO L256 TraceCheckUtils]: 4: Hoare triple {23378#true} call #t~ret8 := main(); {23378#true} is VALID [2018-11-14 15:50:28,610 INFO L273 TraceCheckUtils]: 5: Hoare triple {23378#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,611 INFO L273 TraceCheckUtils]: 6: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,611 INFO L273 TraceCheckUtils]: 7: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,611 INFO L273 TraceCheckUtils]: 8: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,612 INFO L273 TraceCheckUtils]: 9: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,612 INFO L273 TraceCheckUtils]: 10: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,612 INFO L273 TraceCheckUtils]: 11: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,613 INFO L273 TraceCheckUtils]: 12: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,613 INFO L273 TraceCheckUtils]: 13: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,614 INFO L273 TraceCheckUtils]: 14: Hoare triple {23398#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23426#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:28,614 INFO L273 TraceCheckUtils]: 15: Hoare triple {23426#(= (_ bv2 32) main_~i~0)} assume true; {23426#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:28,615 INFO L273 TraceCheckUtils]: 16: Hoare triple {23426#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,616 INFO L273 TraceCheckUtils]: 17: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,616 INFO L273 TraceCheckUtils]: 18: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,617 INFO L273 TraceCheckUtils]: 19: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:28,618 INFO L273 TraceCheckUtils]: 20: Hoare triple {23433#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:28,618 INFO L273 TraceCheckUtils]: 21: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} assume true; {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:28,619 INFO L273 TraceCheckUtils]: 22: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:28,619 INFO L273 TraceCheckUtils]: 23: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23446#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:28,620 INFO L273 TraceCheckUtils]: 24: Hoare triple {23446#(= main_~j~0 (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23459#(= (_ bv4294967295 32) main_~j~0)} is VALID [2018-11-14 15:50:28,621 INFO L273 TraceCheckUtils]: 25: Hoare triple {23459#(= (_ bv4294967295 32) main_~j~0)} assume true; {23459#(= (_ bv4294967295 32) main_~j~0)} is VALID [2018-11-14 15:50:28,622 INFO L273 TraceCheckUtils]: 26: Hoare triple {23459#(= (_ bv4294967295 32) main_~j~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,622 INFO L273 TraceCheckUtils]: 27: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,622 INFO L273 TraceCheckUtils]: 28: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,622 INFO L273 TraceCheckUtils]: 29: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,622 INFO L273 TraceCheckUtils]: 30: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,623 INFO L273 TraceCheckUtils]: 31: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,623 INFO L273 TraceCheckUtils]: 32: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,623 INFO L273 TraceCheckUtils]: 33: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,623 INFO L273 TraceCheckUtils]: 34: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,623 INFO L273 TraceCheckUtils]: 35: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,624 INFO L273 TraceCheckUtils]: 36: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,624 INFO L273 TraceCheckUtils]: 37: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,624 INFO L273 TraceCheckUtils]: 38: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,624 INFO L273 TraceCheckUtils]: 39: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 40: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 41: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 42: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 43: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 44: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 45: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 15:50:28,625 INFO L273 TraceCheckUtils]: 46: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 47: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 48: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 49: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 50: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 51: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 52: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 53: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 54: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,626 INFO L273 TraceCheckUtils]: 55: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 56: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 57: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 58: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 59: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 60: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 61: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 62: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,627 INFO L273 TraceCheckUtils]: 63: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 64: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 65: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 66: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 67: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 68: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 69: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 70: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 71: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,628 INFO L273 TraceCheckUtils]: 72: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 73: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 74: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 75: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 76: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 77: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 78: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 79: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,629 INFO L273 TraceCheckUtils]: 80: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,630 INFO L273 TraceCheckUtils]: 81: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,630 INFO L273 TraceCheckUtils]: 82: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,630 INFO L273 TraceCheckUtils]: 83: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,630 INFO L273 TraceCheckUtils]: 84: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,630 INFO L273 TraceCheckUtils]: 85: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,630 INFO L273 TraceCheckUtils]: 86: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,631 INFO L273 TraceCheckUtils]: 87: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,631 INFO L273 TraceCheckUtils]: 88: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,631 INFO L273 TraceCheckUtils]: 89: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,631 INFO L273 TraceCheckUtils]: 90: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,631 INFO L273 TraceCheckUtils]: 91: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,631 INFO L273 TraceCheckUtils]: 92: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,632 INFO L273 TraceCheckUtils]: 93: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,632 INFO L273 TraceCheckUtils]: 94: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,632 INFO L273 TraceCheckUtils]: 95: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,632 INFO L273 TraceCheckUtils]: 96: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,632 INFO L273 TraceCheckUtils]: 97: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,632 INFO L273 TraceCheckUtils]: 98: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,633 INFO L273 TraceCheckUtils]: 99: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,633 INFO L273 TraceCheckUtils]: 100: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,633 INFO L273 TraceCheckUtils]: 101: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,633 INFO L273 TraceCheckUtils]: 102: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,633 INFO L273 TraceCheckUtils]: 103: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,633 INFO L273 TraceCheckUtils]: 104: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,634 INFO L273 TraceCheckUtils]: 105: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,634 INFO L273 TraceCheckUtils]: 106: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,634 INFO L273 TraceCheckUtils]: 107: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,634 INFO L273 TraceCheckUtils]: 108: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,634 INFO L273 TraceCheckUtils]: 109: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,634 INFO L273 TraceCheckUtils]: 110: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,635 INFO L273 TraceCheckUtils]: 111: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,635 INFO L273 TraceCheckUtils]: 112: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,635 INFO L273 TraceCheckUtils]: 113: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,635 INFO L273 TraceCheckUtils]: 114: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,635 INFO L273 TraceCheckUtils]: 115: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,635 INFO L273 TraceCheckUtils]: 116: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,636 INFO L273 TraceCheckUtils]: 117: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 15:50:28,636 INFO L273 TraceCheckUtils]: 118: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,636 INFO L273 TraceCheckUtils]: 119: Hoare triple {23379#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,636 INFO L273 TraceCheckUtils]: 120: Hoare triple {23379#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {23379#false} is VALID [2018-11-14 15:50:28,636 INFO L273 TraceCheckUtils]: 121: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,636 INFO L273 TraceCheckUtils]: 122: Hoare triple {23379#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {23379#false} is VALID [2018-11-14 15:50:28,637 INFO L273 TraceCheckUtils]: 123: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,637 INFO L273 TraceCheckUtils]: 124: Hoare triple {23379#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,637 INFO L256 TraceCheckUtils]: 125: Hoare triple {23379#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {23379#false} is VALID [2018-11-14 15:50:28,637 INFO L273 TraceCheckUtils]: 126: Hoare triple {23379#false} ~cond := #in~cond; {23379#false} is VALID [2018-11-14 15:50:28,637 INFO L273 TraceCheckUtils]: 127: Hoare triple {23379#false} assume ~cond == 0bv32; {23379#false} is VALID [2018-11-14 15:50:28,637 INFO L273 TraceCheckUtils]: 128: Hoare triple {23379#false} assume !false; {23379#false} is VALID [2018-11-14 15:50:28,648 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 355 proven. 26 refuted. 0 times theorem prover too weak. 853 trivial. 0 not checked. [2018-11-14 15:50:28,648 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:50:28,956 INFO L273 TraceCheckUtils]: 128: Hoare triple {23379#false} assume !false; {23379#false} is VALID [2018-11-14 15:50:28,956 INFO L273 TraceCheckUtils]: 127: Hoare triple {23379#false} assume ~cond == 0bv32; {23379#false} is VALID [2018-11-14 15:50:28,956 INFO L273 TraceCheckUtils]: 126: Hoare triple {23379#false} ~cond := #in~cond; {23379#false} is VALID [2018-11-14 15:50:28,957 INFO L256 TraceCheckUtils]: 125: Hoare triple {23379#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {23379#false} is VALID [2018-11-14 15:50:28,957 INFO L273 TraceCheckUtils]: 124: Hoare triple {23379#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,957 INFO L273 TraceCheckUtils]: 123: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,957 INFO L273 TraceCheckUtils]: 122: Hoare triple {23379#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {23379#false} is VALID [2018-11-14 15:50:28,957 INFO L273 TraceCheckUtils]: 121: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,958 INFO L273 TraceCheckUtils]: 120: Hoare triple {23379#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {23379#false} is VALID [2018-11-14 15:50:28,958 INFO L273 TraceCheckUtils]: 119: Hoare triple {23379#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,958 INFO L273 TraceCheckUtils]: 118: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,958 INFO L273 TraceCheckUtils]: 117: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 116: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 115: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 114: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 113: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 112: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 111: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 110: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,959 INFO L273 TraceCheckUtils]: 109: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,960 INFO L273 TraceCheckUtils]: 108: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,960 INFO L273 TraceCheckUtils]: 107: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,960 INFO L273 TraceCheckUtils]: 106: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,960 INFO L273 TraceCheckUtils]: 105: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,960 INFO L273 TraceCheckUtils]: 104: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,960 INFO L273 TraceCheckUtils]: 103: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,961 INFO L273 TraceCheckUtils]: 102: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,961 INFO L273 TraceCheckUtils]: 101: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,961 INFO L273 TraceCheckUtils]: 100: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,961 INFO L273 TraceCheckUtils]: 99: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,961 INFO L273 TraceCheckUtils]: 98: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,962 INFO L273 TraceCheckUtils]: 97: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,962 INFO L273 TraceCheckUtils]: 96: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,962 INFO L273 TraceCheckUtils]: 95: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,962 INFO L273 TraceCheckUtils]: 94: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,962 INFO L273 TraceCheckUtils]: 93: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,962 INFO L273 TraceCheckUtils]: 92: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,963 INFO L273 TraceCheckUtils]: 91: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,963 INFO L273 TraceCheckUtils]: 90: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,963 INFO L273 TraceCheckUtils]: 89: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,963 INFO L273 TraceCheckUtils]: 88: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,963 INFO L273 TraceCheckUtils]: 87: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,963 INFO L273 TraceCheckUtils]: 86: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,964 INFO L273 TraceCheckUtils]: 85: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,964 INFO L273 TraceCheckUtils]: 84: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,964 INFO L273 TraceCheckUtils]: 83: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,964 INFO L273 TraceCheckUtils]: 82: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,964 INFO L273 TraceCheckUtils]: 81: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,964 INFO L273 TraceCheckUtils]: 80: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,965 INFO L273 TraceCheckUtils]: 79: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,965 INFO L273 TraceCheckUtils]: 78: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,965 INFO L273 TraceCheckUtils]: 77: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,965 INFO L273 TraceCheckUtils]: 76: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,965 INFO L273 TraceCheckUtils]: 75: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,965 INFO L273 TraceCheckUtils]: 74: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 15:50:28,966 INFO L273 TraceCheckUtils]: 73: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,966 INFO L273 TraceCheckUtils]: 72: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 15:50:28,966 INFO L273 TraceCheckUtils]: 71: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,966 INFO L273 TraceCheckUtils]: 70: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,966 INFO L273 TraceCheckUtils]: 69: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,966 INFO L273 TraceCheckUtils]: 68: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,967 INFO L273 TraceCheckUtils]: 67: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,967 INFO L273 TraceCheckUtils]: 66: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,967 INFO L273 TraceCheckUtils]: 65: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,967 INFO L273 TraceCheckUtils]: 64: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,967 INFO L273 TraceCheckUtils]: 63: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,967 INFO L273 TraceCheckUtils]: 62: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,968 INFO L273 TraceCheckUtils]: 61: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,968 INFO L273 TraceCheckUtils]: 60: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,968 INFO L273 TraceCheckUtils]: 59: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,968 INFO L273 TraceCheckUtils]: 58: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,968 INFO L273 TraceCheckUtils]: 57: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,968 INFO L273 TraceCheckUtils]: 56: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,969 INFO L273 TraceCheckUtils]: 55: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,969 INFO L273 TraceCheckUtils]: 54: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,969 INFO L273 TraceCheckUtils]: 53: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,969 INFO L273 TraceCheckUtils]: 52: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,969 INFO L273 TraceCheckUtils]: 51: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,969 INFO L273 TraceCheckUtils]: 50: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,970 INFO L273 TraceCheckUtils]: 49: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,970 INFO L273 TraceCheckUtils]: 48: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,970 INFO L273 TraceCheckUtils]: 47: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,970 INFO L273 TraceCheckUtils]: 46: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,970 INFO L273 TraceCheckUtils]: 45: Hoare triple {23379#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {23379#false} is VALID [2018-11-14 15:50:28,970 INFO L273 TraceCheckUtils]: 44: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,971 INFO L273 TraceCheckUtils]: 43: Hoare triple {23379#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {23379#false} is VALID [2018-11-14 15:50:28,971 INFO L273 TraceCheckUtils]: 42: Hoare triple {23379#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {23379#false} is VALID [2018-11-14 15:50:28,971 INFO L273 TraceCheckUtils]: 41: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,971 INFO L273 TraceCheckUtils]: 40: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,971 INFO L273 TraceCheckUtils]: 39: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,971 INFO L273 TraceCheckUtils]: 38: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,972 INFO L273 TraceCheckUtils]: 37: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,972 INFO L273 TraceCheckUtils]: 36: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,972 INFO L273 TraceCheckUtils]: 35: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,972 INFO L273 TraceCheckUtils]: 34: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,972 INFO L273 TraceCheckUtils]: 33: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,972 INFO L273 TraceCheckUtils]: 32: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,973 INFO L273 TraceCheckUtils]: 31: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,973 INFO L273 TraceCheckUtils]: 30: Hoare triple {23379#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,973 INFO L273 TraceCheckUtils]: 29: Hoare triple {23379#false} assume true; {23379#false} is VALID [2018-11-14 15:50:28,973 INFO L273 TraceCheckUtils]: 28: Hoare triple {23379#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {23379#false} is VALID [2018-11-14 15:50:28,973 INFO L273 TraceCheckUtils]: 27: Hoare triple {23379#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {23379#false} is VALID [2018-11-14 15:50:28,989 INFO L273 TraceCheckUtils]: 26: Hoare triple {24078#(not (bvsge main_~j~0 (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {23379#false} is VALID [2018-11-14 15:50:28,997 INFO L273 TraceCheckUtils]: 25: Hoare triple {24078#(not (bvsge main_~j~0 (_ bv0 32)))} assume true; {24078#(not (bvsge main_~j~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:29,005 INFO L273 TraceCheckUtils]: 24: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {24078#(not (bvsge main_~j~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:29,006 INFO L273 TraceCheckUtils]: 23: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,007 INFO L273 TraceCheckUtils]: 22: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,007 INFO L273 TraceCheckUtils]: 21: Hoare triple {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,010 INFO L273 TraceCheckUtils]: 20: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {24085#(not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,010 INFO L273 TraceCheckUtils]: 19: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,011 INFO L273 TraceCheckUtils]: 18: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,011 INFO L273 TraceCheckUtils]: 17: Hoare triple {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,014 INFO L273 TraceCheckUtils]: 16: Hoare triple {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {24098#(not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,015 INFO L273 TraceCheckUtils]: 15: Hoare triple {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} assume true; {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,018 INFO L273 TraceCheckUtils]: 14: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {24111#(not (bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,018 INFO L273 TraceCheckUtils]: 13: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,019 INFO L273 TraceCheckUtils]: 12: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,019 INFO L273 TraceCheckUtils]: 11: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,019 INFO L273 TraceCheckUtils]: 10: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,020 INFO L273 TraceCheckUtils]: 9: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,020 INFO L273 TraceCheckUtils]: 8: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,020 INFO L273 TraceCheckUtils]: 7: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,020 INFO L273 TraceCheckUtils]: 6: Hoare triple {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,021 INFO L273 TraceCheckUtils]: 5: Hoare triple {23378#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {24118#(not (bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:29,021 INFO L256 TraceCheckUtils]: 4: Hoare triple {23378#true} call #t~ret8 := main(); {23378#true} is VALID [2018-11-14 15:50:29,022 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {23378#true} {23378#true} #87#return; {23378#true} is VALID [2018-11-14 15:50:29,022 INFO L273 TraceCheckUtils]: 2: Hoare triple {23378#true} assume true; {23378#true} is VALID [2018-11-14 15:50:29,022 INFO L273 TraceCheckUtils]: 1: Hoare triple {23378#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {23378#true} is VALID [2018-11-14 15:50:29,022 INFO L256 TraceCheckUtils]: 0: Hoare triple {23378#true} call ULTIMATE.init(); {23378#true} is VALID [2018-11-14 15:50:29,033 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 355 proven. 26 refuted. 0 times theorem prover too weak. 853 trivial. 0 not checked. [2018-11-14 15:50:29,035 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:50:29,035 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-14 15:50:29,036 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-11-14 15:50:29,036 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:50:29,036 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-14 15:50:29,138 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:29,138 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-14 15:50:29,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-14 15:50:29,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-14 15:50:29,139 INFO L87 Difference]: Start difference. First operand 1061 states and 1392 transitions. Second operand 12 states. [2018-11-14 15:50:30,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:30,777 INFO L93 Difference]: Finished difference Result 1523 states and 1994 transitions. [2018-11-14 15:50:30,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-14 15:50:30,777 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 129 [2018-11-14 15:50:30,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:50:30,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 15:50:30,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 87 transitions. [2018-11-14 15:50:30,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 15:50:30,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 87 transitions. [2018-11-14 15:50:30,782 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 87 transitions. [2018-11-14 15:50:31,190 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:31,208 INFO L225 Difference]: With dead ends: 1523 [2018-11-14 15:50:31,208 INFO L226 Difference]: Without dead ends: 479 [2018-11-14 15:50:31,211 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 262 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=204, Unknown=0, NotChecked=0, Total=272 [2018-11-14 15:50:31,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 479 states. [2018-11-14 15:50:32,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 479 to 476. [2018-11-14 15:50:32,335 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:50:32,335 INFO L82 GeneralOperation]: Start isEquivalent. First operand 479 states. Second operand 476 states. [2018-11-14 15:50:32,335 INFO L74 IsIncluded]: Start isIncluded. First operand 479 states. Second operand 476 states. [2018-11-14 15:50:32,335 INFO L87 Difference]: Start difference. First operand 479 states. Second operand 476 states. [2018-11-14 15:50:32,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:32,351 INFO L93 Difference]: Finished difference Result 479 states and 619 transitions. [2018-11-14 15:50:32,352 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 619 transitions. [2018-11-14 15:50:32,353 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:32,353 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:32,353 INFO L74 IsIncluded]: Start isIncluded. First operand 476 states. Second operand 479 states. [2018-11-14 15:50:32,353 INFO L87 Difference]: Start difference. First operand 476 states. Second operand 479 states. [2018-11-14 15:50:32,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:32,369 INFO L93 Difference]: Finished difference Result 479 states and 619 transitions. [2018-11-14 15:50:32,370 INFO L276 IsEmpty]: Start isEmpty. Operand 479 states and 619 transitions. [2018-11-14 15:50:32,371 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:32,371 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:32,371 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:50:32,371 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:50:32,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states. [2018-11-14 15:50:32,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 616 transitions. [2018-11-14 15:50:32,389 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 616 transitions. Word has length 129 [2018-11-14 15:50:32,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:50:32,390 INFO L480 AbstractCegarLoop]: Abstraction has 476 states and 616 transitions. [2018-11-14 15:50:32,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-14 15:50:32,390 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 616 transitions. [2018-11-14 15:50:32,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-14 15:50:32,393 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:50:32,393 INFO L375 BasicCegarLoop]: trace histogram [42, 34, 34, 34, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:50:32,393 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:50:32,393 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:50:32,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1707958948, now seen corresponding path program 8 times [2018-11-14 15:50:32,394 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:50:32,394 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:50:32,422 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 15:50:32,755 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 15:50:32,755 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:50:32,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:50:32,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:50:33,209 INFO L256 TraceCheckUtils]: 0: Hoare triple {27701#true} call ULTIMATE.init(); {27701#true} is VALID [2018-11-14 15:50:33,210 INFO L273 TraceCheckUtils]: 1: Hoare triple {27701#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {27701#true} is VALID [2018-11-14 15:50:33,210 INFO L273 TraceCheckUtils]: 2: Hoare triple {27701#true} assume true; {27701#true} is VALID [2018-11-14 15:50:33,210 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {27701#true} {27701#true} #87#return; {27701#true} is VALID [2018-11-14 15:50:33,210 INFO L256 TraceCheckUtils]: 4: Hoare triple {27701#true} call #t~ret8 := main(); {27701#true} is VALID [2018-11-14 15:50:33,211 INFO L273 TraceCheckUtils]: 5: Hoare triple {27701#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,212 INFO L273 TraceCheckUtils]: 6: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,212 INFO L273 TraceCheckUtils]: 7: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,212 INFO L273 TraceCheckUtils]: 8: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,213 INFO L273 TraceCheckUtils]: 9: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,213 INFO L273 TraceCheckUtils]: 10: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,213 INFO L273 TraceCheckUtils]: 11: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,213 INFO L273 TraceCheckUtils]: 12: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,214 INFO L273 TraceCheckUtils]: 13: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,215 INFO L273 TraceCheckUtils]: 14: Hoare triple {27721#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,215 INFO L273 TraceCheckUtils]: 15: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,216 INFO L273 TraceCheckUtils]: 16: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,216 INFO L273 TraceCheckUtils]: 17: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,217 INFO L273 TraceCheckUtils]: 18: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,217 INFO L273 TraceCheckUtils]: 19: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,218 INFO L273 TraceCheckUtils]: 20: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,218 INFO L273 TraceCheckUtils]: 21: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,219 INFO L273 TraceCheckUtils]: 22: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,219 INFO L273 TraceCheckUtils]: 23: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,220 INFO L273 TraceCheckUtils]: 24: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,220 INFO L273 TraceCheckUtils]: 25: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume true; {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,221 INFO L273 TraceCheckUtils]: 26: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27749#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-14 15:50:33,222 INFO L273 TraceCheckUtils]: 27: Hoare triple {27749#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,222 INFO L273 TraceCheckUtils]: 28: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,223 INFO L273 TraceCheckUtils]: 29: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,223 INFO L273 TraceCheckUtils]: 30: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,224 INFO L273 TraceCheckUtils]: 31: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,224 INFO L273 TraceCheckUtils]: 32: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,225 INFO L273 TraceCheckUtils]: 33: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,225 INFO L273 TraceCheckUtils]: 34: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,226 INFO L273 TraceCheckUtils]: 35: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,226 INFO L273 TraceCheckUtils]: 36: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,227 INFO L273 TraceCheckUtils]: 37: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,227 INFO L273 TraceCheckUtils]: 38: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,228 INFO L273 TraceCheckUtils]: 39: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,228 INFO L273 TraceCheckUtils]: 40: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,229 INFO L273 TraceCheckUtils]: 41: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,229 INFO L273 TraceCheckUtils]: 42: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,230 INFO L273 TraceCheckUtils]: 43: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,231 INFO L273 TraceCheckUtils]: 44: Hoare triple {27789#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27841#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-14 15:50:33,231 INFO L273 TraceCheckUtils]: 45: Hoare triple {27841#(= (_ bv4 32) main_~i~0)} assume true; {27841#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-14 15:50:33,232 INFO L273 TraceCheckUtils]: 46: Hoare triple {27841#(= (_ bv4 32) main_~i~0)} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,233 INFO L273 TraceCheckUtils]: 47: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,233 INFO L273 TraceCheckUtils]: 48: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,234 INFO L273 TraceCheckUtils]: 49: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,234 INFO L273 TraceCheckUtils]: 50: Hoare triple {27848#(= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,235 INFO L273 TraceCheckUtils]: 51: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,235 INFO L273 TraceCheckUtils]: 52: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,236 INFO L273 TraceCheckUtils]: 53: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,237 INFO L273 TraceCheckUtils]: 54: Hoare triple {27861#(= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,237 INFO L273 TraceCheckUtils]: 55: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,238 INFO L273 TraceCheckUtils]: 56: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,238 INFO L273 TraceCheckUtils]: 57: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:33,239 INFO L273 TraceCheckUtils]: 58: Hoare triple {27874#(= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27887#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:33,240 INFO L273 TraceCheckUtils]: 59: Hoare triple {27887#(= main_~j~0 (_ bv0 32))} assume true; {27887#(= main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:33,240 INFO L273 TraceCheckUtils]: 60: Hoare triple {27887#(= main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:33,241 INFO L273 TraceCheckUtils]: 61: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:33,241 INFO L273 TraceCheckUtils]: 62: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume true; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:33,242 INFO L273 TraceCheckUtils]: 63: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:33,242 INFO L273 TraceCheckUtils]: 64: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,243 INFO L273 TraceCheckUtils]: 65: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,243 INFO L273 TraceCheckUtils]: 66: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,243 INFO L273 TraceCheckUtils]: 67: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,244 INFO L273 TraceCheckUtils]: 68: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,244 INFO L273 TraceCheckUtils]: 69: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,244 INFO L273 TraceCheckUtils]: 70: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,244 INFO L273 TraceCheckUtils]: 71: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,245 INFO L273 TraceCheckUtils]: 72: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,245 INFO L273 TraceCheckUtils]: 73: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,245 INFO L273 TraceCheckUtils]: 74: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,245 INFO L273 TraceCheckUtils]: 75: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,245 INFO L273 TraceCheckUtils]: 76: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,246 INFO L273 TraceCheckUtils]: 77: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:33,246 INFO L273 TraceCheckUtils]: 78: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:33,246 INFO L273 TraceCheckUtils]: 79: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,246 INFO L273 TraceCheckUtils]: 80: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:33,246 INFO L273 TraceCheckUtils]: 81: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,246 INFO L273 TraceCheckUtils]: 82: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,247 INFO L273 TraceCheckUtils]: 83: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,247 INFO L273 TraceCheckUtils]: 84: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,247 INFO L273 TraceCheckUtils]: 85: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,247 INFO L273 TraceCheckUtils]: 86: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,247 INFO L273 TraceCheckUtils]: 87: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 88: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 89: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 90: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 91: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 92: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 93: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,248 INFO L273 TraceCheckUtils]: 94: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,249 INFO L273 TraceCheckUtils]: 95: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,249 INFO L273 TraceCheckUtils]: 96: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,249 INFO L273 TraceCheckUtils]: 97: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,249 INFO L273 TraceCheckUtils]: 98: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,249 INFO L273 TraceCheckUtils]: 99: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,249 INFO L273 TraceCheckUtils]: 100: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,250 INFO L273 TraceCheckUtils]: 101: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,250 INFO L273 TraceCheckUtils]: 102: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,250 INFO L273 TraceCheckUtils]: 103: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,250 INFO L273 TraceCheckUtils]: 104: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,250 INFO L273 TraceCheckUtils]: 105: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,250 INFO L273 TraceCheckUtils]: 106: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:33,251 INFO L273 TraceCheckUtils]: 107: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:33,251 INFO L273 TraceCheckUtils]: 108: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,251 INFO L273 TraceCheckUtils]: 109: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:33,251 INFO L273 TraceCheckUtils]: 110: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,251 INFO L273 TraceCheckUtils]: 111: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,251 INFO L273 TraceCheckUtils]: 112: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,252 INFO L273 TraceCheckUtils]: 113: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,252 INFO L273 TraceCheckUtils]: 114: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,252 INFO L273 TraceCheckUtils]: 115: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,252 INFO L273 TraceCheckUtils]: 116: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,252 INFO L273 TraceCheckUtils]: 117: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,252 INFO L273 TraceCheckUtils]: 118: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,253 INFO L273 TraceCheckUtils]: 119: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,253 INFO L273 TraceCheckUtils]: 120: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,253 INFO L273 TraceCheckUtils]: 121: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,253 INFO L273 TraceCheckUtils]: 122: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,253 INFO L273 TraceCheckUtils]: 123: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,253 INFO L273 TraceCheckUtils]: 124: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,254 INFO L273 TraceCheckUtils]: 125: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,254 INFO L273 TraceCheckUtils]: 126: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,254 INFO L273 TraceCheckUtils]: 127: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,254 INFO L273 TraceCheckUtils]: 128: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,254 INFO L273 TraceCheckUtils]: 129: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,254 INFO L273 TraceCheckUtils]: 130: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,255 INFO L273 TraceCheckUtils]: 131: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,255 INFO L273 TraceCheckUtils]: 132: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,255 INFO L273 TraceCheckUtils]: 133: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,255 INFO L273 TraceCheckUtils]: 134: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,255 INFO L273 TraceCheckUtils]: 135: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:33,255 INFO L273 TraceCheckUtils]: 136: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:33,256 INFO L273 TraceCheckUtils]: 137: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,256 INFO L273 TraceCheckUtils]: 138: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:33,256 INFO L273 TraceCheckUtils]: 139: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,256 INFO L273 TraceCheckUtils]: 140: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,256 INFO L273 TraceCheckUtils]: 141: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,256 INFO L273 TraceCheckUtils]: 142: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,257 INFO L273 TraceCheckUtils]: 143: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,257 INFO L273 TraceCheckUtils]: 144: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,257 INFO L273 TraceCheckUtils]: 145: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,257 INFO L273 TraceCheckUtils]: 146: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,257 INFO L273 TraceCheckUtils]: 147: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,257 INFO L273 TraceCheckUtils]: 148: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,258 INFO L273 TraceCheckUtils]: 149: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,258 INFO L273 TraceCheckUtils]: 150: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,258 INFO L273 TraceCheckUtils]: 151: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,258 INFO L273 TraceCheckUtils]: 152: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,258 INFO L273 TraceCheckUtils]: 153: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,258 INFO L273 TraceCheckUtils]: 154: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,259 INFO L273 TraceCheckUtils]: 155: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,259 INFO L273 TraceCheckUtils]: 156: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,259 INFO L273 TraceCheckUtils]: 157: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,259 INFO L273 TraceCheckUtils]: 158: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,259 INFO L273 TraceCheckUtils]: 159: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,259 INFO L273 TraceCheckUtils]: 160: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,260 INFO L273 TraceCheckUtils]: 161: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,260 INFO L273 TraceCheckUtils]: 162: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,260 INFO L273 TraceCheckUtils]: 163: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,260 INFO L273 TraceCheckUtils]: 164: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,260 INFO L273 TraceCheckUtils]: 165: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,260 INFO L273 TraceCheckUtils]: 166: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,261 INFO L273 TraceCheckUtils]: 167: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,261 INFO L273 TraceCheckUtils]: 168: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,261 INFO L273 TraceCheckUtils]: 169: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,261 INFO L273 TraceCheckUtils]: 170: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,261 INFO L273 TraceCheckUtils]: 171: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,261 INFO L273 TraceCheckUtils]: 172: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,262 INFO L273 TraceCheckUtils]: 173: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,262 INFO L273 TraceCheckUtils]: 174: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,262 INFO L273 TraceCheckUtils]: 175: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,262 INFO L273 TraceCheckUtils]: 176: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,262 INFO L273 TraceCheckUtils]: 177: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:33,262 INFO L273 TraceCheckUtils]: 178: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:33,263 INFO L273 TraceCheckUtils]: 179: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,263 INFO L273 TraceCheckUtils]: 180: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:33,263 INFO L273 TraceCheckUtils]: 181: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:33,263 INFO L273 TraceCheckUtils]: 182: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,263 INFO L273 TraceCheckUtils]: 183: Hoare triple {27702#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:33,263 INFO L273 TraceCheckUtils]: 184: Hoare triple {27702#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {27702#false} is VALID [2018-11-14 15:50:33,264 INFO L273 TraceCheckUtils]: 185: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,264 INFO L273 TraceCheckUtils]: 186: Hoare triple {27702#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {27702#false} is VALID [2018-11-14 15:50:33,264 INFO L273 TraceCheckUtils]: 187: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:33,264 INFO L273 TraceCheckUtils]: 188: Hoare triple {27702#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:33,264 INFO L256 TraceCheckUtils]: 189: Hoare triple {27702#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {27702#false} is VALID [2018-11-14 15:50:33,264 INFO L273 TraceCheckUtils]: 190: Hoare triple {27702#false} ~cond := #in~cond; {27702#false} is VALID [2018-11-14 15:50:33,265 INFO L273 TraceCheckUtils]: 191: Hoare triple {27702#false} assume ~cond == 0bv32; {27702#false} is VALID [2018-11-14 15:50:33,265 INFO L273 TraceCheckUtils]: 192: Hoare triple {27702#false} assume !false; {27702#false} is VALID [2018-11-14 15:50:33,290 INFO L134 CoverageAnalysis]: Checked inductivity of 2944 backedges. 1260 proven. 226 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-11-14 15:50:33,290 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:50:34,179 INFO L273 TraceCheckUtils]: 192: Hoare triple {27702#false} assume !false; {27702#false} is VALID [2018-11-14 15:50:34,180 INFO L273 TraceCheckUtils]: 191: Hoare triple {27702#false} assume ~cond == 0bv32; {27702#false} is VALID [2018-11-14 15:50:34,180 INFO L273 TraceCheckUtils]: 190: Hoare triple {27702#false} ~cond := #in~cond; {27702#false} is VALID [2018-11-14 15:50:34,180 INFO L256 TraceCheckUtils]: 189: Hoare triple {27702#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {27702#false} is VALID [2018-11-14 15:50:34,180 INFO L273 TraceCheckUtils]: 188: Hoare triple {27702#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,180 INFO L273 TraceCheckUtils]: 187: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,180 INFO L273 TraceCheckUtils]: 186: Hoare triple {27702#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 185: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 184: Hoare triple {27702#false} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 183: Hoare triple {27702#false} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 182: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 181: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 180: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 179: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,181 INFO L273 TraceCheckUtils]: 178: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 177: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 176: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 175: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 174: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 173: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 172: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 171: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 170: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,182 INFO L273 TraceCheckUtils]: 169: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 168: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 167: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 166: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 165: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 164: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 163: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 162: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,183 INFO L273 TraceCheckUtils]: 161: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 160: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 159: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 158: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 157: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 156: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 155: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 154: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 153: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,184 INFO L273 TraceCheckUtils]: 152: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 151: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 150: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 149: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 148: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 147: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 146: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 145: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,185 INFO L273 TraceCheckUtils]: 144: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 143: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 142: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 141: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 140: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 139: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 138: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 137: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,186 INFO L273 TraceCheckUtils]: 136: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 135: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 134: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 133: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 132: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 131: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 130: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 129: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 128: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,187 INFO L273 TraceCheckUtils]: 127: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 126: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 125: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 124: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 123: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 122: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 121: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 120: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,188 INFO L273 TraceCheckUtils]: 119: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 118: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 117: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 116: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 115: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 114: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 113: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 112: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,189 INFO L273 TraceCheckUtils]: 111: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,190 INFO L273 TraceCheckUtils]: 110: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,190 INFO L273 TraceCheckUtils]: 109: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:34,190 INFO L273 TraceCheckUtils]: 108: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,190 INFO L273 TraceCheckUtils]: 107: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:34,190 INFO L273 TraceCheckUtils]: 106: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:34,190 INFO L273 TraceCheckUtils]: 105: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,191 INFO L273 TraceCheckUtils]: 104: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,191 INFO L273 TraceCheckUtils]: 103: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,191 INFO L273 TraceCheckUtils]: 102: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,191 INFO L273 TraceCheckUtils]: 101: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,191 INFO L273 TraceCheckUtils]: 100: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,191 INFO L273 TraceCheckUtils]: 99: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,192 INFO L273 TraceCheckUtils]: 98: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,192 INFO L273 TraceCheckUtils]: 97: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,192 INFO L273 TraceCheckUtils]: 96: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,192 INFO L273 TraceCheckUtils]: 95: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,192 INFO L273 TraceCheckUtils]: 94: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,193 INFO L273 TraceCheckUtils]: 93: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,193 INFO L273 TraceCheckUtils]: 92: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,193 INFO L273 TraceCheckUtils]: 91: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,193 INFO L273 TraceCheckUtils]: 90: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,193 INFO L273 TraceCheckUtils]: 89: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,193 INFO L273 TraceCheckUtils]: 88: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 87: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 86: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 85: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 84: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 83: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 82: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,194 INFO L273 TraceCheckUtils]: 81: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,195 INFO L273 TraceCheckUtils]: 80: Hoare triple {27702#false} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:34,195 INFO L273 TraceCheckUtils]: 79: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,195 INFO L273 TraceCheckUtils]: 78: Hoare triple {27702#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27702#false} is VALID [2018-11-14 15:50:34,195 INFO L273 TraceCheckUtils]: 77: Hoare triple {27702#false} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27702#false} is VALID [2018-11-14 15:50:34,195 INFO L273 TraceCheckUtils]: 76: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,195 INFO L273 TraceCheckUtils]: 75: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,196 INFO L273 TraceCheckUtils]: 74: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,196 INFO L273 TraceCheckUtils]: 73: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,196 INFO L273 TraceCheckUtils]: 72: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,196 INFO L273 TraceCheckUtils]: 71: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,196 INFO L273 TraceCheckUtils]: 70: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,196 INFO L273 TraceCheckUtils]: 69: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,197 INFO L273 TraceCheckUtils]: 68: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,197 INFO L273 TraceCheckUtils]: 67: Hoare triple {27702#false} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {27702#false} is VALID [2018-11-14 15:50:34,197 INFO L273 TraceCheckUtils]: 66: Hoare triple {27702#false} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {27702#false} is VALID [2018-11-14 15:50:34,197 INFO L273 TraceCheckUtils]: 65: Hoare triple {27702#false} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {27702#false} is VALID [2018-11-14 15:50:34,197 INFO L273 TraceCheckUtils]: 64: Hoare triple {27702#false} assume true; {27702#false} is VALID [2018-11-14 15:50:34,212 INFO L273 TraceCheckUtils]: 63: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {27702#false} is VALID [2018-11-14 15:50:34,213 INFO L273 TraceCheckUtils]: 62: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} assume true; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:34,213 INFO L273 TraceCheckUtils]: 61: Hoare triple {27894#(= main_~r~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:34,213 INFO L273 TraceCheckUtils]: 60: Hoare triple {28687#(bvsge main_~j~0 (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {27894#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:34,214 INFO L273 TraceCheckUtils]: 59: Hoare triple {28687#(bvsge main_~j~0 (_ bv0 32))} assume true; {28687#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:34,214 INFO L273 TraceCheckUtils]: 58: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28687#(bvsge main_~j~0 (_ bv0 32))} is VALID [2018-11-14 15:50:34,215 INFO L273 TraceCheckUtils]: 57: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,215 INFO L273 TraceCheckUtils]: 56: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,215 INFO L273 TraceCheckUtils]: 55: Hoare triple {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,218 INFO L273 TraceCheckUtils]: 54: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28694#(bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,218 INFO L273 TraceCheckUtils]: 53: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,219 INFO L273 TraceCheckUtils]: 52: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,219 INFO L273 TraceCheckUtils]: 51: Hoare triple {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,222 INFO L273 TraceCheckUtils]: 50: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28707#(bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,223 INFO L273 TraceCheckUtils]: 49: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,223 INFO L273 TraceCheckUtils]: 48: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,223 INFO L273 TraceCheckUtils]: 47: Hoare triple {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,226 INFO L273 TraceCheckUtils]: 46: Hoare triple {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28720#(bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,226 INFO L273 TraceCheckUtils]: 45: Hoare triple {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} assume true; {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,229 INFO L273 TraceCheckUtils]: 44: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {28733#(bvsge (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,230 INFO L273 TraceCheckUtils]: 43: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,230 INFO L273 TraceCheckUtils]: 42: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,230 INFO L273 TraceCheckUtils]: 41: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,231 INFO L273 TraceCheckUtils]: 40: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,231 INFO L273 TraceCheckUtils]: 39: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,231 INFO L273 TraceCheckUtils]: 38: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,231 INFO L273 TraceCheckUtils]: 37: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,232 INFO L273 TraceCheckUtils]: 36: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,232 INFO L273 TraceCheckUtils]: 35: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,232 INFO L273 TraceCheckUtils]: 34: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,233 INFO L273 TraceCheckUtils]: 33: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,233 INFO L273 TraceCheckUtils]: 32: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,233 INFO L273 TraceCheckUtils]: 31: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,234 INFO L273 TraceCheckUtils]: 30: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,234 INFO L273 TraceCheckUtils]: 29: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,235 INFO L273 TraceCheckUtils]: 28: Hoare triple {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume true; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,239 INFO L273 TraceCheckUtils]: 27: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {28740#(bvsge (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,239 INFO L273 TraceCheckUtils]: 26: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,240 INFO L273 TraceCheckUtils]: 25: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,240 INFO L273 TraceCheckUtils]: 24: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,240 INFO L273 TraceCheckUtils]: 23: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,241 INFO L273 TraceCheckUtils]: 22: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,241 INFO L273 TraceCheckUtils]: 21: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,242 INFO L273 TraceCheckUtils]: 20: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,242 INFO L273 TraceCheckUtils]: 19: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,242 INFO L273 TraceCheckUtils]: 18: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,242 INFO L273 TraceCheckUtils]: 17: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,243 INFO L273 TraceCheckUtils]: 16: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,243 INFO L273 TraceCheckUtils]: 15: Hoare triple {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,247 INFO L273 TraceCheckUtils]: 14: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {28792#(bvsge (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,248 INFO L273 TraceCheckUtils]: 13: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,248 INFO L273 TraceCheckUtils]: 12: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,248 INFO L273 TraceCheckUtils]: 11: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,249 INFO L273 TraceCheckUtils]: 10: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,249 INFO L273 TraceCheckUtils]: 9: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,249 INFO L273 TraceCheckUtils]: 8: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,250 INFO L273 TraceCheckUtils]: 7: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,250 INFO L273 TraceCheckUtils]: 6: Hoare triple {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,250 INFO L273 TraceCheckUtils]: 5: Hoare triple {27701#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {28832#(bvsge (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-14 15:50:34,251 INFO L256 TraceCheckUtils]: 4: Hoare triple {27701#true} call #t~ret8 := main(); {27701#true} is VALID [2018-11-14 15:50:34,251 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {27701#true} {27701#true} #87#return; {27701#true} is VALID [2018-11-14 15:50:34,251 INFO L273 TraceCheckUtils]: 2: Hoare triple {27701#true} assume true; {27701#true} is VALID [2018-11-14 15:50:34,251 INFO L273 TraceCheckUtils]: 1: Hoare triple {27701#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {27701#true} is VALID [2018-11-14 15:50:34,251 INFO L256 TraceCheckUtils]: 0: Hoare triple {27701#true} call ULTIMATE.init(); {27701#true} is VALID [2018-11-14 15:50:34,274 INFO L134 CoverageAnalysis]: Checked inductivity of 2944 backedges. 1260 proven. 226 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-11-14 15:50:34,277 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:50:34,277 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-14 15:50:34,277 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 193 [2018-11-14 15:50:34,278 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:50:34,278 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 15:50:34,468 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:34,468 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 15:50:34,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 15:50:34,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-14 15:50:34,469 INFO L87 Difference]: Start difference. First operand 476 states and 616 transitions. Second operand 19 states. [2018-11-14 15:50:40,663 WARN L179 SmtUtils]: Spent 115.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-11-14 15:50:42,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:42,095 INFO L93 Difference]: Finished difference Result 1134 states and 1490 transitions. [2018-11-14 15:50:42,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-11-14 15:50:42,095 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 193 [2018-11-14 15:50:42,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 15:50:42,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 15:50:42,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 292 transitions. [2018-11-14 15:50:42,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 15:50:42,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 292 transitions. [2018-11-14 15:50:42,102 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 59 states and 292 transitions. [2018-11-14 15:50:42,728 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 292 edges. 292 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:42,755 INFO L225 Difference]: With dead ends: 1134 [2018-11-14 15:50:42,756 INFO L226 Difference]: Without dead ends: 750 [2018-11-14 15:50:42,758 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 435 GetRequests, 368 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1294 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=737, Invalid=3955, Unknown=0, NotChecked=0, Total=4692 [2018-11-14 15:50:42,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 750 states. [2018-11-14 15:50:43,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 750 to 677. [2018-11-14 15:50:43,609 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 15:50:43,609 INFO L82 GeneralOperation]: Start isEquivalent. First operand 750 states. Second operand 677 states. [2018-11-14 15:50:43,609 INFO L74 IsIncluded]: Start isIncluded. First operand 750 states. Second operand 677 states. [2018-11-14 15:50:43,609 INFO L87 Difference]: Start difference. First operand 750 states. Second operand 677 states. [2018-11-14 15:50:43,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:43,636 INFO L93 Difference]: Finished difference Result 750 states and 972 transitions. [2018-11-14 15:50:43,636 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 972 transitions. [2018-11-14 15:50:43,637 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:43,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:43,638 INFO L74 IsIncluded]: Start isIncluded. First operand 677 states. Second operand 750 states. [2018-11-14 15:50:43,638 INFO L87 Difference]: Start difference. First operand 677 states. Second operand 750 states. [2018-11-14 15:50:43,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 15:50:43,669 INFO L93 Difference]: Finished difference Result 750 states and 972 transitions. [2018-11-14 15:50:43,669 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 972 transitions. [2018-11-14 15:50:43,670 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 15:50:43,671 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 15:50:43,671 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 15:50:43,671 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 15:50:43,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 677 states. [2018-11-14 15:50:43,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 677 states to 677 states and 872 transitions. [2018-11-14 15:50:43,699 INFO L78 Accepts]: Start accepts. Automaton has 677 states and 872 transitions. Word has length 193 [2018-11-14 15:50:43,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 15:50:43,700 INFO L480 AbstractCegarLoop]: Abstraction has 677 states and 872 transitions. [2018-11-14 15:50:43,700 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 15:50:43,700 INFO L276 IsEmpty]: Start isEmpty. Operand 677 states and 872 transitions. [2018-11-14 15:50:43,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-11-14 15:50:43,703 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 15:50:43,703 INFO L375 BasicCegarLoop]: trace histogram [44, 36, 36, 36, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 15:50:43,704 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 15:50:43,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 15:50:43,704 INFO L82 PathProgramCache]: Analyzing trace with hash -429402308, now seen corresponding path program 9 times [2018-11-14 15:50:43,705 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 15:50:43,705 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 15:50:43,723 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 15:50:44,516 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-14 15:50:44,516 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 15:50:44,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 15:50:44,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 15:50:45,543 INFO L256 TraceCheckUtils]: 0: Hoare triple {32804#true} call ULTIMATE.init(); {32804#true} is VALID [2018-11-14 15:50:45,543 INFO L273 TraceCheckUtils]: 1: Hoare triple {32804#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {32804#true} is VALID [2018-11-14 15:50:45,543 INFO L273 TraceCheckUtils]: 2: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,543 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {32804#true} {32804#true} #87#return; {32804#true} is VALID [2018-11-14 15:50:45,544 INFO L256 TraceCheckUtils]: 4: Hoare triple {32804#true} call #t~ret8 := main(); {32804#true} is VALID [2018-11-14 15:50:45,544 INFO L273 TraceCheckUtils]: 5: Hoare triple {32804#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,544 INFO L273 TraceCheckUtils]: 6: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,544 INFO L273 TraceCheckUtils]: 7: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:45,544 INFO L273 TraceCheckUtils]: 8: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,544 INFO L273 TraceCheckUtils]: 9: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,545 INFO L273 TraceCheckUtils]: 10: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,545 INFO L273 TraceCheckUtils]: 11: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,545 INFO L273 TraceCheckUtils]: 12: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,545 INFO L273 TraceCheckUtils]: 13: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:45,545 INFO L273 TraceCheckUtils]: 14: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 15: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 16: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 17: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 18: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 19: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 20: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,546 INFO L273 TraceCheckUtils]: 21: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 22: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 23: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 24: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 25: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 26: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 27: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 28: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,547 INFO L273 TraceCheckUtils]: 29: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 30: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 31: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 32: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 33: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 34: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 35: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 36: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 37: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,548 INFO L273 TraceCheckUtils]: 38: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 39: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 40: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 41: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 42: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 43: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 44: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 45: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,549 INFO L273 TraceCheckUtils]: 46: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 47: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 48: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 49: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 50: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 51: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 52: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 53: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 54: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,550 INFO L273 TraceCheckUtils]: 55: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 56: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 57: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 58: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 59: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 60: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 61: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 62: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 63: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,551 INFO L273 TraceCheckUtils]: 64: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 65: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 66: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 67: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 68: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 69: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 70: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 71: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,552 INFO L273 TraceCheckUtils]: 72: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 73: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 74: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 75: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 76: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 77: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 78: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 79: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 80: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,553 INFO L273 TraceCheckUtils]: 81: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 82: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 83: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 84: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 85: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 86: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 87: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 88: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:45,554 INFO L273 TraceCheckUtils]: 89: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 90: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 91: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 92: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 93: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 94: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 95: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 96: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 97: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,555 INFO L273 TraceCheckUtils]: 98: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 99: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 100: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 101: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 102: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 103: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 104: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 105: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,556 INFO L273 TraceCheckUtils]: 106: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 107: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 108: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 109: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 110: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 111: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 112: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 113: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 114: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:45,557 INFO L273 TraceCheckUtils]: 115: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:45,558 INFO L273 TraceCheckUtils]: 116: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:45,570 INFO L273 TraceCheckUtils]: 117: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,570 INFO L273 TraceCheckUtils]: 118: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume true; {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,571 INFO L273 TraceCheckUtils]: 119: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,572 INFO L273 TraceCheckUtils]: 120: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,598 INFO L273 TraceCheckUtils]: 121: Hoare triple {33160#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,599 INFO L273 TraceCheckUtils]: 122: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume true; {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,600 INFO L273 TraceCheckUtils]: 123: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,600 INFO L273 TraceCheckUtils]: 124: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,621 INFO L273 TraceCheckUtils]: 125: Hoare triple {33173#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,621 INFO L273 TraceCheckUtils]: 126: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} assume true; {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,622 INFO L273 TraceCheckUtils]: 127: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,623 INFO L273 TraceCheckUtils]: 128: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,649 INFO L273 TraceCheckUtils]: 129: Hoare triple {33186#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv3 32)) main_~i~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,650 INFO L273 TraceCheckUtils]: 130: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume true; {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,650 INFO L273 TraceCheckUtils]: 131: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,651 INFO L273 TraceCheckUtils]: 132: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,672 INFO L273 TraceCheckUtils]: 133: Hoare triple {33199#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,673 INFO L273 TraceCheckUtils]: 134: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} assume true; {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,673 INFO L273 TraceCheckUtils]: 135: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,674 INFO L273 TraceCheckUtils]: 136: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} is VALID [2018-11-14 15:50:45,695 INFO L273 TraceCheckUtils]: 137: Hoare triple {33212#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~j~0 (_ bv5 32)) main_~i~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,695 INFO L273 TraceCheckUtils]: 138: Hoare triple {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} assume true; {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,696 INFO L273 TraceCheckUtils]: 139: Hoare triple {33225#(and (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,696 INFO L273 TraceCheckUtils]: 140: Hoare triple {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,719 INFO L273 TraceCheckUtils]: 141: Hoare triple {33232#(and (bvsge main_~j~0 (_ bv0 32)) (bvslt main_~i~0 (_ bv100000 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) main_~j~0))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,720 INFO L273 TraceCheckUtils]: 142: Hoare triple {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} assume true; {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,722 INFO L273 TraceCheckUtils]: 143: Hoare triple {33239#(and (= (bvadd main_~j~0 (_ bv7 32)) main_~i~0) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33246#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,732 INFO L273 TraceCheckUtils]: 144: Hoare triple {33246#(and (or (= main_~r~0 (_ bv0 32)) (not (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))) (bvslt main_~i~0 (_ bv100000 32)) (bvsge (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:45,733 INFO L273 TraceCheckUtils]: 145: Hoare triple {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} assume true; {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:45,736 INFO L273 TraceCheckUtils]: 146: Hoare triple {33250#(and (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv100000 32)) (or (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (= main_~r~0 (_ bv0 32))))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,737 INFO L273 TraceCheckUtils]: 147: Hoare triple {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume true; {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} is VALID [2018-11-14 15:50:45,737 INFO L273 TraceCheckUtils]: 148: Hoare triple {33257#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) main_~j~0))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,738 INFO L273 TraceCheckUtils]: 149: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,738 INFO L273 TraceCheckUtils]: 150: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,739 INFO L273 TraceCheckUtils]: 151: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,739 INFO L273 TraceCheckUtils]: 152: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,740 INFO L273 TraceCheckUtils]: 153: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,740 INFO L273 TraceCheckUtils]: 154: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,741 INFO L273 TraceCheckUtils]: 155: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,742 INFO L273 TraceCheckUtils]: 156: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,743 INFO L273 TraceCheckUtils]: 157: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,743 INFO L273 TraceCheckUtils]: 158: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,744 INFO L273 TraceCheckUtils]: 159: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,745 INFO L273 TraceCheckUtils]: 160: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,746 INFO L273 TraceCheckUtils]: 161: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,746 INFO L273 TraceCheckUtils]: 162: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,747 INFO L273 TraceCheckUtils]: 163: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,748 INFO L273 TraceCheckUtils]: 164: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,749 INFO L273 TraceCheckUtils]: 165: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,750 INFO L273 TraceCheckUtils]: 166: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,750 INFO L273 TraceCheckUtils]: 167: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,751 INFO L273 TraceCheckUtils]: 168: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,752 INFO L273 TraceCheckUtils]: 169: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,753 INFO L273 TraceCheckUtils]: 170: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,753 INFO L273 TraceCheckUtils]: 171: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,754 INFO L273 TraceCheckUtils]: 172: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,755 INFO L273 TraceCheckUtils]: 173: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,756 INFO L273 TraceCheckUtils]: 174: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,757 INFO L273 TraceCheckUtils]: 175: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,758 INFO L273 TraceCheckUtils]: 176: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,758 INFO L273 TraceCheckUtils]: 177: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,759 INFO L273 TraceCheckUtils]: 178: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,760 INFO L273 TraceCheckUtils]: 179: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,761 INFO L273 TraceCheckUtils]: 180: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,762 INFO L273 TraceCheckUtils]: 181: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,763 INFO L273 TraceCheckUtils]: 182: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,763 INFO L273 TraceCheckUtils]: 183: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,764 INFO L273 TraceCheckUtils]: 184: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,765 INFO L273 TraceCheckUtils]: 185: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,766 INFO L273 TraceCheckUtils]: 186: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,767 INFO L273 TraceCheckUtils]: 187: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume true; {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,767 INFO L273 TraceCheckUtils]: 188: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,772 INFO L273 TraceCheckUtils]: 189: Hoare triple {33264#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,773 INFO L273 TraceCheckUtils]: 190: Hoare triple {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} assume true; {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} is VALID [2018-11-14 15:50:45,775 INFO L273 TraceCheckUtils]: 191: Hoare triple {33388#(and (not (bvsge (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4294967288 32)) (_ bv0 32)))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {33395#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:45,776 INFO L273 TraceCheckUtils]: 192: Hoare triple {33395#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {32805#false} is VALID [2018-11-14 15:50:45,776 INFO L273 TraceCheckUtils]: 193: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 15:50:45,776 INFO L273 TraceCheckUtils]: 194: Hoare triple {32805#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {32805#false} is VALID [2018-11-14 15:50:45,776 INFO L273 TraceCheckUtils]: 195: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 15:50:45,777 INFO L273 TraceCheckUtils]: 196: Hoare triple {32805#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {32805#false} is VALID [2018-11-14 15:50:45,777 INFO L256 TraceCheckUtils]: 197: Hoare triple {32805#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {32805#false} is VALID [2018-11-14 15:50:45,777 INFO L273 TraceCheckUtils]: 198: Hoare triple {32805#false} ~cond := #in~cond; {32805#false} is VALID [2018-11-14 15:50:45,777 INFO L273 TraceCheckUtils]: 199: Hoare triple {32805#false} assume ~cond == 0bv32; {32805#false} is VALID [2018-11-14 15:50:45,777 INFO L273 TraceCheckUtils]: 200: Hoare triple {32805#false} assume !false; {32805#false} is VALID [2018-11-14 15:50:45,824 INFO L134 CoverageAnalysis]: Checked inductivity of 3252 backedges. 1618 proven. 367 refuted. 0 times theorem prover too weak. 1267 trivial. 0 not checked. [2018-11-14 15:50:45,825 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 15:50:47,576 INFO L273 TraceCheckUtils]: 200: Hoare triple {32805#false} assume !false; {32805#false} is VALID [2018-11-14 15:50:47,577 INFO L273 TraceCheckUtils]: 199: Hoare triple {32805#false} assume ~cond == 0bv32; {32805#false} is VALID [2018-11-14 15:50:47,577 INFO L273 TraceCheckUtils]: 198: Hoare triple {32805#false} ~cond := #in~cond; {32805#false} is VALID [2018-11-14 15:50:47,577 INFO L256 TraceCheckUtils]: 197: Hoare triple {32805#false} call __VERIFIER_assert((if #t~mem6 != #t~mem7 then 1bv32 else 0bv32)); {32805#false} is VALID [2018-11-14 15:50:47,577 INFO L273 TraceCheckUtils]: 196: Hoare triple {32805#false} assume !!~bvslt32(~y~0, 100000bv32);call #t~mem6 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem7 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32); {32805#false} is VALID [2018-11-14 15:50:47,578 INFO L273 TraceCheckUtils]: 195: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 15:50:47,578 INFO L273 TraceCheckUtils]: 194: Hoare triple {32805#false} assume !!~bvslt32(~x~0, 100000bv32);~y~0 := ~bvadd32(1bv32, ~x~0); {32805#false} is VALID [2018-11-14 15:50:47,578 INFO L273 TraceCheckUtils]: 193: Hoare triple {32805#false} assume true; {32805#false} is VALID [2018-11-14 15:50:47,579 INFO L273 TraceCheckUtils]: 192: Hoare triple {33395#(= main_~r~0 (_ bv0 32))} assume ~r~0 != 0bv32;havoc ~x~0;havoc ~y~0;~x~0 := 0bv32; {32805#false} is VALID [2018-11-14 15:50:47,579 INFO L273 TraceCheckUtils]: 191: Hoare triple {33450#(bvslt main_~i~0 (_ bv100000 32))} assume !(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32); {33395#(= main_~r~0 (_ bv0 32))} is VALID [2018-11-14 15:50:47,579 INFO L273 TraceCheckUtils]: 190: Hoare triple {33450#(bvslt main_~i~0 (_ bv100000 32))} assume true; {33450#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 15:50:47,580 INFO L273 TraceCheckUtils]: 189: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33450#(bvslt main_~i~0 (_ bv100000 32))} is VALID [2018-11-14 15:50:47,580 INFO L273 TraceCheckUtils]: 188: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,580 INFO L273 TraceCheckUtils]: 187: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,581 INFO L273 TraceCheckUtils]: 186: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,581 INFO L273 TraceCheckUtils]: 185: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,582 INFO L273 TraceCheckUtils]: 184: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,582 INFO L273 TraceCheckUtils]: 183: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,583 INFO L273 TraceCheckUtils]: 182: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,583 INFO L273 TraceCheckUtils]: 181: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,584 INFO L273 TraceCheckUtils]: 180: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,584 INFO L273 TraceCheckUtils]: 179: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,585 INFO L273 TraceCheckUtils]: 178: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,585 INFO L273 TraceCheckUtils]: 177: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,586 INFO L273 TraceCheckUtils]: 176: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,587 INFO L273 TraceCheckUtils]: 175: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,587 INFO L273 TraceCheckUtils]: 174: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,588 INFO L273 TraceCheckUtils]: 173: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,588 INFO L273 TraceCheckUtils]: 172: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,589 INFO L273 TraceCheckUtils]: 171: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,589 INFO L273 TraceCheckUtils]: 170: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,590 INFO L273 TraceCheckUtils]: 169: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,590 INFO L273 TraceCheckUtils]: 168: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,603 INFO L273 TraceCheckUtils]: 167: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,604 INFO L273 TraceCheckUtils]: 166: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,604 INFO L273 TraceCheckUtils]: 165: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,605 INFO L273 TraceCheckUtils]: 164: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,605 INFO L273 TraceCheckUtils]: 163: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,605 INFO L273 TraceCheckUtils]: 162: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,606 INFO L273 TraceCheckUtils]: 161: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,606 INFO L273 TraceCheckUtils]: 160: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,606 INFO L273 TraceCheckUtils]: 159: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,607 INFO L273 TraceCheckUtils]: 158: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,607 INFO L273 TraceCheckUtils]: 157: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,608 INFO L273 TraceCheckUtils]: 156: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,608 INFO L273 TraceCheckUtils]: 155: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,609 INFO L273 TraceCheckUtils]: 154: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,609 INFO L273 TraceCheckUtils]: 153: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,610 INFO L273 TraceCheckUtils]: 152: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,610 INFO L273 TraceCheckUtils]: 151: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume true; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,611 INFO L273 TraceCheckUtils]: 150: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,612 INFO L273 TraceCheckUtils]: 149: Hoare triple {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,612 INFO L273 TraceCheckUtils]: 148: Hoare triple {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33457#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-14 15:50:47,613 INFO L273 TraceCheckUtils]: 147: Hoare triple {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:47,614 INFO L273 TraceCheckUtils]: 146: Hoare triple {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33581#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:47,614 INFO L273 TraceCheckUtils]: 145: Hoare triple {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} assume true; {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:47,621 INFO L273 TraceCheckUtils]: 144: Hoare triple {33595#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {33588#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv100000 32)) (= main_~r~0 (_ bv0 32)))} is VALID [2018-11-14 15:50:47,622 INFO L273 TraceCheckUtils]: 143: Hoare triple {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {33595#(or (= main_~r~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,622 INFO L273 TraceCheckUtils]: 142: Hoare triple {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,623 INFO L273 TraceCheckUtils]: 141: Hoare triple {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33599#(or (bvsge main_~j~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,623 INFO L273 TraceCheckUtils]: 140: Hoare triple {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,623 INFO L273 TraceCheckUtils]: 139: Hoare triple {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33606#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,624 INFO L273 TraceCheckUtils]: 138: Hoare triple {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} assume true; {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:47,628 INFO L273 TraceCheckUtils]: 137: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33613#(or (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge main_~j~0 (_ bv0 32))))} is VALID [2018-11-14 15:50:47,629 INFO L273 TraceCheckUtils]: 136: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,629 INFO L273 TraceCheckUtils]: 135: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,629 INFO L273 TraceCheckUtils]: 134: Hoare triple {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,634 INFO L273 TraceCheckUtils]: 133: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33620#(or (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,635 INFO L273 TraceCheckUtils]: 132: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,635 INFO L273 TraceCheckUtils]: 131: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,636 INFO L273 TraceCheckUtils]: 130: Hoare triple {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} assume true; {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,640 INFO L273 TraceCheckUtils]: 129: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33633#(or (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,641 INFO L273 TraceCheckUtils]: 128: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,641 INFO L273 TraceCheckUtils]: 127: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,642 INFO L273 TraceCheckUtils]: 126: Hoare triple {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} assume true; {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,646 INFO L273 TraceCheckUtils]: 125: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33646#(or (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)))} is VALID [2018-11-14 15:50:47,646 INFO L273 TraceCheckUtils]: 124: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,647 INFO L273 TraceCheckUtils]: 123: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,647 INFO L273 TraceCheckUtils]: 122: Hoare triple {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} assume true; {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,651 INFO L273 TraceCheckUtils]: 121: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {33659#(or (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,652 INFO L273 TraceCheckUtils]: 120: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,652 INFO L273 TraceCheckUtils]: 119: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,653 INFO L273 TraceCheckUtils]: 118: Hoare triple {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} assume true; {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,656 INFO L273 TraceCheckUtils]: 117: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {33672#(or (bvsge (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv100000 32)) (not (bvsge (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32))))} is VALID [2018-11-14 15:50:47,656 INFO L273 TraceCheckUtils]: 116: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,656 INFO L273 TraceCheckUtils]: 115: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 114: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 113: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 112: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 111: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 110: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 109: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,657 INFO L273 TraceCheckUtils]: 108: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,658 INFO L273 TraceCheckUtils]: 107: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,658 INFO L273 TraceCheckUtils]: 106: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,658 INFO L273 TraceCheckUtils]: 105: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,658 INFO L273 TraceCheckUtils]: 104: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,658 INFO L273 TraceCheckUtils]: 103: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,659 INFO L273 TraceCheckUtils]: 102: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,659 INFO L273 TraceCheckUtils]: 101: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,659 INFO L273 TraceCheckUtils]: 100: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,659 INFO L273 TraceCheckUtils]: 99: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,659 INFO L273 TraceCheckUtils]: 98: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,659 INFO L273 TraceCheckUtils]: 97: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 96: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 95: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 94: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 93: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 92: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 91: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,660 INFO L273 TraceCheckUtils]: 90: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,661 INFO L273 TraceCheckUtils]: 89: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,661 INFO L273 TraceCheckUtils]: 88: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:47,661 INFO L273 TraceCheckUtils]: 87: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,661 INFO L273 TraceCheckUtils]: 86: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:47,661 INFO L273 TraceCheckUtils]: 85: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:47,661 INFO L273 TraceCheckUtils]: 84: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,662 INFO L273 TraceCheckUtils]: 83: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,662 INFO L273 TraceCheckUtils]: 82: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,662 INFO L273 TraceCheckUtils]: 81: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,662 INFO L273 TraceCheckUtils]: 80: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,662 INFO L273 TraceCheckUtils]: 79: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,662 INFO L273 TraceCheckUtils]: 78: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,663 INFO L273 TraceCheckUtils]: 77: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,663 INFO L273 TraceCheckUtils]: 76: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,663 INFO L273 TraceCheckUtils]: 75: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,663 INFO L273 TraceCheckUtils]: 74: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,663 INFO L273 TraceCheckUtils]: 73: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,663 INFO L273 TraceCheckUtils]: 72: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,664 INFO L273 TraceCheckUtils]: 71: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,664 INFO L273 TraceCheckUtils]: 70: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,664 INFO L273 TraceCheckUtils]: 69: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,664 INFO L273 TraceCheckUtils]: 68: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,664 INFO L273 TraceCheckUtils]: 67: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:47,664 INFO L273 TraceCheckUtils]: 66: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,665 INFO L273 TraceCheckUtils]: 65: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:47,665 INFO L273 TraceCheckUtils]: 64: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:47,665 INFO L273 TraceCheckUtils]: 63: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,665 INFO L273 TraceCheckUtils]: 62: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,665 INFO L273 TraceCheckUtils]: 61: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,665 INFO L273 TraceCheckUtils]: 60: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,666 INFO L273 TraceCheckUtils]: 59: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,666 INFO L273 TraceCheckUtils]: 58: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,666 INFO L273 TraceCheckUtils]: 57: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,666 INFO L273 TraceCheckUtils]: 56: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,666 INFO L273 TraceCheckUtils]: 55: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,667 INFO L273 TraceCheckUtils]: 54: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,667 INFO L273 TraceCheckUtils]: 53: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,667 INFO L273 TraceCheckUtils]: 52: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,667 INFO L273 TraceCheckUtils]: 51: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,667 INFO L273 TraceCheckUtils]: 50: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,667 INFO L273 TraceCheckUtils]: 49: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,668 INFO L273 TraceCheckUtils]: 48: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,668 INFO L273 TraceCheckUtils]: 47: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,668 INFO L273 TraceCheckUtils]: 46: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:47,668 INFO L273 TraceCheckUtils]: 45: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,668 INFO L273 TraceCheckUtils]: 44: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:47,668 INFO L273 TraceCheckUtils]: 43: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:47,669 INFO L273 TraceCheckUtils]: 42: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,669 INFO L273 TraceCheckUtils]: 41: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,669 INFO L273 TraceCheckUtils]: 40: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,669 INFO L273 TraceCheckUtils]: 39: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,669 INFO L273 TraceCheckUtils]: 38: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,670 INFO L273 TraceCheckUtils]: 37: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,670 INFO L273 TraceCheckUtils]: 36: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,670 INFO L273 TraceCheckUtils]: 35: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,670 INFO L273 TraceCheckUtils]: 34: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,670 INFO L273 TraceCheckUtils]: 33: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,670 INFO L273 TraceCheckUtils]: 32: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,671 INFO L273 TraceCheckUtils]: 31: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,671 INFO L273 TraceCheckUtils]: 30: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,671 INFO L273 TraceCheckUtils]: 29: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:47,671 INFO L273 TraceCheckUtils]: 28: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,671 INFO L273 TraceCheckUtils]: 27: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:47,672 INFO L273 TraceCheckUtils]: 26: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:47,672 INFO L273 TraceCheckUtils]: 25: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,672 INFO L273 TraceCheckUtils]: 24: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,672 INFO L273 TraceCheckUtils]: 23: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,672 INFO L273 TraceCheckUtils]: 22: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,672 INFO L273 TraceCheckUtils]: 21: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,673 INFO L273 TraceCheckUtils]: 20: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,673 INFO L273 TraceCheckUtils]: 19: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,673 INFO L273 TraceCheckUtils]: 18: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,673 INFO L273 TraceCheckUtils]: 17: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,673 INFO L273 TraceCheckUtils]: 16: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:47,673 INFO L273 TraceCheckUtils]: 15: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,674 INFO L273 TraceCheckUtils]: 14: Hoare triple {32804#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {32804#true} is VALID [2018-11-14 15:50:47,674 INFO L273 TraceCheckUtils]: 13: Hoare triple {32804#true} assume !(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32); {32804#true} is VALID [2018-11-14 15:50:47,674 INFO L273 TraceCheckUtils]: 12: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,674 INFO L273 TraceCheckUtils]: 11: Hoare triple {32804#true} #t~post1 := ~j~0;~j~0 := ~bvsub32(#t~post1, 1bv32);havoc #t~post1; {32804#true} is VALID [2018-11-14 15:50:47,674 INFO L273 TraceCheckUtils]: 10: Hoare triple {32804#true} assume #t~mem2 == #t~mem3;havoc #t~mem2;havoc #t~mem3;~r~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,674 INFO L273 TraceCheckUtils]: 9: Hoare triple {32804#true} assume !!(~bvsge32(~j~0, 0bv32) && ~r~0 != 0bv32);call #t~mem2 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call #t~mem3 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {32804#true} is VALID [2018-11-14 15:50:47,675 INFO L273 TraceCheckUtils]: 8: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,675 INFO L273 TraceCheckUtils]: 7: Hoare triple {32804#true} assume !!(~bvslt32(~i~0, 100000bv32) && ~r~0 != 0bv32);havoc ~j~0;~j~0 := ~bvsub32(~i~0, 1bv32); {32804#true} is VALID [2018-11-14 15:50:47,675 INFO L273 TraceCheckUtils]: 6: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,675 INFO L273 TraceCheckUtils]: 5: Hoare triple {32804#true} call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(400000bv32);havoc ~i~0;~r~0 := 1bv32;~i~0 := 1bv32; {32804#true} is VALID [2018-11-14 15:50:47,675 INFO L256 TraceCheckUtils]: 4: Hoare triple {32804#true} call #t~ret8 := main(); {32804#true} is VALID [2018-11-14 15:50:47,675 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {32804#true} {32804#true} #87#return; {32804#true} is VALID [2018-11-14 15:50:47,676 INFO L273 TraceCheckUtils]: 2: Hoare triple {32804#true} assume true; {32804#true} is VALID [2018-11-14 15:50:47,676 INFO L273 TraceCheckUtils]: 1: Hoare triple {32804#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {32804#true} is VALID [2018-11-14 15:50:47,676 INFO L256 TraceCheckUtils]: 0: Hoare triple {32804#true} call ULTIMATE.init(); {32804#true} is VALID [2018-11-14 15:50:47,731 INFO L134 CoverageAnalysis]: Checked inductivity of 3252 backedges. 1636 proven. 349 refuted. 0 times theorem prover too weak. 1267 trivial. 0 not checked. [2018-11-14 15:50:47,736 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 15:50:47,736 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 29 [2018-11-14 15:50:47,737 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 201 [2018-11-14 15:50:47,738 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 15:50:47,738 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 29 states. [2018-11-14 15:50:48,145 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 15:50:48,145 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-11-14 15:50:48,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-11-14 15:50:48,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=631, Unknown=0, NotChecked=0, Total=812 [2018-11-14 15:50:48,146 INFO L87 Difference]: Start difference. First operand 677 states and 872 transitions. Second operand 29 states. [2018-11-14 15:50:48,790 WARN L179 SmtUtils]: Spent 226.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 21