java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/ldv-regression/test24_true-unreach-call_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 16:24:46,656 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 16:24:46,658 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 16:24:46,677 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 16:24:46,677 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 16:24:46,681 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 16:24:46,682 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 16:24:46,685 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 16:24:46,687 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 16:24:46,688 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 16:24:46,697 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 16:24:46,698 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 16:24:46,699 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 16:24:46,703 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 16:24:46,706 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 16:24:46,707 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 16:24:46,709 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 16:24:46,715 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 16:24:46,717 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 16:24:46,718 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 16:24:46,720 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 16:24:46,721 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 16:24:46,723 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-14 16:24:46,723 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-14 16:24:46,724 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-14 16:24:46,725 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-14 16:24:46,727 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-14 16:24:46,728 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-14 16:24:46,731 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-14 16:24:46,732 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-14 16:24:46,733 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-14 16:24:46,733 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-14 16:24:46,737 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-14 16:24:46,738 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-14 16:24:46,739 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-14 16:24:46,739 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-14 16:24:46,740 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-14 16:24:46,763 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 16:24:46,763 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 16:24:46,764 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 16:24:46,764 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 16:24:46,765 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 16:24:46,765 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 16:24:46,765 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 16:24:46,765 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 16:24:46,766 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 16:24:46,766 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 16:24:46,766 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 16:24:46,766 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 16:24:46,766 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 16:24:46,767 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 16:24:46,767 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-14 16:24:46,767 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-14 16:24:46,767 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 16:24:46,767 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 16:24:46,768 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 16:24:46,768 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 16:24:46,768 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 16:24:46,768 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 16:24:46,769 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 16:24:46,769 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 16:24:46,769 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 16:24:46,769 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 16:24:46,769 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 16:24:46,770 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-14 16:24:46,770 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 16:24:46,770 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-14 16:24:46,770 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-14 16:24:46,770 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 16:24:46,824 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 16:24:46,840 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 16:24:46,845 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 16:24:46,847 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 16:24:46,847 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 16:24:46,848 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-regression/test24_true-unreach-call_true-termination.c [2018-11-14 16:24:46,929 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0dabc44e8/10badf69922b4118a821c02add2f193b/FLAGeeeec26fb [2018-11-14 16:24:47,392 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 16:24:47,393 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ldv-regression/test24_true-unreach-call_true-termination.c [2018-11-14 16:24:47,398 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0dabc44e8/10badf69922b4118a821c02add2f193b/FLAGeeeec26fb [2018-11-14 16:24:47,413 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0dabc44e8/10badf69922b4118a821c02add2f193b [2018-11-14 16:24:47,425 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 16:24:47,427 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 16:24:47,428 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 16:24:47,428 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 16:24:47,433 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 16:24:47,435 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,438 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5d5c3208 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47, skipping insertion in model container [2018-11-14 16:24:47,439 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,450 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 16:24:47,473 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 16:24:47,740 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 16:24:47,758 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 16:24:47,796 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 16:24:47,819 INFO L195 MainTranslator]: Completed translation [2018-11-14 16:24:47,820 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47 WrapperNode [2018-11-14 16:24:47,820 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 16:24:47,821 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 16:24:47,821 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 16:24:47,821 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 16:24:47,840 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,840 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,853 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,854 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,871 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,887 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,889 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... [2018-11-14 16:24:47,897 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 16:24:47,898 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 16:24:47,898 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 16:24:47,898 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 16:24:47,899 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 16:24:48,070 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 16:24:48,071 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 16:24:48,071 INFO L138 BoogieDeclarations]: Found implementation of procedure check [2018-11-14 16:24:48,071 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 16:24:48,071 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 16:24:48,072 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-14 16:24:48,072 INFO L130 BoogieDeclarations]: Found specification of procedure check [2018-11-14 16:24:48,072 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-14 16:24:48,072 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 16:24:48,072 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-14 16:24:48,072 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-14 16:24:48,073 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-14 16:24:48,073 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 16:24:48,073 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 16:24:48,073 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-14 16:24:48,663 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 16:24:48,664 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 04:24:48 BoogieIcfgContainer [2018-11-14 16:24:48,664 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 16:24:48,665 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 16:24:48,665 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 16:24:48,668 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 16:24:48,669 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 04:24:47" (1/3) ... [2018-11-14 16:24:48,670 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b513548 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 04:24:48, skipping insertion in model container [2018-11-14 16:24:48,670 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 04:24:47" (2/3) ... [2018-11-14 16:24:48,671 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b513548 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 04:24:48, skipping insertion in model container [2018-11-14 16:24:48,671 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 04:24:48" (3/3) ... [2018-11-14 16:24:48,673 INFO L112 eAbstractionObserver]: Analyzing ICFG test24_true-unreach-call_true-termination.c [2018-11-14 16:24:48,681 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 16:24:48,689 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 16:24:48,704 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 16:24:48,736 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 16:24:48,737 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 16:24:48,738 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 16:24:48,738 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 16:24:48,738 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 16:24:48,739 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 16:24:48,739 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 16:24:48,739 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 16:24:48,740 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 16:24:48,759 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-11-14 16:24:48,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-14 16:24:48,766 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:24:48,767 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:24:48,770 INFO L423 AbstractCegarLoop]: === Iteration 1 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:24:48,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:24:48,778 INFO L82 PathProgramCache]: Analyzing trace with hash -2017156494, now seen corresponding path program 1 times [2018-11-14 16:24:48,784 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:24:48,785 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:24:48,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:24:48,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:48,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:48,890 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:24:48,950 INFO L256 TraceCheckUtils]: 0: Hoare triple {25#true} call ULTIMATE.init(); {25#true} is VALID [2018-11-14 16:24:48,955 INFO L273 TraceCheckUtils]: 1: Hoare triple {25#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {25#true} is VALID [2018-11-14 16:24:48,955 INFO L273 TraceCheckUtils]: 2: Hoare triple {25#true} assume true; {25#true} is VALID [2018-11-14 16:24:48,956 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} #39#return; {25#true} is VALID [2018-11-14 16:24:48,957 INFO L256 TraceCheckUtils]: 4: Hoare triple {25#true} call #t~ret6 := main(); {25#true} is VALID [2018-11-14 16:24:48,957 INFO L273 TraceCheckUtils]: 5: Hoare triple {25#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {25#true} is VALID [2018-11-14 16:24:48,957 INFO L273 TraceCheckUtils]: 6: Hoare triple {25#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {25#true} is VALID [2018-11-14 16:24:48,974 INFO L273 TraceCheckUtils]: 7: Hoare triple {25#true} assume !true; {26#false} is VALID [2018-11-14 16:24:48,975 INFO L256 TraceCheckUtils]: 8: Hoare triple {26#false} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {26#false} is VALID [2018-11-14 16:24:48,975 INFO L273 TraceCheckUtils]: 9: Hoare triple {26#false} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {26#false} is VALID [2018-11-14 16:24:48,975 INFO L273 TraceCheckUtils]: 10: Hoare triple {26#false} assume true; {26#false} is VALID [2018-11-14 16:24:48,976 INFO L268 TraceCheckUtils]: 11: Hoare quadruple {26#false} {26#false} #43#return; {26#false} is VALID [2018-11-14 16:24:48,976 INFO L273 TraceCheckUtils]: 12: Hoare triple {26#false} assume #t~ret5 == 0bv32;havoc #t~ret5; {26#false} is VALID [2018-11-14 16:24:48,976 INFO L273 TraceCheckUtils]: 13: Hoare triple {26#false} assume !false; {26#false} is VALID [2018-11-14 16:24:48,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:24:48,980 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 16:24:48,985 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 16:24:48,985 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 16:24:48,990 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-14 16:24:48,994 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:24:48,998 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 16:24:49,098 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:49,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 16:24:49,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 16:24:49,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 16:24:49,115 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 2 states. [2018-11-14 16:24:49,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:49,321 INFO L93 Difference]: Finished difference Result 34 states and 37 transitions. [2018-11-14 16:24:49,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 16:24:49,321 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 14 [2018-11-14 16:24:49,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:24:49,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 16:24:49,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 37 transitions. [2018-11-14 16:24:49,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 16:24:49,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 37 transitions. [2018-11-14 16:24:49,343 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 37 transitions. [2018-11-14 16:24:49,640 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:49,653 INFO L225 Difference]: With dead ends: 34 [2018-11-14 16:24:49,653 INFO L226 Difference]: Without dead ends: 17 [2018-11-14 16:24:49,657 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 16:24:49,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-11-14 16:24:49,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-11-14 16:24:49,717 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:24:49,718 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand 17 states. [2018-11-14 16:24:49,718 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand 17 states. [2018-11-14 16:24:49,719 INFO L87 Difference]: Start difference. First operand 17 states. Second operand 17 states. [2018-11-14 16:24:49,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:49,723 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2018-11-14 16:24:49,723 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-14 16:24:49,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:24:49,723 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:24:49,724 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand 17 states. [2018-11-14 16:24:49,724 INFO L87 Difference]: Start difference. First operand 17 states. Second operand 17 states. [2018-11-14 16:24:49,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:49,727 INFO L93 Difference]: Finished difference Result 17 states and 17 transitions. [2018-11-14 16:24:49,727 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-14 16:24:49,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:24:49,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:24:49,728 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:24:49,728 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:24:49,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-14 16:24:49,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2018-11-14 16:24:49,733 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 14 [2018-11-14 16:24:49,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:24:49,733 INFO L480 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2018-11-14 16:24:49,733 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 16:24:49,733 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-11-14 16:24:49,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-14 16:24:49,735 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:24:49,735 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:24:49,735 INFO L423 AbstractCegarLoop]: === Iteration 2 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:24:49,736 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:24:49,736 INFO L82 PathProgramCache]: Analyzing trace with hash 825317420, now seen corresponding path program 1 times [2018-11-14 16:24:49,736 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:24:49,736 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:24:49,753 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:24:49,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:49,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:49,832 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:24:50,186 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-14 16:24:50,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-14 16:24:50,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:24:50,215 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:50,242 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:50,243 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:24 [2018-11-14 16:24:50,253 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:24:50,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2018-11-14 16:24:50,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 12 [2018-11-14 16:24:50,491 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:24:50,528 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:50,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:50,546 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:31, output treesize:12 [2018-11-14 16:24:50,554 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:24:50,612 INFO L256 TraceCheckUtils]: 0: Hoare triple {172#true} call ULTIMATE.init(); {172#true} is VALID [2018-11-14 16:24:50,612 INFO L273 TraceCheckUtils]: 1: Hoare triple {172#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {172#true} is VALID [2018-11-14 16:24:50,613 INFO L273 TraceCheckUtils]: 2: Hoare triple {172#true} assume true; {172#true} is VALID [2018-11-14 16:24:50,613 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {172#true} {172#true} #39#return; {172#true} is VALID [2018-11-14 16:24:50,614 INFO L256 TraceCheckUtils]: 4: Hoare triple {172#true} call #t~ret6 := main(); {172#true} is VALID [2018-11-14 16:24:50,614 INFO L273 TraceCheckUtils]: 5: Hoare triple {172#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {172#true} is VALID [2018-11-14 16:24:50,634 INFO L273 TraceCheckUtils]: 6: Hoare triple {172#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {195#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:50,643 INFO L273 TraceCheckUtils]: 7: Hoare triple {195#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {195#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:50,657 INFO L273 TraceCheckUtils]: 8: Hoare triple {195#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {202#(and (bvsge |main_#t~mem3| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv10 32)) |main_#t~mem3|) (bvslt |main_#t~mem3| (_ bv10 32)))} is VALID [2018-11-14 16:24:50,671 INFO L273 TraceCheckUtils]: 9: Hoare triple {202#(and (bvsge |main_#t~mem3| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv10 32)) |main_#t~mem3|) (bvslt |main_#t~mem3| (_ bv10 32)))} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {173#false} is VALID [2018-11-14 16:24:50,672 INFO L256 TraceCheckUtils]: 10: Hoare triple {173#false} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {173#false} is VALID [2018-11-14 16:24:50,672 INFO L273 TraceCheckUtils]: 11: Hoare triple {173#false} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {173#false} is VALID [2018-11-14 16:24:50,673 INFO L273 TraceCheckUtils]: 12: Hoare triple {173#false} assume true; {173#false} is VALID [2018-11-14 16:24:50,673 INFO L268 TraceCheckUtils]: 13: Hoare quadruple {173#false} {173#false} #43#return; {173#false} is VALID [2018-11-14 16:24:50,674 INFO L273 TraceCheckUtils]: 14: Hoare triple {173#false} assume #t~ret5 == 0bv32;havoc #t~ret5; {173#false} is VALID [2018-11-14 16:24:50,674 INFO L273 TraceCheckUtils]: 15: Hoare triple {173#false} assume !false; {173#false} is VALID [2018-11-14 16:24:50,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:24:50,676 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-14 16:24:50,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 16:24:50,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-14 16:24:50,687 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-14 16:24:50,689 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:24:50,689 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 16:24:50,910 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:50,910 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 16:24:50,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 16:24:50,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-14 16:24:50,913 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand 4 states. [2018-11-14 16:24:51,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:51,482 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-11-14 16:24:51,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 16:24:51,482 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-11-14 16:24:51,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:24:51,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 16:24:51,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2018-11-14 16:24:51,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 16:24:51,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2018-11-14 16:24:51,489 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 27 transitions. [2018-11-14 16:24:51,601 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:51,603 INFO L225 Difference]: With dead ends: 27 [2018-11-14 16:24:51,604 INFO L226 Difference]: Without dead ends: 20 [2018-11-14 16:24:51,605 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 16:24:51,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-11-14 16:24:51,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-11-14 16:24:51,629 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:24:51,629 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand 20 states. [2018-11-14 16:24:51,629 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand 20 states. [2018-11-14 16:24:51,629 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 20 states. [2018-11-14 16:24:51,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:51,631 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-14 16:24:51,632 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-14 16:24:51,632 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:24:51,632 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:24:51,632 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand 20 states. [2018-11-14 16:24:51,633 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 20 states. [2018-11-14 16:24:51,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:51,635 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-14 16:24:51,635 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-14 16:24:51,636 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:24:51,636 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:24:51,636 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:24:51,636 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:24:51,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 16:24:51,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-11-14 16:24:51,639 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 16 [2018-11-14 16:24:51,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:24:51,639 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-11-14 16:24:51,639 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 16:24:51,639 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-14 16:24:51,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-14 16:24:51,640 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:24:51,641 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:24:51,641 INFO L423 AbstractCegarLoop]: === Iteration 3 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:24:51,641 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:24:51,641 INFO L82 PathProgramCache]: Analyzing trace with hash 357930191, now seen corresponding path program 1 times [2018-11-14 16:24:51,642 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:24:51,642 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:24:51,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 16:24:51,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:51,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:51,727 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:24:51,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-14 16:24:51,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-14 16:24:51,910 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:24:51,915 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:51,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:51,976 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:24 [2018-11-14 16:24:51,987 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:24:52,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2018-11-14 16:24:52,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 12 [2018-11-14 16:24:52,240 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:24:52,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:52,302 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:52,302 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:31, output treesize:12 [2018-11-14 16:24:52,311 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:24:52,359 INFO L256 TraceCheckUtils]: 0: Hoare triple {333#true} call ULTIMATE.init(); {333#true} is VALID [2018-11-14 16:24:52,360 INFO L273 TraceCheckUtils]: 1: Hoare triple {333#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {333#true} is VALID [2018-11-14 16:24:52,360 INFO L273 TraceCheckUtils]: 2: Hoare triple {333#true} assume true; {333#true} is VALID [2018-11-14 16:24:52,360 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {333#true} {333#true} #39#return; {333#true} is VALID [2018-11-14 16:24:52,361 INFO L256 TraceCheckUtils]: 4: Hoare triple {333#true} call #t~ret6 := main(); {333#true} is VALID [2018-11-14 16:24:52,361 INFO L273 TraceCheckUtils]: 5: Hoare triple {333#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {333#true} is VALID [2018-11-14 16:24:52,371 INFO L273 TraceCheckUtils]: 6: Hoare triple {333#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {356#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:52,372 INFO L273 TraceCheckUtils]: 7: Hoare triple {356#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {356#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:52,375 INFO L273 TraceCheckUtils]: 8: Hoare triple {356#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {363#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= |main_#t~mem3| (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:52,381 INFO L273 TraceCheckUtils]: 9: Hoare triple {363#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= |main_#t~mem3| (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {367#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:52,383 INFO L273 TraceCheckUtils]: 10: Hoare triple {367#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {367#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:52,384 INFO L273 TraceCheckUtils]: 11: Hoare triple {367#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {374#(and (bvsge |main_#t~mem3| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv9 32)) |main_#t~mem3|) (bvslt |main_#t~mem3| (_ bv10 32)))} is VALID [2018-11-14 16:24:52,404 INFO L273 TraceCheckUtils]: 12: Hoare triple {374#(and (bvsge |main_#t~mem3| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv9 32)) |main_#t~mem3|) (bvslt |main_#t~mem3| (_ bv10 32)))} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {334#false} is VALID [2018-11-14 16:24:52,405 INFO L256 TraceCheckUtils]: 13: Hoare triple {334#false} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {334#false} is VALID [2018-11-14 16:24:52,405 INFO L273 TraceCheckUtils]: 14: Hoare triple {334#false} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {334#false} is VALID [2018-11-14 16:24:52,406 INFO L273 TraceCheckUtils]: 15: Hoare triple {334#false} assume true; {334#false} is VALID [2018-11-14 16:24:52,406 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {334#false} {334#false} #43#return; {334#false} is VALID [2018-11-14 16:24:52,406 INFO L273 TraceCheckUtils]: 17: Hoare triple {334#false} assume #t~ret5 == 0bv32;havoc #t~ret5; {334#false} is VALID [2018-11-14 16:24:52,407 INFO L273 TraceCheckUtils]: 18: Hoare triple {334#false} assume !false; {334#false} is VALID [2018-11-14 16:24:52,409 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:24:52,409 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:24:52,798 INFO L273 TraceCheckUtils]: 18: Hoare triple {334#false} assume !false; {334#false} is VALID [2018-11-14 16:24:52,798 INFO L273 TraceCheckUtils]: 17: Hoare triple {334#false} assume #t~ret5 == 0bv32;havoc #t~ret5; {334#false} is VALID [2018-11-14 16:24:52,799 INFO L268 TraceCheckUtils]: 16: Hoare quadruple {333#true} {334#false} #43#return; {334#false} is VALID [2018-11-14 16:24:52,799 INFO L273 TraceCheckUtils]: 15: Hoare triple {333#true} assume true; {333#true} is VALID [2018-11-14 16:24:52,799 INFO L273 TraceCheckUtils]: 14: Hoare triple {333#true} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {333#true} is VALID [2018-11-14 16:24:52,800 INFO L256 TraceCheckUtils]: 13: Hoare triple {334#false} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {333#true} is VALID [2018-11-14 16:24:52,802 INFO L273 TraceCheckUtils]: 12: Hoare triple {414#(bvslt main_~i~0 |main_#t~mem3|)} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {334#false} is VALID [2018-11-14 16:24:52,803 INFO L273 TraceCheckUtils]: 11: Hoare triple {418#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {414#(bvslt main_~i~0 |main_#t~mem3|)} is VALID [2018-11-14 16:24:52,804 INFO L273 TraceCheckUtils]: 10: Hoare triple {418#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} assume true; {418#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} is VALID [2018-11-14 16:24:52,804 INFO L273 TraceCheckUtils]: 9: Hoare triple {425#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 |main_#t~mem3|)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {418#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} is VALID [2018-11-14 16:24:52,807 INFO L273 TraceCheckUtils]: 8: Hoare triple {429#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {425#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 |main_#t~mem3|)))} is VALID [2018-11-14 16:24:52,821 INFO L273 TraceCheckUtils]: 7: Hoare triple {429#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} assume true; {429#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:52,825 INFO L273 TraceCheckUtils]: 6: Hoare triple {333#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {429#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:52,826 INFO L273 TraceCheckUtils]: 5: Hoare triple {333#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {333#true} is VALID [2018-11-14 16:24:52,826 INFO L256 TraceCheckUtils]: 4: Hoare triple {333#true} call #t~ret6 := main(); {333#true} is VALID [2018-11-14 16:24:52,826 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {333#true} {333#true} #39#return; {333#true} is VALID [2018-11-14 16:24:52,827 INFO L273 TraceCheckUtils]: 2: Hoare triple {333#true} assume true; {333#true} is VALID [2018-11-14 16:24:52,827 INFO L273 TraceCheckUtils]: 1: Hoare triple {333#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {333#true} is VALID [2018-11-14 16:24:52,827 INFO L256 TraceCheckUtils]: 0: Hoare triple {333#true} call ULTIMATE.init(); {333#true} is VALID [2018-11-14 16:24:52,829 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:24:52,835 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:24:52,835 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-14 16:24:52,836 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-11-14 16:24:52,836 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:24:52,837 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-14 16:24:52,902 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:52,902 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-14 16:24:52,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-14 16:24:52,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2018-11-14 16:24:52,904 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-11-14 16:24:53,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:53,844 INFO L93 Difference]: Finished difference Result 36 states and 38 transitions. [2018-11-14 16:24:53,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-14 16:24:53,844 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-11-14 16:24:53,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:24:53,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-14 16:24:53,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 38 transitions. [2018-11-14 16:24:53,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-14 16:24:53,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 38 transitions. [2018-11-14 16:24:53,851 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 38 transitions. [2018-11-14 16:24:53,918 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:53,921 INFO L225 Difference]: With dead ends: 36 [2018-11-14 16:24:53,921 INFO L226 Difference]: Without dead ends: 29 [2018-11-14 16:24:53,922 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=62, Invalid=120, Unknown=0, NotChecked=0, Total=182 [2018-11-14 16:24:53,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-14 16:24:53,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-11-14 16:24:53,938 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:24:53,938 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 29 states. [2018-11-14 16:24:53,938 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-14 16:24:53,939 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-14 16:24:53,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:53,941 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-11-14 16:24:53,941 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-14 16:24:53,942 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:24:53,942 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:24:53,942 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 29 states. [2018-11-14 16:24:53,942 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 29 states. [2018-11-14 16:24:53,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:24:53,945 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-11-14 16:24:53,945 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-14 16:24:53,946 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:24:53,946 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:24:53,946 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:24:53,946 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:24:53,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-11-14 16:24:53,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-11-14 16:24:53,949 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 19 [2018-11-14 16:24:53,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:24:53,949 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-11-14 16:24:53,949 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-14 16:24:53,949 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-11-14 16:24:53,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-14 16:24:53,950 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:24:53,951 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:24:53,951 INFO L423 AbstractCegarLoop]: === Iteration 4 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:24:53,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:24:53,951 INFO L82 PathProgramCache]: Analyzing trace with hash 1300443756, now seen corresponding path program 2 times [2018-11-14 16:24:53,952 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:24:53,952 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:24:53,977 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-14 16:24:54,052 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 16:24:54,052 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 16:24:54,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:24:54,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:24:54,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-14 16:24:54,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-14 16:24:54,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:24:54,272 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:54,293 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:54,293 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:24 [2018-11-14 16:24:54,304 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:24:54,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2018-11-14 16:24:54,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 12 [2018-11-14 16:24:54,767 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:24:54,788 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:54,804 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:24:54,804 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:31, output treesize:12 [2018-11-14 16:24:54,812 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:24:54,900 INFO L256 TraceCheckUtils]: 0: Hoare triple {614#true} call ULTIMATE.init(); {614#true} is VALID [2018-11-14 16:24:54,900 INFO L273 TraceCheckUtils]: 1: Hoare triple {614#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {614#true} is VALID [2018-11-14 16:24:54,901 INFO L273 TraceCheckUtils]: 2: Hoare triple {614#true} assume true; {614#true} is VALID [2018-11-14 16:24:54,901 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {614#true} {614#true} #39#return; {614#true} is VALID [2018-11-14 16:24:54,901 INFO L256 TraceCheckUtils]: 4: Hoare triple {614#true} call #t~ret6 := main(); {614#true} is VALID [2018-11-14 16:24:54,901 INFO L273 TraceCheckUtils]: 5: Hoare triple {614#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {614#true} is VALID [2018-11-14 16:24:54,910 INFO L273 TraceCheckUtils]: 6: Hoare triple {614#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {637#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,911 INFO L273 TraceCheckUtils]: 7: Hoare triple {637#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {637#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,913 INFO L273 TraceCheckUtils]: 8: Hoare triple {637#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {637#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,918 INFO L273 TraceCheckUtils]: 9: Hoare triple {637#(and (= (bvadd main_~i~0 (_ bv10 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {647#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,919 INFO L273 TraceCheckUtils]: 10: Hoare triple {647#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {647#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,923 INFO L273 TraceCheckUtils]: 11: Hoare triple {647#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {647#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,930 INFO L273 TraceCheckUtils]: 12: Hoare triple {647#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv9 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {657#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv8 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,934 INFO L273 TraceCheckUtils]: 13: Hoare triple {657#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv8 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {657#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv8 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,936 INFO L273 TraceCheckUtils]: 14: Hoare triple {657#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv8 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {657#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv8 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,942 INFO L273 TraceCheckUtils]: 15: Hoare triple {657#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv8 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {667#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv7 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,944 INFO L273 TraceCheckUtils]: 16: Hoare triple {667#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv7 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {667#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv7 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,945 INFO L273 TraceCheckUtils]: 17: Hoare triple {667#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv7 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {674#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv7 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_#t~mem3| (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,954 INFO L273 TraceCheckUtils]: 18: Hoare triple {674#(and (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (= (bvadd main_~i~0 (_ bv7 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_#t~mem3| (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {678#(and (= (bvadd main_~i~0 (_ bv6 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,956 INFO L273 TraceCheckUtils]: 19: Hoare triple {678#(and (= (bvadd main_~i~0 (_ bv6 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} assume true; {678#(and (= (bvadd main_~i~0 (_ bv6 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} is VALID [2018-11-14 16:24:54,957 INFO L273 TraceCheckUtils]: 20: Hoare triple {678#(and (= (bvadd main_~i~0 (_ bv6 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (bvslt (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv10 32)) (bvsge (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {685#(and (bvsge |main_#t~mem3| (_ bv0 32)) (bvslt |main_#t~mem3| (_ bv10 32)) (= (bvadd main_~i~0 (_ bv6 32)) |main_#t~mem3|))} is VALID [2018-11-14 16:24:54,958 INFO L273 TraceCheckUtils]: 21: Hoare triple {685#(and (bvsge |main_#t~mem3| (_ bv0 32)) (bvslt |main_#t~mem3| (_ bv10 32)) (= (bvadd main_~i~0 (_ bv6 32)) |main_#t~mem3|))} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {615#false} is VALID [2018-11-14 16:24:54,959 INFO L256 TraceCheckUtils]: 22: Hoare triple {615#false} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {615#false} is VALID [2018-11-14 16:24:54,959 INFO L273 TraceCheckUtils]: 23: Hoare triple {615#false} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {615#false} is VALID [2018-11-14 16:24:54,960 INFO L273 TraceCheckUtils]: 24: Hoare triple {615#false} assume true; {615#false} is VALID [2018-11-14 16:24:54,960 INFO L268 TraceCheckUtils]: 25: Hoare quadruple {615#false} {615#false} #43#return; {615#false} is VALID [2018-11-14 16:24:54,960 INFO L273 TraceCheckUtils]: 26: Hoare triple {615#false} assume #t~ret5 == 0bv32;havoc #t~ret5; {615#false} is VALID [2018-11-14 16:24:54,961 INFO L273 TraceCheckUtils]: 27: Hoare triple {615#false} assume !false; {615#false} is VALID [2018-11-14 16:24:54,966 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:24:54,966 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:24:55,768 INFO L273 TraceCheckUtils]: 27: Hoare triple {615#false} assume !false; {615#false} is VALID [2018-11-14 16:24:55,768 INFO L273 TraceCheckUtils]: 26: Hoare triple {615#false} assume #t~ret5 == 0bv32;havoc #t~ret5; {615#false} is VALID [2018-11-14 16:24:55,769 INFO L268 TraceCheckUtils]: 25: Hoare quadruple {614#true} {615#false} #43#return; {615#false} is VALID [2018-11-14 16:24:55,769 INFO L273 TraceCheckUtils]: 24: Hoare triple {614#true} assume true; {614#true} is VALID [2018-11-14 16:24:55,770 INFO L273 TraceCheckUtils]: 23: Hoare triple {614#true} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {614#true} is VALID [2018-11-14 16:24:55,770 INFO L256 TraceCheckUtils]: 22: Hoare triple {615#false} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {614#true} is VALID [2018-11-14 16:24:55,770 INFO L273 TraceCheckUtils]: 21: Hoare triple {725#(bvslt main_~i~0 |main_#t~mem3|)} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {615#false} is VALID [2018-11-14 16:24:55,771 INFO L273 TraceCheckUtils]: 20: Hoare triple {729#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {725#(bvslt main_~i~0 |main_#t~mem3|)} is VALID [2018-11-14 16:24:55,776 INFO L273 TraceCheckUtils]: 19: Hoare triple {729#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} assume true; {729#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} is VALID [2018-11-14 16:24:55,777 INFO L273 TraceCheckUtils]: 18: Hoare triple {736#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 |main_#t~mem3|)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {729#(bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))} is VALID [2018-11-14 16:24:55,779 INFO L273 TraceCheckUtils]: 17: Hoare triple {740#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {736#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 |main_#t~mem3|)))} is VALID [2018-11-14 16:24:55,780 INFO L273 TraceCheckUtils]: 16: Hoare triple {740#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} assume true; {740#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,805 INFO L273 TraceCheckUtils]: 15: Hoare triple {747#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {740#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,808 INFO L273 TraceCheckUtils]: 14: Hoare triple {747#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {747#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,809 INFO L273 TraceCheckUtils]: 13: Hoare triple {747#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} assume true; {747#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,866 INFO L273 TraceCheckUtils]: 12: Hoare triple {757#(or (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {747#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,867 INFO L273 TraceCheckUtils]: 11: Hoare triple {757#(or (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {757#(or (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,868 INFO L273 TraceCheckUtils]: 10: Hoare triple {757#(or (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} assume true; {757#(or (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,941 INFO L273 TraceCheckUtils]: 9: Hoare triple {767#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {757#(or (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))))} is VALID [2018-11-14 16:24:55,942 INFO L273 TraceCheckUtils]: 8: Hoare triple {767#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {767#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))} is VALID [2018-11-14 16:24:55,943 INFO L273 TraceCheckUtils]: 7: Hoare triple {767#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))} assume true; {767#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))} is VALID [2018-11-14 16:24:55,949 INFO L273 TraceCheckUtils]: 6: Hoare triple {614#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {767#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset))) (bvslt (bvadd main_~i~0 (_ bv4 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))} is VALID [2018-11-14 16:24:55,950 INFO L273 TraceCheckUtils]: 5: Hoare triple {614#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {614#true} is VALID [2018-11-14 16:24:55,950 INFO L256 TraceCheckUtils]: 4: Hoare triple {614#true} call #t~ret6 := main(); {614#true} is VALID [2018-11-14 16:24:55,951 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {614#true} {614#true} #39#return; {614#true} is VALID [2018-11-14 16:24:55,951 INFO L273 TraceCheckUtils]: 2: Hoare triple {614#true} assume true; {614#true} is VALID [2018-11-14 16:24:55,951 INFO L273 TraceCheckUtils]: 1: Hoare triple {614#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {614#true} is VALID [2018-11-14 16:24:55,951 INFO L256 TraceCheckUtils]: 0: Hoare triple {614#true} call ULTIMATE.init(); {614#true} is VALID [2018-11-14 16:24:55,957 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 16:24:55,961 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:24:55,961 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-11-14 16:24:55,961 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-11-14 16:24:55,965 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:24:55,965 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-14 16:24:56,440 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:24:56,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-14 16:24:56,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-14 16:24:56,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2018-11-14 16:24:56,441 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-11-14 16:24:58,287 WARN L179 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 20 [2018-11-14 16:24:58,558 WARN L179 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 21 [2018-11-14 16:24:58,880 WARN L179 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 17 [2018-11-14 16:24:59,163 WARN L179 SmtUtils]: Spent 180.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 18 [2018-11-14 16:25:00,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:25:00,356 INFO L93 Difference]: Finished difference Result 54 states and 59 transitions. [2018-11-14 16:25:00,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-14 16:25:00,356 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-11-14 16:25:00,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:25:00,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-14 16:25:00,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 59 transitions. [2018-11-14 16:25:00,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-14 16:25:00,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 59 transitions. [2018-11-14 16:25:00,365 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 59 transitions. [2018-11-14 16:25:00,752 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:25:00,754 INFO L225 Difference]: With dead ends: 54 [2018-11-14 16:25:00,754 INFO L226 Difference]: Without dead ends: 47 [2018-11-14 16:25:00,755 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=260, Invalid=552, Unknown=0, NotChecked=0, Total=812 [2018-11-14 16:25:00,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-14 16:25:00,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-11-14 16:25:00,803 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:25:00,803 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand 47 states. [2018-11-14 16:25:00,803 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 47 states. [2018-11-14 16:25:00,804 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 47 states. [2018-11-14 16:25:00,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:25:00,808 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-11-14 16:25:00,808 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-11-14 16:25:00,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:25:00,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:25:00,809 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 47 states. [2018-11-14 16:25:00,809 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 47 states. [2018-11-14 16:25:00,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:25:00,812 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-11-14 16:25:00,813 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-11-14 16:25:00,813 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:25:00,813 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:25:00,814 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:25:00,814 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:25:00,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-11-14 16:25:00,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-11-14 16:25:00,817 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 28 [2018-11-14 16:25:00,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:25:00,817 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-11-14 16:25:00,817 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-14 16:25:00,817 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-11-14 16:25:00,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-14 16:25:00,819 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 16:25:00,819 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 16:25:00,819 INFO L423 AbstractCegarLoop]: === Iteration 5 === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 16:25:00,820 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 16:25:00,820 INFO L82 PathProgramCache]: Analyzing trace with hash -641800756, now seen corresponding path program 3 times [2018-11-14 16:25:00,820 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-14 16:25:00,820 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-14 16:25:00,840 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-14 16:25:00,916 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-14 16:25:00,917 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 16:25:00,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 16:25:00,962 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 16:25:01,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-14 16:25:01,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-14 16:25:01,040 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 16:25:01,044 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:25:01,078 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-14 16:25:01,078 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-11-14 16:25:01,097 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 16:25:03,798 INFO L256 TraceCheckUtils]: 0: Hoare triple {1057#true} call ULTIMATE.init(); {1057#true} is VALID [2018-11-14 16:25:03,799 INFO L273 TraceCheckUtils]: 1: Hoare triple {1057#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1057#true} is VALID [2018-11-14 16:25:03,799 INFO L273 TraceCheckUtils]: 2: Hoare triple {1057#true} assume true; {1057#true} is VALID [2018-11-14 16:25:03,799 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1057#true} {1057#true} #39#return; {1057#true} is VALID [2018-11-14 16:25:03,799 INFO L256 TraceCheckUtils]: 4: Hoare triple {1057#true} call #t~ret6 := main(); {1057#true} is VALID [2018-11-14 16:25:03,801 INFO L273 TraceCheckUtils]: 5: Hoare triple {1057#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {1077#(= |main_~#ad1~0.offset| (_ bv0 32))} is VALID [2018-11-14 16:25:03,804 INFO L273 TraceCheckUtils]: 6: Hoare triple {1077#(= |main_~#ad1~0.offset| (_ bv0 32))} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,805 INFO L273 TraceCheckUtils]: 7: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,806 INFO L273 TraceCheckUtils]: 8: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,807 INFO L273 TraceCheckUtils]: 9: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,808 INFO L273 TraceCheckUtils]: 10: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,810 INFO L273 TraceCheckUtils]: 11: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,813 INFO L273 TraceCheckUtils]: 12: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,814 INFO L273 TraceCheckUtils]: 13: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,815 INFO L273 TraceCheckUtils]: 14: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,816 INFO L273 TraceCheckUtils]: 15: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,817 INFO L273 TraceCheckUtils]: 16: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,817 INFO L273 TraceCheckUtils]: 17: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,818 INFO L273 TraceCheckUtils]: 18: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,819 INFO L273 TraceCheckUtils]: 19: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,820 INFO L273 TraceCheckUtils]: 20: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,821 INFO L273 TraceCheckUtils]: 21: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,822 INFO L273 TraceCheckUtils]: 22: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,823 INFO L273 TraceCheckUtils]: 23: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,824 INFO L273 TraceCheckUtils]: 24: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,825 INFO L273 TraceCheckUtils]: 25: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,827 INFO L273 TraceCheckUtils]: 26: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,828 INFO L273 TraceCheckUtils]: 27: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,829 INFO L273 TraceCheckUtils]: 28: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,830 INFO L273 TraceCheckUtils]: 29: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,831 INFO L273 TraceCheckUtils]: 30: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,832 INFO L273 TraceCheckUtils]: 31: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,834 INFO L273 TraceCheckUtils]: 32: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,835 INFO L273 TraceCheckUtils]: 33: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,836 INFO L273 TraceCheckUtils]: 34: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,841 INFO L273 TraceCheckUtils]: 35: Hoare triple {1081#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1169#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_#t~mem3| (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,847 INFO L273 TraceCheckUtils]: 36: Hoare triple {1169#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_#t~mem3| (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.base| main_~pa~0.base))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1173#(and (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,848 INFO L273 TraceCheckUtils]: 37: Hoare triple {1173#(and (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} assume true; {1173#(and (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} is VALID [2018-11-14 16:25:03,857 INFO L273 TraceCheckUtils]: 38: Hoare triple {1173#(and (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)) main_~pa~0.offset))) (= |main_~#ad1~0.base| main_~pa~0.base))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1180#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26))) |main_#t~mem3|) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))))))} is VALID [2018-11-14 16:25:03,862 INFO L273 TraceCheckUtils]: 39: Hoare triple {1180#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26))) |main_#t~mem3|) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))))))} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {1184#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt main_~i~0 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26))))) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))))))} is VALID [2018-11-14 16:25:03,886 INFO L256 TraceCheckUtils]: 40: Hoare triple {1184#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt main_~i~0 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26))))) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))))))} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {1188#(exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))))} is VALID [2018-11-14 16:25:03,896 INFO L273 TraceCheckUtils]: 41: Hoare triple {1188#(exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))))} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {1192#(or (and (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|)))) (= |check_#res| (_ bv0 32))) (and (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|))) (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (= (bvadd |check_#res| (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 16:25:03,897 INFO L273 TraceCheckUtils]: 42: Hoare triple {1192#(or (and (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|)))) (= |check_#res| (_ bv0 32))) (and (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|))) (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (= (bvadd |check_#res| (_ bv4294967295 32)) (_ bv0 32))))} assume true; {1192#(or (and (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|)))) (= |check_#res| (_ bv0 32))) (and (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|))) (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (= (bvadd |check_#res| (_ bv4294967295 32)) (_ bv0 32))))} is VALID [2018-11-14 16:25:03,915 INFO L268 TraceCheckUtils]: 43: Hoare quadruple {1192#(or (and (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|)))) (= |check_#res| (_ bv0 32))) (and (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd (bvmul (_ bv8 32) |check_#in~b|) |check_#in~ad1.offset|))) (exists ((v_main_~i~0_BEFORE_CALL_1 (_ BitVec 32)) (|v_main_~#ad1~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_main_~i~0_26 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)) v_main_~i~0_26) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt v_main_~i~0_BEFORE_CALL_1 (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt (bvadd v_main_~i~0_BEFORE_CALL_1 (_ bv4294967295 32)) (select (select |#memory_int| |v_main_~#ad1~0.base_BEFORE_CALL_1|) (bvmul (_ bv8 32) v_main_~i~0_26))))) (= (bvadd |check_#res| (_ bv4294967295 32)) (_ bv0 32))))} {1184#(and (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt main_~i~0 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26))))) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))))))} #43#return; {1199#(= (_ bv1 32) |main_#t~ret5|)} is VALID [2018-11-14 16:25:03,916 INFO L273 TraceCheckUtils]: 44: Hoare triple {1199#(= (_ bv1 32) |main_#t~ret5|)} assume #t~ret5 == 0bv32;havoc #t~ret5; {1058#false} is VALID [2018-11-14 16:25:03,916 INFO L273 TraceCheckUtils]: 45: Hoare triple {1058#false} assume !false; {1058#false} is VALID [2018-11-14 16:25:03,936 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 29 proven. 10 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-11-14 16:25:03,937 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-14 16:25:10,755 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-11-14 16:25:10,756 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-14 16:25:10,756 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 16:25:10,757 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:39, output treesize:1 [2018-11-14 16:25:10,773 INFO L273 TraceCheckUtils]: 45: Hoare triple {1058#false} assume !false; {1058#false} is VALID [2018-11-14 16:25:10,774 INFO L273 TraceCheckUtils]: 44: Hoare triple {1209#(not (= (_ bv0 32) |main_#t~ret5|))} assume #t~ret5 == 0bv32;havoc #t~ret5; {1058#false} is VALID [2018-11-14 16:25:10,780 INFO L268 TraceCheckUtils]: 43: Hoare quadruple {1217#(or (not (= |check_#res| (_ bv0 32))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd |check_#in~ad1.offset| (bvmul (_ bv8 32) |check_#in~b|))))))} {1213#(= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0)} #43#return; {1209#(not (= (_ bv0 32) |main_#t~ret5|))} is VALID [2018-11-14 16:25:10,780 INFO L273 TraceCheckUtils]: 42: Hoare triple {1217#(or (not (= |check_#res| (_ bv0 32))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd |check_#in~ad1.offset| (bvmul (_ bv8 32) |check_#in~b|))))))} assume true; {1217#(or (not (= |check_#res| (_ bv0 32))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd |check_#in~ad1.offset| (bvmul (_ bv8 32) |check_#in~b|))))))} is VALID [2018-11-14 16:25:10,782 INFO L273 TraceCheckUtils]: 41: Hoare triple {1057#true} ~ad1.base, ~ad1.offset := #in~ad1.base, #in~ad1.offset;~b := #in~b;call #t~mem0 := read~intINTTYPE4(~ad1.base, ~bvadd32(~ad1.offset, ~bvmul32(8bv32, ~b)), 4bv32);#res := (if #t~mem0 == ~b then 1bv32 else 0bv32);havoc #t~mem0; {1217#(or (not (= |check_#res| (_ bv0 32))) (not (= |check_#in~b| (select (select |#memory_int| |check_#in~ad1.base|) (bvadd |check_#in~ad1.offset| (bvmul (_ bv8 32) |check_#in~b|))))))} is VALID [2018-11-14 16:25:10,782 INFO L256 TraceCheckUtils]: 40: Hoare triple {1213#(= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0)} call #t~ret5 := check(~#ad1~0.base, ~#ad1~0.offset, ~i~0); {1057#true} is VALID [2018-11-14 16:25:10,783 INFO L273 TraceCheckUtils]: 39: Hoare triple {1227#(or (bvslt main_~i~0 |main_#t~mem3|) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0))} assume !~bvslt32(~i~0, #t~mem3);havoc #t~mem3; {1213#(= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0)} is VALID [2018-11-14 16:25:10,783 INFO L273 TraceCheckUtils]: 38: Hoare triple {1231#(or (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1227#(or (bvslt main_~i~0 |main_#t~mem3|) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0))} is VALID [2018-11-14 16:25:10,784 INFO L273 TraceCheckUtils]: 37: Hoare triple {1231#(or (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0))} assume true; {1231#(or (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0))} is VALID [2018-11-14 16:25:10,979 INFO L273 TraceCheckUtils]: 36: Hoare triple {1238#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 |main_#t~mem3|))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1231#(or (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0))) main_~i~0))} is VALID [2018-11-14 16:25:10,983 INFO L273 TraceCheckUtils]: 35: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1238#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 |main_#t~mem3|))))} is VALID [2018-11-14 16:25:10,984 INFO L273 TraceCheckUtils]: 34: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,984 INFO L273 TraceCheckUtils]: 33: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,993 INFO L273 TraceCheckUtils]: 32: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,994 INFO L273 TraceCheckUtils]: 31: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,994 INFO L273 TraceCheckUtils]: 30: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,994 INFO L273 TraceCheckUtils]: 29: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,995 INFO L273 TraceCheckUtils]: 28: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,995 INFO L273 TraceCheckUtils]: 27: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,996 INFO L273 TraceCheckUtils]: 26: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,996 INFO L273 TraceCheckUtils]: 25: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:10,997 INFO L273 TraceCheckUtils]: 24: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,002 INFO L273 TraceCheckUtils]: 23: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,002 INFO L273 TraceCheckUtils]: 22: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,003 INFO L273 TraceCheckUtils]: 21: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,003 INFO L273 TraceCheckUtils]: 20: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,004 INFO L273 TraceCheckUtils]: 19: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,004 INFO L273 TraceCheckUtils]: 18: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,005 INFO L273 TraceCheckUtils]: 17: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,005 INFO L273 TraceCheckUtils]: 16: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,005 INFO L273 TraceCheckUtils]: 15: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,006 INFO L273 TraceCheckUtils]: 14: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,014 INFO L273 TraceCheckUtils]: 13: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,015 INFO L273 TraceCheckUtils]: 12: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,015 INFO L273 TraceCheckUtils]: 11: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,016 INFO L273 TraceCheckUtils]: 10: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,016 INFO L273 TraceCheckUtils]: 9: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume !!~bvslt32(~i~0, #t~mem3);havoc #t~mem3;#t~pre4 := ~bvadd32(1bv32, ~i~0);~i~0 := ~bvadd32(1bv32, ~i~0);havoc #t~pre4; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,017 INFO L273 TraceCheckUtils]: 8: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} call #t~mem3 := read~intINTTYPE4(~pa~0.base, ~pa~0.offset, 4bv32); {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,017 INFO L273 TraceCheckUtils]: 7: Hoare triple {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} assume true; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,200 INFO L273 TraceCheckUtils]: 6: Hoare triple {1057#true} assume ~bvsge32(~i~0, 0bv32) && ~bvslt32(~i~0, 10bv32);~ad2~0.base, ~ad2~0.offset := ~#ad1~0.base, ~#ad1~0.offset;call write~intINTTYPE4(~i~0, ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~pa~0.base, ~pa~0.offset := ~#ad1~0.base, ~bvadd32(~#ad1~0.offset, ~bvmul32(8bv32, ~i~0));call #t~mem2 := read~intINTTYPE4(~ad2~0.base, ~bvadd32(~ad2~0.offset, ~bvmul32(8bv32, ~i~0)), 4bv32);~i~0 := ~bvsub32(#t~mem2, 10bv32);havoc #t~mem2; {1242#(forall ((main_~i~0 (_ BitVec 32))) (or (= (bvadd (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) main_~i~0) (_ bv8 32))) (_ bv4294967295 32)) main_~i~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (not (bvslt main_~i~0 (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)))))} is VALID [2018-11-14 16:25:11,200 INFO L273 TraceCheckUtils]: 5: Hoare triple {1057#true} call ~#ad1~0.base, ~#ad1~0.offset := #Ultimate.alloc(80bv32);havoc ~ad2~0.base, ~ad2~0.offset;havoc ~i~0;havoc ~pa~0.base, ~pa~0.offset;~i~0 := #t~nondet1;havoc #t~nondet1; {1057#true} is VALID [2018-11-14 16:25:11,200 INFO L256 TraceCheckUtils]: 4: Hoare triple {1057#true} call #t~ret6 := main(); {1057#true} is VALID [2018-11-14 16:25:11,200 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1057#true} {1057#true} #39#return; {1057#true} is VALID [2018-11-14 16:25:11,201 INFO L273 TraceCheckUtils]: 2: Hoare triple {1057#true} assume true; {1057#true} is VALID [2018-11-14 16:25:11,201 INFO L273 TraceCheckUtils]: 1: Hoare triple {1057#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1057#true} is VALID [2018-11-14 16:25:11,201 INFO L256 TraceCheckUtils]: 0: Hoare triple {1057#true} call ULTIMATE.init(); {1057#true} is VALID [2018-11-14 16:25:11,213 INFO L134 CoverageAnalysis]: Checked inductivity of 165 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2018-11-14 16:25:11,220 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 16:25:11,220 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 18 [2018-11-14 16:25:11,221 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 46 [2018-11-14 16:25:11,222 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 16:25:11,222 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-14 16:25:11,880 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:25:11,880 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-14 16:25:11,881 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-14 16:25:11,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2018-11-14 16:25:11,881 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 18 states. [2018-11-14 16:25:14,713 WARN L179 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2018-11-14 16:25:16,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:25:16,327 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-11-14 16:25:16,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-14 16:25:16,327 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 46 [2018-11-14 16:25:16,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 16:25:16,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 16:25:16,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 17 transitions. [2018-11-14 16:25:16,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 16:25:16,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 17 transitions. [2018-11-14 16:25:16,330 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 17 transitions. [2018-11-14 16:25:16,599 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 16:25:16,599 INFO L225 Difference]: With dead ends: 47 [2018-11-14 16:25:16,599 INFO L226 Difference]: Without dead ends: 0 [2018-11-14 16:25:16,600 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 73 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=96, Invalid=324, Unknown=0, NotChecked=0, Total=420 [2018-11-14 16:25:16,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-11-14 16:25:16,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-11-14 16:25:16,601 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 16:25:16,601 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand 0 states. [2018-11-14 16:25:16,601 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand 0 states. [2018-11-14 16:25:16,601 INFO L87 Difference]: Start difference. First operand 0 states. Second operand 0 states. [2018-11-14 16:25:16,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:25:16,602 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2018-11-14 16:25:16,602 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-11-14 16:25:16,603 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:25:16,603 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:25:16,603 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand 0 states. [2018-11-14 16:25:16,603 INFO L87 Difference]: Start difference. First operand 0 states. Second operand 0 states. [2018-11-14 16:25:16,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 16:25:16,603 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2018-11-14 16:25:16,604 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-11-14 16:25:16,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:25:16,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 16:25:16,604 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 16:25:16,604 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 16:25:16,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-11-14 16:25:16,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-11-14 16:25:16,605 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 46 [2018-11-14 16:25:16,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 16:25:16,606 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-11-14 16:25:16,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-14 16:25:16,606 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-11-14 16:25:16,606 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 16:25:16,611 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-11-14 16:25:16,887 WARN L179 SmtUtils]: Spent 135.00 ms on a formula simplification that was a NOOP. DAG size: 28 [2018-11-14 16:25:17,751 WARN L179 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 1 [2018-11-14 16:25:17,819 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.initFINAL(line -1) no Hoare annotation was computed. [2018-11-14 16:25:17,820 INFO L428 ceAbstractionStarter]: At program point ULTIMATE.initENTRY(line -1) the Hoare annotation is: true [2018-11-14 16:25:17,820 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2018-11-14 16:25:17,820 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2018-11-14 16:25:17,820 INFO L428 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-11-14 16:25:17,820 INFO L428 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2018-11-14 16:25:17,820 INFO L425 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2018-11-14 16:25:17,820 INFO L425 ceAbstractionStarter]: For program point L29(lines 29 31) no Hoare annotation was computed. [2018-11-14 16:25:17,821 INFO L425 ceAbstractionStarter]: For program point mainEXIT(lines 14 38) no Hoare annotation was computed. [2018-11-14 16:25:17,821 INFO L425 ceAbstractionStarter]: For program point L21(lines 21 32) no Hoare annotation was computed. [2018-11-14 16:25:17,821 INFO L425 ceAbstractionStarter]: For program point L21-2(lines 21 32) no Hoare annotation was computed. [2018-11-14 16:25:17,821 INFO L425 ceAbstractionStarter]: For program point mainFINAL(lines 14 38) no Hoare annotation was computed. [2018-11-14 16:25:17,821 INFO L425 ceAbstractionStarter]: For program point mainErr0ASSERT_VIOLATIONERROR_FUNCTION(line 36) no Hoare annotation was computed. [2018-11-14 16:25:17,821 INFO L421 ceAbstractionStarter]: At program point L30(lines 15 38) the Hoare annotation is: false [2018-11-14 16:25:17,821 INFO L428 ceAbstractionStarter]: At program point mainENTRY(lines 14 38) the Hoare annotation is: true [2018-11-14 16:25:17,822 INFO L425 ceAbstractionStarter]: For program point L26-1(lines 26 28) no Hoare annotation was computed. [2018-11-14 16:25:17,822 INFO L425 ceAbstractionStarter]: For program point L26-2(lines 26 28) no Hoare annotation was computed. [2018-11-14 16:25:17,822 INFO L421 ceAbstractionStarter]: At program point L26-4(lines 26 28) the Hoare annotation is: (and (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (let ((.cse0 (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) .cse0)) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= .cse0 main_~pa~0.offset)))) (= |main_~#ad1~0.base| main_~pa~0.base)) [2018-11-14 16:25:17,822 INFO L421 ceAbstractionStarter]: At program point L26-5(lines 26 28) the Hoare annotation is: (and (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| main_~pa~0.base) main_~pa~0.offset)) (= |main_~#ad1~0.offset| (_ bv0 32)) (exists ((v_main_~i~0_26 (_ BitVec 32))) (let ((.cse0 (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26)))) (and (= v_main_~i~0_26 (select (select |#memory_int| |main_~#ad1~0.base|) .cse0)) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (= .cse0 main_~pa~0.offset)))) (exists ((v_main_~i~0_26 (_ BitVec 32))) (let ((.cse1 (select (select |#memory_int| |main_~#ad1~0.base|) (bvadd |main_~#ad1~0.offset| (bvmul (_ bv8 32) v_main_~i~0_26))))) (and (= v_main_~i~0_26 .cse1) (bvslt v_main_~i~0_26 (_ bv10 32)) (bvsge v_main_~i~0_26 (_ bv0 32)) (not (bvslt main_~i~0 .cse1)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) .cse1)))) (= |main_~#ad1~0.base| main_~pa~0.base)) [2018-11-14 16:25:17,822 INFO L428 ceAbstractionStarter]: At program point checkENTRY(lines 9 12) the Hoare annotation is: true [2018-11-14 16:25:17,822 INFO L425 ceAbstractionStarter]: For program point checkFINAL(lines 9 12) no Hoare annotation was computed. [2018-11-14 16:25:17,823 INFO L425 ceAbstractionStarter]: For program point checkEXIT(lines 9 12) no Hoare annotation was computed. [2018-11-14 16:25:17,824 WARN L170 areAnnotationChecker]: ULTIMATE.initFINAL has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: L21 has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: checkFINAL has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: ULTIMATE.initFINAL has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: L21 has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: L21 has no Hoare annotation [2018-11-14 16:25:17,825 WARN L170 areAnnotationChecker]: checkFINAL has no Hoare annotation [2018-11-14 16:25:17,826 WARN L170 areAnnotationChecker]: ULTIMATE.initEXIT has no Hoare annotation [2018-11-14 16:25:17,826 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2018-11-14 16:25:17,826 WARN L170 areAnnotationChecker]: L26-1 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L21-2 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: checkEXIT has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L26-1 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L29 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: mainFINAL has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L29 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L29 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L26-2 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: L26-2 has no Hoare annotation [2018-11-14 16:25:17,827 WARN L170 areAnnotationChecker]: mainEXIT has no Hoare annotation [2018-11-14 16:25:17,828 WARN L170 areAnnotationChecker]: mainErr0ASSERT_VIOLATIONERROR_FUNCTION has no Hoare annotation [2018-11-14 16:25:17,828 WARN L170 areAnnotationChecker]: mainFINAL has no Hoare annotation [2018-11-14 16:25:17,828 INFO L163 areAnnotationChecker]: CFG has 4 edges. 4 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [2018-11-14 16:25:17,834 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,835 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,835 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,835 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,835 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,837 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,838 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,848 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,848 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,848 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,849 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,849 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,849 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,849 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.11 04:25:17 BoogieIcfgContainer [2018-11-14 16:25:17,852 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-14 16:25:17,853 INFO L168 Benchmark]: Toolchain (without parser) took 30427.47 ms. Allocated memory was 1.5 GB in the beginning and 2.4 GB in the end (delta: 882.9 MB). Free memory was 1.4 GB in the beginning and 2.0 GB in the end (delta: -520.2 MB). Peak memory consumption was 362.7 MB. Max. memory is 7.1 GB. [2018-11-14 16:25:17,854 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-14 16:25:17,855 INFO L168 Benchmark]: CACSL2BoogieTranslator took 392.17 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-11-14 16:25:17,856 INFO L168 Benchmark]: Boogie Preprocessor took 76.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-14 16:25:17,856 INFO L168 Benchmark]: RCFGBuilder took 766.48 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 768.1 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -800.4 MB). Peak memory consumption was 14.8 MB. Max. memory is 7.1 GB. [2018-11-14 16:25:17,857 INFO L168 Benchmark]: TraceAbstraction took 29187.54 ms. Allocated memory was 2.3 GB in the beginning and 2.4 GB in the end (delta: 114.8 MB). Free memory was 2.2 GB in the beginning and 2.0 GB in the end (delta: 269.7 MB). Peak memory consumption was 384.5 MB. Max. memory is 7.1 GB. [2018-11-14 16:25:17,861 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - GenericResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 392.17 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 76.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 766.48 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 768.1 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -800.4 MB). Peak memory consumption was 14.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 29187.54 ms. Allocated memory was 2.3 GB in the beginning and 2.4 GB in the end (delta: 114.8 MB). Free memory was 2.2 GB in the beginning and 2.0 GB in the end (delta: 269.7 MB). Peak memory consumption was 384.5 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] - GenericResult: Unfinished Backtranslation Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation unknown boogie variable #memory_int - GenericResult: Unfinished Backtranslation unknown boogie variable #memory_int - GenericResult: Unfinished Backtranslation unknown boogie variable #memory_int - GenericResult: Unfinished Backtranslation unknown boogie variable #memory_int * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 36]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 26]: Loop Invariant [2018-11-14 16:25:17,870 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,873 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,873 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,873 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,873 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,874 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,874 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,874 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,875 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,875 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,875 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,875 WARN L387 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[v_main_~i~0_26,QUANTIFIED] [2018-11-14 16:25:17,875 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int [2018-11-14 16:25:17,877 WARN L1239 BoogieBacktranslator]: unknown boogie variable #memory_int Derived loop invariant: ((~bvslt32(~bvadd64(i, 4294967295bv32), unknown-#memory_int-unknown[pa][pa]) && ad1 == 0bv32) && (\exists v_main_~i~0_26 : bv32 :: ((v_main_~i~0_26 == unknown-#memory_int-unknown[ad1][~bvadd64(ad1, ~bvmul32(8bv32, v_main_~i~0_26))] && ~bvslt32(v_main_~i~0_26, 10bv32)) && ~bvsge32(v_main_~i~0_26, 0bv32)) && ~bvadd64(ad1, ~bvmul32(8bv32, v_main_~i~0_26)) == pa)) && ad1 == pa - InvariantResult [Line: 15]: Loop Invariant Derived loop invariant: 0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 22 locations, 1 error locations. SAFE Result, 29.0s OverallTime, 5 OverallIterations, 11 TraceHistogramMax, 11.3s AutomataDifference, 0.0s DeadEndRemovalTime, 1.2s HoareAnnotationTime, HoareTripleCheckerStatistics: 82 SDtfs, 50 SDslu, 281 SDs, 0 SdLazy, 222 SolverSat, 36 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 232 GetRequests, 169 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 5.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=47occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 5 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 8 LocationsWithAnnotation, 12 PreInvPairs, 23 NumberOfFragments, 134 HoareAnnotationTreeSize, 12 FomulaSimplifications, 684 FormulaSimplificationTreeSizeReduction, 0.0s HoareSimplificationTime, 8 FomulaSimplificationsInter, 79 FormulaSimplificationTreeSizeReductionInter, 0.3s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 14.3s InterpolantComputationTime, 123 NumberOfCodeBlocks, 96 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 208 ConstructedInterpolants, 67 QuantifiedInterpolants, 136681 SizeOfPredicates, 46 NumberOfNonLiveVariables, 277 ConjunctsInSsa, 61 ConjunctsInUnsatCore, 8 InterpolantComputations, 2 PerfectInterpolantSequences, 281/396 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...