java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 17:31:12,455 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 17:31:12,457 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 17:31:12,469 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 17:31:12,470 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 17:31:12,471 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 17:31:12,472 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 17:31:12,474 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 17:31:12,476 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 17:31:12,476 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 17:31:12,477 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 17:31:12,478 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 17:31:12,479 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 17:31:12,480 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 17:31:12,481 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 17:31:12,482 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 17:31:12,483 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 17:31:12,485 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 17:31:12,487 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 17:31:12,488 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 17:31:12,489 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 17:31:12,495 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 17:31:12,501 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-14 17:31:12,514 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-14 17:31:12,536 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 17:31:12,536 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 17:31:12,537 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 17:31:12,537 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 17:31:12,539 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 17:31:12,540 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 17:31:12,540 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 17:31:12,540 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 17:31:12,540 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 17:31:12,540 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-14 17:31:12,541 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 17:31:12,541 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 17:31:12,541 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 17:31:12,542 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 17:31:12,542 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 17:31:12,542 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 17:31:12,542 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 17:31:12,542 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 17:31:12,544 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 17:31:12,544 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 17:31:12,544 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 17:31:12,544 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 17:31:12,545 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:31:12,545 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 17:31:12,545 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 17:31:12,545 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 17:31:12,545 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-14 17:31:12,545 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 17:31:12,546 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-14 17:31:12,546 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 17:31:12,604 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 17:31:12,623 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 17:31:12,627 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 17:31:12,629 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 17:31:12,629 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 17:31:12,630 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i [2018-11-14 17:31:12,697 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c5736ab02/33daab8b52aa44899bf2db7957013ae2/FLAGe316fe7a9 [2018-11-14 17:31:13,201 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 17:31:13,201 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/const_false-unreach-call1.i [2018-11-14 17:31:13,208 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c5736ab02/33daab8b52aa44899bf2db7957013ae2/FLAGe316fe7a9 [2018-11-14 17:31:13,222 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c5736ab02/33daab8b52aa44899bf2db7957013ae2 [2018-11-14 17:31:13,231 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 17:31:13,233 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 17:31:13,234 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 17:31:13,234 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 17:31:13,237 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 17:31:13,239 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,242 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a8948ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13, skipping insertion in model container [2018-11-14 17:31:13,242 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,251 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 17:31:13,271 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 17:31:13,463 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:31:13,468 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 17:31:13,486 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:31:13,503 INFO L195 MainTranslator]: Completed translation [2018-11-14 17:31:13,503 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13 WrapperNode [2018-11-14 17:31:13,503 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 17:31:13,504 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 17:31:13,504 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 17:31:13,505 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 17:31:13,520 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,527 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,527 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,532 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,538 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,539 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... [2018-11-14 17:31:13,540 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 17:31:13,541 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 17:31:13,541 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 17:31:13,541 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 17:31:13,542 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:31:13,697 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 17:31:13,697 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 17:31:13,697 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 17:31:13,697 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 17:31:13,698 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 17:31:13,698 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 17:31:13,698 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 17:31:13,698 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 17:31:13,698 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 17:31:14,312 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 17:31:14,313 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:31:14 BoogieIcfgContainer [2018-11-14 17:31:14,313 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 17:31:14,314 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 17:31:14,314 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 17:31:14,318 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 17:31:14,318 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 05:31:13" (1/3) ... [2018-11-14 17:31:14,319 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@638e1ffa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:31:14, skipping insertion in model container [2018-11-14 17:31:14,319 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:31:13" (2/3) ... [2018-11-14 17:31:14,320 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@638e1ffa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:31:14, skipping insertion in model container [2018-11-14 17:31:14,320 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:31:14" (3/3) ... [2018-11-14 17:31:14,322 INFO L112 eAbstractionObserver]: Analyzing ICFG const_false-unreach-call1.i [2018-11-14 17:31:14,332 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 17:31:14,344 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 17:31:14,362 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 17:31:14,394 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 17:31:14,395 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 17:31:14,395 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 17:31:14,395 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 17:31:14,395 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 17:31:14,396 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 17:31:14,396 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 17:31:14,396 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 17:31:14,396 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 17:31:14,414 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states. [2018-11-14 17:31:14,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2018-11-14 17:31:14,420 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:14,421 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:14,423 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:14,429 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:14,430 INFO L82 PathProgramCache]: Analyzing trace with hash -10373566, now seen corresponding path program 1 times [2018-11-14 17:31:14,432 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:14,432 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:14,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:14,485 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:14,485 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:14,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:14,547 INFO L256 TraceCheckUtils]: 0: Hoare triple {21#true} call ULTIMATE.init(); {21#true} is VALID [2018-11-14 17:31:14,552 INFO L273 TraceCheckUtils]: 1: Hoare triple {21#true} assume true; {21#true} is VALID [2018-11-14 17:31:14,553 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {21#true} {21#true} #32#return; {21#true} is VALID [2018-11-14 17:31:14,553 INFO L256 TraceCheckUtils]: 3: Hoare triple {21#true} call #t~ret1 := main(); {21#true} is VALID [2018-11-14 17:31:14,553 INFO L273 TraceCheckUtils]: 4: Hoare triple {21#true} ~x~0 := 1;~y~0 := 0; {21#true} is VALID [2018-11-14 17:31:14,560 INFO L273 TraceCheckUtils]: 5: Hoare triple {21#true} assume !true; {22#false} is VALID [2018-11-14 17:31:14,560 INFO L256 TraceCheckUtils]: 6: Hoare triple {22#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {22#false} is VALID [2018-11-14 17:31:14,561 INFO L273 TraceCheckUtils]: 7: Hoare triple {22#false} ~cond := #in~cond; {22#false} is VALID [2018-11-14 17:31:14,562 INFO L273 TraceCheckUtils]: 8: Hoare triple {22#false} assume ~cond == 0; {22#false} is VALID [2018-11-14 17:31:14,562 INFO L273 TraceCheckUtils]: 9: Hoare triple {22#false} assume !false; {22#false} is VALID [2018-11-14 17:31:14,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:14,567 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:31:14,567 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 17:31:14,572 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-11-14 17:31:14,575 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:14,579 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 17:31:14,669 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 10 edges. 10 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:14,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 17:31:14,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 17:31:14,679 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:31:14,681 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 2 states. [2018-11-14 17:31:14,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:14,763 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2018-11-14 17:31:14,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 17:31:14,763 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 10 [2018-11-14 17:31:14,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:14,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:31:14,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 32 transitions. [2018-11-14 17:31:14,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:31:14,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 32 transitions. [2018-11-14 17:31:14,779 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 32 transitions. [2018-11-14 17:31:14,868 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:14,879 INFO L225 Difference]: With dead ends: 29 [2018-11-14 17:31:14,879 INFO L226 Difference]: Without dead ends: 12 [2018-11-14 17:31:14,882 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:31:14,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states. [2018-11-14 17:31:14,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2018-11-14 17:31:14,947 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:14,947 INFO L82 GeneralOperation]: Start isEquivalent. First operand 12 states. Second operand 12 states. [2018-11-14 17:31:14,948 INFO L74 IsIncluded]: Start isIncluded. First operand 12 states. Second operand 12 states. [2018-11-14 17:31:14,949 INFO L87 Difference]: Start difference. First operand 12 states. Second operand 12 states. [2018-11-14 17:31:14,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:14,952 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2018-11-14 17:31:14,952 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-11-14 17:31:14,952 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:14,953 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:14,953 INFO L74 IsIncluded]: Start isIncluded. First operand 12 states. Second operand 12 states. [2018-11-14 17:31:14,953 INFO L87 Difference]: Start difference. First operand 12 states. Second operand 12 states. [2018-11-14 17:31:14,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:14,956 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2018-11-14 17:31:14,956 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-11-14 17:31:14,957 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:14,957 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:14,957 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:14,957 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:14,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 17:31:14,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2018-11-14 17:31:14,961 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 10 [2018-11-14 17:31:14,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:14,962 INFO L480 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2018-11-14 17:31:14,962 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 17:31:14,962 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2018-11-14 17:31:14,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-11-14 17:31:14,963 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:14,963 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:14,963 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:14,964 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:14,964 INFO L82 PathProgramCache]: Analyzing trace with hash -571410792, now seen corresponding path program 1 times [2018-11-14 17:31:14,964 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:14,964 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:14,965 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:14,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:14,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:14,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:15,295 INFO L256 TraceCheckUtils]: 0: Hoare triple {106#true} call ULTIMATE.init(); {106#true} is VALID [2018-11-14 17:31:15,295 INFO L273 TraceCheckUtils]: 1: Hoare triple {106#true} assume true; {106#true} is VALID [2018-11-14 17:31:15,296 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {106#true} {106#true} #32#return; {106#true} is VALID [2018-11-14 17:31:15,296 INFO L256 TraceCheckUtils]: 3: Hoare triple {106#true} call #t~ret1 := main(); {106#true} is VALID [2018-11-14 17:31:15,305 INFO L273 TraceCheckUtils]: 4: Hoare triple {106#true} ~x~0 := 1;~y~0 := 0; {108#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:15,317 INFO L273 TraceCheckUtils]: 5: Hoare triple {108#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {108#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:15,330 INFO L273 TraceCheckUtils]: 6: Hoare triple {108#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !(~y~0 % 4294967296 < 1024); {107#false} is VALID [2018-11-14 17:31:15,330 INFO L256 TraceCheckUtils]: 7: Hoare triple {107#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {107#false} is VALID [2018-11-14 17:31:15,331 INFO L273 TraceCheckUtils]: 8: Hoare triple {107#false} ~cond := #in~cond; {107#false} is VALID [2018-11-14 17:31:15,331 INFO L273 TraceCheckUtils]: 9: Hoare triple {107#false} assume ~cond == 0; {107#false} is VALID [2018-11-14 17:31:15,331 INFO L273 TraceCheckUtils]: 10: Hoare triple {107#false} assume !false; {107#false} is VALID [2018-11-14 17:31:15,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:15,333 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:31:15,333 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-14 17:31:15,334 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-11-14 17:31:15,335 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:15,335 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-14 17:31:15,450 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:15,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-14 17:31:15,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-14 17:31:15,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-14 17:31:15,451 INFO L87 Difference]: Start difference. First operand 12 states and 12 transitions. Second operand 3 states. [2018-11-14 17:31:15,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:15,530 INFO L93 Difference]: Finished difference Result 19 states and 19 transitions. [2018-11-14 17:31:15,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-14 17:31:15,530 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-11-14 17:31:15,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:15,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-14 17:31:15,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 19 transitions. [2018-11-14 17:31:15,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-14 17:31:15,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 19 transitions. [2018-11-14 17:31:15,539 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 19 transitions. [2018-11-14 17:31:15,590 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:15,592 INFO L225 Difference]: With dead ends: 19 [2018-11-14 17:31:15,592 INFO L226 Difference]: Without dead ends: 14 [2018-11-14 17:31:15,593 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-14 17:31:15,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-11-14 17:31:15,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-11-14 17:31:15,602 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:15,602 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand 14 states. [2018-11-14 17:31:15,602 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand 14 states. [2018-11-14 17:31:15,603 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 14 states. [2018-11-14 17:31:15,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:15,604 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2018-11-14 17:31:15,605 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-11-14 17:31:15,605 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:15,605 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:15,605 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand 14 states. [2018-11-14 17:31:15,605 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 14 states. [2018-11-14 17:31:15,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:15,607 INFO L93 Difference]: Finished difference Result 14 states and 14 transitions. [2018-11-14 17:31:15,608 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-11-14 17:31:15,608 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:15,608 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:15,608 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:15,608 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:15,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-14 17:31:15,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 14 transitions. [2018-11-14 17:31:15,610 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 14 transitions. Word has length 11 [2018-11-14 17:31:15,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:15,611 INFO L480 AbstractCegarLoop]: Abstraction has 14 states and 14 transitions. [2018-11-14 17:31:15,611 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-14 17:31:15,611 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 14 transitions. [2018-11-14 17:31:15,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-11-14 17:31:15,612 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:15,612 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:15,612 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:15,612 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:15,613 INFO L82 PathProgramCache]: Analyzing trace with hash 1625028318, now seen corresponding path program 1 times [2018-11-14 17:31:15,613 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:15,613 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:15,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:15,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:15,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:15,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:15,823 INFO L256 TraceCheckUtils]: 0: Hoare triple {190#true} call ULTIMATE.init(); {190#true} is VALID [2018-11-14 17:31:15,823 INFO L273 TraceCheckUtils]: 1: Hoare triple {190#true} assume true; {190#true} is VALID [2018-11-14 17:31:15,824 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {190#true} {190#true} #32#return; {190#true} is VALID [2018-11-14 17:31:15,824 INFO L256 TraceCheckUtils]: 3: Hoare triple {190#true} call #t~ret1 := main(); {190#true} is VALID [2018-11-14 17:31:15,826 INFO L273 TraceCheckUtils]: 4: Hoare triple {190#true} ~x~0 := 1;~y~0 := 0; {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:15,827 INFO L273 TraceCheckUtils]: 5: Hoare triple {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:15,828 INFO L273 TraceCheckUtils]: 6: Hoare triple {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {193#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:15,830 INFO L273 TraceCheckUtils]: 7: Hoare triple {193#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 1))} assume true; {193#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:15,831 INFO L273 TraceCheckUtils]: 8: Hoare triple {193#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 1))} assume !(~y~0 % 4294967296 < 1024); {191#false} is VALID [2018-11-14 17:31:15,832 INFO L256 TraceCheckUtils]: 9: Hoare triple {191#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {191#false} is VALID [2018-11-14 17:31:15,832 INFO L273 TraceCheckUtils]: 10: Hoare triple {191#false} ~cond := #in~cond; {191#false} is VALID [2018-11-14 17:31:15,833 INFO L273 TraceCheckUtils]: 11: Hoare triple {191#false} assume ~cond == 0; {191#false} is VALID [2018-11-14 17:31:15,833 INFO L273 TraceCheckUtils]: 12: Hoare triple {191#false} assume !false; {191#false} is VALID [2018-11-14 17:31:15,836 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:15,836 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:15,836 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:15,847 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:15,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:15,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:15,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:15,986 INFO L256 TraceCheckUtils]: 0: Hoare triple {190#true} call ULTIMATE.init(); {190#true} is VALID [2018-11-14 17:31:15,986 INFO L273 TraceCheckUtils]: 1: Hoare triple {190#true} assume true; {190#true} is VALID [2018-11-14 17:31:15,986 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {190#true} {190#true} #32#return; {190#true} is VALID [2018-11-14 17:31:15,987 INFO L256 TraceCheckUtils]: 3: Hoare triple {190#true} call #t~ret1 := main(); {190#true} is VALID [2018-11-14 17:31:15,987 INFO L273 TraceCheckUtils]: 4: Hoare triple {190#true} ~x~0 := 1;~y~0 := 0; {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:15,989 INFO L273 TraceCheckUtils]: 5: Hoare triple {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:15,990 INFO L273 TraceCheckUtils]: 6: Hoare triple {192#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {215#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:15,992 INFO L273 TraceCheckUtils]: 7: Hoare triple {215#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {215#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:15,993 INFO L273 TraceCheckUtils]: 8: Hoare triple {215#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !(~y~0 % 4294967296 < 1024); {191#false} is VALID [2018-11-14 17:31:15,994 INFO L256 TraceCheckUtils]: 9: Hoare triple {191#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {191#false} is VALID [2018-11-14 17:31:15,994 INFO L273 TraceCheckUtils]: 10: Hoare triple {191#false} ~cond := #in~cond; {191#false} is VALID [2018-11-14 17:31:15,995 INFO L273 TraceCheckUtils]: 11: Hoare triple {191#false} assume ~cond == 0; {191#false} is VALID [2018-11-14 17:31:15,995 INFO L273 TraceCheckUtils]: 12: Hoare triple {191#false} assume !false; {191#false} is VALID [2018-11-14 17:31:15,996 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:16,019 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:16,020 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-11-14 17:31:16,020 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2018-11-14 17:31:16,021 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:16,021 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-14 17:31:16,102 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:16,102 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-14 17:31:16,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-14 17:31:16,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:31:16,104 INFO L87 Difference]: Start difference. First operand 14 states and 14 transitions. Second operand 5 states. [2018-11-14 17:31:16,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:16,574 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2018-11-14 17:31:16,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 17:31:16,574 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2018-11-14 17:31:16,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:16,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:31:16,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 21 transitions. [2018-11-14 17:31:16,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:31:16,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 21 transitions. [2018-11-14 17:31:16,579 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 21 transitions. [2018-11-14 17:31:16,640 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 21 edges. 21 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:16,642 INFO L225 Difference]: With dead ends: 21 [2018-11-14 17:31:16,642 INFO L226 Difference]: Without dead ends: 16 [2018-11-14 17:31:16,643 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:31:16,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-11-14 17:31:16,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-11-14 17:31:16,662 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:16,662 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand 16 states. [2018-11-14 17:31:16,662 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand 16 states. [2018-11-14 17:31:16,663 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 16 states. [2018-11-14 17:31:16,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:16,664 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2018-11-14 17:31:16,665 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-14 17:31:16,665 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:16,666 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:16,666 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand 16 states. [2018-11-14 17:31:16,666 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 16 states. [2018-11-14 17:31:16,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:16,668 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2018-11-14 17:31:16,668 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-14 17:31:16,668 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:16,669 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:16,669 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:16,669 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:16,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-14 17:31:16,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2018-11-14 17:31:16,672 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 13 [2018-11-14 17:31:16,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:16,672 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2018-11-14 17:31:16,672 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-14 17:31:16,672 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2018-11-14 17:31:16,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-14 17:31:16,673 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:16,673 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:16,674 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:16,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:16,674 INFO L82 PathProgramCache]: Analyzing trace with hash -720896604, now seen corresponding path program 2 times [2018-11-14 17:31:16,674 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:16,675 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:16,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:16,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:16,676 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:16,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:16,890 INFO L256 TraceCheckUtils]: 0: Hoare triple {322#true} call ULTIMATE.init(); {322#true} is VALID [2018-11-14 17:31:16,890 INFO L273 TraceCheckUtils]: 1: Hoare triple {322#true} assume true; {322#true} is VALID [2018-11-14 17:31:16,891 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {322#true} {322#true} #32#return; {322#true} is VALID [2018-11-14 17:31:16,891 INFO L256 TraceCheckUtils]: 3: Hoare triple {322#true} call #t~ret1 := main(); {322#true} is VALID [2018-11-14 17:31:16,897 INFO L273 TraceCheckUtils]: 4: Hoare triple {322#true} ~x~0 := 1;~y~0 := 0; {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:16,898 INFO L273 TraceCheckUtils]: 5: Hoare triple {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:16,899 INFO L273 TraceCheckUtils]: 6: Hoare triple {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:16,899 INFO L273 TraceCheckUtils]: 7: Hoare triple {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:16,900 INFO L273 TraceCheckUtils]: 8: Hoare triple {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {326#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 2))} is VALID [2018-11-14 17:31:16,901 INFO L273 TraceCheckUtils]: 9: Hoare triple {326#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 2))} assume true; {326#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 2))} is VALID [2018-11-14 17:31:16,902 INFO L273 TraceCheckUtils]: 10: Hoare triple {326#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 2))} assume !(~y~0 % 4294967296 < 1024); {323#false} is VALID [2018-11-14 17:31:16,903 INFO L256 TraceCheckUtils]: 11: Hoare triple {323#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {323#false} is VALID [2018-11-14 17:31:16,903 INFO L273 TraceCheckUtils]: 12: Hoare triple {323#false} ~cond := #in~cond; {323#false} is VALID [2018-11-14 17:31:16,904 INFO L273 TraceCheckUtils]: 13: Hoare triple {323#false} assume ~cond == 0; {323#false} is VALID [2018-11-14 17:31:16,904 INFO L273 TraceCheckUtils]: 14: Hoare triple {323#false} assume !false; {323#false} is VALID [2018-11-14 17:31:16,906 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:16,906 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:16,907 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:16,916 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-14 17:31:16,927 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:31:16,927 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:16,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:16,946 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:17,065 INFO L256 TraceCheckUtils]: 0: Hoare triple {322#true} call ULTIMATE.init(); {322#true} is VALID [2018-11-14 17:31:17,066 INFO L273 TraceCheckUtils]: 1: Hoare triple {322#true} assume true; {322#true} is VALID [2018-11-14 17:31:17,066 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {322#true} {322#true} #32#return; {322#true} is VALID [2018-11-14 17:31:17,067 INFO L256 TraceCheckUtils]: 3: Hoare triple {322#true} call #t~ret1 := main(); {322#true} is VALID [2018-11-14 17:31:17,068 INFO L273 TraceCheckUtils]: 4: Hoare triple {322#true} ~x~0 := 1;~y~0 := 0; {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:17,069 INFO L273 TraceCheckUtils]: 5: Hoare triple {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:17,070 INFO L273 TraceCheckUtils]: 6: Hoare triple {324#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:17,070 INFO L273 TraceCheckUtils]: 7: Hoare triple {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:17,072 INFO L273 TraceCheckUtils]: 8: Hoare triple {325#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {354#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:17,073 INFO L273 TraceCheckUtils]: 9: Hoare triple {354#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {354#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:17,074 INFO L273 TraceCheckUtils]: 10: Hoare triple {354#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {323#false} is VALID [2018-11-14 17:31:17,074 INFO L256 TraceCheckUtils]: 11: Hoare triple {323#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {323#false} is VALID [2018-11-14 17:31:17,075 INFO L273 TraceCheckUtils]: 12: Hoare triple {323#false} ~cond := #in~cond; {323#false} is VALID [2018-11-14 17:31:17,075 INFO L273 TraceCheckUtils]: 13: Hoare triple {323#false} assume ~cond == 0; {323#false} is VALID [2018-11-14 17:31:17,076 INFO L273 TraceCheckUtils]: 14: Hoare triple {323#false} assume !false; {323#false} is VALID [2018-11-14 17:31:17,077 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:17,100 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:17,100 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-11-14 17:31:17,101 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-11-14 17:31:17,101 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:17,101 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-14 17:31:17,130 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:17,130 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-14 17:31:17,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-14 17:31:17,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-14 17:31:17,131 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand 6 states. [2018-11-14 17:31:17,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:17,271 INFO L93 Difference]: Finished difference Result 23 states and 23 transitions. [2018-11-14 17:31:17,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-14 17:31:17,272 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2018-11-14 17:31:17,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:17,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-14 17:31:17,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 23 transitions. [2018-11-14 17:31:17,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-14 17:31:17,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 23 transitions. [2018-11-14 17:31:17,276 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 23 transitions. [2018-11-14 17:31:17,368 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:17,369 INFO L225 Difference]: With dead ends: 23 [2018-11-14 17:31:17,369 INFO L226 Difference]: Without dead ends: 18 [2018-11-14 17:31:17,370 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-14 17:31:17,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2018-11-14 17:31:17,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-11-14 17:31:17,421 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:17,421 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand 18 states. [2018-11-14 17:31:17,421 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-14 17:31:17,421 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-14 17:31:17,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:17,423 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2018-11-14 17:31:17,423 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-11-14 17:31:17,423 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:17,424 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:17,424 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand 18 states. [2018-11-14 17:31:17,424 INFO L87 Difference]: Start difference. First operand 18 states. Second operand 18 states. [2018-11-14 17:31:17,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:17,426 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2018-11-14 17:31:17,426 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-11-14 17:31:17,427 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:17,427 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:17,427 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:17,427 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:17,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 17:31:17,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 18 transitions. [2018-11-14 17:31:17,429 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 18 transitions. Word has length 15 [2018-11-14 17:31:17,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:17,429 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 18 transitions. [2018-11-14 17:31:17,429 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-14 17:31:17,429 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 18 transitions. [2018-11-14 17:31:17,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-14 17:31:17,430 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:17,430 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:17,431 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:17,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:17,431 INFO L82 PathProgramCache]: Analyzing trace with hash -296916246, now seen corresponding path program 3 times [2018-11-14 17:31:17,431 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:17,431 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:17,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:17,432 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:17,433 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:17,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:17,635 INFO L256 TraceCheckUtils]: 0: Hoare triple {471#true} call ULTIMATE.init(); {471#true} is VALID [2018-11-14 17:31:17,636 INFO L273 TraceCheckUtils]: 1: Hoare triple {471#true} assume true; {471#true} is VALID [2018-11-14 17:31:17,636 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {471#true} {471#true} #32#return; {471#true} is VALID [2018-11-14 17:31:17,636 INFO L256 TraceCheckUtils]: 3: Hoare triple {471#true} call #t~ret1 := main(); {471#true} is VALID [2018-11-14 17:31:17,637 INFO L273 TraceCheckUtils]: 4: Hoare triple {471#true} ~x~0 := 1;~y~0 := 0; {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:17,638 INFO L273 TraceCheckUtils]: 5: Hoare triple {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:17,639 INFO L273 TraceCheckUtils]: 6: Hoare triple {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:17,639 INFO L273 TraceCheckUtils]: 7: Hoare triple {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:17,640 INFO L273 TraceCheckUtils]: 8: Hoare triple {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:17,641 INFO L273 TraceCheckUtils]: 9: Hoare triple {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:17,653 INFO L273 TraceCheckUtils]: 10: Hoare triple {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {476#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 3))} is VALID [2018-11-14 17:31:17,654 INFO L273 TraceCheckUtils]: 11: Hoare triple {476#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 3))} assume true; {476#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 3))} is VALID [2018-11-14 17:31:17,655 INFO L273 TraceCheckUtils]: 12: Hoare triple {476#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 3))} assume !(~y~0 % 4294967296 < 1024); {472#false} is VALID [2018-11-14 17:31:17,655 INFO L256 TraceCheckUtils]: 13: Hoare triple {472#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {472#false} is VALID [2018-11-14 17:31:17,655 INFO L273 TraceCheckUtils]: 14: Hoare triple {472#false} ~cond := #in~cond; {472#false} is VALID [2018-11-14 17:31:17,655 INFO L273 TraceCheckUtils]: 15: Hoare triple {472#false} assume ~cond == 0; {472#false} is VALID [2018-11-14 17:31:17,656 INFO L273 TraceCheckUtils]: 16: Hoare triple {472#false} assume !false; {472#false} is VALID [2018-11-14 17:31:17,657 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:17,657 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:17,657 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:17,666 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-14 17:31:17,678 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-14 17:31:17,678 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:17,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:17,686 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:17,808 INFO L256 TraceCheckUtils]: 0: Hoare triple {471#true} call ULTIMATE.init(); {471#true} is VALID [2018-11-14 17:31:17,809 INFO L273 TraceCheckUtils]: 1: Hoare triple {471#true} assume true; {471#true} is VALID [2018-11-14 17:31:17,809 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {471#true} {471#true} #32#return; {471#true} is VALID [2018-11-14 17:31:17,809 INFO L256 TraceCheckUtils]: 3: Hoare triple {471#true} call #t~ret1 := main(); {471#true} is VALID [2018-11-14 17:31:17,810 INFO L273 TraceCheckUtils]: 4: Hoare triple {471#true} ~x~0 := 1;~y~0 := 0; {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:17,810 INFO L273 TraceCheckUtils]: 5: Hoare triple {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:17,811 INFO L273 TraceCheckUtils]: 6: Hoare triple {473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:17,812 INFO L273 TraceCheckUtils]: 7: Hoare triple {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:17,812 INFO L273 TraceCheckUtils]: 8: Hoare triple {474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:17,813 INFO L273 TraceCheckUtils]: 9: Hoare triple {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:17,815 INFO L273 TraceCheckUtils]: 10: Hoare triple {475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:17,821 INFO L273 TraceCheckUtils]: 11: Hoare triple {510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:17,822 INFO L273 TraceCheckUtils]: 12: Hoare triple {510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {472#false} is VALID [2018-11-14 17:31:17,823 INFO L256 TraceCheckUtils]: 13: Hoare triple {472#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {472#false} is VALID [2018-11-14 17:31:17,823 INFO L273 TraceCheckUtils]: 14: Hoare triple {472#false} ~cond := #in~cond; {472#false} is VALID [2018-11-14 17:31:17,823 INFO L273 TraceCheckUtils]: 15: Hoare triple {472#false} assume ~cond == 0; {472#false} is VALID [2018-11-14 17:31:17,823 INFO L273 TraceCheckUtils]: 16: Hoare triple {472#false} assume !false; {472#false} is VALID [2018-11-14 17:31:17,825 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:17,844 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:17,845 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-11-14 17:31:17,845 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-11-14 17:31:17,845 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:17,846 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-14 17:31:17,868 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:17,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-14 17:31:17,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-14 17:31:17,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-14 17:31:17,869 INFO L87 Difference]: Start difference. First operand 18 states and 18 transitions. Second operand 7 states. [2018-11-14 17:31:18,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:18,051 INFO L93 Difference]: Finished difference Result 25 states and 25 transitions. [2018-11-14 17:31:18,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-14 17:31:18,052 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-11-14 17:31:18,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:18,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 17:31:18,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2018-11-14 17:31:18,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-14 17:31:18,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2018-11-14 17:31:18,055 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 25 transitions. [2018-11-14 17:31:18,113 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:18,114 INFO L225 Difference]: With dead ends: 25 [2018-11-14 17:31:18,114 INFO L226 Difference]: Without dead ends: 20 [2018-11-14 17:31:18,115 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-14 17:31:18,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-11-14 17:31:18,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-11-14 17:31:18,158 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:18,158 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand 20 states. [2018-11-14 17:31:18,158 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand 20 states. [2018-11-14 17:31:18,158 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 20 states. [2018-11-14 17:31:18,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:18,160 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-14 17:31:18,161 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-14 17:31:18,161 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:18,161 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:18,161 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand 20 states. [2018-11-14 17:31:18,162 INFO L87 Difference]: Start difference. First operand 20 states. Second operand 20 states. [2018-11-14 17:31:18,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:18,163 INFO L93 Difference]: Finished difference Result 20 states and 20 transitions. [2018-11-14 17:31:18,164 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-14 17:31:18,164 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:18,164 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:18,164 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:18,165 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:18,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 17:31:18,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-11-14 17:31:18,166 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 17 [2018-11-14 17:31:18,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:18,166 INFO L480 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-11-14 17:31:18,167 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-14 17:31:18,167 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-11-14 17:31:18,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-14 17:31:18,167 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:18,168 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:18,168 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:18,168 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:18,168 INFO L82 PathProgramCache]: Analyzing trace with hash -873685328, now seen corresponding path program 4 times [2018-11-14 17:31:18,169 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:18,169 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:18,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:18,170 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:18,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:18,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:18,685 INFO L256 TraceCheckUtils]: 0: Hoare triple {637#true} call ULTIMATE.init(); {637#true} is VALID [2018-11-14 17:31:18,685 INFO L273 TraceCheckUtils]: 1: Hoare triple {637#true} assume true; {637#true} is VALID [2018-11-14 17:31:18,686 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {637#true} {637#true} #32#return; {637#true} is VALID [2018-11-14 17:31:18,686 INFO L256 TraceCheckUtils]: 3: Hoare triple {637#true} call #t~ret1 := main(); {637#true} is VALID [2018-11-14 17:31:18,687 INFO L273 TraceCheckUtils]: 4: Hoare triple {637#true} ~x~0 := 1;~y~0 := 0; {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:18,687 INFO L273 TraceCheckUtils]: 5: Hoare triple {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:18,688 INFO L273 TraceCheckUtils]: 6: Hoare triple {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:18,699 INFO L273 TraceCheckUtils]: 7: Hoare triple {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:18,700 INFO L273 TraceCheckUtils]: 8: Hoare triple {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:18,700 INFO L273 TraceCheckUtils]: 9: Hoare triple {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:18,715 INFO L273 TraceCheckUtils]: 10: Hoare triple {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:18,716 INFO L273 TraceCheckUtils]: 11: Hoare triple {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:18,717 INFO L273 TraceCheckUtils]: 12: Hoare triple {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {643#(and (<= main_~y~0 4) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:18,718 INFO L273 TraceCheckUtils]: 13: Hoare triple {643#(and (<= main_~y~0 4) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume true; {643#(and (<= main_~y~0 4) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:18,720 INFO L273 TraceCheckUtils]: 14: Hoare triple {643#(and (<= main_~y~0 4) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {638#false} is VALID [2018-11-14 17:31:18,720 INFO L256 TraceCheckUtils]: 15: Hoare triple {638#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {638#false} is VALID [2018-11-14 17:31:18,720 INFO L273 TraceCheckUtils]: 16: Hoare triple {638#false} ~cond := #in~cond; {638#false} is VALID [2018-11-14 17:31:18,721 INFO L273 TraceCheckUtils]: 17: Hoare triple {638#false} assume ~cond == 0; {638#false} is VALID [2018-11-14 17:31:18,721 INFO L273 TraceCheckUtils]: 18: Hoare triple {638#false} assume !false; {638#false} is VALID [2018-11-14 17:31:18,723 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:18,723 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:18,723 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:18,739 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 17:31:18,754 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 17:31:18,754 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:18,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:18,777 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:18,955 INFO L256 TraceCheckUtils]: 0: Hoare triple {637#true} call ULTIMATE.init(); {637#true} is VALID [2018-11-14 17:31:18,955 INFO L273 TraceCheckUtils]: 1: Hoare triple {637#true} assume true; {637#true} is VALID [2018-11-14 17:31:18,956 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {637#true} {637#true} #32#return; {637#true} is VALID [2018-11-14 17:31:18,956 INFO L256 TraceCheckUtils]: 3: Hoare triple {637#true} call #t~ret1 := main(); {637#true} is VALID [2018-11-14 17:31:18,957 INFO L273 TraceCheckUtils]: 4: Hoare triple {637#true} ~x~0 := 1;~y~0 := 0; {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:18,960 INFO L273 TraceCheckUtils]: 5: Hoare triple {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:18,961 INFO L273 TraceCheckUtils]: 6: Hoare triple {639#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:18,962 INFO L273 TraceCheckUtils]: 7: Hoare triple {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:18,962 INFO L273 TraceCheckUtils]: 8: Hoare triple {640#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:18,963 INFO L273 TraceCheckUtils]: 9: Hoare triple {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:18,964 INFO L273 TraceCheckUtils]: 10: Hoare triple {641#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:18,965 INFO L273 TraceCheckUtils]: 11: Hoare triple {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:18,966 INFO L273 TraceCheckUtils]: 12: Hoare triple {642#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:18,967 INFO L273 TraceCheckUtils]: 13: Hoare triple {683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:18,968 INFO L273 TraceCheckUtils]: 14: Hoare triple {683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {638#false} is VALID [2018-11-14 17:31:18,968 INFO L256 TraceCheckUtils]: 15: Hoare triple {638#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {638#false} is VALID [2018-11-14 17:31:18,968 INFO L273 TraceCheckUtils]: 16: Hoare triple {638#false} ~cond := #in~cond; {638#false} is VALID [2018-11-14 17:31:18,969 INFO L273 TraceCheckUtils]: 17: Hoare triple {638#false} assume ~cond == 0; {638#false} is VALID [2018-11-14 17:31:18,969 INFO L273 TraceCheckUtils]: 18: Hoare triple {638#false} assume !false; {638#false} is VALID [2018-11-14 17:31:18,971 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:18,994 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:18,994 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-11-14 17:31:18,995 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 19 [2018-11-14 17:31:18,995 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:18,995 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-14 17:31:19,031 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:19,031 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-14 17:31:19,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-14 17:31:19,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-14 17:31:19,032 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 8 states. [2018-11-14 17:31:19,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:19,249 INFO L93 Difference]: Finished difference Result 27 states and 27 transitions. [2018-11-14 17:31:19,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-14 17:31:19,250 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 19 [2018-11-14 17:31:19,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:19,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-14 17:31:19,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2018-11-14 17:31:19,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-14 17:31:19,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2018-11-14 17:31:19,254 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 27 transitions. [2018-11-14 17:31:19,405 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:19,407 INFO L225 Difference]: With dead ends: 27 [2018-11-14 17:31:19,407 INFO L226 Difference]: Without dead ends: 22 [2018-11-14 17:31:19,408 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 18 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-14 17:31:19,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-11-14 17:31:19,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-11-14 17:31:19,439 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:19,439 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand 22 states. [2018-11-14 17:31:19,440 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-14 17:31:19,440 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-14 17:31:19,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:19,442 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-11-14 17:31:19,442 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-11-14 17:31:19,442 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:19,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:19,443 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand 22 states. [2018-11-14 17:31:19,443 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 22 states. [2018-11-14 17:31:19,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:19,444 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2018-11-14 17:31:19,444 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-11-14 17:31:19,445 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:19,445 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:19,445 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:19,445 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:19,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 17:31:19,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-11-14 17:31:19,447 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 19 [2018-11-14 17:31:19,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:19,447 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-11-14 17:31:19,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-14 17:31:19,447 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-11-14 17:31:19,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-14 17:31:19,448 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:19,448 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:19,449 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:19,449 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:19,449 INFO L82 PathProgramCache]: Analyzing trace with hash -1097991946, now seen corresponding path program 5 times [2018-11-14 17:31:19,449 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:19,449 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:19,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:19,451 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:19,451 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:19,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:19,765 INFO L256 TraceCheckUtils]: 0: Hoare triple {820#true} call ULTIMATE.init(); {820#true} is VALID [2018-11-14 17:31:19,766 INFO L273 TraceCheckUtils]: 1: Hoare triple {820#true} assume true; {820#true} is VALID [2018-11-14 17:31:19,766 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {820#true} {820#true} #32#return; {820#true} is VALID [2018-11-14 17:31:19,766 INFO L256 TraceCheckUtils]: 3: Hoare triple {820#true} call #t~ret1 := main(); {820#true} is VALID [2018-11-14 17:31:19,767 INFO L273 TraceCheckUtils]: 4: Hoare triple {820#true} ~x~0 := 1;~y~0 := 0; {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:19,767 INFO L273 TraceCheckUtils]: 5: Hoare triple {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:19,768 INFO L273 TraceCheckUtils]: 6: Hoare triple {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:19,769 INFO L273 TraceCheckUtils]: 7: Hoare triple {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:19,770 INFO L273 TraceCheckUtils]: 8: Hoare triple {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:19,771 INFO L273 TraceCheckUtils]: 9: Hoare triple {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:19,772 INFO L273 TraceCheckUtils]: 10: Hoare triple {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:19,773 INFO L273 TraceCheckUtils]: 11: Hoare triple {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:19,774 INFO L273 TraceCheckUtils]: 12: Hoare triple {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:19,775 INFO L273 TraceCheckUtils]: 13: Hoare triple {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:19,777 INFO L273 TraceCheckUtils]: 14: Hoare triple {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {827#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:19,778 INFO L273 TraceCheckUtils]: 15: Hoare triple {827#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 5))} assume true; {827#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:19,779 INFO L273 TraceCheckUtils]: 16: Hoare triple {827#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 5))} assume !(~y~0 % 4294967296 < 1024); {821#false} is VALID [2018-11-14 17:31:19,779 INFO L256 TraceCheckUtils]: 17: Hoare triple {821#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {821#false} is VALID [2018-11-14 17:31:19,780 INFO L273 TraceCheckUtils]: 18: Hoare triple {821#false} ~cond := #in~cond; {821#false} is VALID [2018-11-14 17:31:19,780 INFO L273 TraceCheckUtils]: 19: Hoare triple {821#false} assume ~cond == 0; {821#false} is VALID [2018-11-14 17:31:19,780 INFO L273 TraceCheckUtils]: 20: Hoare triple {821#false} assume !false; {821#false} is VALID [2018-11-14 17:31:19,782 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:19,782 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:19,782 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:19,791 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-14 17:31:19,814 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-11-14 17:31:19,815 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:19,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:19,828 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:19,929 INFO L256 TraceCheckUtils]: 0: Hoare triple {820#true} call ULTIMATE.init(); {820#true} is VALID [2018-11-14 17:31:19,929 INFO L273 TraceCheckUtils]: 1: Hoare triple {820#true} assume true; {820#true} is VALID [2018-11-14 17:31:19,930 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {820#true} {820#true} #32#return; {820#true} is VALID [2018-11-14 17:31:19,930 INFO L256 TraceCheckUtils]: 3: Hoare triple {820#true} call #t~ret1 := main(); {820#true} is VALID [2018-11-14 17:31:19,932 INFO L273 TraceCheckUtils]: 4: Hoare triple {820#true} ~x~0 := 1;~y~0 := 0; {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:19,933 INFO L273 TraceCheckUtils]: 5: Hoare triple {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:19,934 INFO L273 TraceCheckUtils]: 6: Hoare triple {822#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:19,935 INFO L273 TraceCheckUtils]: 7: Hoare triple {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:19,936 INFO L273 TraceCheckUtils]: 8: Hoare triple {823#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:19,937 INFO L273 TraceCheckUtils]: 9: Hoare triple {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:19,938 INFO L273 TraceCheckUtils]: 10: Hoare triple {824#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:19,939 INFO L273 TraceCheckUtils]: 11: Hoare triple {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:19,940 INFO L273 TraceCheckUtils]: 12: Hoare triple {825#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:19,942 INFO L273 TraceCheckUtils]: 13: Hoare triple {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:19,943 INFO L273 TraceCheckUtils]: 14: Hoare triple {826#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {873#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:19,944 INFO L273 TraceCheckUtils]: 15: Hoare triple {873#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {873#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:19,945 INFO L273 TraceCheckUtils]: 16: Hoare triple {873#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !(~y~0 % 4294967296 < 1024); {821#false} is VALID [2018-11-14 17:31:19,945 INFO L256 TraceCheckUtils]: 17: Hoare triple {821#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {821#false} is VALID [2018-11-14 17:31:19,946 INFO L273 TraceCheckUtils]: 18: Hoare triple {821#false} ~cond := #in~cond; {821#false} is VALID [2018-11-14 17:31:19,946 INFO L273 TraceCheckUtils]: 19: Hoare triple {821#false} assume ~cond == 0; {821#false} is VALID [2018-11-14 17:31:19,946 INFO L273 TraceCheckUtils]: 20: Hoare triple {821#false} assume !false; {821#false} is VALID [2018-11-14 17:31:19,948 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:19,969 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:19,970 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-14 17:31:19,970 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-11-14 17:31:19,970 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:19,970 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states. [2018-11-14 17:31:20,002 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:20,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-14 17:31:20,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-14 17:31:20,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-14 17:31:20,003 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-11-14 17:31:20,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:20,290 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-11-14 17:31:20,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-14 17:31:20,290 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-11-14 17:31:20,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:20,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-14 17:31:20,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 29 transitions. [2018-11-14 17:31:20,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2018-11-14 17:31:20,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 29 transitions. [2018-11-14 17:31:20,294 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 29 transitions. [2018-11-14 17:31:20,330 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:20,331 INFO L225 Difference]: With dead ends: 29 [2018-11-14 17:31:20,331 INFO L226 Difference]: Without dead ends: 24 [2018-11-14 17:31:20,332 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-11-14 17:31:20,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-11-14 17:31:20,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-11-14 17:31:20,350 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:20,350 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand 24 states. [2018-11-14 17:31:20,350 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-14 17:31:20,350 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-14 17:31:20,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:20,352 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-11-14 17:31:20,352 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-14 17:31:20,352 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:20,352 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:20,353 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-14 17:31:20,353 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-14 17:31:20,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:20,355 INFO L93 Difference]: Finished difference Result 24 states and 24 transitions. [2018-11-14 17:31:20,355 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-14 17:31:20,355 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:20,355 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:20,356 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:20,356 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:20,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-14 17:31:20,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-11-14 17:31:20,358 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 21 [2018-11-14 17:31:20,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:20,358 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-11-14 17:31:20,358 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-14 17:31:20,358 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-11-14 17:31:20,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-14 17:31:20,359 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:20,359 INFO L375 BasicCegarLoop]: trace histogram [7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:20,360 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:20,360 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:20,360 INFO L82 PathProgramCache]: Analyzing trace with hash -1908287044, now seen corresponding path program 6 times [2018-11-14 17:31:20,360 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:20,360 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:20,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:20,361 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:20,361 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:20,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:20,865 INFO L256 TraceCheckUtils]: 0: Hoare triple {1020#true} call ULTIMATE.init(); {1020#true} is VALID [2018-11-14 17:31:20,865 INFO L273 TraceCheckUtils]: 1: Hoare triple {1020#true} assume true; {1020#true} is VALID [2018-11-14 17:31:20,866 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1020#true} {1020#true} #32#return; {1020#true} is VALID [2018-11-14 17:31:20,866 INFO L256 TraceCheckUtils]: 3: Hoare triple {1020#true} call #t~ret1 := main(); {1020#true} is VALID [2018-11-14 17:31:20,867 INFO L273 TraceCheckUtils]: 4: Hoare triple {1020#true} ~x~0 := 1;~y~0 := 0; {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:20,868 INFO L273 TraceCheckUtils]: 5: Hoare triple {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:20,869 INFO L273 TraceCheckUtils]: 6: Hoare triple {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:20,870 INFO L273 TraceCheckUtils]: 7: Hoare triple {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:20,870 INFO L273 TraceCheckUtils]: 8: Hoare triple {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:20,871 INFO L273 TraceCheckUtils]: 9: Hoare triple {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:20,873 INFO L273 TraceCheckUtils]: 10: Hoare triple {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:20,874 INFO L273 TraceCheckUtils]: 11: Hoare triple {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:20,882 INFO L273 TraceCheckUtils]: 12: Hoare triple {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:20,883 INFO L273 TraceCheckUtils]: 13: Hoare triple {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:20,883 INFO L273 TraceCheckUtils]: 14: Hoare triple {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:20,884 INFO L273 TraceCheckUtils]: 15: Hoare triple {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:20,885 INFO L273 TraceCheckUtils]: 16: Hoare triple {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1028#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 6))} is VALID [2018-11-14 17:31:20,885 INFO L273 TraceCheckUtils]: 17: Hoare triple {1028#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 6))} assume true; {1028#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 6))} is VALID [2018-11-14 17:31:20,886 INFO L273 TraceCheckUtils]: 18: Hoare triple {1028#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 6))} assume !(~y~0 % 4294967296 < 1024); {1021#false} is VALID [2018-11-14 17:31:20,887 INFO L256 TraceCheckUtils]: 19: Hoare triple {1021#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1021#false} is VALID [2018-11-14 17:31:20,887 INFO L273 TraceCheckUtils]: 20: Hoare triple {1021#false} ~cond := #in~cond; {1021#false} is VALID [2018-11-14 17:31:20,887 INFO L273 TraceCheckUtils]: 21: Hoare triple {1021#false} assume ~cond == 0; {1021#false} is VALID [2018-11-14 17:31:20,887 INFO L273 TraceCheckUtils]: 22: Hoare triple {1021#false} assume !false; {1021#false} is VALID [2018-11-14 17:31:20,890 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:20,890 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:20,890 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:20,900 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-14 17:31:20,917 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-11-14 17:31:20,918 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:20,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:20,927 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:21,040 INFO L256 TraceCheckUtils]: 0: Hoare triple {1020#true} call ULTIMATE.init(); {1020#true} is VALID [2018-11-14 17:31:21,040 INFO L273 TraceCheckUtils]: 1: Hoare triple {1020#true} assume true; {1020#true} is VALID [2018-11-14 17:31:21,041 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1020#true} {1020#true} #32#return; {1020#true} is VALID [2018-11-14 17:31:21,041 INFO L256 TraceCheckUtils]: 3: Hoare triple {1020#true} call #t~ret1 := main(); {1020#true} is VALID [2018-11-14 17:31:21,042 INFO L273 TraceCheckUtils]: 4: Hoare triple {1020#true} ~x~0 := 1;~y~0 := 0; {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:21,043 INFO L273 TraceCheckUtils]: 5: Hoare triple {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:21,044 INFO L273 TraceCheckUtils]: 6: Hoare triple {1022#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:21,047 INFO L273 TraceCheckUtils]: 7: Hoare triple {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:21,048 INFO L273 TraceCheckUtils]: 8: Hoare triple {1023#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:21,049 INFO L273 TraceCheckUtils]: 9: Hoare triple {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:21,050 INFO L273 TraceCheckUtils]: 10: Hoare triple {1024#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:21,050 INFO L273 TraceCheckUtils]: 11: Hoare triple {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:21,051 INFO L273 TraceCheckUtils]: 12: Hoare triple {1025#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:21,052 INFO L273 TraceCheckUtils]: 13: Hoare triple {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:21,053 INFO L273 TraceCheckUtils]: 14: Hoare triple {1026#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:21,054 INFO L273 TraceCheckUtils]: 15: Hoare triple {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:21,054 INFO L273 TraceCheckUtils]: 16: Hoare triple {1027#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1080#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:21,055 INFO L273 TraceCheckUtils]: 17: Hoare triple {1080#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1080#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:21,056 INFO L273 TraceCheckUtils]: 18: Hoare triple {1080#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1021#false} is VALID [2018-11-14 17:31:21,056 INFO L256 TraceCheckUtils]: 19: Hoare triple {1021#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1021#false} is VALID [2018-11-14 17:31:21,057 INFO L273 TraceCheckUtils]: 20: Hoare triple {1021#false} ~cond := #in~cond; {1021#false} is VALID [2018-11-14 17:31:21,057 INFO L273 TraceCheckUtils]: 21: Hoare triple {1021#false} assume ~cond == 0; {1021#false} is VALID [2018-11-14 17:31:21,057 INFO L273 TraceCheckUtils]: 22: Hoare triple {1021#false} assume !false; {1021#false} is VALID [2018-11-14 17:31:21,059 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:21,079 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:21,079 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-11-14 17:31:21,079 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-11-14 17:31:21,080 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:21,080 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-14 17:31:21,106 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:21,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-14 17:31:21,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-14 17:31:21,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-14 17:31:21,107 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 10 states. [2018-11-14 17:31:21,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:21,381 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-11-14 17:31:21,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-14 17:31:21,381 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-11-14 17:31:21,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:21,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-14 17:31:21,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2018-11-14 17:31:21,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-14 17:31:21,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2018-11-14 17:31:21,386 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 31 transitions. [2018-11-14 17:31:21,432 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:21,434 INFO L225 Difference]: With dead ends: 31 [2018-11-14 17:31:21,434 INFO L226 Difference]: Without dead ends: 26 [2018-11-14 17:31:21,435 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-11-14 17:31:21,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-11-14 17:31:21,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-11-14 17:31:21,476 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:21,476 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand 26 states. [2018-11-14 17:31:21,476 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand 26 states. [2018-11-14 17:31:21,476 INFO L87 Difference]: Start difference. First operand 26 states. Second operand 26 states. [2018-11-14 17:31:21,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:21,478 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-11-14 17:31:21,478 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-14 17:31:21,479 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:21,479 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:21,479 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand 26 states. [2018-11-14 17:31:21,480 INFO L87 Difference]: Start difference. First operand 26 states. Second operand 26 states. [2018-11-14 17:31:21,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:21,481 INFO L93 Difference]: Finished difference Result 26 states and 26 transitions. [2018-11-14 17:31:21,481 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-14 17:31:21,482 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:21,482 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:21,482 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:21,482 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:21,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-14 17:31:21,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-11-14 17:31:21,484 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 23 [2018-11-14 17:31:21,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:21,484 INFO L480 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-11-14 17:31:21,484 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-14 17:31:21,485 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-11-14 17:31:21,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-14 17:31:21,485 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:21,486 INFO L375 BasicCegarLoop]: trace histogram [8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:21,486 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:21,486 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:21,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1082171650, now seen corresponding path program 7 times [2018-11-14 17:31:21,486 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:21,487 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:21,487 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:21,488 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:21,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:21,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:21,738 INFO L256 TraceCheckUtils]: 0: Hoare triple {1237#true} call ULTIMATE.init(); {1237#true} is VALID [2018-11-14 17:31:21,738 INFO L273 TraceCheckUtils]: 1: Hoare triple {1237#true} assume true; {1237#true} is VALID [2018-11-14 17:31:21,738 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1237#true} {1237#true} #32#return; {1237#true} is VALID [2018-11-14 17:31:21,739 INFO L256 TraceCheckUtils]: 3: Hoare triple {1237#true} call #t~ret1 := main(); {1237#true} is VALID [2018-11-14 17:31:21,739 INFO L273 TraceCheckUtils]: 4: Hoare triple {1237#true} ~x~0 := 1;~y~0 := 0; {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:21,740 INFO L273 TraceCheckUtils]: 5: Hoare triple {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:21,741 INFO L273 TraceCheckUtils]: 6: Hoare triple {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:21,742 INFO L273 TraceCheckUtils]: 7: Hoare triple {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:21,761 INFO L273 TraceCheckUtils]: 8: Hoare triple {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:21,779 INFO L273 TraceCheckUtils]: 9: Hoare triple {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:21,794 INFO L273 TraceCheckUtils]: 10: Hoare triple {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:21,800 INFO L273 TraceCheckUtils]: 11: Hoare triple {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:21,802 INFO L273 TraceCheckUtils]: 12: Hoare triple {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:21,806 INFO L273 TraceCheckUtils]: 13: Hoare triple {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:21,808 INFO L273 TraceCheckUtils]: 14: Hoare triple {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:21,808 INFO L273 TraceCheckUtils]: 15: Hoare triple {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:21,810 INFO L273 TraceCheckUtils]: 16: Hoare triple {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:21,813 INFO L273 TraceCheckUtils]: 17: Hoare triple {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:21,817 INFO L273 TraceCheckUtils]: 18: Hoare triple {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1246#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 7))} is VALID [2018-11-14 17:31:21,819 INFO L273 TraceCheckUtils]: 19: Hoare triple {1246#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 7))} assume true; {1246#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 7))} is VALID [2018-11-14 17:31:21,819 INFO L273 TraceCheckUtils]: 20: Hoare triple {1246#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 7))} assume !(~y~0 % 4294967296 < 1024); {1238#false} is VALID [2018-11-14 17:31:21,820 INFO L256 TraceCheckUtils]: 21: Hoare triple {1238#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1238#false} is VALID [2018-11-14 17:31:21,820 INFO L273 TraceCheckUtils]: 22: Hoare triple {1238#false} ~cond := #in~cond; {1238#false} is VALID [2018-11-14 17:31:21,820 INFO L273 TraceCheckUtils]: 23: Hoare triple {1238#false} assume ~cond == 0; {1238#false} is VALID [2018-11-14 17:31:21,820 INFO L273 TraceCheckUtils]: 24: Hoare triple {1238#false} assume !false; {1238#false} is VALID [2018-11-14 17:31:21,822 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:21,822 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:21,823 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:21,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:21,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:21,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:21,865 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:22,039 INFO L256 TraceCheckUtils]: 0: Hoare triple {1237#true} call ULTIMATE.init(); {1237#true} is VALID [2018-11-14 17:31:22,039 INFO L273 TraceCheckUtils]: 1: Hoare triple {1237#true} assume true; {1237#true} is VALID [2018-11-14 17:31:22,040 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1237#true} {1237#true} #32#return; {1237#true} is VALID [2018-11-14 17:31:22,040 INFO L256 TraceCheckUtils]: 3: Hoare triple {1237#true} call #t~ret1 := main(); {1237#true} is VALID [2018-11-14 17:31:22,043 INFO L273 TraceCheckUtils]: 4: Hoare triple {1237#true} ~x~0 := 1;~y~0 := 0; {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:22,043 INFO L273 TraceCheckUtils]: 5: Hoare triple {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:22,044 INFO L273 TraceCheckUtils]: 6: Hoare triple {1239#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:22,045 INFO L273 TraceCheckUtils]: 7: Hoare triple {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:22,046 INFO L273 TraceCheckUtils]: 8: Hoare triple {1240#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:22,046 INFO L273 TraceCheckUtils]: 9: Hoare triple {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:22,047 INFO L273 TraceCheckUtils]: 10: Hoare triple {1241#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:22,048 INFO L273 TraceCheckUtils]: 11: Hoare triple {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:22,048 INFO L273 TraceCheckUtils]: 12: Hoare triple {1242#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:22,049 INFO L273 TraceCheckUtils]: 13: Hoare triple {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:22,050 INFO L273 TraceCheckUtils]: 14: Hoare triple {1243#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:22,051 INFO L273 TraceCheckUtils]: 15: Hoare triple {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:22,052 INFO L273 TraceCheckUtils]: 16: Hoare triple {1244#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:22,053 INFO L273 TraceCheckUtils]: 17: Hoare triple {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:22,054 INFO L273 TraceCheckUtils]: 18: Hoare triple {1245#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1304#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:22,055 INFO L273 TraceCheckUtils]: 19: Hoare triple {1304#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1304#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:22,056 INFO L273 TraceCheckUtils]: 20: Hoare triple {1304#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1238#false} is VALID [2018-11-14 17:31:22,056 INFO L256 TraceCheckUtils]: 21: Hoare triple {1238#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1238#false} is VALID [2018-11-14 17:31:22,056 INFO L273 TraceCheckUtils]: 22: Hoare triple {1238#false} ~cond := #in~cond; {1238#false} is VALID [2018-11-14 17:31:22,057 INFO L273 TraceCheckUtils]: 23: Hoare triple {1238#false} assume ~cond == 0; {1238#false} is VALID [2018-11-14 17:31:22,057 INFO L273 TraceCheckUtils]: 24: Hoare triple {1238#false} assume !false; {1238#false} is VALID [2018-11-14 17:31:22,059 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:22,079 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:22,080 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-11-14 17:31:22,080 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 25 [2018-11-14 17:31:22,081 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:22,081 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states. [2018-11-14 17:31:22,115 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:22,115 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-14 17:31:22,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-14 17:31:22,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-14 17:31:22,116 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 11 states. [2018-11-14 17:31:22,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:22,674 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-11-14 17:31:22,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-14 17:31:22,675 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 25 [2018-11-14 17:31:22,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:22,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-14 17:31:22,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 33 transitions. [2018-11-14 17:31:22,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2018-11-14 17:31:22,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 33 transitions. [2018-11-14 17:31:22,679 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 33 transitions. [2018-11-14 17:31:22,719 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:22,720 INFO L225 Difference]: With dead ends: 33 [2018-11-14 17:31:22,720 INFO L226 Difference]: Without dead ends: 28 [2018-11-14 17:31:22,721 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 24 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2018-11-14 17:31:22,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-11-14 17:31:22,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-11-14 17:31:22,737 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:22,738 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand 28 states. [2018-11-14 17:31:22,738 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 17:31:22,738 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 17:31:22,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:22,740 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-11-14 17:31:22,740 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-11-14 17:31:22,740 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:22,740 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:22,741 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 17:31:22,741 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 17:31:22,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:22,742 INFO L93 Difference]: Finished difference Result 28 states and 28 transitions. [2018-11-14 17:31:22,743 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-11-14 17:31:22,743 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:22,743 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:22,743 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:22,743 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:22,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-14 17:31:22,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-11-14 17:31:22,745 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 25 [2018-11-14 17:31:22,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:22,745 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-11-14 17:31:22,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-14 17:31:22,745 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-11-14 17:31:22,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-14 17:31:22,746 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:22,746 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:22,746 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:22,747 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:22,747 INFO L82 PathProgramCache]: Analyzing trace with hash 1579855560, now seen corresponding path program 8 times [2018-11-14 17:31:22,747 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:22,747 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:22,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:22,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:22,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:22,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:23,880 INFO L256 TraceCheckUtils]: 0: Hoare triple {1471#true} call ULTIMATE.init(); {1471#true} is VALID [2018-11-14 17:31:23,880 INFO L273 TraceCheckUtils]: 1: Hoare triple {1471#true} assume true; {1471#true} is VALID [2018-11-14 17:31:23,881 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1471#true} {1471#true} #32#return; {1471#true} is VALID [2018-11-14 17:31:23,881 INFO L256 TraceCheckUtils]: 3: Hoare triple {1471#true} call #t~ret1 := main(); {1471#true} is VALID [2018-11-14 17:31:23,890 INFO L273 TraceCheckUtils]: 4: Hoare triple {1471#true} ~x~0 := 1;~y~0 := 0; {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:23,904 INFO L273 TraceCheckUtils]: 5: Hoare triple {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:23,913 INFO L273 TraceCheckUtils]: 6: Hoare triple {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:23,926 INFO L273 TraceCheckUtils]: 7: Hoare triple {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:23,935 INFO L273 TraceCheckUtils]: 8: Hoare triple {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:23,947 INFO L273 TraceCheckUtils]: 9: Hoare triple {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:23,948 INFO L273 TraceCheckUtils]: 10: Hoare triple {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:23,949 INFO L273 TraceCheckUtils]: 11: Hoare triple {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:23,952 INFO L273 TraceCheckUtils]: 12: Hoare triple {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:23,953 INFO L273 TraceCheckUtils]: 13: Hoare triple {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:23,953 INFO L273 TraceCheckUtils]: 14: Hoare triple {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:23,958 INFO L273 TraceCheckUtils]: 15: Hoare triple {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:23,959 INFO L273 TraceCheckUtils]: 16: Hoare triple {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:23,959 INFO L273 TraceCheckUtils]: 17: Hoare triple {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:23,960 INFO L273 TraceCheckUtils]: 18: Hoare triple {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:23,960 INFO L273 TraceCheckUtils]: 19: Hoare triple {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:23,965 INFO L273 TraceCheckUtils]: 20: Hoare triple {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1481#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:23,965 INFO L273 TraceCheckUtils]: 21: Hoare triple {1481#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 8))} assume true; {1481#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:23,966 INFO L273 TraceCheckUtils]: 22: Hoare triple {1481#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 8))} assume !(~y~0 % 4294967296 < 1024); {1472#false} is VALID [2018-11-14 17:31:23,966 INFO L256 TraceCheckUtils]: 23: Hoare triple {1472#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1472#false} is VALID [2018-11-14 17:31:23,966 INFO L273 TraceCheckUtils]: 24: Hoare triple {1472#false} ~cond := #in~cond; {1472#false} is VALID [2018-11-14 17:31:23,966 INFO L273 TraceCheckUtils]: 25: Hoare triple {1472#false} assume ~cond == 0; {1472#false} is VALID [2018-11-14 17:31:23,967 INFO L273 TraceCheckUtils]: 26: Hoare triple {1472#false} assume !false; {1472#false} is VALID [2018-11-14 17:31:23,968 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:23,968 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:23,968 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:23,990 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-14 17:31:24,016 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:31:24,016 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:24,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:24,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:24,139 INFO L256 TraceCheckUtils]: 0: Hoare triple {1471#true} call ULTIMATE.init(); {1471#true} is VALID [2018-11-14 17:31:24,139 INFO L273 TraceCheckUtils]: 1: Hoare triple {1471#true} assume true; {1471#true} is VALID [2018-11-14 17:31:24,139 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1471#true} {1471#true} #32#return; {1471#true} is VALID [2018-11-14 17:31:24,139 INFO L256 TraceCheckUtils]: 3: Hoare triple {1471#true} call #t~ret1 := main(); {1471#true} is VALID [2018-11-14 17:31:24,140 INFO L273 TraceCheckUtils]: 4: Hoare triple {1471#true} ~x~0 := 1;~y~0 := 0; {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:24,140 INFO L273 TraceCheckUtils]: 5: Hoare triple {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:24,141 INFO L273 TraceCheckUtils]: 6: Hoare triple {1473#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:24,141 INFO L273 TraceCheckUtils]: 7: Hoare triple {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:24,142 INFO L273 TraceCheckUtils]: 8: Hoare triple {1474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:24,142 INFO L273 TraceCheckUtils]: 9: Hoare triple {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:24,143 INFO L273 TraceCheckUtils]: 10: Hoare triple {1475#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:24,144 INFO L273 TraceCheckUtils]: 11: Hoare triple {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:24,145 INFO L273 TraceCheckUtils]: 12: Hoare triple {1476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:24,148 INFO L273 TraceCheckUtils]: 13: Hoare triple {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:24,149 INFO L273 TraceCheckUtils]: 14: Hoare triple {1477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:24,149 INFO L273 TraceCheckUtils]: 15: Hoare triple {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:24,150 INFO L273 TraceCheckUtils]: 16: Hoare triple {1478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:24,150 INFO L273 TraceCheckUtils]: 17: Hoare triple {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:24,151 INFO L273 TraceCheckUtils]: 18: Hoare triple {1479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:24,152 INFO L273 TraceCheckUtils]: 19: Hoare triple {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:24,153 INFO L273 TraceCheckUtils]: 20: Hoare triple {1480#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1545#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:24,154 INFO L273 TraceCheckUtils]: 21: Hoare triple {1545#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {1545#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:24,155 INFO L273 TraceCheckUtils]: 22: Hoare triple {1545#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !(~y~0 % 4294967296 < 1024); {1472#false} is VALID [2018-11-14 17:31:24,155 INFO L256 TraceCheckUtils]: 23: Hoare triple {1472#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1472#false} is VALID [2018-11-14 17:31:24,155 INFO L273 TraceCheckUtils]: 24: Hoare triple {1472#false} ~cond := #in~cond; {1472#false} is VALID [2018-11-14 17:31:24,155 INFO L273 TraceCheckUtils]: 25: Hoare triple {1472#false} assume ~cond == 0; {1472#false} is VALID [2018-11-14 17:31:24,156 INFO L273 TraceCheckUtils]: 26: Hoare triple {1472#false} assume !false; {1472#false} is VALID [2018-11-14 17:31:24,158 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:24,179 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:24,179 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-11-14 17:31:24,179 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 27 [2018-11-14 17:31:24,180 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:24,180 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-14 17:31:24,213 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:24,213 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-14 17:31:24,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-14 17:31:24,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-14 17:31:24,214 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 12 states. [2018-11-14 17:31:24,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:24,781 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-11-14 17:31:24,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-14 17:31:24,781 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 27 [2018-11-14 17:31:24,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:24,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 17:31:24,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 35 transitions. [2018-11-14 17:31:24,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-14 17:31:24,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 35 transitions. [2018-11-14 17:31:24,784 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 35 transitions. [2018-11-14 17:31:24,870 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:24,871 INFO L225 Difference]: With dead ends: 35 [2018-11-14 17:31:24,872 INFO L226 Difference]: Without dead ends: 30 [2018-11-14 17:31:24,872 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2018-11-14 17:31:24,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-14 17:31:24,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-11-14 17:31:24,900 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:24,900 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand 30 states. [2018-11-14 17:31:24,901 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 30 states. [2018-11-14 17:31:24,901 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 30 states. [2018-11-14 17:31:24,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:24,902 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-11-14 17:31:24,902 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-11-14 17:31:24,902 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:24,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:24,903 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 30 states. [2018-11-14 17:31:24,903 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 30 states. [2018-11-14 17:31:24,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:24,905 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-11-14 17:31:24,905 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-11-14 17:31:24,905 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:24,905 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:24,905 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:24,905 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:24,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-14 17:31:24,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-11-14 17:31:24,907 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 27 [2018-11-14 17:31:24,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:24,907 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-11-14 17:31:24,907 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-14 17:31:24,907 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-11-14 17:31:24,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-14 17:31:24,908 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:24,908 INFO L375 BasicCegarLoop]: trace histogram [10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:24,908 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:24,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:24,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1182244082, now seen corresponding path program 9 times [2018-11-14 17:31:24,909 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:24,909 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:24,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:24,910 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:24,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:24,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:25,194 INFO L256 TraceCheckUtils]: 0: Hoare triple {1722#true} call ULTIMATE.init(); {1722#true} is VALID [2018-11-14 17:31:25,195 INFO L273 TraceCheckUtils]: 1: Hoare triple {1722#true} assume true; {1722#true} is VALID [2018-11-14 17:31:25,195 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1722#true} {1722#true} #32#return; {1722#true} is VALID [2018-11-14 17:31:25,195 INFO L256 TraceCheckUtils]: 3: Hoare triple {1722#true} call #t~ret1 := main(); {1722#true} is VALID [2018-11-14 17:31:25,196 INFO L273 TraceCheckUtils]: 4: Hoare triple {1722#true} ~x~0 := 1;~y~0 := 0; {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:25,197 INFO L273 TraceCheckUtils]: 5: Hoare triple {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:25,197 INFO L273 TraceCheckUtils]: 6: Hoare triple {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:25,198 INFO L273 TraceCheckUtils]: 7: Hoare triple {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:25,198 INFO L273 TraceCheckUtils]: 8: Hoare triple {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:25,199 INFO L273 TraceCheckUtils]: 9: Hoare triple {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:25,200 INFO L273 TraceCheckUtils]: 10: Hoare triple {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:25,200 INFO L273 TraceCheckUtils]: 11: Hoare triple {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:25,202 INFO L273 TraceCheckUtils]: 12: Hoare triple {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:25,202 INFO L273 TraceCheckUtils]: 13: Hoare triple {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:25,203 INFO L273 TraceCheckUtils]: 14: Hoare triple {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:25,204 INFO L273 TraceCheckUtils]: 15: Hoare triple {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:25,205 INFO L273 TraceCheckUtils]: 16: Hoare triple {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:25,206 INFO L273 TraceCheckUtils]: 17: Hoare triple {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:25,207 INFO L273 TraceCheckUtils]: 18: Hoare triple {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:25,208 INFO L273 TraceCheckUtils]: 19: Hoare triple {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:25,209 INFO L273 TraceCheckUtils]: 20: Hoare triple {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:25,210 INFO L273 TraceCheckUtils]: 21: Hoare triple {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:25,211 INFO L273 TraceCheckUtils]: 22: Hoare triple {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1733#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 9))} is VALID [2018-11-14 17:31:25,212 INFO L273 TraceCheckUtils]: 23: Hoare triple {1733#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 9))} assume true; {1733#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 9))} is VALID [2018-11-14 17:31:25,213 INFO L273 TraceCheckUtils]: 24: Hoare triple {1733#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 9))} assume !(~y~0 % 4294967296 < 1024); {1723#false} is VALID [2018-11-14 17:31:25,213 INFO L256 TraceCheckUtils]: 25: Hoare triple {1723#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1723#false} is VALID [2018-11-14 17:31:25,213 INFO L273 TraceCheckUtils]: 26: Hoare triple {1723#false} ~cond := #in~cond; {1723#false} is VALID [2018-11-14 17:31:25,213 INFO L273 TraceCheckUtils]: 27: Hoare triple {1723#false} assume ~cond == 0; {1723#false} is VALID [2018-11-14 17:31:25,214 INFO L273 TraceCheckUtils]: 28: Hoare triple {1723#false} assume !false; {1723#false} is VALID [2018-11-14 17:31:25,216 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:25,216 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:25,216 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:25,225 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-14 17:31:25,253 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-11-14 17:31:25,253 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:25,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:25,265 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:25,372 INFO L256 TraceCheckUtils]: 0: Hoare triple {1722#true} call ULTIMATE.init(); {1722#true} is VALID [2018-11-14 17:31:25,372 INFO L273 TraceCheckUtils]: 1: Hoare triple {1722#true} assume true; {1722#true} is VALID [2018-11-14 17:31:25,372 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1722#true} {1722#true} #32#return; {1722#true} is VALID [2018-11-14 17:31:25,373 INFO L256 TraceCheckUtils]: 3: Hoare triple {1722#true} call #t~ret1 := main(); {1722#true} is VALID [2018-11-14 17:31:25,373 INFO L273 TraceCheckUtils]: 4: Hoare triple {1722#true} ~x~0 := 1;~y~0 := 0; {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:25,374 INFO L273 TraceCheckUtils]: 5: Hoare triple {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:25,374 INFO L273 TraceCheckUtils]: 6: Hoare triple {1724#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:25,377 INFO L273 TraceCheckUtils]: 7: Hoare triple {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:25,378 INFO L273 TraceCheckUtils]: 8: Hoare triple {1725#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:25,379 INFO L273 TraceCheckUtils]: 9: Hoare triple {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:25,379 INFO L273 TraceCheckUtils]: 10: Hoare triple {1726#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:25,380 INFO L273 TraceCheckUtils]: 11: Hoare triple {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:25,389 INFO L273 TraceCheckUtils]: 12: Hoare triple {1727#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:25,390 INFO L273 TraceCheckUtils]: 13: Hoare triple {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:25,392 INFO L273 TraceCheckUtils]: 14: Hoare triple {1728#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:25,393 INFO L273 TraceCheckUtils]: 15: Hoare triple {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:25,393 INFO L273 TraceCheckUtils]: 16: Hoare triple {1729#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:25,394 INFO L273 TraceCheckUtils]: 17: Hoare triple {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:25,395 INFO L273 TraceCheckUtils]: 18: Hoare triple {1730#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:25,395 INFO L273 TraceCheckUtils]: 19: Hoare triple {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:25,396 INFO L273 TraceCheckUtils]: 20: Hoare triple {1731#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:25,396 INFO L273 TraceCheckUtils]: 21: Hoare triple {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:25,397 INFO L273 TraceCheckUtils]: 22: Hoare triple {1732#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1803#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:25,398 INFO L273 TraceCheckUtils]: 23: Hoare triple {1803#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {1803#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:25,399 INFO L273 TraceCheckUtils]: 24: Hoare triple {1803#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1723#false} is VALID [2018-11-14 17:31:25,399 INFO L256 TraceCheckUtils]: 25: Hoare triple {1723#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1723#false} is VALID [2018-11-14 17:31:25,399 INFO L273 TraceCheckUtils]: 26: Hoare triple {1723#false} ~cond := #in~cond; {1723#false} is VALID [2018-11-14 17:31:25,400 INFO L273 TraceCheckUtils]: 27: Hoare triple {1723#false} assume ~cond == 0; {1723#false} is VALID [2018-11-14 17:31:25,400 INFO L273 TraceCheckUtils]: 28: Hoare triple {1723#false} assume !false; {1723#false} is VALID [2018-11-14 17:31:25,402 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:25,423 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:25,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-11-14 17:31:25,424 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 29 [2018-11-14 17:31:25,424 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:25,424 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-14 17:31:25,455 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:25,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-14 17:31:25,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-14 17:31:25,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-14 17:31:25,456 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 13 states. [2018-11-14 17:31:26,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:26,017 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-11-14 17:31:26,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-14 17:31:26,018 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 29 [2018-11-14 17:31:26,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:26,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 17:31:26,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 37 transitions. [2018-11-14 17:31:26,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-14 17:31:26,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 37 transitions. [2018-11-14 17:31:26,021 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 37 transitions. [2018-11-14 17:31:26,054 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:26,055 INFO L225 Difference]: With dead ends: 37 [2018-11-14 17:31:26,055 INFO L226 Difference]: Without dead ends: 32 [2018-11-14 17:31:26,056 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2018-11-14 17:31:26,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-11-14 17:31:26,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-11-14 17:31:26,077 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:26,077 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand 32 states. [2018-11-14 17:31:26,077 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 32 states. [2018-11-14 17:31:26,077 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 32 states. [2018-11-14 17:31:26,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:26,079 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-11-14 17:31:26,079 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-11-14 17:31:26,079 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:26,079 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:26,079 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 32 states. [2018-11-14 17:31:26,080 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 32 states. [2018-11-14 17:31:26,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:26,081 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-11-14 17:31:26,081 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-11-14 17:31:26,081 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:26,081 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:26,082 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:26,082 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:26,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-14 17:31:26,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-11-14 17:31:26,083 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 29 [2018-11-14 17:31:26,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:26,084 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-11-14 17:31:26,084 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-14 17:31:26,084 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-11-14 17:31:26,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-14 17:31:26,085 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:26,085 INFO L375 BasicCegarLoop]: trace histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:26,085 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:26,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:26,085 INFO L82 PathProgramCache]: Analyzing trace with hash -1270211116, now seen corresponding path program 10 times [2018-11-14 17:31:26,086 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:26,086 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:26,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:26,087 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:26,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:26,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:26,384 INFO L256 TraceCheckUtils]: 0: Hoare triple {1990#true} call ULTIMATE.init(); {1990#true} is VALID [2018-11-14 17:31:26,385 INFO L273 TraceCheckUtils]: 1: Hoare triple {1990#true} assume true; {1990#true} is VALID [2018-11-14 17:31:26,385 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1990#true} {1990#true} #32#return; {1990#true} is VALID [2018-11-14 17:31:26,385 INFO L256 TraceCheckUtils]: 3: Hoare triple {1990#true} call #t~ret1 := main(); {1990#true} is VALID [2018-11-14 17:31:26,385 INFO L273 TraceCheckUtils]: 4: Hoare triple {1990#true} ~x~0 := 1;~y~0 := 0; {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:26,386 INFO L273 TraceCheckUtils]: 5: Hoare triple {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:26,389 INFO L273 TraceCheckUtils]: 6: Hoare triple {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:26,389 INFO L273 TraceCheckUtils]: 7: Hoare triple {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:26,390 INFO L273 TraceCheckUtils]: 8: Hoare triple {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:26,391 INFO L273 TraceCheckUtils]: 9: Hoare triple {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:26,395 INFO L273 TraceCheckUtils]: 10: Hoare triple {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:26,396 INFO L273 TraceCheckUtils]: 11: Hoare triple {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:26,396 INFO L273 TraceCheckUtils]: 12: Hoare triple {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:26,397 INFO L273 TraceCheckUtils]: 13: Hoare triple {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:26,397 INFO L273 TraceCheckUtils]: 14: Hoare triple {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:26,398 INFO L273 TraceCheckUtils]: 15: Hoare triple {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:26,398 INFO L273 TraceCheckUtils]: 16: Hoare triple {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:26,399 INFO L273 TraceCheckUtils]: 17: Hoare triple {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:26,400 INFO L273 TraceCheckUtils]: 18: Hoare triple {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:26,401 INFO L273 TraceCheckUtils]: 19: Hoare triple {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:26,402 INFO L273 TraceCheckUtils]: 20: Hoare triple {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:26,403 INFO L273 TraceCheckUtils]: 21: Hoare triple {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:26,404 INFO L273 TraceCheckUtils]: 22: Hoare triple {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:26,404 INFO L273 TraceCheckUtils]: 23: Hoare triple {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:26,406 INFO L273 TraceCheckUtils]: 24: Hoare triple {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2002#(and (<= main_~y~0 10) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:26,406 INFO L273 TraceCheckUtils]: 25: Hoare triple {2002#(and (<= main_~y~0 10) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume true; {2002#(and (<= main_~y~0 10) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:26,407 INFO L273 TraceCheckUtils]: 26: Hoare triple {2002#(and (<= main_~y~0 10) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {1991#false} is VALID [2018-11-14 17:31:26,408 INFO L256 TraceCheckUtils]: 27: Hoare triple {1991#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1991#false} is VALID [2018-11-14 17:31:26,408 INFO L273 TraceCheckUtils]: 28: Hoare triple {1991#false} ~cond := #in~cond; {1991#false} is VALID [2018-11-14 17:31:26,408 INFO L273 TraceCheckUtils]: 29: Hoare triple {1991#false} assume ~cond == 0; {1991#false} is VALID [2018-11-14 17:31:26,408 INFO L273 TraceCheckUtils]: 30: Hoare triple {1991#false} assume !false; {1991#false} is VALID [2018-11-14 17:31:26,410 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:26,411 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:26,411 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:26,421 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 17:31:26,435 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 17:31:26,435 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:26,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:26,446 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:26,560 INFO L256 TraceCheckUtils]: 0: Hoare triple {1990#true} call ULTIMATE.init(); {1990#true} is VALID [2018-11-14 17:31:26,560 INFO L273 TraceCheckUtils]: 1: Hoare triple {1990#true} assume true; {1990#true} is VALID [2018-11-14 17:31:26,560 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1990#true} {1990#true} #32#return; {1990#true} is VALID [2018-11-14 17:31:26,560 INFO L256 TraceCheckUtils]: 3: Hoare triple {1990#true} call #t~ret1 := main(); {1990#true} is VALID [2018-11-14 17:31:26,561 INFO L273 TraceCheckUtils]: 4: Hoare triple {1990#true} ~x~0 := 1;~y~0 := 0; {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:26,561 INFO L273 TraceCheckUtils]: 5: Hoare triple {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:26,562 INFO L273 TraceCheckUtils]: 6: Hoare triple {1992#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:26,562 INFO L273 TraceCheckUtils]: 7: Hoare triple {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:26,563 INFO L273 TraceCheckUtils]: 8: Hoare triple {1993#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:26,563 INFO L273 TraceCheckUtils]: 9: Hoare triple {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:26,564 INFO L273 TraceCheckUtils]: 10: Hoare triple {1994#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:26,564 INFO L273 TraceCheckUtils]: 11: Hoare triple {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:26,565 INFO L273 TraceCheckUtils]: 12: Hoare triple {1995#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:26,566 INFO L273 TraceCheckUtils]: 13: Hoare triple {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:26,567 INFO L273 TraceCheckUtils]: 14: Hoare triple {1996#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:26,568 INFO L273 TraceCheckUtils]: 15: Hoare triple {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:26,569 INFO L273 TraceCheckUtils]: 16: Hoare triple {1997#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:26,570 INFO L273 TraceCheckUtils]: 17: Hoare triple {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:26,571 INFO L273 TraceCheckUtils]: 18: Hoare triple {1998#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:26,571 INFO L273 TraceCheckUtils]: 19: Hoare triple {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:26,572 INFO L273 TraceCheckUtils]: 20: Hoare triple {1999#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:26,573 INFO L273 TraceCheckUtils]: 21: Hoare triple {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:26,574 INFO L273 TraceCheckUtils]: 22: Hoare triple {2000#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:26,575 INFO L273 TraceCheckUtils]: 23: Hoare triple {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:26,576 INFO L273 TraceCheckUtils]: 24: Hoare triple {2001#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2078#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:26,577 INFO L273 TraceCheckUtils]: 25: Hoare triple {2078#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2078#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:26,577 INFO L273 TraceCheckUtils]: 26: Hoare triple {2078#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {1991#false} is VALID [2018-11-14 17:31:26,578 INFO L256 TraceCheckUtils]: 27: Hoare triple {1991#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {1991#false} is VALID [2018-11-14 17:31:26,578 INFO L273 TraceCheckUtils]: 28: Hoare triple {1991#false} ~cond := #in~cond; {1991#false} is VALID [2018-11-14 17:31:26,578 INFO L273 TraceCheckUtils]: 29: Hoare triple {1991#false} assume ~cond == 0; {1991#false} is VALID [2018-11-14 17:31:26,579 INFO L273 TraceCheckUtils]: 30: Hoare triple {1991#false} assume !false; {1991#false} is VALID [2018-11-14 17:31:26,580 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:26,600 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:26,600 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-11-14 17:31:26,601 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 31 [2018-11-14 17:31:26,601 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:26,601 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-14 17:31:26,637 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:26,638 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-14 17:31:26,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-14 17:31:26,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-14 17:31:26,639 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 14 states. [2018-11-14 17:31:27,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:27,123 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-11-14 17:31:27,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-14 17:31:27,123 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 31 [2018-11-14 17:31:27,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:27,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-14 17:31:27,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 39 transitions. [2018-11-14 17:31:27,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-14 17:31:27,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 39 transitions. [2018-11-14 17:31:27,126 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 39 transitions. [2018-11-14 17:31:27,168 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:27,170 INFO L225 Difference]: With dead ends: 39 [2018-11-14 17:31:27,170 INFO L226 Difference]: Without dead ends: 34 [2018-11-14 17:31:27,171 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2018-11-14 17:31:27,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-11-14 17:31:27,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-11-14 17:31:27,193 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:27,194 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand 34 states. [2018-11-14 17:31:27,194 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 34 states. [2018-11-14 17:31:27,194 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 34 states. [2018-11-14 17:31:27,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:27,195 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-11-14 17:31:27,195 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-14 17:31:27,196 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:27,196 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:27,196 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 34 states. [2018-11-14 17:31:27,196 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 34 states. [2018-11-14 17:31:27,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:27,197 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-11-14 17:31:27,197 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-14 17:31:27,197 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:27,198 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:27,198 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:27,198 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:27,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-11-14 17:31:27,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-11-14 17:31:27,199 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 31 [2018-11-14 17:31:27,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:27,199 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-11-14 17:31:27,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-14 17:31:27,200 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-11-14 17:31:27,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-14 17:31:27,200 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:27,200 INFO L375 BasicCegarLoop]: trace histogram [12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:27,200 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:27,201 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:27,201 INFO L82 PathProgramCache]: Analyzing trace with hash 92815130, now seen corresponding path program 11 times [2018-11-14 17:31:27,201 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:27,201 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:27,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:27,202 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:27,202 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:27,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:27,635 INFO L256 TraceCheckUtils]: 0: Hoare triple {2275#true} call ULTIMATE.init(); {2275#true} is VALID [2018-11-14 17:31:27,635 INFO L273 TraceCheckUtils]: 1: Hoare triple {2275#true} assume true; {2275#true} is VALID [2018-11-14 17:31:27,635 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2275#true} {2275#true} #32#return; {2275#true} is VALID [2018-11-14 17:31:27,635 INFO L256 TraceCheckUtils]: 3: Hoare triple {2275#true} call #t~ret1 := main(); {2275#true} is VALID [2018-11-14 17:31:27,636 INFO L273 TraceCheckUtils]: 4: Hoare triple {2275#true} ~x~0 := 1;~y~0 := 0; {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:27,636 INFO L273 TraceCheckUtils]: 5: Hoare triple {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:27,637 INFO L273 TraceCheckUtils]: 6: Hoare triple {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:27,637 INFO L273 TraceCheckUtils]: 7: Hoare triple {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:27,638 INFO L273 TraceCheckUtils]: 8: Hoare triple {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:27,639 INFO L273 TraceCheckUtils]: 9: Hoare triple {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:27,640 INFO L273 TraceCheckUtils]: 10: Hoare triple {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:27,641 INFO L273 TraceCheckUtils]: 11: Hoare triple {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:27,642 INFO L273 TraceCheckUtils]: 12: Hoare triple {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:27,643 INFO L273 TraceCheckUtils]: 13: Hoare triple {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:27,644 INFO L273 TraceCheckUtils]: 14: Hoare triple {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:27,644 INFO L273 TraceCheckUtils]: 15: Hoare triple {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:27,645 INFO L273 TraceCheckUtils]: 16: Hoare triple {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:27,646 INFO L273 TraceCheckUtils]: 17: Hoare triple {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:27,647 INFO L273 TraceCheckUtils]: 18: Hoare triple {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:27,648 INFO L273 TraceCheckUtils]: 19: Hoare triple {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:27,649 INFO L273 TraceCheckUtils]: 20: Hoare triple {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:27,649 INFO L273 TraceCheckUtils]: 21: Hoare triple {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:27,650 INFO L273 TraceCheckUtils]: 22: Hoare triple {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:27,651 INFO L273 TraceCheckUtils]: 23: Hoare triple {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:27,652 INFO L273 TraceCheckUtils]: 24: Hoare triple {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:27,653 INFO L273 TraceCheckUtils]: 25: Hoare triple {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:27,654 INFO L273 TraceCheckUtils]: 26: Hoare triple {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2288#(and (<= main_~y~0 11) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:27,654 INFO L273 TraceCheckUtils]: 27: Hoare triple {2288#(and (<= main_~y~0 11) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume true; {2288#(and (<= main_~y~0 11) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:27,655 INFO L273 TraceCheckUtils]: 28: Hoare triple {2288#(and (<= main_~y~0 11) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {2276#false} is VALID [2018-11-14 17:31:27,656 INFO L256 TraceCheckUtils]: 29: Hoare triple {2276#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {2276#false} is VALID [2018-11-14 17:31:27,656 INFO L273 TraceCheckUtils]: 30: Hoare triple {2276#false} ~cond := #in~cond; {2276#false} is VALID [2018-11-14 17:31:27,656 INFO L273 TraceCheckUtils]: 31: Hoare triple {2276#false} assume ~cond == 0; {2276#false} is VALID [2018-11-14 17:31:27,656 INFO L273 TraceCheckUtils]: 32: Hoare triple {2276#false} assume !false; {2276#false} is VALID [2018-11-14 17:31:27,658 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:27,658 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:27,658 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:27,666 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-14 17:31:27,827 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-11-14 17:31:27,827 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:27,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:27,837 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:27,940 INFO L256 TraceCheckUtils]: 0: Hoare triple {2275#true} call ULTIMATE.init(); {2275#true} is VALID [2018-11-14 17:31:27,940 INFO L273 TraceCheckUtils]: 1: Hoare triple {2275#true} assume true; {2275#true} is VALID [2018-11-14 17:31:27,940 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2275#true} {2275#true} #32#return; {2275#true} is VALID [2018-11-14 17:31:27,940 INFO L256 TraceCheckUtils]: 3: Hoare triple {2275#true} call #t~ret1 := main(); {2275#true} is VALID [2018-11-14 17:31:27,941 INFO L273 TraceCheckUtils]: 4: Hoare triple {2275#true} ~x~0 := 1;~y~0 := 0; {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:27,941 INFO L273 TraceCheckUtils]: 5: Hoare triple {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:27,942 INFO L273 TraceCheckUtils]: 6: Hoare triple {2277#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:27,942 INFO L273 TraceCheckUtils]: 7: Hoare triple {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:27,943 INFO L273 TraceCheckUtils]: 8: Hoare triple {2278#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:27,943 INFO L273 TraceCheckUtils]: 9: Hoare triple {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:27,944 INFO L273 TraceCheckUtils]: 10: Hoare triple {2279#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:27,945 INFO L273 TraceCheckUtils]: 11: Hoare triple {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:27,946 INFO L273 TraceCheckUtils]: 12: Hoare triple {2280#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:27,947 INFO L273 TraceCheckUtils]: 13: Hoare triple {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:27,948 INFO L273 TraceCheckUtils]: 14: Hoare triple {2281#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:27,949 INFO L273 TraceCheckUtils]: 15: Hoare triple {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:27,950 INFO L273 TraceCheckUtils]: 16: Hoare triple {2282#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:27,950 INFO L273 TraceCheckUtils]: 17: Hoare triple {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:27,967 INFO L273 TraceCheckUtils]: 18: Hoare triple {2283#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:27,967 INFO L273 TraceCheckUtils]: 19: Hoare triple {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:27,968 INFO L273 TraceCheckUtils]: 20: Hoare triple {2284#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:27,968 INFO L273 TraceCheckUtils]: 21: Hoare triple {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:27,969 INFO L273 TraceCheckUtils]: 22: Hoare triple {2285#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:27,969 INFO L273 TraceCheckUtils]: 23: Hoare triple {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:27,970 INFO L273 TraceCheckUtils]: 24: Hoare triple {2286#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:27,970 INFO L273 TraceCheckUtils]: 25: Hoare triple {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:27,971 INFO L273 TraceCheckUtils]: 26: Hoare triple {2287#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2370#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:27,972 INFO L273 TraceCheckUtils]: 27: Hoare triple {2370#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {2370#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:27,973 INFO L273 TraceCheckUtils]: 28: Hoare triple {2370#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !(~y~0 % 4294967296 < 1024); {2276#false} is VALID [2018-11-14 17:31:27,973 INFO L256 TraceCheckUtils]: 29: Hoare triple {2276#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {2276#false} is VALID [2018-11-14 17:31:27,973 INFO L273 TraceCheckUtils]: 30: Hoare triple {2276#false} ~cond := #in~cond; {2276#false} is VALID [2018-11-14 17:31:27,973 INFO L273 TraceCheckUtils]: 31: Hoare triple {2276#false} assume ~cond == 0; {2276#false} is VALID [2018-11-14 17:31:27,974 INFO L273 TraceCheckUtils]: 32: Hoare triple {2276#false} assume !false; {2276#false} is VALID [2018-11-14 17:31:27,976 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:27,996 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:27,996 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-11-14 17:31:27,997 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 33 [2018-11-14 17:31:27,997 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:27,997 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states. [2018-11-14 17:31:28,086 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:28,086 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-11-14 17:31:28,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-11-14 17:31:28,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-11-14 17:31:28,087 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 15 states. [2018-11-14 17:31:28,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:28,871 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-11-14 17:31:28,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-14 17:31:28,872 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 33 [2018-11-14 17:31:28,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:28,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-14 17:31:28,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 41 transitions. [2018-11-14 17:31:28,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2018-11-14 17:31:28,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 41 transitions. [2018-11-14 17:31:28,875 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 41 transitions. [2018-11-14 17:31:28,915 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:28,916 INFO L225 Difference]: With dead ends: 41 [2018-11-14 17:31:28,916 INFO L226 Difference]: Without dead ends: 36 [2018-11-14 17:31:28,917 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-11-14 17:31:28,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-11-14 17:31:28,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-11-14 17:31:28,952 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:28,952 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand 36 states. [2018-11-14 17:31:28,953 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand 36 states. [2018-11-14 17:31:28,953 INFO L87 Difference]: Start difference. First operand 36 states. Second operand 36 states. [2018-11-14 17:31:28,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:28,954 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-11-14 17:31:28,955 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-14 17:31:28,955 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:28,955 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:28,955 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand 36 states. [2018-11-14 17:31:28,955 INFO L87 Difference]: Start difference. First operand 36 states. Second operand 36 states. [2018-11-14 17:31:28,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:28,957 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-11-14 17:31:28,957 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-14 17:31:28,957 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:28,958 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:28,958 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:28,958 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:28,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-11-14 17:31:28,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-11-14 17:31:28,959 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 33 [2018-11-14 17:31:28,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:28,960 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-11-14 17:31:28,960 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-11-14 17:31:28,960 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-11-14 17:31:28,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-14 17:31:28,961 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:28,961 INFO L375 BasicCegarLoop]: trace histogram [13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:28,961 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:28,961 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:28,961 INFO L82 PathProgramCache]: Analyzing trace with hash -3987744, now seen corresponding path program 12 times [2018-11-14 17:31:28,962 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:28,962 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:28,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:28,963 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:28,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:28,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:29,389 INFO L256 TraceCheckUtils]: 0: Hoare triple {2577#true} call ULTIMATE.init(); {2577#true} is VALID [2018-11-14 17:31:29,390 INFO L273 TraceCheckUtils]: 1: Hoare triple {2577#true} assume true; {2577#true} is VALID [2018-11-14 17:31:29,390 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2577#true} {2577#true} #32#return; {2577#true} is VALID [2018-11-14 17:31:29,390 INFO L256 TraceCheckUtils]: 3: Hoare triple {2577#true} call #t~ret1 := main(); {2577#true} is VALID [2018-11-14 17:31:29,391 INFO L273 TraceCheckUtils]: 4: Hoare triple {2577#true} ~x~0 := 1;~y~0 := 0; {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:29,391 INFO L273 TraceCheckUtils]: 5: Hoare triple {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:29,393 INFO L273 TraceCheckUtils]: 6: Hoare triple {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:29,393 INFO L273 TraceCheckUtils]: 7: Hoare triple {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:29,395 INFO L273 TraceCheckUtils]: 8: Hoare triple {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:29,395 INFO L273 TraceCheckUtils]: 9: Hoare triple {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:29,396 INFO L273 TraceCheckUtils]: 10: Hoare triple {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:29,397 INFO L273 TraceCheckUtils]: 11: Hoare triple {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:29,398 INFO L273 TraceCheckUtils]: 12: Hoare triple {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:29,399 INFO L273 TraceCheckUtils]: 13: Hoare triple {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:29,400 INFO L273 TraceCheckUtils]: 14: Hoare triple {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:29,401 INFO L273 TraceCheckUtils]: 15: Hoare triple {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:29,402 INFO L273 TraceCheckUtils]: 16: Hoare triple {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:29,403 INFO L273 TraceCheckUtils]: 17: Hoare triple {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:29,404 INFO L273 TraceCheckUtils]: 18: Hoare triple {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:29,405 INFO L273 TraceCheckUtils]: 19: Hoare triple {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:29,406 INFO L273 TraceCheckUtils]: 20: Hoare triple {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:29,407 INFO L273 TraceCheckUtils]: 21: Hoare triple {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:29,408 INFO L273 TraceCheckUtils]: 22: Hoare triple {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:29,409 INFO L273 TraceCheckUtils]: 23: Hoare triple {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:29,410 INFO L273 TraceCheckUtils]: 24: Hoare triple {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:29,411 INFO L273 TraceCheckUtils]: 25: Hoare triple {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:29,412 INFO L273 TraceCheckUtils]: 26: Hoare triple {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:29,412 INFO L273 TraceCheckUtils]: 27: Hoare triple {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:29,414 INFO L273 TraceCheckUtils]: 28: Hoare triple {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2591#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 12))} is VALID [2018-11-14 17:31:29,415 INFO L273 TraceCheckUtils]: 29: Hoare triple {2591#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 12))} assume true; {2591#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 12))} is VALID [2018-11-14 17:31:29,416 INFO L273 TraceCheckUtils]: 30: Hoare triple {2591#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 12))} assume !(~y~0 % 4294967296 < 1024); {2578#false} is VALID [2018-11-14 17:31:29,416 INFO L256 TraceCheckUtils]: 31: Hoare triple {2578#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {2578#false} is VALID [2018-11-14 17:31:29,416 INFO L273 TraceCheckUtils]: 32: Hoare triple {2578#false} ~cond := #in~cond; {2578#false} is VALID [2018-11-14 17:31:29,416 INFO L273 TraceCheckUtils]: 33: Hoare triple {2578#false} assume ~cond == 0; {2578#false} is VALID [2018-11-14 17:31:29,417 INFO L273 TraceCheckUtils]: 34: Hoare triple {2578#false} assume !false; {2578#false} is VALID [2018-11-14 17:31:29,419 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:29,420 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:29,420 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:29,431 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-14 17:31:29,700 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-11-14 17:31:29,700 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:29,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:29,714 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:29,894 INFO L256 TraceCheckUtils]: 0: Hoare triple {2577#true} call ULTIMATE.init(); {2577#true} is VALID [2018-11-14 17:31:29,895 INFO L273 TraceCheckUtils]: 1: Hoare triple {2577#true} assume true; {2577#true} is VALID [2018-11-14 17:31:29,895 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2577#true} {2577#true} #32#return; {2577#true} is VALID [2018-11-14 17:31:29,895 INFO L256 TraceCheckUtils]: 3: Hoare triple {2577#true} call #t~ret1 := main(); {2577#true} is VALID [2018-11-14 17:31:29,896 INFO L273 TraceCheckUtils]: 4: Hoare triple {2577#true} ~x~0 := 1;~y~0 := 0; {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:29,896 INFO L273 TraceCheckUtils]: 5: Hoare triple {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:29,897 INFO L273 TraceCheckUtils]: 6: Hoare triple {2579#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:29,897 INFO L273 TraceCheckUtils]: 7: Hoare triple {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:29,898 INFO L273 TraceCheckUtils]: 8: Hoare triple {2580#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:29,899 INFO L273 TraceCheckUtils]: 9: Hoare triple {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:29,900 INFO L273 TraceCheckUtils]: 10: Hoare triple {2581#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:29,901 INFO L273 TraceCheckUtils]: 11: Hoare triple {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:29,902 INFO L273 TraceCheckUtils]: 12: Hoare triple {2582#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:29,903 INFO L273 TraceCheckUtils]: 13: Hoare triple {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:29,904 INFO L273 TraceCheckUtils]: 14: Hoare triple {2583#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:29,905 INFO L273 TraceCheckUtils]: 15: Hoare triple {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:29,906 INFO L273 TraceCheckUtils]: 16: Hoare triple {2584#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:29,906 INFO L273 TraceCheckUtils]: 17: Hoare triple {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:29,908 INFO L273 TraceCheckUtils]: 18: Hoare triple {2585#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:29,908 INFO L273 TraceCheckUtils]: 19: Hoare triple {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:29,909 INFO L273 TraceCheckUtils]: 20: Hoare triple {2586#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:29,910 INFO L273 TraceCheckUtils]: 21: Hoare triple {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:29,911 INFO L273 TraceCheckUtils]: 22: Hoare triple {2587#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:29,912 INFO L273 TraceCheckUtils]: 23: Hoare triple {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:29,913 INFO L273 TraceCheckUtils]: 24: Hoare triple {2588#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:29,914 INFO L273 TraceCheckUtils]: 25: Hoare triple {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:29,915 INFO L273 TraceCheckUtils]: 26: Hoare triple {2589#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:29,927 INFO L273 TraceCheckUtils]: 27: Hoare triple {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:29,928 INFO L273 TraceCheckUtils]: 28: Hoare triple {2590#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2679#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:29,928 INFO L273 TraceCheckUtils]: 29: Hoare triple {2679#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {2679#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:29,929 INFO L273 TraceCheckUtils]: 30: Hoare triple {2679#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {2578#false} is VALID [2018-11-14 17:31:29,929 INFO L256 TraceCheckUtils]: 31: Hoare triple {2578#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {2578#false} is VALID [2018-11-14 17:31:29,929 INFO L273 TraceCheckUtils]: 32: Hoare triple {2578#false} ~cond := #in~cond; {2578#false} is VALID [2018-11-14 17:31:29,929 INFO L273 TraceCheckUtils]: 33: Hoare triple {2578#false} assume ~cond == 0; {2578#false} is VALID [2018-11-14 17:31:29,930 INFO L273 TraceCheckUtils]: 34: Hoare triple {2578#false} assume !false; {2578#false} is VALID [2018-11-14 17:31:29,933 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:29,953 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:29,953 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-11-14 17:31:29,955 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 35 [2018-11-14 17:31:29,955 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:29,955 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-14 17:31:29,995 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:29,995 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-14 17:31:29,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-14 17:31:29,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2018-11-14 17:31:29,997 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 16 states. [2018-11-14 17:31:30,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:30,683 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-11-14 17:31:30,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-14 17:31:30,683 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 35 [2018-11-14 17:31:30,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:30,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-14 17:31:30,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2018-11-14 17:31:30,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-14 17:31:30,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 43 transitions. [2018-11-14 17:31:30,687 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states and 43 transitions. [2018-11-14 17:31:30,727 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:30,729 INFO L225 Difference]: With dead ends: 43 [2018-11-14 17:31:30,729 INFO L226 Difference]: Without dead ends: 38 [2018-11-14 17:31:30,729 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2018-11-14 17:31:30,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-11-14 17:31:30,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-11-14 17:31:30,765 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:30,766 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand 38 states. [2018-11-14 17:31:30,766 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 38 states. [2018-11-14 17:31:30,766 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 38 states. [2018-11-14 17:31:30,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:30,767 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-11-14 17:31:30,768 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-11-14 17:31:30,768 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:30,768 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:30,768 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand 38 states. [2018-11-14 17:31:30,768 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 38 states. [2018-11-14 17:31:30,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:30,769 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-11-14 17:31:30,770 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-11-14 17:31:30,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:30,770 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:30,770 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:30,770 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:30,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-11-14 17:31:30,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-11-14 17:31:30,771 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 35 [2018-11-14 17:31:30,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:30,771 INFO L480 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-11-14 17:31:30,771 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-14 17:31:30,771 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-11-14 17:31:30,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-14 17:31:30,772 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:30,772 INFO L375 BasicCegarLoop]: trace histogram [14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:30,772 INFO L423 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:30,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:30,772 INFO L82 PathProgramCache]: Analyzing trace with hash 1457730854, now seen corresponding path program 13 times [2018-11-14 17:31:30,773 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:30,773 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:30,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:30,773 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:30,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:30,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:31,104 INFO L256 TraceCheckUtils]: 0: Hoare triple {2896#true} call ULTIMATE.init(); {2896#true} is VALID [2018-11-14 17:31:31,104 INFO L273 TraceCheckUtils]: 1: Hoare triple {2896#true} assume true; {2896#true} is VALID [2018-11-14 17:31:31,105 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2896#true} {2896#true} #32#return; {2896#true} is VALID [2018-11-14 17:31:31,105 INFO L256 TraceCheckUtils]: 3: Hoare triple {2896#true} call #t~ret1 := main(); {2896#true} is VALID [2018-11-14 17:31:31,105 INFO L273 TraceCheckUtils]: 4: Hoare triple {2896#true} ~x~0 := 1;~y~0 := 0; {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:31,106 INFO L273 TraceCheckUtils]: 5: Hoare triple {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:31,107 INFO L273 TraceCheckUtils]: 6: Hoare triple {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:31,108 INFO L273 TraceCheckUtils]: 7: Hoare triple {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:31,109 INFO L273 TraceCheckUtils]: 8: Hoare triple {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:31,110 INFO L273 TraceCheckUtils]: 9: Hoare triple {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:31,110 INFO L273 TraceCheckUtils]: 10: Hoare triple {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:31,111 INFO L273 TraceCheckUtils]: 11: Hoare triple {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:31,112 INFO L273 TraceCheckUtils]: 12: Hoare triple {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:31,113 INFO L273 TraceCheckUtils]: 13: Hoare triple {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:31,114 INFO L273 TraceCheckUtils]: 14: Hoare triple {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:31,114 INFO L273 TraceCheckUtils]: 15: Hoare triple {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:31,115 INFO L273 TraceCheckUtils]: 16: Hoare triple {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:31,116 INFO L273 TraceCheckUtils]: 17: Hoare triple {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:31,117 INFO L273 TraceCheckUtils]: 18: Hoare triple {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:31,118 INFO L273 TraceCheckUtils]: 19: Hoare triple {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:31,119 INFO L273 TraceCheckUtils]: 20: Hoare triple {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:31,119 INFO L273 TraceCheckUtils]: 21: Hoare triple {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:31,121 INFO L273 TraceCheckUtils]: 22: Hoare triple {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:31,121 INFO L273 TraceCheckUtils]: 23: Hoare triple {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:31,122 INFO L273 TraceCheckUtils]: 24: Hoare triple {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:31,123 INFO L273 TraceCheckUtils]: 25: Hoare triple {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:31,124 INFO L273 TraceCheckUtils]: 26: Hoare triple {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:31,124 INFO L273 TraceCheckUtils]: 27: Hoare triple {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:31,125 INFO L273 TraceCheckUtils]: 28: Hoare triple {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:31,126 INFO L273 TraceCheckUtils]: 29: Hoare triple {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:31,127 INFO L273 TraceCheckUtils]: 30: Hoare triple {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2911#(and (<= main_~y~0 13) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:31,128 INFO L273 TraceCheckUtils]: 31: Hoare triple {2911#(and (<= main_~y~0 13) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume true; {2911#(and (<= main_~y~0 13) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:31,129 INFO L273 TraceCheckUtils]: 32: Hoare triple {2911#(and (<= main_~y~0 13) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {2897#false} is VALID [2018-11-14 17:31:31,129 INFO L256 TraceCheckUtils]: 33: Hoare triple {2897#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {2897#false} is VALID [2018-11-14 17:31:31,129 INFO L273 TraceCheckUtils]: 34: Hoare triple {2897#false} ~cond := #in~cond; {2897#false} is VALID [2018-11-14 17:31:31,129 INFO L273 TraceCheckUtils]: 35: Hoare triple {2897#false} assume ~cond == 0; {2897#false} is VALID [2018-11-14 17:31:31,129 INFO L273 TraceCheckUtils]: 36: Hoare triple {2897#false} assume !false; {2897#false} is VALID [2018-11-14 17:31:31,132 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:31,132 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:31,132 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:31,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:31,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:31,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:31,171 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:31,321 INFO L256 TraceCheckUtils]: 0: Hoare triple {2896#true} call ULTIMATE.init(); {2896#true} is VALID [2018-11-14 17:31:31,322 INFO L273 TraceCheckUtils]: 1: Hoare triple {2896#true} assume true; {2896#true} is VALID [2018-11-14 17:31:31,322 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2896#true} {2896#true} #32#return; {2896#true} is VALID [2018-11-14 17:31:31,322 INFO L256 TraceCheckUtils]: 3: Hoare triple {2896#true} call #t~ret1 := main(); {2896#true} is VALID [2018-11-14 17:31:31,323 INFO L273 TraceCheckUtils]: 4: Hoare triple {2896#true} ~x~0 := 1;~y~0 := 0; {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:31,323 INFO L273 TraceCheckUtils]: 5: Hoare triple {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:31,324 INFO L273 TraceCheckUtils]: 6: Hoare triple {2898#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:31,324 INFO L273 TraceCheckUtils]: 7: Hoare triple {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:31,325 INFO L273 TraceCheckUtils]: 8: Hoare triple {2899#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:31,325 INFO L273 TraceCheckUtils]: 9: Hoare triple {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:31,326 INFO L273 TraceCheckUtils]: 10: Hoare triple {2900#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:31,327 INFO L273 TraceCheckUtils]: 11: Hoare triple {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:31,328 INFO L273 TraceCheckUtils]: 12: Hoare triple {2901#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:31,328 INFO L273 TraceCheckUtils]: 13: Hoare triple {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:31,329 INFO L273 TraceCheckUtils]: 14: Hoare triple {2902#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:31,330 INFO L273 TraceCheckUtils]: 15: Hoare triple {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:31,331 INFO L273 TraceCheckUtils]: 16: Hoare triple {2903#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:31,332 INFO L273 TraceCheckUtils]: 17: Hoare triple {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:31,333 INFO L273 TraceCheckUtils]: 18: Hoare triple {2904#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:31,333 INFO L273 TraceCheckUtils]: 19: Hoare triple {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:31,334 INFO L273 TraceCheckUtils]: 20: Hoare triple {2905#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:31,335 INFO L273 TraceCheckUtils]: 21: Hoare triple {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:31,353 INFO L273 TraceCheckUtils]: 22: Hoare triple {2906#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:31,362 INFO L273 TraceCheckUtils]: 23: Hoare triple {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:31,373 INFO L273 TraceCheckUtils]: 24: Hoare triple {2907#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:31,375 INFO L273 TraceCheckUtils]: 25: Hoare triple {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:31,375 INFO L273 TraceCheckUtils]: 26: Hoare triple {2908#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:31,393 INFO L273 TraceCheckUtils]: 27: Hoare triple {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:31,399 INFO L273 TraceCheckUtils]: 28: Hoare triple {2909#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:31,399 INFO L273 TraceCheckUtils]: 29: Hoare triple {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:31,400 INFO L273 TraceCheckUtils]: 30: Hoare triple {2910#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3005#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:31,400 INFO L273 TraceCheckUtils]: 31: Hoare triple {3005#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3005#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:31,401 INFO L273 TraceCheckUtils]: 32: Hoare triple {3005#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {2897#false} is VALID [2018-11-14 17:31:31,401 INFO L256 TraceCheckUtils]: 33: Hoare triple {2897#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {2897#false} is VALID [2018-11-14 17:31:31,401 INFO L273 TraceCheckUtils]: 34: Hoare triple {2897#false} ~cond := #in~cond; {2897#false} is VALID [2018-11-14 17:31:31,401 INFO L273 TraceCheckUtils]: 35: Hoare triple {2897#false} assume ~cond == 0; {2897#false} is VALID [2018-11-14 17:31:31,402 INFO L273 TraceCheckUtils]: 36: Hoare triple {2897#false} assume !false; {2897#false} is VALID [2018-11-14 17:31:31,403 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:31,423 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:31,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-11-14 17:31:31,424 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 37 [2018-11-14 17:31:31,424 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:31,424 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-14 17:31:31,462 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:31,463 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-14 17:31:31,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-14 17:31:31,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-11-14 17:31:31,464 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 17 states. [2018-11-14 17:31:32,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:32,249 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-11-14 17:31:32,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-14 17:31:32,250 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 37 [2018-11-14 17:31:32,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:32,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-14 17:31:32,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 45 transitions. [2018-11-14 17:31:32,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-14 17:31:32,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 45 transitions. [2018-11-14 17:31:32,253 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states and 45 transitions. [2018-11-14 17:31:32,295 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:32,296 INFO L225 Difference]: With dead ends: 45 [2018-11-14 17:31:32,296 INFO L226 Difference]: Without dead ends: 40 [2018-11-14 17:31:32,297 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2018-11-14 17:31:32,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-14 17:31:32,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-11-14 17:31:32,326 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:32,326 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 40 states. [2018-11-14 17:31:32,326 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-14 17:31:32,326 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-14 17:31:32,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:32,327 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-11-14 17:31:32,327 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-11-14 17:31:32,328 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:32,328 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:32,328 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-14 17:31:32,328 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-14 17:31:32,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:32,329 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-11-14 17:31:32,329 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-11-14 17:31:32,329 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:32,329 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:32,329 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:32,329 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:32,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-14 17:31:32,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-11-14 17:31:32,330 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 37 [2018-11-14 17:31:32,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:32,330 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-11-14 17:31:32,330 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-14 17:31:32,330 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-11-14 17:31:32,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-14 17:31:32,331 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:32,331 INFO L375 BasicCegarLoop]: trace histogram [15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:32,331 INFO L423 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:32,331 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:32,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1714997740, now seen corresponding path program 14 times [2018-11-14 17:31:32,332 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:32,332 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:32,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:32,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:32,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:32,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:32,670 INFO L256 TraceCheckUtils]: 0: Hoare triple {3232#true} call ULTIMATE.init(); {3232#true} is VALID [2018-11-14 17:31:32,670 INFO L273 TraceCheckUtils]: 1: Hoare triple {3232#true} assume true; {3232#true} is VALID [2018-11-14 17:31:32,671 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3232#true} {3232#true} #32#return; {3232#true} is VALID [2018-11-14 17:31:32,671 INFO L256 TraceCheckUtils]: 3: Hoare triple {3232#true} call #t~ret1 := main(); {3232#true} is VALID [2018-11-14 17:31:32,671 INFO L273 TraceCheckUtils]: 4: Hoare triple {3232#true} ~x~0 := 1;~y~0 := 0; {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:32,672 INFO L273 TraceCheckUtils]: 5: Hoare triple {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:32,673 INFO L273 TraceCheckUtils]: 6: Hoare triple {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:32,673 INFO L273 TraceCheckUtils]: 7: Hoare triple {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:32,674 INFO L273 TraceCheckUtils]: 8: Hoare triple {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:32,675 INFO L273 TraceCheckUtils]: 9: Hoare triple {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:32,676 INFO L273 TraceCheckUtils]: 10: Hoare triple {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:32,677 INFO L273 TraceCheckUtils]: 11: Hoare triple {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:32,678 INFO L273 TraceCheckUtils]: 12: Hoare triple {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:32,678 INFO L273 TraceCheckUtils]: 13: Hoare triple {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:32,679 INFO L273 TraceCheckUtils]: 14: Hoare triple {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:32,680 INFO L273 TraceCheckUtils]: 15: Hoare triple {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:32,681 INFO L273 TraceCheckUtils]: 16: Hoare triple {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:32,682 INFO L273 TraceCheckUtils]: 17: Hoare triple {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:32,683 INFO L273 TraceCheckUtils]: 18: Hoare triple {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:32,684 INFO L273 TraceCheckUtils]: 19: Hoare triple {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:32,685 INFO L273 TraceCheckUtils]: 20: Hoare triple {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:32,685 INFO L273 TraceCheckUtils]: 21: Hoare triple {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:32,686 INFO L273 TraceCheckUtils]: 22: Hoare triple {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:32,687 INFO L273 TraceCheckUtils]: 23: Hoare triple {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:32,688 INFO L273 TraceCheckUtils]: 24: Hoare triple {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:32,689 INFO L273 TraceCheckUtils]: 25: Hoare triple {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:32,690 INFO L273 TraceCheckUtils]: 26: Hoare triple {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:32,690 INFO L273 TraceCheckUtils]: 27: Hoare triple {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:32,691 INFO L273 TraceCheckUtils]: 28: Hoare triple {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:32,692 INFO L273 TraceCheckUtils]: 29: Hoare triple {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:32,693 INFO L273 TraceCheckUtils]: 30: Hoare triple {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:32,694 INFO L273 TraceCheckUtils]: 31: Hoare triple {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:32,695 INFO L273 TraceCheckUtils]: 32: Hoare triple {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3248#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 14))} is VALID [2018-11-14 17:31:32,696 INFO L273 TraceCheckUtils]: 33: Hoare triple {3248#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 14))} assume true; {3248#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 14))} is VALID [2018-11-14 17:31:32,697 INFO L273 TraceCheckUtils]: 34: Hoare triple {3248#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 14))} assume !(~y~0 % 4294967296 < 1024); {3233#false} is VALID [2018-11-14 17:31:32,697 INFO L256 TraceCheckUtils]: 35: Hoare triple {3233#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {3233#false} is VALID [2018-11-14 17:31:32,697 INFO L273 TraceCheckUtils]: 36: Hoare triple {3233#false} ~cond := #in~cond; {3233#false} is VALID [2018-11-14 17:31:32,697 INFO L273 TraceCheckUtils]: 37: Hoare triple {3233#false} assume ~cond == 0; {3233#false} is VALID [2018-11-14 17:31:32,698 INFO L273 TraceCheckUtils]: 38: Hoare triple {3233#false} assume !false; {3233#false} is VALID [2018-11-14 17:31:32,700 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:32,701 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:32,701 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:32,710 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-14 17:31:32,729 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:31:32,729 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:32,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:32,740 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:32,872 INFO L256 TraceCheckUtils]: 0: Hoare triple {3232#true} call ULTIMATE.init(); {3232#true} is VALID [2018-11-14 17:31:32,872 INFO L273 TraceCheckUtils]: 1: Hoare triple {3232#true} assume true; {3232#true} is VALID [2018-11-14 17:31:32,872 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3232#true} {3232#true} #32#return; {3232#true} is VALID [2018-11-14 17:31:32,872 INFO L256 TraceCheckUtils]: 3: Hoare triple {3232#true} call #t~ret1 := main(); {3232#true} is VALID [2018-11-14 17:31:32,873 INFO L273 TraceCheckUtils]: 4: Hoare triple {3232#true} ~x~0 := 1;~y~0 := 0; {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:32,873 INFO L273 TraceCheckUtils]: 5: Hoare triple {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:32,874 INFO L273 TraceCheckUtils]: 6: Hoare triple {3234#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:32,874 INFO L273 TraceCheckUtils]: 7: Hoare triple {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:32,875 INFO L273 TraceCheckUtils]: 8: Hoare triple {3235#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:32,875 INFO L273 TraceCheckUtils]: 9: Hoare triple {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:32,876 INFO L273 TraceCheckUtils]: 10: Hoare triple {3236#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:32,876 INFO L273 TraceCheckUtils]: 11: Hoare triple {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:32,877 INFO L273 TraceCheckUtils]: 12: Hoare triple {3237#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:32,878 INFO L273 TraceCheckUtils]: 13: Hoare triple {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:32,879 INFO L273 TraceCheckUtils]: 14: Hoare triple {3238#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:32,880 INFO L273 TraceCheckUtils]: 15: Hoare triple {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:32,881 INFO L273 TraceCheckUtils]: 16: Hoare triple {3239#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:32,881 INFO L273 TraceCheckUtils]: 17: Hoare triple {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:32,882 INFO L273 TraceCheckUtils]: 18: Hoare triple {3240#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:32,883 INFO L273 TraceCheckUtils]: 19: Hoare triple {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:32,884 INFO L273 TraceCheckUtils]: 20: Hoare triple {3241#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:32,885 INFO L273 TraceCheckUtils]: 21: Hoare triple {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:32,886 INFO L273 TraceCheckUtils]: 22: Hoare triple {3242#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:32,886 INFO L273 TraceCheckUtils]: 23: Hoare triple {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:32,888 INFO L273 TraceCheckUtils]: 24: Hoare triple {3243#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:32,888 INFO L273 TraceCheckUtils]: 25: Hoare triple {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:32,889 INFO L273 TraceCheckUtils]: 26: Hoare triple {3244#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:32,890 INFO L273 TraceCheckUtils]: 27: Hoare triple {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:32,891 INFO L273 TraceCheckUtils]: 28: Hoare triple {3245#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:32,892 INFO L273 TraceCheckUtils]: 29: Hoare triple {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:32,893 INFO L273 TraceCheckUtils]: 30: Hoare triple {3246#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:32,893 INFO L273 TraceCheckUtils]: 31: Hoare triple {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:32,894 INFO L273 TraceCheckUtils]: 32: Hoare triple {3247#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3348#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:32,895 INFO L273 TraceCheckUtils]: 33: Hoare triple {3348#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {3348#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:32,896 INFO L273 TraceCheckUtils]: 34: Hoare triple {3348#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {3233#false} is VALID [2018-11-14 17:31:32,896 INFO L256 TraceCheckUtils]: 35: Hoare triple {3233#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {3233#false} is VALID [2018-11-14 17:31:32,896 INFO L273 TraceCheckUtils]: 36: Hoare triple {3233#false} ~cond := #in~cond; {3233#false} is VALID [2018-11-14 17:31:32,897 INFO L273 TraceCheckUtils]: 37: Hoare triple {3233#false} assume ~cond == 0; {3233#false} is VALID [2018-11-14 17:31:32,897 INFO L273 TraceCheckUtils]: 38: Hoare triple {3233#false} assume !false; {3233#false} is VALID [2018-11-14 17:31:32,900 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:32,920 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:32,920 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-11-14 17:31:32,920 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-11-14 17:31:32,920 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:32,920 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-14 17:31:32,960 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:32,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-14 17:31:32,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-14 17:31:32,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-14 17:31:32,962 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 18 states. [2018-11-14 17:31:34,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:34,440 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-11-14 17:31:34,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-14 17:31:34,441 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 39 [2018-11-14 17:31:34,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:34,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 17:31:34,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 47 transitions. [2018-11-14 17:31:34,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-14 17:31:34,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 47 transitions. [2018-11-14 17:31:34,444 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 47 transitions. [2018-11-14 17:31:34,878 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:34,879 INFO L225 Difference]: With dead ends: 47 [2018-11-14 17:31:34,880 INFO L226 Difference]: Without dead ends: 42 [2018-11-14 17:31:34,880 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=258, Unknown=0, NotChecked=0, Total=306 [2018-11-14 17:31:34,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-11-14 17:31:34,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-11-14 17:31:34,905 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:34,905 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand 42 states. [2018-11-14 17:31:34,905 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand 42 states. [2018-11-14 17:31:34,905 INFO L87 Difference]: Start difference. First operand 42 states. Second operand 42 states. [2018-11-14 17:31:34,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:34,906 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-11-14 17:31:34,907 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-11-14 17:31:34,907 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:34,907 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:34,907 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand 42 states. [2018-11-14 17:31:34,907 INFO L87 Difference]: Start difference. First operand 42 states. Second operand 42 states. [2018-11-14 17:31:34,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:34,908 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-11-14 17:31:34,908 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-11-14 17:31:34,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:34,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:34,908 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:34,909 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:34,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-11-14 17:31:34,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-11-14 17:31:34,909 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 39 [2018-11-14 17:31:34,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:34,910 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-11-14 17:31:34,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-14 17:31:34,910 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-11-14 17:31:34,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-14 17:31:34,910 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:34,910 INFO L375 BasicCegarLoop]: trace histogram [16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:34,910 INFO L423 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:34,911 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:34,911 INFO L82 PathProgramCache]: Analyzing trace with hash -159627982, now seen corresponding path program 15 times [2018-11-14 17:31:34,911 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:34,911 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:34,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:34,912 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:34,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:34,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:35,315 INFO L256 TraceCheckUtils]: 0: Hoare triple {3585#true} call ULTIMATE.init(); {3585#true} is VALID [2018-11-14 17:31:35,315 INFO L273 TraceCheckUtils]: 1: Hoare triple {3585#true} assume true; {3585#true} is VALID [2018-11-14 17:31:35,315 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3585#true} {3585#true} #32#return; {3585#true} is VALID [2018-11-14 17:31:35,316 INFO L256 TraceCheckUtils]: 3: Hoare triple {3585#true} call #t~ret1 := main(); {3585#true} is VALID [2018-11-14 17:31:35,321 INFO L273 TraceCheckUtils]: 4: Hoare triple {3585#true} ~x~0 := 1;~y~0 := 0; {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:35,321 INFO L273 TraceCheckUtils]: 5: Hoare triple {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:35,322 INFO L273 TraceCheckUtils]: 6: Hoare triple {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:35,323 INFO L273 TraceCheckUtils]: 7: Hoare triple {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:35,323 INFO L273 TraceCheckUtils]: 8: Hoare triple {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:35,324 INFO L273 TraceCheckUtils]: 9: Hoare triple {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:35,324 INFO L273 TraceCheckUtils]: 10: Hoare triple {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:35,325 INFO L273 TraceCheckUtils]: 11: Hoare triple {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:35,325 INFO L273 TraceCheckUtils]: 12: Hoare triple {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:35,326 INFO L273 TraceCheckUtils]: 13: Hoare triple {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:35,327 INFO L273 TraceCheckUtils]: 14: Hoare triple {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:35,327 INFO L273 TraceCheckUtils]: 15: Hoare triple {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:35,328 INFO L273 TraceCheckUtils]: 16: Hoare triple {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:35,329 INFO L273 TraceCheckUtils]: 17: Hoare triple {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:35,330 INFO L273 TraceCheckUtils]: 18: Hoare triple {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:35,331 INFO L273 TraceCheckUtils]: 19: Hoare triple {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:35,332 INFO L273 TraceCheckUtils]: 20: Hoare triple {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:35,332 INFO L273 TraceCheckUtils]: 21: Hoare triple {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:35,333 INFO L273 TraceCheckUtils]: 22: Hoare triple {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:35,334 INFO L273 TraceCheckUtils]: 23: Hoare triple {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:35,335 INFO L273 TraceCheckUtils]: 24: Hoare triple {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:35,336 INFO L273 TraceCheckUtils]: 25: Hoare triple {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:35,337 INFO L273 TraceCheckUtils]: 26: Hoare triple {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:35,337 INFO L273 TraceCheckUtils]: 27: Hoare triple {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:35,360 INFO L273 TraceCheckUtils]: 28: Hoare triple {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:35,374 INFO L273 TraceCheckUtils]: 29: Hoare triple {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:35,383 INFO L273 TraceCheckUtils]: 30: Hoare triple {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:35,396 INFO L273 TraceCheckUtils]: 31: Hoare triple {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:35,405 INFO L273 TraceCheckUtils]: 32: Hoare triple {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:35,417 INFO L273 TraceCheckUtils]: 33: Hoare triple {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:35,426 INFO L273 TraceCheckUtils]: 34: Hoare triple {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3602#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:35,441 INFO L273 TraceCheckUtils]: 35: Hoare triple {3602#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 15))} assume true; {3602#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:35,448 INFO L273 TraceCheckUtils]: 36: Hoare triple {3602#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 15))} assume !(~y~0 % 4294967296 < 1024); {3586#false} is VALID [2018-11-14 17:31:35,448 INFO L256 TraceCheckUtils]: 37: Hoare triple {3586#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {3586#false} is VALID [2018-11-14 17:31:35,448 INFO L273 TraceCheckUtils]: 38: Hoare triple {3586#false} ~cond := #in~cond; {3586#false} is VALID [2018-11-14 17:31:35,448 INFO L273 TraceCheckUtils]: 39: Hoare triple {3586#false} assume ~cond == 0; {3586#false} is VALID [2018-11-14 17:31:35,448 INFO L273 TraceCheckUtils]: 40: Hoare triple {3586#false} assume !false; {3586#false} is VALID [2018-11-14 17:31:35,451 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:35,451 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:35,451 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:35,459 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-14 17:31:35,834 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-11-14 17:31:35,835 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:35,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:35,867 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:36,061 INFO L256 TraceCheckUtils]: 0: Hoare triple {3585#true} call ULTIMATE.init(); {3585#true} is VALID [2018-11-14 17:31:36,061 INFO L273 TraceCheckUtils]: 1: Hoare triple {3585#true} assume true; {3585#true} is VALID [2018-11-14 17:31:36,061 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3585#true} {3585#true} #32#return; {3585#true} is VALID [2018-11-14 17:31:36,062 INFO L256 TraceCheckUtils]: 3: Hoare triple {3585#true} call #t~ret1 := main(); {3585#true} is VALID [2018-11-14 17:31:36,062 INFO L273 TraceCheckUtils]: 4: Hoare triple {3585#true} ~x~0 := 1;~y~0 := 0; {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:36,062 INFO L273 TraceCheckUtils]: 5: Hoare triple {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:36,063 INFO L273 TraceCheckUtils]: 6: Hoare triple {3587#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:36,063 INFO L273 TraceCheckUtils]: 7: Hoare triple {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:36,064 INFO L273 TraceCheckUtils]: 8: Hoare triple {3588#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:36,064 INFO L273 TraceCheckUtils]: 9: Hoare triple {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:36,065 INFO L273 TraceCheckUtils]: 10: Hoare triple {3589#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:36,066 INFO L273 TraceCheckUtils]: 11: Hoare triple {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:36,067 INFO L273 TraceCheckUtils]: 12: Hoare triple {3590#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:36,083 INFO L273 TraceCheckUtils]: 13: Hoare triple {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:36,084 INFO L273 TraceCheckUtils]: 14: Hoare triple {3591#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:36,084 INFO L273 TraceCheckUtils]: 15: Hoare triple {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:36,085 INFO L273 TraceCheckUtils]: 16: Hoare triple {3592#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:36,085 INFO L273 TraceCheckUtils]: 17: Hoare triple {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:36,086 INFO L273 TraceCheckUtils]: 18: Hoare triple {3593#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:36,086 INFO L273 TraceCheckUtils]: 19: Hoare triple {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:36,087 INFO L273 TraceCheckUtils]: 20: Hoare triple {3594#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:36,088 INFO L273 TraceCheckUtils]: 21: Hoare triple {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:36,089 INFO L273 TraceCheckUtils]: 22: Hoare triple {3595#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:36,089 INFO L273 TraceCheckUtils]: 23: Hoare triple {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:36,090 INFO L273 TraceCheckUtils]: 24: Hoare triple {3596#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:36,091 INFO L273 TraceCheckUtils]: 25: Hoare triple {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:36,092 INFO L273 TraceCheckUtils]: 26: Hoare triple {3597#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:36,093 INFO L273 TraceCheckUtils]: 27: Hoare triple {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:36,094 INFO L273 TraceCheckUtils]: 28: Hoare triple {3598#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:36,094 INFO L273 TraceCheckUtils]: 29: Hoare triple {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:36,095 INFO L273 TraceCheckUtils]: 30: Hoare triple {3599#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:36,096 INFO L273 TraceCheckUtils]: 31: Hoare triple {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:36,097 INFO L273 TraceCheckUtils]: 32: Hoare triple {3600#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:36,098 INFO L273 TraceCheckUtils]: 33: Hoare triple {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:36,099 INFO L273 TraceCheckUtils]: 34: Hoare triple {3601#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3708#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:36,099 INFO L273 TraceCheckUtils]: 35: Hoare triple {3708#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {3708#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:36,100 INFO L273 TraceCheckUtils]: 36: Hoare triple {3708#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !(~y~0 % 4294967296 < 1024); {3586#false} is VALID [2018-11-14 17:31:36,100 INFO L256 TraceCheckUtils]: 37: Hoare triple {3586#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {3586#false} is VALID [2018-11-14 17:31:36,101 INFO L273 TraceCheckUtils]: 38: Hoare triple {3586#false} ~cond := #in~cond; {3586#false} is VALID [2018-11-14 17:31:36,101 INFO L273 TraceCheckUtils]: 39: Hoare triple {3586#false} assume ~cond == 0; {3586#false} is VALID [2018-11-14 17:31:36,101 INFO L273 TraceCheckUtils]: 40: Hoare triple {3586#false} assume !false; {3586#false} is VALID [2018-11-14 17:31:36,105 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:36,126 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:36,126 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-11-14 17:31:36,126 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 41 [2018-11-14 17:31:36,127 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:36,127 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-14 17:31:36,169 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:36,170 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-14 17:31:36,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-14 17:31:36,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-11-14 17:31:36,171 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 19 states. [2018-11-14 17:31:37,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:37,212 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-11-14 17:31:37,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-14 17:31:37,212 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 41 [2018-11-14 17:31:37,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:37,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 17:31:37,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 49 transitions. [2018-11-14 17:31:37,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-14 17:31:37,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 49 transitions. [2018-11-14 17:31:37,215 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 49 transitions. [2018-11-14 17:31:37,274 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:37,276 INFO L225 Difference]: With dead ends: 49 [2018-11-14 17:31:37,276 INFO L226 Difference]: Without dead ends: 44 [2018-11-14 17:31:37,277 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-11-14 17:31:37,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-11-14 17:31:37,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-11-14 17:31:37,321 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:37,321 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand 44 states. [2018-11-14 17:31:37,321 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 44 states. [2018-11-14 17:31:37,321 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 44 states. [2018-11-14 17:31:37,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:37,323 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-11-14 17:31:37,323 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-11-14 17:31:37,323 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:37,323 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:37,323 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 44 states. [2018-11-14 17:31:37,323 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 44 states. [2018-11-14 17:31:37,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:37,324 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-11-14 17:31:37,324 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-11-14 17:31:37,325 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:37,325 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:37,325 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:37,325 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:37,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-14 17:31:37,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-11-14 17:31:37,326 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 41 [2018-11-14 17:31:37,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:37,327 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-11-14 17:31:37,327 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-14 17:31:37,327 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-11-14 17:31:37,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-14 17:31:37,328 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:37,328 INFO L375 BasicCegarLoop]: trace histogram [17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:37,328 INFO L423 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:37,328 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:37,328 INFO L82 PathProgramCache]: Analyzing trace with hash -2083649800, now seen corresponding path program 16 times [2018-11-14 17:31:37,329 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:37,329 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:37,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:37,330 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:37,330 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:37,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:37,915 INFO L256 TraceCheckUtils]: 0: Hoare triple {3955#true} call ULTIMATE.init(); {3955#true} is VALID [2018-11-14 17:31:37,915 INFO L273 TraceCheckUtils]: 1: Hoare triple {3955#true} assume true; {3955#true} is VALID [2018-11-14 17:31:37,916 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3955#true} {3955#true} #32#return; {3955#true} is VALID [2018-11-14 17:31:37,916 INFO L256 TraceCheckUtils]: 3: Hoare triple {3955#true} call #t~ret1 := main(); {3955#true} is VALID [2018-11-14 17:31:37,916 INFO L273 TraceCheckUtils]: 4: Hoare triple {3955#true} ~x~0 := 1;~y~0 := 0; {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:37,917 INFO L273 TraceCheckUtils]: 5: Hoare triple {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:37,917 INFO L273 TraceCheckUtils]: 6: Hoare triple {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:37,918 INFO L273 TraceCheckUtils]: 7: Hoare triple {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:37,919 INFO L273 TraceCheckUtils]: 8: Hoare triple {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:37,919 INFO L273 TraceCheckUtils]: 9: Hoare triple {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:37,920 INFO L273 TraceCheckUtils]: 10: Hoare triple {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:37,921 INFO L273 TraceCheckUtils]: 11: Hoare triple {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:37,922 INFO L273 TraceCheckUtils]: 12: Hoare triple {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:37,923 INFO L273 TraceCheckUtils]: 13: Hoare triple {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:37,924 INFO L273 TraceCheckUtils]: 14: Hoare triple {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:37,924 INFO L273 TraceCheckUtils]: 15: Hoare triple {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:37,925 INFO L273 TraceCheckUtils]: 16: Hoare triple {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:37,926 INFO L273 TraceCheckUtils]: 17: Hoare triple {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:37,927 INFO L273 TraceCheckUtils]: 18: Hoare triple {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:37,928 INFO L273 TraceCheckUtils]: 19: Hoare triple {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:37,929 INFO L273 TraceCheckUtils]: 20: Hoare triple {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:37,929 INFO L273 TraceCheckUtils]: 21: Hoare triple {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:37,930 INFO L273 TraceCheckUtils]: 22: Hoare triple {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:37,931 INFO L273 TraceCheckUtils]: 23: Hoare triple {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:37,932 INFO L273 TraceCheckUtils]: 24: Hoare triple {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:37,933 INFO L273 TraceCheckUtils]: 25: Hoare triple {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:37,934 INFO L273 TraceCheckUtils]: 26: Hoare triple {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:37,935 INFO L273 TraceCheckUtils]: 27: Hoare triple {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:37,936 INFO L273 TraceCheckUtils]: 28: Hoare triple {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:37,936 INFO L273 TraceCheckUtils]: 29: Hoare triple {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:37,937 INFO L273 TraceCheckUtils]: 30: Hoare triple {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:37,938 INFO L273 TraceCheckUtils]: 31: Hoare triple {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:37,939 INFO L273 TraceCheckUtils]: 32: Hoare triple {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:37,940 INFO L273 TraceCheckUtils]: 33: Hoare triple {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:37,941 INFO L273 TraceCheckUtils]: 34: Hoare triple {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:37,941 INFO L273 TraceCheckUtils]: 35: Hoare triple {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:37,942 INFO L273 TraceCheckUtils]: 36: Hoare triple {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3973#(and (<= main_~y~0 16) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:37,943 INFO L273 TraceCheckUtils]: 37: Hoare triple {3973#(and (<= main_~y~0 16) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume true; {3973#(and (<= main_~y~0 16) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:31:37,944 INFO L273 TraceCheckUtils]: 38: Hoare triple {3973#(and (<= main_~y~0 16) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {3956#false} is VALID [2018-11-14 17:31:37,944 INFO L256 TraceCheckUtils]: 39: Hoare triple {3956#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {3956#false} is VALID [2018-11-14 17:31:37,945 INFO L273 TraceCheckUtils]: 40: Hoare triple {3956#false} ~cond := #in~cond; {3956#false} is VALID [2018-11-14 17:31:37,945 INFO L273 TraceCheckUtils]: 41: Hoare triple {3956#false} assume ~cond == 0; {3956#false} is VALID [2018-11-14 17:31:37,945 INFO L273 TraceCheckUtils]: 42: Hoare triple {3956#false} assume !false; {3956#false} is VALID [2018-11-14 17:31:37,948 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:37,949 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:37,949 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:37,957 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 17:31:37,974 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 17:31:37,974 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:38,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:38,007 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:38,306 INFO L256 TraceCheckUtils]: 0: Hoare triple {3955#true} call ULTIMATE.init(); {3955#true} is VALID [2018-11-14 17:31:38,307 INFO L273 TraceCheckUtils]: 1: Hoare triple {3955#true} assume true; {3955#true} is VALID [2018-11-14 17:31:38,307 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {3955#true} {3955#true} #32#return; {3955#true} is VALID [2018-11-14 17:31:38,307 INFO L256 TraceCheckUtils]: 3: Hoare triple {3955#true} call #t~ret1 := main(); {3955#true} is VALID [2018-11-14 17:31:38,308 INFO L273 TraceCheckUtils]: 4: Hoare triple {3955#true} ~x~0 := 1;~y~0 := 0; {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:38,308 INFO L273 TraceCheckUtils]: 5: Hoare triple {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:38,309 INFO L273 TraceCheckUtils]: 6: Hoare triple {3957#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:38,309 INFO L273 TraceCheckUtils]: 7: Hoare triple {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:38,310 INFO L273 TraceCheckUtils]: 8: Hoare triple {3958#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:38,310 INFO L273 TraceCheckUtils]: 9: Hoare triple {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:38,311 INFO L273 TraceCheckUtils]: 10: Hoare triple {3959#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:38,311 INFO L273 TraceCheckUtils]: 11: Hoare triple {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:38,312 INFO L273 TraceCheckUtils]: 12: Hoare triple {3960#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:38,313 INFO L273 TraceCheckUtils]: 13: Hoare triple {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:38,314 INFO L273 TraceCheckUtils]: 14: Hoare triple {3961#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:38,315 INFO L273 TraceCheckUtils]: 15: Hoare triple {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:38,316 INFO L273 TraceCheckUtils]: 16: Hoare triple {3962#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:38,316 INFO L273 TraceCheckUtils]: 17: Hoare triple {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:38,318 INFO L273 TraceCheckUtils]: 18: Hoare triple {3963#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:38,318 INFO L273 TraceCheckUtils]: 19: Hoare triple {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:38,319 INFO L273 TraceCheckUtils]: 20: Hoare triple {3964#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:38,320 INFO L273 TraceCheckUtils]: 21: Hoare triple {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:38,321 INFO L273 TraceCheckUtils]: 22: Hoare triple {3965#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:38,322 INFO L273 TraceCheckUtils]: 23: Hoare triple {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:38,323 INFO L273 TraceCheckUtils]: 24: Hoare triple {3966#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:38,323 INFO L273 TraceCheckUtils]: 25: Hoare triple {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:38,324 INFO L273 TraceCheckUtils]: 26: Hoare triple {3967#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:38,325 INFO L273 TraceCheckUtils]: 27: Hoare triple {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:38,326 INFO L273 TraceCheckUtils]: 28: Hoare triple {3968#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:38,327 INFO L273 TraceCheckUtils]: 29: Hoare triple {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:38,328 INFO L273 TraceCheckUtils]: 30: Hoare triple {3969#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:38,328 INFO L273 TraceCheckUtils]: 31: Hoare triple {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:38,329 INFO L273 TraceCheckUtils]: 32: Hoare triple {3970#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:38,330 INFO L273 TraceCheckUtils]: 33: Hoare triple {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:38,331 INFO L273 TraceCheckUtils]: 34: Hoare triple {3971#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:38,332 INFO L273 TraceCheckUtils]: 35: Hoare triple {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:38,333 INFO L273 TraceCheckUtils]: 36: Hoare triple {3972#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4085#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:38,333 INFO L273 TraceCheckUtils]: 37: Hoare triple {4085#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {4085#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:38,334 INFO L273 TraceCheckUtils]: 38: Hoare triple {4085#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {3956#false} is VALID [2018-11-14 17:31:38,335 INFO L256 TraceCheckUtils]: 39: Hoare triple {3956#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {3956#false} is VALID [2018-11-14 17:31:38,335 INFO L273 TraceCheckUtils]: 40: Hoare triple {3956#false} ~cond := #in~cond; {3956#false} is VALID [2018-11-14 17:31:38,335 INFO L273 TraceCheckUtils]: 41: Hoare triple {3956#false} assume ~cond == 0; {3956#false} is VALID [2018-11-14 17:31:38,335 INFO L273 TraceCheckUtils]: 42: Hoare triple {3956#false} assume !false; {3956#false} is VALID [2018-11-14 17:31:38,340 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:38,363 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:38,363 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-11-14 17:31:38,363 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 43 [2018-11-14 17:31:38,364 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:38,364 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-14 17:31:38,408 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:38,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-14 17:31:38,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-14 17:31:38,409 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-11-14 17:31:38,410 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 20 states. [2018-11-14 17:31:39,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:39,588 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-11-14 17:31:39,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-14 17:31:39,589 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 43 [2018-11-14 17:31:39,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:39,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 17:31:39,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 51 transitions. [2018-11-14 17:31:39,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-14 17:31:39,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 51 transitions. [2018-11-14 17:31:39,592 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states and 51 transitions. [2018-11-14 17:31:39,692 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:39,693 INFO L225 Difference]: With dead ends: 51 [2018-11-14 17:31:39,693 INFO L226 Difference]: Without dead ends: 46 [2018-11-14 17:31:39,694 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 42 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=54, Invalid=326, Unknown=0, NotChecked=0, Total=380 [2018-11-14 17:31:39,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-11-14 17:31:39,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-11-14 17:31:39,729 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:39,729 INFO L82 GeneralOperation]: Start isEquivalent. First operand 46 states. Second operand 46 states. [2018-11-14 17:31:39,729 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand 46 states. [2018-11-14 17:31:39,729 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 46 states. [2018-11-14 17:31:39,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:39,731 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-11-14 17:31:39,731 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-11-14 17:31:39,731 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:39,732 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:39,732 INFO L74 IsIncluded]: Start isIncluded. First operand 46 states. Second operand 46 states. [2018-11-14 17:31:39,732 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 46 states. [2018-11-14 17:31:39,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:39,734 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-11-14 17:31:39,734 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-11-14 17:31:39,734 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:39,734 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:39,734 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:39,734 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:39,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-11-14 17:31:39,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-11-14 17:31:39,736 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 43 [2018-11-14 17:31:39,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:39,736 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-11-14 17:31:39,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-14 17:31:39,736 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-11-14 17:31:39,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-11-14 17:31:39,737 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:39,737 INFO L375 BasicCegarLoop]: trace histogram [18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:39,737 INFO L423 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:39,737 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:39,738 INFO L82 PathProgramCache]: Analyzing trace with hash 62287678, now seen corresponding path program 17 times [2018-11-14 17:31:39,738 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:39,738 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:39,738 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:39,739 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:39,739 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:39,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:40,601 INFO L256 TraceCheckUtils]: 0: Hoare triple {4342#true} call ULTIMATE.init(); {4342#true} is VALID [2018-11-14 17:31:40,601 INFO L273 TraceCheckUtils]: 1: Hoare triple {4342#true} assume true; {4342#true} is VALID [2018-11-14 17:31:40,601 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4342#true} {4342#true} #32#return; {4342#true} is VALID [2018-11-14 17:31:40,601 INFO L256 TraceCheckUtils]: 3: Hoare triple {4342#true} call #t~ret1 := main(); {4342#true} is VALID [2018-11-14 17:31:40,602 INFO L273 TraceCheckUtils]: 4: Hoare triple {4342#true} ~x~0 := 1;~y~0 := 0; {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:40,602 INFO L273 TraceCheckUtils]: 5: Hoare triple {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:40,603 INFO L273 TraceCheckUtils]: 6: Hoare triple {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:40,603 INFO L273 TraceCheckUtils]: 7: Hoare triple {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:40,604 INFO L273 TraceCheckUtils]: 8: Hoare triple {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:40,605 INFO L273 TraceCheckUtils]: 9: Hoare triple {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:40,606 INFO L273 TraceCheckUtils]: 10: Hoare triple {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:40,607 INFO L273 TraceCheckUtils]: 11: Hoare triple {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:40,607 INFO L273 TraceCheckUtils]: 12: Hoare triple {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:40,608 INFO L273 TraceCheckUtils]: 13: Hoare triple {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:40,609 INFO L273 TraceCheckUtils]: 14: Hoare triple {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:40,610 INFO L273 TraceCheckUtils]: 15: Hoare triple {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:40,611 INFO L273 TraceCheckUtils]: 16: Hoare triple {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:40,612 INFO L273 TraceCheckUtils]: 17: Hoare triple {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:40,612 INFO L273 TraceCheckUtils]: 18: Hoare triple {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:40,613 INFO L273 TraceCheckUtils]: 19: Hoare triple {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:40,614 INFO L273 TraceCheckUtils]: 20: Hoare triple {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:40,615 INFO L273 TraceCheckUtils]: 21: Hoare triple {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:40,616 INFO L273 TraceCheckUtils]: 22: Hoare triple {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:40,616 INFO L273 TraceCheckUtils]: 23: Hoare triple {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:40,617 INFO L273 TraceCheckUtils]: 24: Hoare triple {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:40,618 INFO L273 TraceCheckUtils]: 25: Hoare triple {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:40,619 INFO L273 TraceCheckUtils]: 26: Hoare triple {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:40,619 INFO L273 TraceCheckUtils]: 27: Hoare triple {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:40,620 INFO L273 TraceCheckUtils]: 28: Hoare triple {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:40,621 INFO L273 TraceCheckUtils]: 29: Hoare triple {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:40,622 INFO L273 TraceCheckUtils]: 30: Hoare triple {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:40,623 INFO L273 TraceCheckUtils]: 31: Hoare triple {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:40,624 INFO L273 TraceCheckUtils]: 32: Hoare triple {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:40,624 INFO L273 TraceCheckUtils]: 33: Hoare triple {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:40,625 INFO L273 TraceCheckUtils]: 34: Hoare triple {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:40,626 INFO L273 TraceCheckUtils]: 35: Hoare triple {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:40,627 INFO L273 TraceCheckUtils]: 36: Hoare triple {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:40,627 INFO L273 TraceCheckUtils]: 37: Hoare triple {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:40,628 INFO L273 TraceCheckUtils]: 38: Hoare triple {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4361#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 17))} is VALID [2018-11-14 17:31:40,629 INFO L273 TraceCheckUtils]: 39: Hoare triple {4361#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 17))} assume true; {4361#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 17))} is VALID [2018-11-14 17:31:40,630 INFO L273 TraceCheckUtils]: 40: Hoare triple {4361#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 17))} assume !(~y~0 % 4294967296 < 1024); {4343#false} is VALID [2018-11-14 17:31:40,630 INFO L256 TraceCheckUtils]: 41: Hoare triple {4343#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {4343#false} is VALID [2018-11-14 17:31:40,630 INFO L273 TraceCheckUtils]: 42: Hoare triple {4343#false} ~cond := #in~cond; {4343#false} is VALID [2018-11-14 17:31:40,631 INFO L273 TraceCheckUtils]: 43: Hoare triple {4343#false} assume ~cond == 0; {4343#false} is VALID [2018-11-14 17:31:40,631 INFO L273 TraceCheckUtils]: 44: Hoare triple {4343#false} assume !false; {4343#false} is VALID [2018-11-14 17:31:40,635 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:40,635 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:40,635 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:40,645 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-11-14 17:31:49,756 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-11-14 17:31:49,757 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:49,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:49,774 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:50,101 INFO L256 TraceCheckUtils]: 0: Hoare triple {4342#true} call ULTIMATE.init(); {4342#true} is VALID [2018-11-14 17:31:50,102 INFO L273 TraceCheckUtils]: 1: Hoare triple {4342#true} assume true; {4342#true} is VALID [2018-11-14 17:31:50,102 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4342#true} {4342#true} #32#return; {4342#true} is VALID [2018-11-14 17:31:50,102 INFO L256 TraceCheckUtils]: 3: Hoare triple {4342#true} call #t~ret1 := main(); {4342#true} is VALID [2018-11-14 17:31:50,102 INFO L273 TraceCheckUtils]: 4: Hoare triple {4342#true} ~x~0 := 1;~y~0 := 0; {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:50,103 INFO L273 TraceCheckUtils]: 5: Hoare triple {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:50,104 INFO L273 TraceCheckUtils]: 6: Hoare triple {4344#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:50,104 INFO L273 TraceCheckUtils]: 7: Hoare triple {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:50,105 INFO L273 TraceCheckUtils]: 8: Hoare triple {4345#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:50,105 INFO L273 TraceCheckUtils]: 9: Hoare triple {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:50,106 INFO L273 TraceCheckUtils]: 10: Hoare triple {4346#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:50,107 INFO L273 TraceCheckUtils]: 11: Hoare triple {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:50,108 INFO L273 TraceCheckUtils]: 12: Hoare triple {4347#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:50,109 INFO L273 TraceCheckUtils]: 13: Hoare triple {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:50,110 INFO L273 TraceCheckUtils]: 14: Hoare triple {4348#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:50,110 INFO L273 TraceCheckUtils]: 15: Hoare triple {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:50,111 INFO L273 TraceCheckUtils]: 16: Hoare triple {4349#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:50,112 INFO L273 TraceCheckUtils]: 17: Hoare triple {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:50,113 INFO L273 TraceCheckUtils]: 18: Hoare triple {4350#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:50,114 INFO L273 TraceCheckUtils]: 19: Hoare triple {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:50,115 INFO L273 TraceCheckUtils]: 20: Hoare triple {4351#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:50,116 INFO L273 TraceCheckUtils]: 21: Hoare triple {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:50,117 INFO L273 TraceCheckUtils]: 22: Hoare triple {4352#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:50,117 INFO L273 TraceCheckUtils]: 23: Hoare triple {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:50,118 INFO L273 TraceCheckUtils]: 24: Hoare triple {4353#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:50,119 INFO L273 TraceCheckUtils]: 25: Hoare triple {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:50,120 INFO L273 TraceCheckUtils]: 26: Hoare triple {4354#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:50,121 INFO L273 TraceCheckUtils]: 27: Hoare triple {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:50,122 INFO L273 TraceCheckUtils]: 28: Hoare triple {4355#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:50,123 INFO L273 TraceCheckUtils]: 29: Hoare triple {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:50,124 INFO L273 TraceCheckUtils]: 30: Hoare triple {4356#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:50,124 INFO L273 TraceCheckUtils]: 31: Hoare triple {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:50,125 INFO L273 TraceCheckUtils]: 32: Hoare triple {4357#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:50,126 INFO L273 TraceCheckUtils]: 33: Hoare triple {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:50,127 INFO L273 TraceCheckUtils]: 34: Hoare triple {4358#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:50,128 INFO L273 TraceCheckUtils]: 35: Hoare triple {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:50,129 INFO L273 TraceCheckUtils]: 36: Hoare triple {4359#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:50,129 INFO L273 TraceCheckUtils]: 37: Hoare triple {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:50,130 INFO L273 TraceCheckUtils]: 38: Hoare triple {4360#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4479#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:50,131 INFO L273 TraceCheckUtils]: 39: Hoare triple {4479#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {4479#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:50,132 INFO L273 TraceCheckUtils]: 40: Hoare triple {4479#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {4343#false} is VALID [2018-11-14 17:31:50,132 INFO L256 TraceCheckUtils]: 41: Hoare triple {4343#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {4343#false} is VALID [2018-11-14 17:31:50,132 INFO L273 TraceCheckUtils]: 42: Hoare triple {4343#false} ~cond := #in~cond; {4343#false} is VALID [2018-11-14 17:31:50,133 INFO L273 TraceCheckUtils]: 43: Hoare triple {4343#false} assume ~cond == 0; {4343#false} is VALID [2018-11-14 17:31:50,133 INFO L273 TraceCheckUtils]: 44: Hoare triple {4343#false} assume !false; {4343#false} is VALID [2018-11-14 17:31:50,136 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:50,156 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:50,156 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 21 [2018-11-14 17:31:50,157 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 45 [2018-11-14 17:31:50,157 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:50,157 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-14 17:31:50,205 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:50,206 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-14 17:31:50,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-14 17:31:50,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-11-14 17:31:50,207 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 21 states. [2018-11-14 17:31:51,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:51,840 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-11-14 17:31:51,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-14 17:31:51,841 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 45 [2018-11-14 17:31:51,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:51,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-14 17:31:51,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 53 transitions. [2018-11-14 17:31:51,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-14 17:31:51,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 53 transitions. [2018-11-14 17:31:51,844 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states and 53 transitions. [2018-11-14 17:31:52,362 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:52,363 INFO L225 Difference]: With dead ends: 53 [2018-11-14 17:31:52,363 INFO L226 Difference]: Without dead ends: 48 [2018-11-14 17:31:52,364 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-11-14 17:31:52,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-11-14 17:31:52,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-11-14 17:31:52,392 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:52,392 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand 48 states. [2018-11-14 17:31:52,392 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 48 states. [2018-11-14 17:31:52,392 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 48 states. [2018-11-14 17:31:52,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:52,394 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-11-14 17:31:52,394 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-11-14 17:31:52,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:52,395 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:52,395 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 48 states. [2018-11-14 17:31:52,395 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 48 states. [2018-11-14 17:31:52,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:52,396 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-11-14 17:31:52,396 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-11-14 17:31:52,396 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:52,397 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:52,397 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:52,397 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:52,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-14 17:31:52,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-11-14 17:31:52,398 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 45 [2018-11-14 17:31:52,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:52,399 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-11-14 17:31:52,399 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-14 17:31:52,399 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-11-14 17:31:52,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-14 17:31:52,399 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:52,400 INFO L375 BasicCegarLoop]: trace histogram [19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:52,400 INFO L423 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:52,400 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:52,400 INFO L82 PathProgramCache]: Analyzing trace with hash 723901956, now seen corresponding path program 18 times [2018-11-14 17:31:52,400 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:52,400 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:52,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:52,401 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:52,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:52,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:53,521 INFO L256 TraceCheckUtils]: 0: Hoare triple {4746#true} call ULTIMATE.init(); {4746#true} is VALID [2018-11-14 17:31:53,522 INFO L273 TraceCheckUtils]: 1: Hoare triple {4746#true} assume true; {4746#true} is VALID [2018-11-14 17:31:53,522 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4746#true} {4746#true} #32#return; {4746#true} is VALID [2018-11-14 17:31:53,522 INFO L256 TraceCheckUtils]: 3: Hoare triple {4746#true} call #t~ret1 := main(); {4746#true} is VALID [2018-11-14 17:31:53,529 INFO L273 TraceCheckUtils]: 4: Hoare triple {4746#true} ~x~0 := 1;~y~0 := 0; {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:53,530 INFO L273 TraceCheckUtils]: 5: Hoare triple {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:53,530 INFO L273 TraceCheckUtils]: 6: Hoare triple {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:53,531 INFO L273 TraceCheckUtils]: 7: Hoare triple {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:53,531 INFO L273 TraceCheckUtils]: 8: Hoare triple {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:53,532 INFO L273 TraceCheckUtils]: 9: Hoare triple {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:53,532 INFO L273 TraceCheckUtils]: 10: Hoare triple {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:53,533 INFO L273 TraceCheckUtils]: 11: Hoare triple {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:53,534 INFO L273 TraceCheckUtils]: 12: Hoare triple {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:53,534 INFO L273 TraceCheckUtils]: 13: Hoare triple {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:53,535 INFO L273 TraceCheckUtils]: 14: Hoare triple {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:53,536 INFO L273 TraceCheckUtils]: 15: Hoare triple {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:53,537 INFO L273 TraceCheckUtils]: 16: Hoare triple {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:53,538 INFO L273 TraceCheckUtils]: 17: Hoare triple {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:53,539 INFO L273 TraceCheckUtils]: 18: Hoare triple {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:53,540 INFO L273 TraceCheckUtils]: 19: Hoare triple {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:53,541 INFO L273 TraceCheckUtils]: 20: Hoare triple {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:53,541 INFO L273 TraceCheckUtils]: 21: Hoare triple {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:53,542 INFO L273 TraceCheckUtils]: 22: Hoare triple {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:53,543 INFO L273 TraceCheckUtils]: 23: Hoare triple {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:53,544 INFO L273 TraceCheckUtils]: 24: Hoare triple {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:53,545 INFO L273 TraceCheckUtils]: 25: Hoare triple {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:53,546 INFO L273 TraceCheckUtils]: 26: Hoare triple {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:53,546 INFO L273 TraceCheckUtils]: 27: Hoare triple {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:53,547 INFO L273 TraceCheckUtils]: 28: Hoare triple {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:53,548 INFO L273 TraceCheckUtils]: 29: Hoare triple {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:53,549 INFO L273 TraceCheckUtils]: 30: Hoare triple {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:53,550 INFO L273 TraceCheckUtils]: 31: Hoare triple {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:53,551 INFO L273 TraceCheckUtils]: 32: Hoare triple {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:53,551 INFO L273 TraceCheckUtils]: 33: Hoare triple {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:53,552 INFO L273 TraceCheckUtils]: 34: Hoare triple {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:53,553 INFO L273 TraceCheckUtils]: 35: Hoare triple {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:53,554 INFO L273 TraceCheckUtils]: 36: Hoare triple {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:53,555 INFO L273 TraceCheckUtils]: 37: Hoare triple {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:53,556 INFO L273 TraceCheckUtils]: 38: Hoare triple {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:53,557 INFO L273 TraceCheckUtils]: 39: Hoare triple {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:53,558 INFO L273 TraceCheckUtils]: 40: Hoare triple {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4766#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:53,558 INFO L273 TraceCheckUtils]: 41: Hoare triple {4766#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 18))} assume true; {4766#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:53,559 INFO L273 TraceCheckUtils]: 42: Hoare triple {4766#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 18))} assume !(~y~0 % 4294967296 < 1024); {4747#false} is VALID [2018-11-14 17:31:53,560 INFO L256 TraceCheckUtils]: 43: Hoare triple {4747#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {4747#false} is VALID [2018-11-14 17:31:53,560 INFO L273 TraceCheckUtils]: 44: Hoare triple {4747#false} ~cond := #in~cond; {4747#false} is VALID [2018-11-14 17:31:53,560 INFO L273 TraceCheckUtils]: 45: Hoare triple {4747#false} assume ~cond == 0; {4747#false} is VALID [2018-11-14 17:31:53,560 INFO L273 TraceCheckUtils]: 46: Hoare triple {4747#false} assume !false; {4747#false} is VALID [2018-11-14 17:31:53,563 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:53,564 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:53,564 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:53,573 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-11-14 17:31:53,847 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-11-14 17:31:53,847 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:31:53,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:53,861 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:54,273 INFO L256 TraceCheckUtils]: 0: Hoare triple {4746#true} call ULTIMATE.init(); {4746#true} is VALID [2018-11-14 17:31:54,274 INFO L273 TraceCheckUtils]: 1: Hoare triple {4746#true} assume true; {4746#true} is VALID [2018-11-14 17:31:54,274 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {4746#true} {4746#true} #32#return; {4746#true} is VALID [2018-11-14 17:31:54,274 INFO L256 TraceCheckUtils]: 3: Hoare triple {4746#true} call #t~ret1 := main(); {4746#true} is VALID [2018-11-14 17:31:54,275 INFO L273 TraceCheckUtils]: 4: Hoare triple {4746#true} ~x~0 := 1;~y~0 := 0; {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:54,275 INFO L273 TraceCheckUtils]: 5: Hoare triple {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:54,276 INFO L273 TraceCheckUtils]: 6: Hoare triple {4748#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:54,277 INFO L273 TraceCheckUtils]: 7: Hoare triple {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:54,277 INFO L273 TraceCheckUtils]: 8: Hoare triple {4749#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:54,278 INFO L273 TraceCheckUtils]: 9: Hoare triple {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:54,279 INFO L273 TraceCheckUtils]: 10: Hoare triple {4750#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:54,279 INFO L273 TraceCheckUtils]: 11: Hoare triple {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:54,280 INFO L273 TraceCheckUtils]: 12: Hoare triple {4751#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:54,281 INFO L273 TraceCheckUtils]: 13: Hoare triple {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:54,282 INFO L273 TraceCheckUtils]: 14: Hoare triple {4752#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:54,283 INFO L273 TraceCheckUtils]: 15: Hoare triple {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:54,284 INFO L273 TraceCheckUtils]: 16: Hoare triple {4753#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:54,284 INFO L273 TraceCheckUtils]: 17: Hoare triple {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:54,285 INFO L273 TraceCheckUtils]: 18: Hoare triple {4754#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:54,286 INFO L273 TraceCheckUtils]: 19: Hoare triple {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:54,287 INFO L273 TraceCheckUtils]: 20: Hoare triple {4755#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:54,288 INFO L273 TraceCheckUtils]: 21: Hoare triple {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:54,289 INFO L273 TraceCheckUtils]: 22: Hoare triple {4756#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:54,289 INFO L273 TraceCheckUtils]: 23: Hoare triple {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:54,290 INFO L273 TraceCheckUtils]: 24: Hoare triple {4757#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:54,291 INFO L273 TraceCheckUtils]: 25: Hoare triple {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:54,292 INFO L273 TraceCheckUtils]: 26: Hoare triple {4758#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:54,293 INFO L273 TraceCheckUtils]: 27: Hoare triple {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:54,294 INFO L273 TraceCheckUtils]: 28: Hoare triple {4759#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:54,295 INFO L273 TraceCheckUtils]: 29: Hoare triple {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:54,296 INFO L273 TraceCheckUtils]: 30: Hoare triple {4760#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:54,296 INFO L273 TraceCheckUtils]: 31: Hoare triple {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:54,297 INFO L273 TraceCheckUtils]: 32: Hoare triple {4761#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:54,298 INFO L273 TraceCheckUtils]: 33: Hoare triple {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:54,299 INFO L273 TraceCheckUtils]: 34: Hoare triple {4762#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:54,300 INFO L273 TraceCheckUtils]: 35: Hoare triple {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:54,301 INFO L273 TraceCheckUtils]: 36: Hoare triple {4763#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:54,302 INFO L273 TraceCheckUtils]: 37: Hoare triple {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:54,303 INFO L273 TraceCheckUtils]: 38: Hoare triple {4764#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:54,303 INFO L273 TraceCheckUtils]: 39: Hoare triple {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:54,304 INFO L273 TraceCheckUtils]: 40: Hoare triple {4765#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {4890#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:54,305 INFO L273 TraceCheckUtils]: 41: Hoare triple {4890#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {4890#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:54,306 INFO L273 TraceCheckUtils]: 42: Hoare triple {4890#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !(~y~0 % 4294967296 < 1024); {4747#false} is VALID [2018-11-14 17:31:54,306 INFO L256 TraceCheckUtils]: 43: Hoare triple {4747#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {4747#false} is VALID [2018-11-14 17:31:54,306 INFO L273 TraceCheckUtils]: 44: Hoare triple {4747#false} ~cond := #in~cond; {4747#false} is VALID [2018-11-14 17:31:54,306 INFO L273 TraceCheckUtils]: 45: Hoare triple {4747#false} assume ~cond == 0; {4747#false} is VALID [2018-11-14 17:31:54,307 INFO L273 TraceCheckUtils]: 46: Hoare triple {4747#false} assume !false; {4747#false} is VALID [2018-11-14 17:31:54,310 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:54,331 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:54,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 22 [2018-11-14 17:31:54,331 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 47 [2018-11-14 17:31:54,331 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:54,332 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states. [2018-11-14 17:31:54,383 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:54,383 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-11-14 17:31:54,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-11-14 17:31:54,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=402, Unknown=0, NotChecked=0, Total=462 [2018-11-14 17:31:54,384 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 22 states. [2018-11-14 17:31:55,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:55,931 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-11-14 17:31:55,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-14 17:31:55,931 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 47 [2018-11-14 17:31:55,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:55,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 17:31:55,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 55 transitions. [2018-11-14 17:31:55,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-11-14 17:31:55,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 55 transitions. [2018-11-14 17:31:55,934 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states and 55 transitions. [2018-11-14 17:31:56,514 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:56,516 INFO L225 Difference]: With dead ends: 55 [2018-11-14 17:31:56,516 INFO L226 Difference]: Without dead ends: 50 [2018-11-14 17:31:56,516 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=60, Invalid=402, Unknown=0, NotChecked=0, Total=462 [2018-11-14 17:31:56,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-11-14 17:31:56,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-11-14 17:31:56,545 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:56,545 INFO L82 GeneralOperation]: Start isEquivalent. First operand 50 states. Second operand 50 states. [2018-11-14 17:31:56,546 INFO L74 IsIncluded]: Start isIncluded. First operand 50 states. Second operand 50 states. [2018-11-14 17:31:56,546 INFO L87 Difference]: Start difference. First operand 50 states. Second operand 50 states. [2018-11-14 17:31:56,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:56,547 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-11-14 17:31:56,548 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-11-14 17:31:56,548 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:56,548 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:56,548 INFO L74 IsIncluded]: Start isIncluded. First operand 50 states. Second operand 50 states. [2018-11-14 17:31:56,549 INFO L87 Difference]: Start difference. First operand 50 states. Second operand 50 states. [2018-11-14 17:31:56,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:56,550 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-11-14 17:31:56,550 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-11-14 17:31:56,550 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:56,550 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:56,550 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:56,550 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:56,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-11-14 17:31:56,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-11-14 17:31:56,552 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 47 [2018-11-14 17:31:56,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:56,552 INFO L480 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-11-14 17:31:56,552 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-11-14 17:31:56,552 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-11-14 17:31:56,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-14 17:31:56,553 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:56,553 INFO L375 BasicCegarLoop]: trace histogram [20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:56,553 INFO L423 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:56,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:56,553 INFO L82 PathProgramCache]: Analyzing trace with hash 880063306, now seen corresponding path program 19 times [2018-11-14 17:31:56,553 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:56,554 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:56,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:56,554 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:31:56,554 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:56,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:57,036 INFO L256 TraceCheckUtils]: 0: Hoare triple {5167#true} call ULTIMATE.init(); {5167#true} is VALID [2018-11-14 17:31:57,036 INFO L273 TraceCheckUtils]: 1: Hoare triple {5167#true} assume true; {5167#true} is VALID [2018-11-14 17:31:57,036 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5167#true} {5167#true} #32#return; {5167#true} is VALID [2018-11-14 17:31:57,037 INFO L256 TraceCheckUtils]: 3: Hoare triple {5167#true} call #t~ret1 := main(); {5167#true} is VALID [2018-11-14 17:31:57,037 INFO L273 TraceCheckUtils]: 4: Hoare triple {5167#true} ~x~0 := 1;~y~0 := 0; {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:57,038 INFO L273 TraceCheckUtils]: 5: Hoare triple {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:57,039 INFO L273 TraceCheckUtils]: 6: Hoare triple {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:57,040 INFO L273 TraceCheckUtils]: 7: Hoare triple {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:57,041 INFO L273 TraceCheckUtils]: 8: Hoare triple {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:57,041 INFO L273 TraceCheckUtils]: 9: Hoare triple {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:57,042 INFO L273 TraceCheckUtils]: 10: Hoare triple {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:57,043 INFO L273 TraceCheckUtils]: 11: Hoare triple {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:57,044 INFO L273 TraceCheckUtils]: 12: Hoare triple {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:57,045 INFO L273 TraceCheckUtils]: 13: Hoare triple {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:57,046 INFO L273 TraceCheckUtils]: 14: Hoare triple {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:57,046 INFO L273 TraceCheckUtils]: 15: Hoare triple {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:57,047 INFO L273 TraceCheckUtils]: 16: Hoare triple {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:57,048 INFO L273 TraceCheckUtils]: 17: Hoare triple {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:57,049 INFO L273 TraceCheckUtils]: 18: Hoare triple {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:57,050 INFO L273 TraceCheckUtils]: 19: Hoare triple {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:57,051 INFO L273 TraceCheckUtils]: 20: Hoare triple {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:57,051 INFO L273 TraceCheckUtils]: 21: Hoare triple {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:57,052 INFO L273 TraceCheckUtils]: 22: Hoare triple {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:57,053 INFO L273 TraceCheckUtils]: 23: Hoare triple {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:57,054 INFO L273 TraceCheckUtils]: 24: Hoare triple {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:57,055 INFO L273 TraceCheckUtils]: 25: Hoare triple {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:57,056 INFO L273 TraceCheckUtils]: 26: Hoare triple {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:57,056 INFO L273 TraceCheckUtils]: 27: Hoare triple {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:57,057 INFO L273 TraceCheckUtils]: 28: Hoare triple {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:57,058 INFO L273 TraceCheckUtils]: 29: Hoare triple {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:57,059 INFO L273 TraceCheckUtils]: 30: Hoare triple {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:57,060 INFO L273 TraceCheckUtils]: 31: Hoare triple {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:57,061 INFO L273 TraceCheckUtils]: 32: Hoare triple {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:57,061 INFO L273 TraceCheckUtils]: 33: Hoare triple {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:57,062 INFO L273 TraceCheckUtils]: 34: Hoare triple {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:57,063 INFO L273 TraceCheckUtils]: 35: Hoare triple {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:57,064 INFO L273 TraceCheckUtils]: 36: Hoare triple {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:57,065 INFO L273 TraceCheckUtils]: 37: Hoare triple {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:57,066 INFO L273 TraceCheckUtils]: 38: Hoare triple {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:57,066 INFO L273 TraceCheckUtils]: 39: Hoare triple {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:57,067 INFO L273 TraceCheckUtils]: 40: Hoare triple {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:57,068 INFO L273 TraceCheckUtils]: 41: Hoare triple {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:57,069 INFO L273 TraceCheckUtils]: 42: Hoare triple {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5188#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 19))} is VALID [2018-11-14 17:31:57,070 INFO L273 TraceCheckUtils]: 43: Hoare triple {5188#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 19))} assume true; {5188#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 19))} is VALID [2018-11-14 17:31:57,071 INFO L273 TraceCheckUtils]: 44: Hoare triple {5188#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 19))} assume !(~y~0 % 4294967296 < 1024); {5168#false} is VALID [2018-11-14 17:31:57,071 INFO L256 TraceCheckUtils]: 45: Hoare triple {5168#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {5168#false} is VALID [2018-11-14 17:31:57,071 INFO L273 TraceCheckUtils]: 46: Hoare triple {5168#false} ~cond := #in~cond; {5168#false} is VALID [2018-11-14 17:31:57,071 INFO L273 TraceCheckUtils]: 47: Hoare triple {5168#false} assume ~cond == 0; {5168#false} is VALID [2018-11-14 17:31:57,072 INFO L273 TraceCheckUtils]: 48: Hoare triple {5168#false} assume !false; {5168#false} is VALID [2018-11-14 17:31:57,076 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:57,077 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:31:57,077 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:31:57,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:57,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:57,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:31:57,130 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:31:57,328 INFO L256 TraceCheckUtils]: 0: Hoare triple {5167#true} call ULTIMATE.init(); {5167#true} is VALID [2018-11-14 17:31:57,328 INFO L273 TraceCheckUtils]: 1: Hoare triple {5167#true} assume true; {5167#true} is VALID [2018-11-14 17:31:57,329 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5167#true} {5167#true} #32#return; {5167#true} is VALID [2018-11-14 17:31:57,329 INFO L256 TraceCheckUtils]: 3: Hoare triple {5167#true} call #t~ret1 := main(); {5167#true} is VALID [2018-11-14 17:31:57,329 INFO L273 TraceCheckUtils]: 4: Hoare triple {5167#true} ~x~0 := 1;~y~0 := 0; {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:57,330 INFO L273 TraceCheckUtils]: 5: Hoare triple {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:31:57,331 INFO L273 TraceCheckUtils]: 6: Hoare triple {5169#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:57,331 INFO L273 TraceCheckUtils]: 7: Hoare triple {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:31:57,332 INFO L273 TraceCheckUtils]: 8: Hoare triple {5170#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:57,332 INFO L273 TraceCheckUtils]: 9: Hoare triple {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:31:57,333 INFO L273 TraceCheckUtils]: 10: Hoare triple {5171#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:57,334 INFO L273 TraceCheckUtils]: 11: Hoare triple {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:31:57,335 INFO L273 TraceCheckUtils]: 12: Hoare triple {5172#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:57,335 INFO L273 TraceCheckUtils]: 13: Hoare triple {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:31:57,336 INFO L273 TraceCheckUtils]: 14: Hoare triple {5173#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:57,337 INFO L273 TraceCheckUtils]: 15: Hoare triple {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:31:57,338 INFO L273 TraceCheckUtils]: 16: Hoare triple {5174#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:57,339 INFO L273 TraceCheckUtils]: 17: Hoare triple {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:31:57,340 INFO L273 TraceCheckUtils]: 18: Hoare triple {5175#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:57,340 INFO L273 TraceCheckUtils]: 19: Hoare triple {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:31:57,341 INFO L273 TraceCheckUtils]: 20: Hoare triple {5176#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:57,342 INFO L273 TraceCheckUtils]: 21: Hoare triple {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:31:57,343 INFO L273 TraceCheckUtils]: 22: Hoare triple {5177#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:57,344 INFO L273 TraceCheckUtils]: 23: Hoare triple {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:31:57,345 INFO L273 TraceCheckUtils]: 24: Hoare triple {5178#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:57,345 INFO L273 TraceCheckUtils]: 25: Hoare triple {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:31:57,346 INFO L273 TraceCheckUtils]: 26: Hoare triple {5179#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:57,347 INFO L273 TraceCheckUtils]: 27: Hoare triple {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:31:57,348 INFO L273 TraceCheckUtils]: 28: Hoare triple {5180#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:57,349 INFO L273 TraceCheckUtils]: 29: Hoare triple {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:31:57,350 INFO L273 TraceCheckUtils]: 30: Hoare triple {5181#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:57,350 INFO L273 TraceCheckUtils]: 31: Hoare triple {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:31:57,351 INFO L273 TraceCheckUtils]: 32: Hoare triple {5182#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:57,352 INFO L273 TraceCheckUtils]: 33: Hoare triple {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:31:57,353 INFO L273 TraceCheckUtils]: 34: Hoare triple {5183#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:57,354 INFO L273 TraceCheckUtils]: 35: Hoare triple {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:31:57,355 INFO L273 TraceCheckUtils]: 36: Hoare triple {5184#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:57,355 INFO L273 TraceCheckUtils]: 37: Hoare triple {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:31:57,356 INFO L273 TraceCheckUtils]: 38: Hoare triple {5185#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:57,357 INFO L273 TraceCheckUtils]: 39: Hoare triple {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:31:57,358 INFO L273 TraceCheckUtils]: 40: Hoare triple {5186#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:57,359 INFO L273 TraceCheckUtils]: 41: Hoare triple {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:31:57,360 INFO L273 TraceCheckUtils]: 42: Hoare triple {5187#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5318#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:31:57,360 INFO L273 TraceCheckUtils]: 43: Hoare triple {5318#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {5318#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:31:57,361 INFO L273 TraceCheckUtils]: 44: Hoare triple {5318#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !(~y~0 % 4294967296 < 1024); {5168#false} is VALID [2018-11-14 17:31:57,361 INFO L256 TraceCheckUtils]: 45: Hoare triple {5168#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {5168#false} is VALID [2018-11-14 17:31:57,362 INFO L273 TraceCheckUtils]: 46: Hoare triple {5168#false} ~cond := #in~cond; {5168#false} is VALID [2018-11-14 17:31:57,362 INFO L273 TraceCheckUtils]: 47: Hoare triple {5168#false} assume ~cond == 0; {5168#false} is VALID [2018-11-14 17:31:57,362 INFO L273 TraceCheckUtils]: 48: Hoare triple {5168#false} assume !false; {5168#false} is VALID [2018-11-14 17:31:57,366 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:31:57,386 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:31:57,386 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 23 [2018-11-14 17:31:57,387 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 49 [2018-11-14 17:31:57,387 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:31:57,387 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states. [2018-11-14 17:31:57,440 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:57,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-14 17:31:57,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-14 17:31:57,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=443, Unknown=0, NotChecked=0, Total=506 [2018-11-14 17:31:57,441 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 23 states. [2018-11-14 17:31:58,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:58,739 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-11-14 17:31:58,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-14 17:31:58,739 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 49 [2018-11-14 17:31:58,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:31:58,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-14 17:31:58,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 57 transitions. [2018-11-14 17:31:58,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-14 17:31:58,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 57 transitions. [2018-11-14 17:31:58,742 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 22 states and 57 transitions. [2018-11-14 17:31:59,199 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:31:59,200 INFO L225 Difference]: With dead ends: 57 [2018-11-14 17:31:59,200 INFO L226 Difference]: Without dead ends: 52 [2018-11-14 17:31:59,201 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=63, Invalid=443, Unknown=0, NotChecked=0, Total=506 [2018-11-14 17:31:59,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-11-14 17:31:59,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-11-14 17:31:59,273 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:31:59,273 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand 52 states. [2018-11-14 17:31:59,273 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand 52 states. [2018-11-14 17:31:59,273 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 52 states. [2018-11-14 17:31:59,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:59,274 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-11-14 17:31:59,274 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-11-14 17:31:59,275 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:59,275 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:59,275 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand 52 states. [2018-11-14 17:31:59,275 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 52 states. [2018-11-14 17:31:59,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:31:59,276 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-11-14 17:31:59,276 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-11-14 17:31:59,277 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:31:59,277 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:31:59,277 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:31:59,277 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:31:59,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-11-14 17:31:59,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-11-14 17:31:59,278 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 49 [2018-11-14 17:31:59,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:31:59,279 INFO L480 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-11-14 17:31:59,279 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-14 17:31:59,279 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-11-14 17:31:59,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-14 17:31:59,279 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:31:59,280 INFO L375 BasicCegarLoop]: trace histogram [21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:31:59,280 INFO L423 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:31:59,280 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:31:59,280 INFO L82 PathProgramCache]: Analyzing trace with hash 627265296, now seen corresponding path program 20 times [2018-11-14 17:31:59,280 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:31:59,280 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:31:59,281 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:59,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:31:59,281 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:31:59,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:00,025 INFO L256 TraceCheckUtils]: 0: Hoare triple {5605#true} call ULTIMATE.init(); {5605#true} is VALID [2018-11-14 17:32:00,025 INFO L273 TraceCheckUtils]: 1: Hoare triple {5605#true} assume true; {5605#true} is VALID [2018-11-14 17:32:00,025 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5605#true} {5605#true} #32#return; {5605#true} is VALID [2018-11-14 17:32:00,026 INFO L256 TraceCheckUtils]: 3: Hoare triple {5605#true} call #t~ret1 := main(); {5605#true} is VALID [2018-11-14 17:32:00,026 INFO L273 TraceCheckUtils]: 4: Hoare triple {5605#true} ~x~0 := 1;~y~0 := 0; {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:00,026 INFO L273 TraceCheckUtils]: 5: Hoare triple {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:00,027 INFO L273 TraceCheckUtils]: 6: Hoare triple {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:00,027 INFO L273 TraceCheckUtils]: 7: Hoare triple {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:00,028 INFO L273 TraceCheckUtils]: 8: Hoare triple {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:00,029 INFO L273 TraceCheckUtils]: 9: Hoare triple {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:00,030 INFO L273 TraceCheckUtils]: 10: Hoare triple {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:00,031 INFO L273 TraceCheckUtils]: 11: Hoare triple {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:00,032 INFO L273 TraceCheckUtils]: 12: Hoare triple {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:00,032 INFO L273 TraceCheckUtils]: 13: Hoare triple {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:00,033 INFO L273 TraceCheckUtils]: 14: Hoare triple {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:00,034 INFO L273 TraceCheckUtils]: 15: Hoare triple {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:00,035 INFO L273 TraceCheckUtils]: 16: Hoare triple {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:00,036 INFO L273 TraceCheckUtils]: 17: Hoare triple {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:00,036 INFO L273 TraceCheckUtils]: 18: Hoare triple {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:00,037 INFO L273 TraceCheckUtils]: 19: Hoare triple {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:00,038 INFO L273 TraceCheckUtils]: 20: Hoare triple {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:00,039 INFO L273 TraceCheckUtils]: 21: Hoare triple {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:00,040 INFO L273 TraceCheckUtils]: 22: Hoare triple {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:00,040 INFO L273 TraceCheckUtils]: 23: Hoare triple {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:00,041 INFO L273 TraceCheckUtils]: 24: Hoare triple {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:00,042 INFO L273 TraceCheckUtils]: 25: Hoare triple {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:00,043 INFO L273 TraceCheckUtils]: 26: Hoare triple {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:00,043 INFO L273 TraceCheckUtils]: 27: Hoare triple {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:00,044 INFO L273 TraceCheckUtils]: 28: Hoare triple {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:00,045 INFO L273 TraceCheckUtils]: 29: Hoare triple {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:00,046 INFO L273 TraceCheckUtils]: 30: Hoare triple {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:00,047 INFO L273 TraceCheckUtils]: 31: Hoare triple {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:00,047 INFO L273 TraceCheckUtils]: 32: Hoare triple {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:00,048 INFO L273 TraceCheckUtils]: 33: Hoare triple {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:00,049 INFO L273 TraceCheckUtils]: 34: Hoare triple {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:00,050 INFO L273 TraceCheckUtils]: 35: Hoare triple {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:00,051 INFO L273 TraceCheckUtils]: 36: Hoare triple {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:00,051 INFO L273 TraceCheckUtils]: 37: Hoare triple {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:00,052 INFO L273 TraceCheckUtils]: 38: Hoare triple {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:00,053 INFO L273 TraceCheckUtils]: 39: Hoare triple {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:00,054 INFO L273 TraceCheckUtils]: 40: Hoare triple {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:00,054 INFO L273 TraceCheckUtils]: 41: Hoare triple {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:00,055 INFO L273 TraceCheckUtils]: 42: Hoare triple {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:00,056 INFO L273 TraceCheckUtils]: 43: Hoare triple {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:00,057 INFO L273 TraceCheckUtils]: 44: Hoare triple {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5627#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:00,058 INFO L273 TraceCheckUtils]: 45: Hoare triple {5627#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 20))} assume true; {5627#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:00,059 INFO L273 TraceCheckUtils]: 46: Hoare triple {5627#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 20))} assume !(~y~0 % 4294967296 < 1024); {5606#false} is VALID [2018-11-14 17:32:00,059 INFO L256 TraceCheckUtils]: 47: Hoare triple {5606#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {5606#false} is VALID [2018-11-14 17:32:00,059 INFO L273 TraceCheckUtils]: 48: Hoare triple {5606#false} ~cond := #in~cond; {5606#false} is VALID [2018-11-14 17:32:00,059 INFO L273 TraceCheckUtils]: 49: Hoare triple {5606#false} assume ~cond == 0; {5606#false} is VALID [2018-11-14 17:32:00,060 INFO L273 TraceCheckUtils]: 50: Hoare triple {5606#false} assume !false; {5606#false} is VALID [2018-11-14 17:32:00,065 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:00,065 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:32:00,065 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:32:00,083 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-14 17:32:00,104 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:32:00,104 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:32:00,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:00,116 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:32:00,293 INFO L256 TraceCheckUtils]: 0: Hoare triple {5605#true} call ULTIMATE.init(); {5605#true} is VALID [2018-11-14 17:32:00,294 INFO L273 TraceCheckUtils]: 1: Hoare triple {5605#true} assume true; {5605#true} is VALID [2018-11-14 17:32:00,294 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {5605#true} {5605#true} #32#return; {5605#true} is VALID [2018-11-14 17:32:00,294 INFO L256 TraceCheckUtils]: 3: Hoare triple {5605#true} call #t~ret1 := main(); {5605#true} is VALID [2018-11-14 17:32:00,295 INFO L273 TraceCheckUtils]: 4: Hoare triple {5605#true} ~x~0 := 1;~y~0 := 0; {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:00,295 INFO L273 TraceCheckUtils]: 5: Hoare triple {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:00,296 INFO L273 TraceCheckUtils]: 6: Hoare triple {5607#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:00,296 INFO L273 TraceCheckUtils]: 7: Hoare triple {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:00,297 INFO L273 TraceCheckUtils]: 8: Hoare triple {5608#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:00,297 INFO L273 TraceCheckUtils]: 9: Hoare triple {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:00,298 INFO L273 TraceCheckUtils]: 10: Hoare triple {5609#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:00,299 INFO L273 TraceCheckUtils]: 11: Hoare triple {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:00,300 INFO L273 TraceCheckUtils]: 12: Hoare triple {5610#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:00,301 INFO L273 TraceCheckUtils]: 13: Hoare triple {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:00,302 INFO L273 TraceCheckUtils]: 14: Hoare triple {5611#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:00,302 INFO L273 TraceCheckUtils]: 15: Hoare triple {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:00,303 INFO L273 TraceCheckUtils]: 16: Hoare triple {5612#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:00,305 INFO L273 TraceCheckUtils]: 17: Hoare triple {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:00,306 INFO L273 TraceCheckUtils]: 18: Hoare triple {5613#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:00,307 INFO L273 TraceCheckUtils]: 19: Hoare triple {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:00,308 INFO L273 TraceCheckUtils]: 20: Hoare triple {5614#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:00,308 INFO L273 TraceCheckUtils]: 21: Hoare triple {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:00,309 INFO L273 TraceCheckUtils]: 22: Hoare triple {5615#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:00,310 INFO L273 TraceCheckUtils]: 23: Hoare triple {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:00,311 INFO L273 TraceCheckUtils]: 24: Hoare triple {5616#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:00,312 INFO L273 TraceCheckUtils]: 25: Hoare triple {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:00,313 INFO L273 TraceCheckUtils]: 26: Hoare triple {5617#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:00,313 INFO L273 TraceCheckUtils]: 27: Hoare triple {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:00,314 INFO L273 TraceCheckUtils]: 28: Hoare triple {5618#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:00,315 INFO L273 TraceCheckUtils]: 29: Hoare triple {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:00,316 INFO L273 TraceCheckUtils]: 30: Hoare triple {5619#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:00,317 INFO L273 TraceCheckUtils]: 31: Hoare triple {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:00,318 INFO L273 TraceCheckUtils]: 32: Hoare triple {5620#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:00,318 INFO L273 TraceCheckUtils]: 33: Hoare triple {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:00,319 INFO L273 TraceCheckUtils]: 34: Hoare triple {5621#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:00,320 INFO L273 TraceCheckUtils]: 35: Hoare triple {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:00,321 INFO L273 TraceCheckUtils]: 36: Hoare triple {5622#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:00,322 INFO L273 TraceCheckUtils]: 37: Hoare triple {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:00,323 INFO L273 TraceCheckUtils]: 38: Hoare triple {5623#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:00,323 INFO L273 TraceCheckUtils]: 39: Hoare triple {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:00,324 INFO L273 TraceCheckUtils]: 40: Hoare triple {5624#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:00,325 INFO L273 TraceCheckUtils]: 41: Hoare triple {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:00,326 INFO L273 TraceCheckUtils]: 42: Hoare triple {5625#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:00,327 INFO L273 TraceCheckUtils]: 43: Hoare triple {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:00,328 INFO L273 TraceCheckUtils]: 44: Hoare triple {5626#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {5763#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:00,328 INFO L273 TraceCheckUtils]: 45: Hoare triple {5763#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume true; {5763#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:00,329 INFO L273 TraceCheckUtils]: 46: Hoare triple {5763#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !(~y~0 % 4294967296 < 1024); {5606#false} is VALID [2018-11-14 17:32:00,329 INFO L256 TraceCheckUtils]: 47: Hoare triple {5606#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {5606#false} is VALID [2018-11-14 17:32:00,330 INFO L273 TraceCheckUtils]: 48: Hoare triple {5606#false} ~cond := #in~cond; {5606#false} is VALID [2018-11-14 17:32:00,330 INFO L273 TraceCheckUtils]: 49: Hoare triple {5606#false} assume ~cond == 0; {5606#false} is VALID [2018-11-14 17:32:00,330 INFO L273 TraceCheckUtils]: 50: Hoare triple {5606#false} assume !false; {5606#false} is VALID [2018-11-14 17:32:00,334 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:00,354 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:32:00,354 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 24 [2018-11-14 17:32:00,355 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-11-14 17:32:00,355 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:32:00,355 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-14 17:32:00,410 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:32:00,411 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-14 17:32:00,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-14 17:32:00,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-11-14 17:32:00,412 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 24 states. [2018-11-14 17:32:02,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:02,115 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-11-14 17:32:02,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-14 17:32:02,116 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 51 [2018-11-14 17:32:02,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:32:02,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-14 17:32:02,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2018-11-14 17:32:02,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-14 17:32:02,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 59 transitions. [2018-11-14 17:32:02,119 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 59 transitions. [2018-11-14 17:32:02,600 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:32:02,601 INFO L225 Difference]: With dead ends: 59 [2018-11-14 17:32:02,601 INFO L226 Difference]: Without dead ends: 54 [2018-11-14 17:32:02,602 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 50 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=66, Invalid=486, Unknown=0, NotChecked=0, Total=552 [2018-11-14 17:32:02,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-11-14 17:32:02,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-11-14 17:32:02,626 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:32:02,626 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand 54 states. [2018-11-14 17:32:02,626 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 54 states. [2018-11-14 17:32:02,626 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 54 states. [2018-11-14 17:32:02,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:02,628 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-11-14 17:32:02,628 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-11-14 17:32:02,628 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:32:02,629 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:32:02,629 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 54 states. [2018-11-14 17:32:02,629 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 54 states. [2018-11-14 17:32:02,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:02,630 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-11-14 17:32:02,630 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-11-14 17:32:02,630 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:32:02,630 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:32:02,630 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:32:02,630 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:32:02,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-14 17:32:02,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-11-14 17:32:02,632 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 51 [2018-11-14 17:32:02,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:32:02,632 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-11-14 17:32:02,632 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-14 17:32:02,632 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-11-14 17:32:02,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-14 17:32:02,633 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:32:02,633 INFO L375 BasicCegarLoop]: trace histogram [22, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:32:02,633 INFO L423 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:32:02,633 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:32:02,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1793453738, now seen corresponding path program 21 times [2018-11-14 17:32:02,634 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:32:02,634 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:32:02,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:32:02,634 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:32:02,635 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:32:02,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:04,079 INFO L256 TraceCheckUtils]: 0: Hoare triple {6060#true} call ULTIMATE.init(); {6060#true} is VALID [2018-11-14 17:32:04,079 INFO L273 TraceCheckUtils]: 1: Hoare triple {6060#true} assume true; {6060#true} is VALID [2018-11-14 17:32:04,079 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6060#true} {6060#true} #32#return; {6060#true} is VALID [2018-11-14 17:32:04,080 INFO L256 TraceCheckUtils]: 3: Hoare triple {6060#true} call #t~ret1 := main(); {6060#true} is VALID [2018-11-14 17:32:04,081 INFO L273 TraceCheckUtils]: 4: Hoare triple {6060#true} ~x~0 := 1;~y~0 := 0; {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:04,081 INFO L273 TraceCheckUtils]: 5: Hoare triple {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:04,083 INFO L273 TraceCheckUtils]: 6: Hoare triple {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:04,084 INFO L273 TraceCheckUtils]: 7: Hoare triple {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:04,085 INFO L273 TraceCheckUtils]: 8: Hoare triple {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:04,085 INFO L273 TraceCheckUtils]: 9: Hoare triple {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:04,087 INFO L273 TraceCheckUtils]: 10: Hoare triple {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:04,087 INFO L273 TraceCheckUtils]: 11: Hoare triple {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:04,089 INFO L273 TraceCheckUtils]: 12: Hoare triple {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:04,090 INFO L273 TraceCheckUtils]: 13: Hoare triple {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:04,091 INFO L273 TraceCheckUtils]: 14: Hoare triple {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:04,091 INFO L273 TraceCheckUtils]: 15: Hoare triple {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:04,093 INFO L273 TraceCheckUtils]: 16: Hoare triple {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:04,094 INFO L273 TraceCheckUtils]: 17: Hoare triple {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:04,095 INFO L273 TraceCheckUtils]: 18: Hoare triple {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:04,096 INFO L273 TraceCheckUtils]: 19: Hoare triple {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:04,099 INFO L273 TraceCheckUtils]: 20: Hoare triple {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:04,101 INFO L273 TraceCheckUtils]: 21: Hoare triple {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:04,101 INFO L273 TraceCheckUtils]: 22: Hoare triple {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:04,103 INFO L273 TraceCheckUtils]: 23: Hoare triple {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:04,103 INFO L273 TraceCheckUtils]: 24: Hoare triple {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:04,105 INFO L273 TraceCheckUtils]: 25: Hoare triple {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:04,105 INFO L273 TraceCheckUtils]: 26: Hoare triple {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:04,107 INFO L273 TraceCheckUtils]: 27: Hoare triple {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:04,108 INFO L273 TraceCheckUtils]: 28: Hoare triple {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:04,109 INFO L273 TraceCheckUtils]: 29: Hoare triple {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:04,110 INFO L273 TraceCheckUtils]: 30: Hoare triple {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:04,111 INFO L273 TraceCheckUtils]: 31: Hoare triple {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:04,112 INFO L273 TraceCheckUtils]: 32: Hoare triple {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:04,113 INFO L273 TraceCheckUtils]: 33: Hoare triple {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:04,114 INFO L273 TraceCheckUtils]: 34: Hoare triple {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:04,115 INFO L273 TraceCheckUtils]: 35: Hoare triple {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:04,116 INFO L273 TraceCheckUtils]: 36: Hoare triple {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:04,117 INFO L273 TraceCheckUtils]: 37: Hoare triple {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:04,118 INFO L273 TraceCheckUtils]: 38: Hoare triple {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:04,119 INFO L273 TraceCheckUtils]: 39: Hoare triple {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:04,120 INFO L273 TraceCheckUtils]: 40: Hoare triple {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:04,139 INFO L273 TraceCheckUtils]: 41: Hoare triple {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:04,140 INFO L273 TraceCheckUtils]: 42: Hoare triple {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:04,142 INFO L273 TraceCheckUtils]: 43: Hoare triple {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:04,142 INFO L273 TraceCheckUtils]: 44: Hoare triple {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:04,144 INFO L273 TraceCheckUtils]: 45: Hoare triple {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume true; {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:04,145 INFO L273 TraceCheckUtils]: 46: Hoare triple {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6083#(and (<= main_~y~0 21) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:32:04,150 INFO L273 TraceCheckUtils]: 47: Hoare triple {6083#(and (<= main_~y~0 21) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume true; {6083#(and (<= main_~y~0 21) (< 0 (+ (div main_~y~0 4294967296) 1)))} is VALID [2018-11-14 17:32:04,151 INFO L273 TraceCheckUtils]: 48: Hoare triple {6083#(and (<= main_~y~0 21) (< 0 (+ (div main_~y~0 4294967296) 1)))} assume !(~y~0 % 4294967296 < 1024); {6061#false} is VALID [2018-11-14 17:32:04,151 INFO L256 TraceCheckUtils]: 49: Hoare triple {6061#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {6061#false} is VALID [2018-11-14 17:32:04,151 INFO L273 TraceCheckUtils]: 50: Hoare triple {6061#false} ~cond := #in~cond; {6061#false} is VALID [2018-11-14 17:32:04,151 INFO L273 TraceCheckUtils]: 51: Hoare triple {6061#false} assume ~cond == 0; {6061#false} is VALID [2018-11-14 17:32:04,151 INFO L273 TraceCheckUtils]: 52: Hoare triple {6061#false} assume !false; {6061#false} is VALID [2018-11-14 17:32:04,158 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 462 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:04,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:32:04,159 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:32:04,168 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-14 17:32:10,496 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-11-14 17:32:10,496 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:32:10,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:10,516 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:32:10,859 INFO L256 TraceCheckUtils]: 0: Hoare triple {6060#true} call ULTIMATE.init(); {6060#true} is VALID [2018-11-14 17:32:10,859 INFO L273 TraceCheckUtils]: 1: Hoare triple {6060#true} assume true; {6060#true} is VALID [2018-11-14 17:32:10,859 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6060#true} {6060#true} #32#return; {6060#true} is VALID [2018-11-14 17:32:10,859 INFO L256 TraceCheckUtils]: 3: Hoare triple {6060#true} call #t~ret1 := main(); {6060#true} is VALID [2018-11-14 17:32:10,860 INFO L273 TraceCheckUtils]: 4: Hoare triple {6060#true} ~x~0 := 1;~y~0 := 0; {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:10,861 INFO L273 TraceCheckUtils]: 5: Hoare triple {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:10,861 INFO L273 TraceCheckUtils]: 6: Hoare triple {6062#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:10,862 INFO L273 TraceCheckUtils]: 7: Hoare triple {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:10,862 INFO L273 TraceCheckUtils]: 8: Hoare triple {6063#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:10,864 INFO L273 TraceCheckUtils]: 9: Hoare triple {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:10,864 INFO L273 TraceCheckUtils]: 10: Hoare triple {6064#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:10,866 INFO L273 TraceCheckUtils]: 11: Hoare triple {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:10,867 INFO L273 TraceCheckUtils]: 12: Hoare triple {6065#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:10,868 INFO L273 TraceCheckUtils]: 13: Hoare triple {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:10,868 INFO L273 TraceCheckUtils]: 14: Hoare triple {6066#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:10,869 INFO L273 TraceCheckUtils]: 15: Hoare triple {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:10,870 INFO L273 TraceCheckUtils]: 16: Hoare triple {6067#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:10,870 INFO L273 TraceCheckUtils]: 17: Hoare triple {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:10,871 INFO L273 TraceCheckUtils]: 18: Hoare triple {6068#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:10,872 INFO L273 TraceCheckUtils]: 19: Hoare triple {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:10,873 INFO L273 TraceCheckUtils]: 20: Hoare triple {6069#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:10,873 INFO L273 TraceCheckUtils]: 21: Hoare triple {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:10,874 INFO L273 TraceCheckUtils]: 22: Hoare triple {6070#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:10,875 INFO L273 TraceCheckUtils]: 23: Hoare triple {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:10,876 INFO L273 TraceCheckUtils]: 24: Hoare triple {6071#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:10,877 INFO L273 TraceCheckUtils]: 25: Hoare triple {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:10,878 INFO L273 TraceCheckUtils]: 26: Hoare triple {6072#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:10,878 INFO L273 TraceCheckUtils]: 27: Hoare triple {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:10,879 INFO L273 TraceCheckUtils]: 28: Hoare triple {6073#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:10,880 INFO L273 TraceCheckUtils]: 29: Hoare triple {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:10,881 INFO L273 TraceCheckUtils]: 30: Hoare triple {6074#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:10,882 INFO L273 TraceCheckUtils]: 31: Hoare triple {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:10,883 INFO L273 TraceCheckUtils]: 32: Hoare triple {6075#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:10,883 INFO L273 TraceCheckUtils]: 33: Hoare triple {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:10,884 INFO L273 TraceCheckUtils]: 34: Hoare triple {6076#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:10,885 INFO L273 TraceCheckUtils]: 35: Hoare triple {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:10,886 INFO L273 TraceCheckUtils]: 36: Hoare triple {6077#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:10,887 INFO L273 TraceCheckUtils]: 37: Hoare triple {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:10,888 INFO L273 TraceCheckUtils]: 38: Hoare triple {6078#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:10,888 INFO L273 TraceCheckUtils]: 39: Hoare triple {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:10,889 INFO L273 TraceCheckUtils]: 40: Hoare triple {6079#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:10,890 INFO L273 TraceCheckUtils]: 41: Hoare triple {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:10,891 INFO L273 TraceCheckUtils]: 42: Hoare triple {6080#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:10,892 INFO L273 TraceCheckUtils]: 43: Hoare triple {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:10,893 INFO L273 TraceCheckUtils]: 44: Hoare triple {6081#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:10,893 INFO L273 TraceCheckUtils]: 45: Hoare triple {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume true; {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:10,894 INFO L273 TraceCheckUtils]: 46: Hoare triple {6082#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6225#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:10,895 INFO L273 TraceCheckUtils]: 47: Hoare triple {6225#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume true; {6225#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:10,896 INFO L273 TraceCheckUtils]: 48: Hoare triple {6225#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !(~y~0 % 4294967296 < 1024); {6061#false} is VALID [2018-11-14 17:32:10,896 INFO L256 TraceCheckUtils]: 49: Hoare triple {6061#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {6061#false} is VALID [2018-11-14 17:32:10,896 INFO L273 TraceCheckUtils]: 50: Hoare triple {6061#false} ~cond := #in~cond; {6061#false} is VALID [2018-11-14 17:32:10,896 INFO L273 TraceCheckUtils]: 51: Hoare triple {6061#false} assume ~cond == 0; {6061#false} is VALID [2018-11-14 17:32:10,896 INFO L273 TraceCheckUtils]: 52: Hoare triple {6061#false} assume !false; {6061#false} is VALID [2018-11-14 17:32:10,901 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 462 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:10,921 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:32:10,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 25 [2018-11-14 17:32:10,922 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 53 [2018-11-14 17:32:10,922 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:32:10,922 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states. [2018-11-14 17:32:10,979 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:32:10,980 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-14 17:32:10,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-14 17:32:10,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=531, Unknown=0, NotChecked=0, Total=600 [2018-11-14 17:32:10,980 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 25 states. [2018-11-14 17:32:12,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:12,508 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-11-14 17:32:12,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-14 17:32:12,508 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 53 [2018-11-14 17:32:12,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:32:12,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-14 17:32:12,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 61 transitions. [2018-11-14 17:32:12,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-11-14 17:32:12,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 61 transitions. [2018-11-14 17:32:12,511 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 61 transitions. [2018-11-14 17:32:12,567 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:32:12,568 INFO L225 Difference]: With dead ends: 61 [2018-11-14 17:32:12,568 INFO L226 Difference]: Without dead ends: 56 [2018-11-14 17:32:12,569 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 51 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=69, Invalid=531, Unknown=0, NotChecked=0, Total=600 [2018-11-14 17:32:12,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-11-14 17:32:12,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-11-14 17:32:12,600 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:32:12,600 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand 56 states. [2018-11-14 17:32:12,601 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand 56 states. [2018-11-14 17:32:12,601 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 56 states. [2018-11-14 17:32:12,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:12,602 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-11-14 17:32:12,602 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-11-14 17:32:12,603 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:32:12,603 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:32:12,603 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand 56 states. [2018-11-14 17:32:12,603 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 56 states. [2018-11-14 17:32:12,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:12,604 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-11-14 17:32:12,604 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-11-14 17:32:12,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:32:12,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:32:12,604 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:32:12,605 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:32:12,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-11-14 17:32:12,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-11-14 17:32:12,605 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 53 [2018-11-14 17:32:12,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:32:12,606 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-11-14 17:32:12,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-14 17:32:12,606 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-11-14 17:32:12,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-14 17:32:12,606 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:32:12,606 INFO L375 BasicCegarLoop]: trace histogram [23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:32:12,606 INFO L423 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:32:12,607 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:32:12,607 INFO L82 PathProgramCache]: Analyzing trace with hash -232170980, now seen corresponding path program 22 times [2018-11-14 17:32:12,607 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:32:12,607 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:32:12,607 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:32:12,608 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:32:12,608 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:32:12,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:14,271 INFO L256 TraceCheckUtils]: 0: Hoare triple {6532#true} call ULTIMATE.init(); {6532#true} is VALID [2018-11-14 17:32:14,271 INFO L273 TraceCheckUtils]: 1: Hoare triple {6532#true} assume true; {6532#true} is VALID [2018-11-14 17:32:14,272 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6532#true} {6532#true} #32#return; {6532#true} is VALID [2018-11-14 17:32:14,272 INFO L256 TraceCheckUtils]: 3: Hoare triple {6532#true} call #t~ret1 := main(); {6532#true} is VALID [2018-11-14 17:32:14,272 INFO L273 TraceCheckUtils]: 4: Hoare triple {6532#true} ~x~0 := 1;~y~0 := 0; {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:14,272 INFO L273 TraceCheckUtils]: 5: Hoare triple {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:14,273 INFO L273 TraceCheckUtils]: 6: Hoare triple {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:14,274 INFO L273 TraceCheckUtils]: 7: Hoare triple {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:14,275 INFO L273 TraceCheckUtils]: 8: Hoare triple {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:14,275 INFO L273 TraceCheckUtils]: 9: Hoare triple {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:14,276 INFO L273 TraceCheckUtils]: 10: Hoare triple {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:14,277 INFO L273 TraceCheckUtils]: 11: Hoare triple {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:14,278 INFO L273 TraceCheckUtils]: 12: Hoare triple {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:14,279 INFO L273 TraceCheckUtils]: 13: Hoare triple {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:14,280 INFO L273 TraceCheckUtils]: 14: Hoare triple {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:14,281 INFO L273 TraceCheckUtils]: 15: Hoare triple {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:14,282 INFO L273 TraceCheckUtils]: 16: Hoare triple {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:14,282 INFO L273 TraceCheckUtils]: 17: Hoare triple {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:14,283 INFO L273 TraceCheckUtils]: 18: Hoare triple {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:14,284 INFO L273 TraceCheckUtils]: 19: Hoare triple {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:14,285 INFO L273 TraceCheckUtils]: 20: Hoare triple {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:14,286 INFO L273 TraceCheckUtils]: 21: Hoare triple {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:14,287 INFO L273 TraceCheckUtils]: 22: Hoare triple {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:14,287 INFO L273 TraceCheckUtils]: 23: Hoare triple {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:14,289 INFO L273 TraceCheckUtils]: 24: Hoare triple {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:14,289 INFO L273 TraceCheckUtils]: 25: Hoare triple {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:14,290 INFO L273 TraceCheckUtils]: 26: Hoare triple {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:14,291 INFO L273 TraceCheckUtils]: 27: Hoare triple {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:14,292 INFO L273 TraceCheckUtils]: 28: Hoare triple {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:14,293 INFO L273 TraceCheckUtils]: 29: Hoare triple {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:14,294 INFO L273 TraceCheckUtils]: 30: Hoare triple {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:14,294 INFO L273 TraceCheckUtils]: 31: Hoare triple {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:14,295 INFO L273 TraceCheckUtils]: 32: Hoare triple {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:14,296 INFO L273 TraceCheckUtils]: 33: Hoare triple {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:14,297 INFO L273 TraceCheckUtils]: 34: Hoare triple {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:14,298 INFO L273 TraceCheckUtils]: 35: Hoare triple {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:14,299 INFO L273 TraceCheckUtils]: 36: Hoare triple {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:14,299 INFO L273 TraceCheckUtils]: 37: Hoare triple {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:14,301 INFO L273 TraceCheckUtils]: 38: Hoare triple {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:14,301 INFO L273 TraceCheckUtils]: 39: Hoare triple {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:14,302 INFO L273 TraceCheckUtils]: 40: Hoare triple {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:14,303 INFO L273 TraceCheckUtils]: 41: Hoare triple {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:14,304 INFO L273 TraceCheckUtils]: 42: Hoare triple {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:14,305 INFO L273 TraceCheckUtils]: 43: Hoare triple {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:14,308 INFO L273 TraceCheckUtils]: 44: Hoare triple {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:14,313 INFO L273 TraceCheckUtils]: 45: Hoare triple {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume true; {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:14,315 INFO L273 TraceCheckUtils]: 46: Hoare triple {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:14,316 INFO L273 TraceCheckUtils]: 47: Hoare triple {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume true; {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:14,317 INFO L273 TraceCheckUtils]: 48: Hoare triple {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6556#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 22))} is VALID [2018-11-14 17:32:14,317 INFO L273 TraceCheckUtils]: 49: Hoare triple {6556#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 22))} assume true; {6556#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 22))} is VALID [2018-11-14 17:32:14,318 INFO L273 TraceCheckUtils]: 50: Hoare triple {6556#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 22))} assume !(~y~0 % 4294967296 < 1024); {6533#false} is VALID [2018-11-14 17:32:14,318 INFO L256 TraceCheckUtils]: 51: Hoare triple {6533#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {6533#false} is VALID [2018-11-14 17:32:14,318 INFO L273 TraceCheckUtils]: 52: Hoare triple {6533#false} ~cond := #in~cond; {6533#false} is VALID [2018-11-14 17:32:14,318 INFO L273 TraceCheckUtils]: 53: Hoare triple {6533#false} assume ~cond == 0; {6533#false} is VALID [2018-11-14 17:32:14,318 INFO L273 TraceCheckUtils]: 54: Hoare triple {6533#false} assume !false; {6533#false} is VALID [2018-11-14 17:32:14,322 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:14,322 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:32:14,322 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:32:14,330 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-14 17:32:14,353 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-14 17:32:14,353 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:32:14,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:14,365 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:32:14,737 INFO L256 TraceCheckUtils]: 0: Hoare triple {6532#true} call ULTIMATE.init(); {6532#true} is VALID [2018-11-14 17:32:14,737 INFO L273 TraceCheckUtils]: 1: Hoare triple {6532#true} assume true; {6532#true} is VALID [2018-11-14 17:32:14,737 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {6532#true} {6532#true} #32#return; {6532#true} is VALID [2018-11-14 17:32:14,737 INFO L256 TraceCheckUtils]: 3: Hoare triple {6532#true} call #t~ret1 := main(); {6532#true} is VALID [2018-11-14 17:32:14,738 INFO L273 TraceCheckUtils]: 4: Hoare triple {6532#true} ~x~0 := 1;~y~0 := 0; {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:14,739 INFO L273 TraceCheckUtils]: 5: Hoare triple {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:14,740 INFO L273 TraceCheckUtils]: 6: Hoare triple {6534#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:14,740 INFO L273 TraceCheckUtils]: 7: Hoare triple {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:14,741 INFO L273 TraceCheckUtils]: 8: Hoare triple {6535#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:14,741 INFO L273 TraceCheckUtils]: 9: Hoare triple {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:14,742 INFO L273 TraceCheckUtils]: 10: Hoare triple {6536#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:14,743 INFO L273 TraceCheckUtils]: 11: Hoare triple {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:14,744 INFO L273 TraceCheckUtils]: 12: Hoare triple {6537#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:14,744 INFO L273 TraceCheckUtils]: 13: Hoare triple {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:14,745 INFO L273 TraceCheckUtils]: 14: Hoare triple {6538#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:14,746 INFO L273 TraceCheckUtils]: 15: Hoare triple {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:14,747 INFO L273 TraceCheckUtils]: 16: Hoare triple {6539#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:14,748 INFO L273 TraceCheckUtils]: 17: Hoare triple {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:14,749 INFO L273 TraceCheckUtils]: 18: Hoare triple {6540#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:14,749 INFO L273 TraceCheckUtils]: 19: Hoare triple {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:14,750 INFO L273 TraceCheckUtils]: 20: Hoare triple {6541#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:14,751 INFO L273 TraceCheckUtils]: 21: Hoare triple {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:14,752 INFO L273 TraceCheckUtils]: 22: Hoare triple {6542#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:14,753 INFO L273 TraceCheckUtils]: 23: Hoare triple {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:14,754 INFO L273 TraceCheckUtils]: 24: Hoare triple {6543#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:14,754 INFO L273 TraceCheckUtils]: 25: Hoare triple {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:14,755 INFO L273 TraceCheckUtils]: 26: Hoare triple {6544#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:14,756 INFO L273 TraceCheckUtils]: 27: Hoare triple {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:14,757 INFO L273 TraceCheckUtils]: 28: Hoare triple {6545#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:14,758 INFO L273 TraceCheckUtils]: 29: Hoare triple {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:14,759 INFO L273 TraceCheckUtils]: 30: Hoare triple {6546#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:14,759 INFO L273 TraceCheckUtils]: 31: Hoare triple {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:14,760 INFO L273 TraceCheckUtils]: 32: Hoare triple {6547#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:14,761 INFO L273 TraceCheckUtils]: 33: Hoare triple {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:14,762 INFO L273 TraceCheckUtils]: 34: Hoare triple {6548#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:14,763 INFO L273 TraceCheckUtils]: 35: Hoare triple {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:14,764 INFO L273 TraceCheckUtils]: 36: Hoare triple {6549#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:14,764 INFO L273 TraceCheckUtils]: 37: Hoare triple {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:14,765 INFO L273 TraceCheckUtils]: 38: Hoare triple {6550#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:14,766 INFO L273 TraceCheckUtils]: 39: Hoare triple {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:14,767 INFO L273 TraceCheckUtils]: 40: Hoare triple {6551#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:14,768 INFO L273 TraceCheckUtils]: 41: Hoare triple {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:14,769 INFO L273 TraceCheckUtils]: 42: Hoare triple {6552#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:14,769 INFO L273 TraceCheckUtils]: 43: Hoare triple {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:14,770 INFO L273 TraceCheckUtils]: 44: Hoare triple {6553#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:14,771 INFO L273 TraceCheckUtils]: 45: Hoare triple {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume true; {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:14,772 INFO L273 TraceCheckUtils]: 46: Hoare triple {6554#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:14,773 INFO L273 TraceCheckUtils]: 47: Hoare triple {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume true; {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:14,774 INFO L273 TraceCheckUtils]: 48: Hoare triple {6555#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {6704#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-14 17:32:14,774 INFO L273 TraceCheckUtils]: 49: Hoare triple {6704#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume true; {6704#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-14 17:32:14,775 INFO L273 TraceCheckUtils]: 50: Hoare triple {6704#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !(~y~0 % 4294967296 < 1024); {6533#false} is VALID [2018-11-14 17:32:14,775 INFO L256 TraceCheckUtils]: 51: Hoare triple {6533#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {6533#false} is VALID [2018-11-14 17:32:14,776 INFO L273 TraceCheckUtils]: 52: Hoare triple {6533#false} ~cond := #in~cond; {6533#false} is VALID [2018-11-14 17:32:14,776 INFO L273 TraceCheckUtils]: 53: Hoare triple {6533#false} assume ~cond == 0; {6533#false} is VALID [2018-11-14 17:32:14,776 INFO L273 TraceCheckUtils]: 54: Hoare triple {6533#false} assume !false; {6533#false} is VALID [2018-11-14 17:32:14,782 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:14,802 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:32:14,802 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 26 [2018-11-14 17:32:14,802 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 55 [2018-11-14 17:32:14,802 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:32:14,803 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states. [2018-11-14 17:32:14,864 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:32:14,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-14 17:32:14,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-14 17:32:14,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2018-11-14 17:32:14,865 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 26 states. [2018-11-14 17:32:16,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:16,920 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-11-14 17:32:16,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-14 17:32:16,920 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 55 [2018-11-14 17:32:16,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:32:16,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-14 17:32:16,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 63 transitions. [2018-11-14 17:32:16,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-14 17:32:16,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 63 transitions. [2018-11-14 17:32:16,923 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states and 63 transitions. [2018-11-14 17:32:16,996 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:32:16,998 INFO L225 Difference]: With dead ends: 63 [2018-11-14 17:32:16,998 INFO L226 Difference]: Without dead ends: 58 [2018-11-14 17:32:16,999 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2018-11-14 17:32:16,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-11-14 17:32:17,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-11-14 17:32:17,030 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:32:17,030 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand 58 states. [2018-11-14 17:32:17,030 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand 58 states. [2018-11-14 17:32:17,030 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 58 states. [2018-11-14 17:32:17,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:17,031 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-11-14 17:32:17,031 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-11-14 17:32:17,032 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:32:17,032 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:32:17,032 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand 58 states. [2018-11-14 17:32:17,032 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 58 states. [2018-11-14 17:32:17,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:32:17,033 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-11-14 17:32:17,033 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-11-14 17:32:17,034 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:32:17,034 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:32:17,034 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:32:17,034 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:32:17,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-11-14 17:32:17,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-11-14 17:32:17,035 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 55 [2018-11-14 17:32:17,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:32:17,035 INFO L480 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-11-14 17:32:17,036 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-14 17:32:17,036 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-11-14 17:32:17,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-11-14 17:32:17,036 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:32:17,036 INFO L375 BasicCegarLoop]: trace histogram [24, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:32:17,037 INFO L423 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:32:17,037 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:32:17,037 INFO L82 PathProgramCache]: Analyzing trace with hash 1216973154, now seen corresponding path program 23 times [2018-11-14 17:32:17,037 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:32:17,037 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:32:17,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:32:17,038 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:32:17,038 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:32:17,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:32:17,678 INFO L256 TraceCheckUtils]: 0: Hoare triple {7021#true} call ULTIMATE.init(); {7021#true} is VALID [2018-11-14 17:32:17,678 INFO L273 TraceCheckUtils]: 1: Hoare triple {7021#true} assume true; {7021#true} is VALID [2018-11-14 17:32:17,678 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {7021#true} {7021#true} #32#return; {7021#true} is VALID [2018-11-14 17:32:17,678 INFO L256 TraceCheckUtils]: 3: Hoare triple {7021#true} call #t~ret1 := main(); {7021#true} is VALID [2018-11-14 17:32:17,693 INFO L273 TraceCheckUtils]: 4: Hoare triple {7021#true} ~x~0 := 1;~y~0 := 0; {7023#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:17,693 INFO L273 TraceCheckUtils]: 5: Hoare triple {7023#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume true; {7023#(and (<= 0 main_~y~0) (<= main_~y~0 0))} is VALID [2018-11-14 17:32:17,694 INFO L273 TraceCheckUtils]: 6: Hoare triple {7023#(and (<= 0 main_~y~0) (<= main_~y~0 0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7024#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:17,698 INFO L273 TraceCheckUtils]: 7: Hoare triple {7024#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume true; {7024#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2018-11-14 17:32:17,698 INFO L273 TraceCheckUtils]: 8: Hoare triple {7024#(and (<= 1 main_~y~0) (<= main_~y~0 1))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7025#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:17,699 INFO L273 TraceCheckUtils]: 9: Hoare triple {7025#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume true; {7025#(and (<= main_~y~0 2) (<= 2 main_~y~0))} is VALID [2018-11-14 17:32:17,699 INFO L273 TraceCheckUtils]: 10: Hoare triple {7025#(and (<= main_~y~0 2) (<= 2 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7026#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:17,700 INFO L273 TraceCheckUtils]: 11: Hoare triple {7026#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume true; {7026#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2018-11-14 17:32:17,700 INFO L273 TraceCheckUtils]: 12: Hoare triple {7026#(and (<= main_~y~0 3) (<= 3 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7027#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:17,701 INFO L273 TraceCheckUtils]: 13: Hoare triple {7027#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume true; {7027#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2018-11-14 17:32:17,702 INFO L273 TraceCheckUtils]: 14: Hoare triple {7027#(and (<= main_~y~0 4) (<= 4 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7028#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:17,702 INFO L273 TraceCheckUtils]: 15: Hoare triple {7028#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume true; {7028#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2018-11-14 17:32:17,703 INFO L273 TraceCheckUtils]: 16: Hoare triple {7028#(and (<= 5 main_~y~0) (<= main_~y~0 5))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7029#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:17,704 INFO L273 TraceCheckUtils]: 17: Hoare triple {7029#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume true; {7029#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2018-11-14 17:32:17,705 INFO L273 TraceCheckUtils]: 18: Hoare triple {7029#(and (<= main_~y~0 6) (<= 6 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7030#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:17,706 INFO L273 TraceCheckUtils]: 19: Hoare triple {7030#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume true; {7030#(and (<= main_~y~0 7) (<= 7 main_~y~0))} is VALID [2018-11-14 17:32:17,707 INFO L273 TraceCheckUtils]: 20: Hoare triple {7030#(and (<= main_~y~0 7) (<= 7 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7031#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:17,707 INFO L273 TraceCheckUtils]: 21: Hoare triple {7031#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume true; {7031#(and (<= 8 main_~y~0) (<= main_~y~0 8))} is VALID [2018-11-14 17:32:17,708 INFO L273 TraceCheckUtils]: 22: Hoare triple {7031#(and (<= 8 main_~y~0) (<= main_~y~0 8))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7032#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:17,709 INFO L273 TraceCheckUtils]: 23: Hoare triple {7032#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume true; {7032#(and (<= main_~y~0 9) (<= 9 main_~y~0))} is VALID [2018-11-14 17:32:17,710 INFO L273 TraceCheckUtils]: 24: Hoare triple {7032#(and (<= main_~y~0 9) (<= 9 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7033#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:17,710 INFO L273 TraceCheckUtils]: 25: Hoare triple {7033#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume true; {7033#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2018-11-14 17:32:17,711 INFO L273 TraceCheckUtils]: 26: Hoare triple {7033#(and (<= main_~y~0 10) (<= 10 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7034#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:17,712 INFO L273 TraceCheckUtils]: 27: Hoare triple {7034#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume true; {7034#(and (<= 11 main_~y~0) (<= main_~y~0 11))} is VALID [2018-11-14 17:32:17,713 INFO L273 TraceCheckUtils]: 28: Hoare triple {7034#(and (<= 11 main_~y~0) (<= main_~y~0 11))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7035#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:17,714 INFO L273 TraceCheckUtils]: 29: Hoare triple {7035#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume true; {7035#(and (<= main_~y~0 12) (<= 12 main_~y~0))} is VALID [2018-11-14 17:32:17,715 INFO L273 TraceCheckUtils]: 30: Hoare triple {7035#(and (<= main_~y~0 12) (<= 12 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7036#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:17,715 INFO L273 TraceCheckUtils]: 31: Hoare triple {7036#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume true; {7036#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2018-11-14 17:32:17,716 INFO L273 TraceCheckUtils]: 32: Hoare triple {7036#(and (<= main_~y~0 13) (<= 13 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7037#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:17,717 INFO L273 TraceCheckUtils]: 33: Hoare triple {7037#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume true; {7037#(and (<= main_~y~0 14) (<= 14 main_~y~0))} is VALID [2018-11-14 17:32:17,718 INFO L273 TraceCheckUtils]: 34: Hoare triple {7037#(and (<= main_~y~0 14) (<= 14 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7038#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:17,719 INFO L273 TraceCheckUtils]: 35: Hoare triple {7038#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume true; {7038#(and (<= 15 main_~y~0) (<= main_~y~0 15))} is VALID [2018-11-14 17:32:17,720 INFO L273 TraceCheckUtils]: 36: Hoare triple {7038#(and (<= 15 main_~y~0) (<= main_~y~0 15))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7039#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:17,720 INFO L273 TraceCheckUtils]: 37: Hoare triple {7039#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume true; {7039#(and (<= main_~y~0 16) (<= 16 main_~y~0))} is VALID [2018-11-14 17:32:17,721 INFO L273 TraceCheckUtils]: 38: Hoare triple {7039#(and (<= main_~y~0 16) (<= 16 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7040#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:17,722 INFO L273 TraceCheckUtils]: 39: Hoare triple {7040#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume true; {7040#(and (<= main_~y~0 17) (<= 17 main_~y~0))} is VALID [2018-11-14 17:32:17,723 INFO L273 TraceCheckUtils]: 40: Hoare triple {7040#(and (<= main_~y~0 17) (<= 17 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7041#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:17,723 INFO L273 TraceCheckUtils]: 41: Hoare triple {7041#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume true; {7041#(and (<= 18 main_~y~0) (<= main_~y~0 18))} is VALID [2018-11-14 17:32:17,724 INFO L273 TraceCheckUtils]: 42: Hoare triple {7041#(and (<= 18 main_~y~0) (<= main_~y~0 18))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7042#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:17,725 INFO L273 TraceCheckUtils]: 43: Hoare triple {7042#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume true; {7042#(and (<= 19 main_~y~0) (<= main_~y~0 19))} is VALID [2018-11-14 17:32:17,726 INFO L273 TraceCheckUtils]: 44: Hoare triple {7042#(and (<= 19 main_~y~0) (<= main_~y~0 19))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7043#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:17,727 INFO L273 TraceCheckUtils]: 45: Hoare triple {7043#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume true; {7043#(and (<= 20 main_~y~0) (<= main_~y~0 20))} is VALID [2018-11-14 17:32:17,728 INFO L273 TraceCheckUtils]: 46: Hoare triple {7043#(and (<= 20 main_~y~0) (<= main_~y~0 20))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7044#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:17,728 INFO L273 TraceCheckUtils]: 47: Hoare triple {7044#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume true; {7044#(and (<= main_~y~0 21) (<= 21 main_~y~0))} is VALID [2018-11-14 17:32:17,729 INFO L273 TraceCheckUtils]: 48: Hoare triple {7044#(and (<= main_~y~0 21) (<= 21 main_~y~0))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7045#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-14 17:32:17,730 INFO L273 TraceCheckUtils]: 49: Hoare triple {7045#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume true; {7045#(and (<= 22 main_~y~0) (<= main_~y~0 22))} is VALID [2018-11-14 17:32:17,731 INFO L273 TraceCheckUtils]: 50: Hoare triple {7045#(and (<= 22 main_~y~0) (<= main_~y~0 22))} assume !!(~y~0 % 4294967296 < 1024);~x~0 := 0;#t~post0 := ~y~0;~y~0 := #t~post0 + 1;havoc #t~post0; {7046#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 23))} is VALID [2018-11-14 17:32:17,732 INFO L273 TraceCheckUtils]: 51: Hoare triple {7046#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 23))} assume true; {7046#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 23))} is VALID [2018-11-14 17:32:17,733 INFO L273 TraceCheckUtils]: 52: Hoare triple {7046#(and (< 0 (+ (div main_~y~0 4294967296) 1)) (<= main_~y~0 23))} assume !(~y~0 % 4294967296 < 1024); {7022#false} is VALID [2018-11-14 17:32:17,733 INFO L256 TraceCheckUtils]: 53: Hoare triple {7022#false} call __VERIFIER_assert((if ~x~0 % 4294967296 == 1 then 1 else 0)); {7022#false} is VALID [2018-11-14 17:32:17,733 INFO L273 TraceCheckUtils]: 54: Hoare triple {7022#false} ~cond := #in~cond; {7022#false} is VALID [2018-11-14 17:32:17,733 INFO L273 TraceCheckUtils]: 55: Hoare triple {7022#false} assume ~cond == 0; {7022#false} is VALID [2018-11-14 17:32:17,734 INFO L273 TraceCheckUtils]: 56: Hoare triple {7022#false} assume !false; {7022#false} is VALID [2018-11-14 17:32:17,738 INFO L134 CoverageAnalysis]: Checked inductivity of 552 backedges. 0 proven. 552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:32:17,738 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:32:17,738 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:32:17,747 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1