java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/array-tiling/nr5_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-370d6ab [2018-11-14 17:04:40,458 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-14 17:04:40,460 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-14 17:04:40,476 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-14 17:04:40,476 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-14 17:04:40,478 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-14 17:04:40,481 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-14 17:04:40,483 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-14 17:04:40,485 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-14 17:04:40,486 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-14 17:04:40,487 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-14 17:04:40,487 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-14 17:04:40,488 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-14 17:04:40,489 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-14 17:04:40,490 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-14 17:04:40,491 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-14 17:04:40,492 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-14 17:04:40,494 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-14 17:04:40,496 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-14 17:04:40,498 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-14 17:04:40,502 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-14 17:04:40,505 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-14 17:04:40,507 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-11-14 17:04:40,514 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-14 17:04:40,514 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-14 17:04:40,515 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-14 17:04:40,515 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-14 17:04:40,516 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-14 17:04:40,531 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-14 17:04:40,531 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-14 17:04:40,532 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-14 17:04:40,532 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-14 17:04:40,533 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-14 17:04:40,533 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-14 17:04:40,533 INFO L133 SettingsManager]: * Use SBE=true [2018-11-14 17:04:40,533 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-14 17:04:40,533 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-14 17:04:40,534 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-14 17:04:40,534 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-14 17:04:40,534 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-14 17:04:40,534 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-14 17:04:40,534 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-14 17:04:40,534 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-14 17:04:40,535 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-14 17:04:40,535 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-14 17:04:40,535 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-14 17:04:40,535 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-14 17:04:40,535 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-14 17:04:40,536 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-14 17:04:40,536 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-14 17:04:40,536 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:04:40,536 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-14 17:04:40,536 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-14 17:04:40,537 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-14 17:04:40,537 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-14 17:04:40,537 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-14 17:04:40,537 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-14 17:04:40,537 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-14 17:04:40,584 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-14 17:04:40,599 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-14 17:04:40,603 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-14 17:04:40,605 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-14 17:04:40,605 INFO L276 PluginConnector]: CDTParser initialized [2018-11-14 17:04:40,606 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/nr5_true-unreach-call.i [2018-11-14 17:04:40,669 INFO L218 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e9f42dc7f/46c8a747f40b4b2f9b6a0d3e6da20c1e/FLAG8bae463fd [2018-11-14 17:04:41,140 INFO L298 CDTParser]: Found 1 translation units. [2018-11-14 17:04:41,140 INFO L158 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/nr5_true-unreach-call.i [2018-11-14 17:04:41,147 INFO L346 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e9f42dc7f/46c8a747f40b4b2f9b6a0d3e6da20c1e/FLAG8bae463fd [2018-11-14 17:04:41,163 INFO L354 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e9f42dc7f/46c8a747f40b4b2f9b6a0d3e6da20c1e [2018-11-14 17:04:41,173 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-14 17:04:41,174 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-14 17:04:41,175 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-14 17:04:41,175 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-14 17:04:41,179 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-14 17:04:41,181 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,184 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@312b627 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41, skipping insertion in model container [2018-11-14 17:04:41,184 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,195 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-14 17:04:41,223 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-14 17:04:41,493 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:04:41,502 INFO L191 MainTranslator]: Completed pre-run [2018-11-14 17:04:41,534 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-14 17:04:41,559 INFO L195 MainTranslator]: Completed translation [2018-11-14 17:04:41,560 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41 WrapperNode [2018-11-14 17:04:41,560 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-14 17:04:41,561 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-14 17:04:41,561 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-14 17:04:41,561 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-14 17:04:41,575 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,576 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,586 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,586 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,598 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,609 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,610 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... [2018-11-14 17:04:41,613 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-14 17:04:41,614 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-14 17:04:41,614 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-14 17:04:41,614 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-14 17:04:41,615 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-14 17:04:41,747 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-14 17:04:41,747 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-14 17:04:41,747 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-14 17:04:41,747 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-14 17:04:41,747 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-14 17:04:41,748 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-14 17:04:41,748 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-14 17:04:41,748 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-14 17:04:41,748 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-14 17:04:41,748 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-14 17:04:41,748 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-14 17:04:41,749 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-14 17:04:41,749 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-14 17:04:41,749 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-14 17:04:41,749 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-14 17:04:41,751 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-14 17:04:42,426 INFO L278 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-14 17:04:42,427 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:04:42 BoogieIcfgContainer [2018-11-14 17:04:42,427 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-14 17:04:42,428 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-14 17:04:42,428 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-14 17:04:42,432 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-14 17:04:42,433 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.11 05:04:41" (1/3) ... [2018-11-14 17:04:42,433 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ecba12e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:04:42, skipping insertion in model container [2018-11-14 17:04:42,434 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.11 05:04:41" (2/3) ... [2018-11-14 17:04:42,434 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ecba12e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.11 05:04:42, skipping insertion in model container [2018-11-14 17:04:42,434 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.11 05:04:42" (3/3) ... [2018-11-14 17:04:42,436 INFO L112 eAbstractionObserver]: Analyzing ICFG nr5_true-unreach-call.i [2018-11-14 17:04:42,446 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-14 17:04:42,455 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-14 17:04:42,469 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-14 17:04:42,502 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-14 17:04:42,503 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-14 17:04:42,503 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-14 17:04:42,504 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-14 17:04:42,504 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-14 17:04:42,504 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-14 17:04:42,504 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-14 17:04:42,504 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-14 17:04:42,505 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-14 17:04:42,525 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states. [2018-11-14 17:04:42,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-14 17:04:42,533 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:42,534 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:42,536 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:42,542 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:42,543 INFO L82 PathProgramCache]: Analyzing trace with hash -1065126958, now seen corresponding path program 1 times [2018-11-14 17:04:42,545 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:42,546 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:42,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:42,602 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:42,602 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:42,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:42,786 INFO L256 TraceCheckUtils]: 0: Hoare triple {37#true} call ULTIMATE.init(); {37#true} is VALID [2018-11-14 17:04:42,791 INFO L273 TraceCheckUtils]: 1: Hoare triple {37#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {37#true} is VALID [2018-11-14 17:04:42,791 INFO L273 TraceCheckUtils]: 2: Hoare triple {37#true} assume true; {37#true} is VALID [2018-11-14 17:04:42,792 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {37#true} {37#true} #86#return; {37#true} is VALID [2018-11-14 17:04:42,792 INFO L256 TraceCheckUtils]: 4: Hoare triple {37#true} call #t~ret8 := main(); {37#true} is VALID [2018-11-14 17:04:42,793 INFO L273 TraceCheckUtils]: 5: Hoare triple {37#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {37#true} is VALID [2018-11-14 17:04:42,793 INFO L273 TraceCheckUtils]: 6: Hoare triple {37#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {37#true} is VALID [2018-11-14 17:04:42,794 INFO L273 TraceCheckUtils]: 7: Hoare triple {37#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {37#true} is VALID [2018-11-14 17:04:42,808 INFO L273 TraceCheckUtils]: 8: Hoare triple {37#true} assume !true; {38#false} is VALID [2018-11-14 17:04:42,808 INFO L273 TraceCheckUtils]: 9: Hoare triple {38#false} ~i~0 := 0; {38#false} is VALID [2018-11-14 17:04:42,809 INFO L273 TraceCheckUtils]: 10: Hoare triple {38#false} assume true; {38#false} is VALID [2018-11-14 17:04:42,809 INFO L273 TraceCheckUtils]: 11: Hoare triple {38#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {38#false} is VALID [2018-11-14 17:04:42,810 INFO L273 TraceCheckUtils]: 12: Hoare triple {38#false} assume #t~short7; {38#false} is VALID [2018-11-14 17:04:42,810 INFO L256 TraceCheckUtils]: 13: Hoare triple {38#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {38#false} is VALID [2018-11-14 17:04:42,810 INFO L273 TraceCheckUtils]: 14: Hoare triple {38#false} ~cond := #in~cond; {38#false} is VALID [2018-11-14 17:04:42,811 INFO L273 TraceCheckUtils]: 15: Hoare triple {38#false} assume ~cond == 0; {38#false} is VALID [2018-11-14 17:04:42,811 INFO L273 TraceCheckUtils]: 16: Hoare triple {38#false} assume !false; {38#false} is VALID [2018-11-14 17:04:42,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:42,818 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:04:42,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-14 17:04:42,824 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-14 17:04:42,827 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:42,831 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-14 17:04:43,015 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:43,015 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-14 17:04:43,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-14 17:04:43,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:04:43,031 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 2 states. [2018-11-14 17:04:43,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:43,215 INFO L93 Difference]: Finished difference Result 60 states and 79 transitions. [2018-11-14 17:04:43,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-14 17:04:43,215 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-14 17:04:43,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:43,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:04:43,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 79 transitions. [2018-11-14 17:04:43,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-14 17:04:43,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 79 transitions. [2018-11-14 17:04:43,235 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 79 transitions. [2018-11-14 17:04:43,763 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:43,774 INFO L225 Difference]: With dead ends: 60 [2018-11-14 17:04:43,775 INFO L226 Difference]: Without dead ends: 28 [2018-11-14 17:04:43,778 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-14 17:04:43,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-11-14 17:04:43,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-11-14 17:04:43,825 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:43,825 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand 28 states. [2018-11-14 17:04:43,826 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 17:04:43,826 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 17:04:43,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:43,831 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2018-11-14 17:04:43,831 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 17:04:43,831 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:43,832 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:43,832 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand 28 states. [2018-11-14 17:04:43,832 INFO L87 Difference]: Start difference. First operand 28 states. Second operand 28 states. [2018-11-14 17:04:43,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:43,836 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2018-11-14 17:04:43,837 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 17:04:43,837 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:43,838 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:43,838 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:43,838 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:43,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-14 17:04:43,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2018-11-14 17:04:43,843 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 32 transitions. Word has length 17 [2018-11-14 17:04:43,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:43,843 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 32 transitions. [2018-11-14 17:04:43,844 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-14 17:04:43,844 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2018-11-14 17:04:43,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-14 17:04:43,845 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:43,845 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:43,845 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:43,846 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:43,846 INFO L82 PathProgramCache]: Analyzing trace with hash -832945488, now seen corresponding path program 1 times [2018-11-14 17:04:43,846 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:43,846 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:43,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:43,848 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:43,848 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:43,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:44,059 INFO L256 TraceCheckUtils]: 0: Hoare triple {208#true} call ULTIMATE.init(); {208#true} is VALID [2018-11-14 17:04:44,060 INFO L273 TraceCheckUtils]: 1: Hoare triple {208#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {208#true} is VALID [2018-11-14 17:04:44,060 INFO L273 TraceCheckUtils]: 2: Hoare triple {208#true} assume true; {208#true} is VALID [2018-11-14 17:04:44,061 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} #86#return; {208#true} is VALID [2018-11-14 17:04:44,061 INFO L256 TraceCheckUtils]: 4: Hoare triple {208#true} call #t~ret8 := main(); {208#true} is VALID [2018-11-14 17:04:44,061 INFO L273 TraceCheckUtils]: 5: Hoare triple {208#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {208#true} is VALID [2018-11-14 17:04:44,061 INFO L273 TraceCheckUtils]: 6: Hoare triple {208#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {208#true} is VALID [2018-11-14 17:04:44,062 INFO L273 TraceCheckUtils]: 7: Hoare triple {208#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {208#true} is VALID [2018-11-14 17:04:44,062 INFO L273 TraceCheckUtils]: 8: Hoare triple {208#true} assume true; {208#true} is VALID [2018-11-14 17:04:44,062 INFO L273 TraceCheckUtils]: 9: Hoare triple {208#true} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {208#true} is VALID [2018-11-14 17:04:44,063 INFO L273 TraceCheckUtils]: 10: Hoare triple {208#true} ~i~0 := 0; {208#true} is VALID [2018-11-14 17:04:44,063 INFO L273 TraceCheckUtils]: 11: Hoare triple {208#true} assume true; {208#true} is VALID [2018-11-14 17:04:44,063 INFO L273 TraceCheckUtils]: 12: Hoare triple {208#true} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {208#true} is VALID [2018-11-14 17:04:44,065 INFO L273 TraceCheckUtils]: 13: Hoare triple {208#true} assume #t~short7; {210#|main_#t~short7|} is VALID [2018-11-14 17:04:44,067 INFO L256 TraceCheckUtils]: 14: Hoare triple {210#|main_#t~short7|} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {211#(not (= 0 |__VERIFIER_assert_#in~cond|))} is VALID [2018-11-14 17:04:44,068 INFO L273 TraceCheckUtils]: 15: Hoare triple {211#(not (= 0 |__VERIFIER_assert_#in~cond|))} ~cond := #in~cond; {212#(not (= 0 __VERIFIER_assert_~cond))} is VALID [2018-11-14 17:04:44,070 INFO L273 TraceCheckUtils]: 16: Hoare triple {212#(not (= 0 __VERIFIER_assert_~cond))} assume ~cond == 0; {209#false} is VALID [2018-11-14 17:04:44,070 INFO L273 TraceCheckUtils]: 17: Hoare triple {209#false} assume !false; {209#false} is VALID [2018-11-14 17:04:44,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:44,072 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:04:44,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-14 17:04:44,074 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-11-14 17:04:44,075 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:44,075 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-14 17:04:44,123 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:44,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-14 17:04:44,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-14 17:04:44,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:04:44,125 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. Second operand 5 states. [2018-11-14 17:04:44,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:44,829 INFO L93 Difference]: Finished difference Result 36 states and 40 transitions. [2018-11-14 17:04:44,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-14 17:04:44,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-11-14 17:04:44,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:44,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:04:44,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2018-11-14 17:04:44,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:04:44,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 40 transitions. [2018-11-14 17:04:44,835 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 40 transitions. [2018-11-14 17:04:44,898 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:44,900 INFO L225 Difference]: With dead ends: 36 [2018-11-14 17:04:44,901 INFO L226 Difference]: Without dead ends: 34 [2018-11-14 17:04:44,902 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-14 17:04:44,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-11-14 17:04:44,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2018-11-14 17:04:44,926 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:44,926 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand 33 states. [2018-11-14 17:04:44,926 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 33 states. [2018-11-14 17:04:44,926 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 33 states. [2018-11-14 17:04:44,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:44,930 INFO L93 Difference]: Finished difference Result 34 states and 38 transitions. [2018-11-14 17:04:44,930 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 38 transitions. [2018-11-14 17:04:44,930 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:44,931 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:44,931 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 34 states. [2018-11-14 17:04:44,931 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 34 states. [2018-11-14 17:04:44,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:44,934 INFO L93 Difference]: Finished difference Result 34 states and 38 transitions. [2018-11-14 17:04:44,935 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 38 transitions. [2018-11-14 17:04:44,935 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:44,936 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:44,936 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:44,936 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:44,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-14 17:04:44,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2018-11-14 17:04:44,939 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 18 [2018-11-14 17:04:44,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:44,939 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2018-11-14 17:04:44,940 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-14 17:04:44,940 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2018-11-14 17:04:44,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-14 17:04:44,941 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:44,941 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:44,941 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:44,942 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:44,942 INFO L82 PathProgramCache]: Analyzing trace with hash -831098446, now seen corresponding path program 1 times [2018-11-14 17:04:44,942 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:44,942 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:44,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:44,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:44,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:44,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:45,107 INFO L256 TraceCheckUtils]: 0: Hoare triple {376#true} call ULTIMATE.init(); {376#true} is VALID [2018-11-14 17:04:45,108 INFO L273 TraceCheckUtils]: 1: Hoare triple {376#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {376#true} is VALID [2018-11-14 17:04:45,108 INFO L273 TraceCheckUtils]: 2: Hoare triple {376#true} assume true; {376#true} is VALID [2018-11-14 17:04:45,109 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {376#true} {376#true} #86#return; {376#true} is VALID [2018-11-14 17:04:45,109 INFO L256 TraceCheckUtils]: 4: Hoare triple {376#true} call #t~ret8 := main(); {376#true} is VALID [2018-11-14 17:04:45,110 INFO L273 TraceCheckUtils]: 5: Hoare triple {376#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {376#true} is VALID [2018-11-14 17:04:45,111 INFO L273 TraceCheckUtils]: 6: Hoare triple {376#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {378#(<= 2 ~CELLCOUNT~0)} is VALID [2018-11-14 17:04:45,112 INFO L273 TraceCheckUtils]: 7: Hoare triple {378#(<= 2 ~CELLCOUNT~0)} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {379#(and (<= 2 ~CELLCOUNT~0) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))))} is VALID [2018-11-14 17:04:45,116 INFO L273 TraceCheckUtils]: 8: Hoare triple {379#(and (<= 2 ~CELLCOUNT~0) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))))} assume true; {379#(and (<= 2 ~CELLCOUNT~0) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))))} is VALID [2018-11-14 17:04:45,117 INFO L273 TraceCheckUtils]: 9: Hoare triple {379#(and (<= 2 ~CELLCOUNT~0) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))))} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {377#false} is VALID [2018-11-14 17:04:45,117 INFO L273 TraceCheckUtils]: 10: Hoare triple {377#false} ~i~0 := 0; {377#false} is VALID [2018-11-14 17:04:45,117 INFO L273 TraceCheckUtils]: 11: Hoare triple {377#false} assume true; {377#false} is VALID [2018-11-14 17:04:45,118 INFO L273 TraceCheckUtils]: 12: Hoare triple {377#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {377#false} is VALID [2018-11-14 17:04:45,118 INFO L273 TraceCheckUtils]: 13: Hoare triple {377#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {377#false} is VALID [2018-11-14 17:04:45,118 INFO L256 TraceCheckUtils]: 14: Hoare triple {377#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {377#false} is VALID [2018-11-14 17:04:45,119 INFO L273 TraceCheckUtils]: 15: Hoare triple {377#false} ~cond := #in~cond; {377#false} is VALID [2018-11-14 17:04:45,119 INFO L273 TraceCheckUtils]: 16: Hoare triple {377#false} assume ~cond == 0; {377#false} is VALID [2018-11-14 17:04:45,119 INFO L273 TraceCheckUtils]: 17: Hoare triple {377#false} assume !false; {377#false} is VALID [2018-11-14 17:04:45,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:45,121 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:04:45,121 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-14 17:04:45,122 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-11-14 17:04:45,122 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:45,122 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 17:04:45,168 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:45,168 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 17:04:45,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 17:04:45,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-14 17:04:45,169 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. Second operand 4 states. [2018-11-14 17:04:45,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:45,425 INFO L93 Difference]: Finished difference Result 58 states and 66 transitions. [2018-11-14 17:04:45,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 17:04:45,426 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-11-14 17:04:45,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:45,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:04:45,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 56 transitions. [2018-11-14 17:04:45,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:04:45,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 56 transitions. [2018-11-14 17:04:45,435 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 56 transitions. [2018-11-14 17:04:45,561 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:45,564 INFO L225 Difference]: With dead ends: 58 [2018-11-14 17:04:45,564 INFO L226 Difference]: Without dead ends: 40 [2018-11-14 17:04:45,565 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-14 17:04:45,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-14 17:04:45,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 35. [2018-11-14 17:04:45,592 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:45,592 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 35 states. [2018-11-14 17:04:45,592 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 35 states. [2018-11-14 17:04:45,593 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 35 states. [2018-11-14 17:04:45,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:45,596 INFO L93 Difference]: Finished difference Result 40 states and 46 transitions. [2018-11-14 17:04:45,596 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 46 transitions. [2018-11-14 17:04:45,597 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:45,597 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:45,598 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 40 states. [2018-11-14 17:04:45,598 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 40 states. [2018-11-14 17:04:45,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:45,601 INFO L93 Difference]: Finished difference Result 40 states and 46 transitions. [2018-11-14 17:04:45,601 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 46 transitions. [2018-11-14 17:04:45,602 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:45,602 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:45,602 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:45,603 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:45,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-14 17:04:45,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 39 transitions. [2018-11-14 17:04:45,605 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 39 transitions. Word has length 18 [2018-11-14 17:04:45,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:45,606 INFO L480 AbstractCegarLoop]: Abstraction has 35 states and 39 transitions. [2018-11-14 17:04:45,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 17:04:45,606 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 39 transitions. [2018-11-14 17:04:45,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-11-14 17:04:45,607 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:45,607 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:45,608 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:45,608 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:45,608 INFO L82 PathProgramCache]: Analyzing trace with hash 1996039917, now seen corresponding path program 1 times [2018-11-14 17:04:45,608 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:45,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:45,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:45,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:45,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:45,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:45,694 INFO L256 TraceCheckUtils]: 0: Hoare triple {585#true} call ULTIMATE.init(); {585#true} is VALID [2018-11-14 17:04:45,695 INFO L273 TraceCheckUtils]: 1: Hoare triple {585#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {585#true} is VALID [2018-11-14 17:04:45,695 INFO L273 TraceCheckUtils]: 2: Hoare triple {585#true} assume true; {585#true} is VALID [2018-11-14 17:04:45,695 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {585#true} {585#true} #86#return; {585#true} is VALID [2018-11-14 17:04:45,696 INFO L256 TraceCheckUtils]: 4: Hoare triple {585#true} call #t~ret8 := main(); {585#true} is VALID [2018-11-14 17:04:45,696 INFO L273 TraceCheckUtils]: 5: Hoare triple {585#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {585#true} is VALID [2018-11-14 17:04:45,696 INFO L273 TraceCheckUtils]: 6: Hoare triple {585#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {585#true} is VALID [2018-11-14 17:04:45,696 INFO L273 TraceCheckUtils]: 7: Hoare triple {585#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {585#true} is VALID [2018-11-14 17:04:45,696 INFO L273 TraceCheckUtils]: 8: Hoare triple {585#true} assume true; {585#true} is VALID [2018-11-14 17:04:45,716 INFO L273 TraceCheckUtils]: 9: Hoare triple {585#true} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {587#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:45,730 INFO L273 TraceCheckUtils]: 10: Hoare triple {587#(<= 5 main_~j~0)} assume true; {587#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:45,731 INFO L273 TraceCheckUtils]: 11: Hoare triple {587#(<= 5 main_~j~0)} assume !(~j~0 >= 1); {586#false} is VALID [2018-11-14 17:04:45,732 INFO L273 TraceCheckUtils]: 12: Hoare triple {586#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {586#false} is VALID [2018-11-14 17:04:45,732 INFO L273 TraceCheckUtils]: 13: Hoare triple {586#false} assume true; {586#false} is VALID [2018-11-14 17:04:45,732 INFO L273 TraceCheckUtils]: 14: Hoare triple {586#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {586#false} is VALID [2018-11-14 17:04:45,733 INFO L273 TraceCheckUtils]: 15: Hoare triple {586#false} ~i~0 := 0; {586#false} is VALID [2018-11-14 17:04:45,733 INFO L273 TraceCheckUtils]: 16: Hoare triple {586#false} assume true; {586#false} is VALID [2018-11-14 17:04:45,733 INFO L273 TraceCheckUtils]: 17: Hoare triple {586#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {586#false} is VALID [2018-11-14 17:04:45,733 INFO L273 TraceCheckUtils]: 18: Hoare triple {586#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {586#false} is VALID [2018-11-14 17:04:45,734 INFO L256 TraceCheckUtils]: 19: Hoare triple {586#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {586#false} is VALID [2018-11-14 17:04:45,734 INFO L273 TraceCheckUtils]: 20: Hoare triple {586#false} ~cond := #in~cond; {586#false} is VALID [2018-11-14 17:04:45,734 INFO L273 TraceCheckUtils]: 21: Hoare triple {586#false} assume ~cond == 0; {586#false} is VALID [2018-11-14 17:04:45,734 INFO L273 TraceCheckUtils]: 22: Hoare triple {586#false} assume !false; {586#false} is VALID [2018-11-14 17:04:45,735 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:45,736 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-14 17:04:45,736 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-14 17:04:45,736 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 23 [2018-11-14 17:04:45,736 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:45,737 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-14 17:04:45,809 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:45,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-14 17:04:45,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-14 17:04:45,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-14 17:04:45,810 INFO L87 Difference]: Start difference. First operand 35 states and 39 transitions. Second operand 3 states. [2018-11-14 17:04:46,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:46,010 INFO L93 Difference]: Finished difference Result 64 states and 74 transitions. [2018-11-14 17:04:46,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-14 17:04:46,010 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 23 [2018-11-14 17:04:46,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:46,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-14 17:04:46,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 62 transitions. [2018-11-14 17:04:46,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-14 17:04:46,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 62 transitions. [2018-11-14 17:04:46,015 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 62 transitions. [2018-11-14 17:04:46,111 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:46,114 INFO L225 Difference]: With dead ends: 64 [2018-11-14 17:04:46,114 INFO L226 Difference]: Without dead ends: 39 [2018-11-14 17:04:46,115 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-14 17:04:46,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-14 17:04:46,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 37. [2018-11-14 17:04:46,142 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:46,142 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 37 states. [2018-11-14 17:04:46,142 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 37 states. [2018-11-14 17:04:46,142 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 37 states. [2018-11-14 17:04:46,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:46,145 INFO L93 Difference]: Finished difference Result 39 states and 44 transitions. [2018-11-14 17:04:46,145 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 44 transitions. [2018-11-14 17:04:46,145 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:46,145 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:46,146 INFO L74 IsIncluded]: Start isIncluded. First operand 37 states. Second operand 39 states. [2018-11-14 17:04:46,146 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 39 states. [2018-11-14 17:04:46,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:46,148 INFO L93 Difference]: Finished difference Result 39 states and 44 transitions. [2018-11-14 17:04:46,149 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 44 transitions. [2018-11-14 17:04:46,149 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:46,149 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:46,150 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:46,150 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:46,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-11-14 17:04:46,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 41 transitions. [2018-11-14 17:04:46,152 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 41 transitions. Word has length 23 [2018-11-14 17:04:46,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:46,153 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 41 transitions. [2018-11-14 17:04:46,153 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-14 17:04:46,153 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 41 transitions. [2018-11-14 17:04:46,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-11-14 17:04:46,154 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:46,154 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:46,155 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:46,155 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:46,155 INFO L82 PathProgramCache]: Analyzing trace with hash -995813500, now seen corresponding path program 1 times [2018-11-14 17:04:46,155 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:46,155 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:46,156 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:46,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:46,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:46,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:46,281 INFO L256 TraceCheckUtils]: 0: Hoare triple {802#true} call ULTIMATE.init(); {802#true} is VALID [2018-11-14 17:04:46,281 INFO L273 TraceCheckUtils]: 1: Hoare triple {802#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {802#true} is VALID [2018-11-14 17:04:46,281 INFO L273 TraceCheckUtils]: 2: Hoare triple {802#true} assume true; {802#true} is VALID [2018-11-14 17:04:46,282 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {802#true} {802#true} #86#return; {802#true} is VALID [2018-11-14 17:04:46,282 INFO L256 TraceCheckUtils]: 4: Hoare triple {802#true} call #t~ret8 := main(); {802#true} is VALID [2018-11-14 17:04:46,282 INFO L273 TraceCheckUtils]: 5: Hoare triple {802#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {802#true} is VALID [2018-11-14 17:04:46,282 INFO L273 TraceCheckUtils]: 6: Hoare triple {802#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {802#true} is VALID [2018-11-14 17:04:46,283 INFO L273 TraceCheckUtils]: 7: Hoare triple {802#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {802#true} is VALID [2018-11-14 17:04:46,283 INFO L273 TraceCheckUtils]: 8: Hoare triple {802#true} assume true; {802#true} is VALID [2018-11-14 17:04:46,284 INFO L273 TraceCheckUtils]: 9: Hoare triple {802#true} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,285 INFO L273 TraceCheckUtils]: 10: Hoare triple {804#(<= 5 main_~j~0)} assume true; {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,285 INFO L273 TraceCheckUtils]: 11: Hoare triple {804#(<= 5 main_~j~0)} assume !!(~j~0 >= 1); {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,286 INFO L273 TraceCheckUtils]: 12: Hoare triple {804#(<= 5 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,287 INFO L273 TraceCheckUtils]: 13: Hoare triple {804#(<= 5 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {805#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:46,287 INFO L273 TraceCheckUtils]: 14: Hoare triple {805#(<= 4 main_~j~0)} assume true; {805#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:46,290 INFO L273 TraceCheckUtils]: 15: Hoare triple {805#(<= 4 main_~j~0)} assume !(~j~0 >= 1); {803#false} is VALID [2018-11-14 17:04:46,290 INFO L273 TraceCheckUtils]: 16: Hoare triple {803#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {803#false} is VALID [2018-11-14 17:04:46,291 INFO L273 TraceCheckUtils]: 17: Hoare triple {803#false} assume true; {803#false} is VALID [2018-11-14 17:04:46,291 INFO L273 TraceCheckUtils]: 18: Hoare triple {803#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {803#false} is VALID [2018-11-14 17:04:46,292 INFO L273 TraceCheckUtils]: 19: Hoare triple {803#false} ~i~0 := 0; {803#false} is VALID [2018-11-14 17:04:46,292 INFO L273 TraceCheckUtils]: 20: Hoare triple {803#false} assume true; {803#false} is VALID [2018-11-14 17:04:46,292 INFO L273 TraceCheckUtils]: 21: Hoare triple {803#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {803#false} is VALID [2018-11-14 17:04:46,293 INFO L273 TraceCheckUtils]: 22: Hoare triple {803#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {803#false} is VALID [2018-11-14 17:04:46,293 INFO L256 TraceCheckUtils]: 23: Hoare triple {803#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {803#false} is VALID [2018-11-14 17:04:46,293 INFO L273 TraceCheckUtils]: 24: Hoare triple {803#false} ~cond := #in~cond; {803#false} is VALID [2018-11-14 17:04:46,294 INFO L273 TraceCheckUtils]: 25: Hoare triple {803#false} assume ~cond == 0; {803#false} is VALID [2018-11-14 17:04:46,294 INFO L273 TraceCheckUtils]: 26: Hoare triple {803#false} assume !false; {803#false} is VALID [2018-11-14 17:04:46,296 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:46,296 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:04:46,296 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:04:46,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:46,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:46,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:46,374 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:04:46,678 INFO L256 TraceCheckUtils]: 0: Hoare triple {802#true} call ULTIMATE.init(); {802#true} is VALID [2018-11-14 17:04:46,678 INFO L273 TraceCheckUtils]: 1: Hoare triple {802#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {802#true} is VALID [2018-11-14 17:04:46,678 INFO L273 TraceCheckUtils]: 2: Hoare triple {802#true} assume true; {802#true} is VALID [2018-11-14 17:04:46,679 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {802#true} {802#true} #86#return; {802#true} is VALID [2018-11-14 17:04:46,679 INFO L256 TraceCheckUtils]: 4: Hoare triple {802#true} call #t~ret8 := main(); {802#true} is VALID [2018-11-14 17:04:46,679 INFO L273 TraceCheckUtils]: 5: Hoare triple {802#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {802#true} is VALID [2018-11-14 17:04:46,680 INFO L273 TraceCheckUtils]: 6: Hoare triple {802#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {802#true} is VALID [2018-11-14 17:04:46,680 INFO L273 TraceCheckUtils]: 7: Hoare triple {802#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {802#true} is VALID [2018-11-14 17:04:46,680 INFO L273 TraceCheckUtils]: 8: Hoare triple {802#true} assume true; {802#true} is VALID [2018-11-14 17:04:46,683 INFO L273 TraceCheckUtils]: 9: Hoare triple {802#true} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,685 INFO L273 TraceCheckUtils]: 10: Hoare triple {804#(<= 5 main_~j~0)} assume true; {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,685 INFO L273 TraceCheckUtils]: 11: Hoare triple {804#(<= 5 main_~j~0)} assume !!(~j~0 >= 1); {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,687 INFO L273 TraceCheckUtils]: 12: Hoare triple {804#(<= 5 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {804#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:46,689 INFO L273 TraceCheckUtils]: 13: Hoare triple {804#(<= 5 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {805#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:46,691 INFO L273 TraceCheckUtils]: 14: Hoare triple {805#(<= 4 main_~j~0)} assume true; {805#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:46,692 INFO L273 TraceCheckUtils]: 15: Hoare triple {805#(<= 4 main_~j~0)} assume !(~j~0 >= 1); {803#false} is VALID [2018-11-14 17:04:46,692 INFO L273 TraceCheckUtils]: 16: Hoare triple {803#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {803#false} is VALID [2018-11-14 17:04:46,692 INFO L273 TraceCheckUtils]: 17: Hoare triple {803#false} assume true; {803#false} is VALID [2018-11-14 17:04:46,693 INFO L273 TraceCheckUtils]: 18: Hoare triple {803#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {803#false} is VALID [2018-11-14 17:04:46,693 INFO L273 TraceCheckUtils]: 19: Hoare triple {803#false} ~i~0 := 0; {803#false} is VALID [2018-11-14 17:04:46,694 INFO L273 TraceCheckUtils]: 20: Hoare triple {803#false} assume true; {803#false} is VALID [2018-11-14 17:04:46,694 INFO L273 TraceCheckUtils]: 21: Hoare triple {803#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {803#false} is VALID [2018-11-14 17:04:46,695 INFO L273 TraceCheckUtils]: 22: Hoare triple {803#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {803#false} is VALID [2018-11-14 17:04:46,695 INFO L256 TraceCheckUtils]: 23: Hoare triple {803#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {803#false} is VALID [2018-11-14 17:04:46,695 INFO L273 TraceCheckUtils]: 24: Hoare triple {803#false} ~cond := #in~cond; {803#false} is VALID [2018-11-14 17:04:46,696 INFO L273 TraceCheckUtils]: 25: Hoare triple {803#false} assume ~cond == 0; {803#false} is VALID [2018-11-14 17:04:46,696 INFO L273 TraceCheckUtils]: 26: Hoare triple {803#false} assume !false; {803#false} is VALID [2018-11-14 17:04:46,698 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:46,724 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:04:46,724 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-14 17:04:46,725 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-11-14 17:04:46,725 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:46,725 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-14 17:04:46,797 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:46,797 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-14 17:04:46,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-14 17:04:46,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-14 17:04:46,798 INFO L87 Difference]: Start difference. First operand 37 states and 41 transitions. Second operand 4 states. [2018-11-14 17:04:47,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:47,024 INFO L93 Difference]: Finished difference Result 70 states and 81 transitions. [2018-11-14 17:04:47,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-14 17:04:47,025 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-11-14 17:04:47,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:47,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:04:47,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 67 transitions. [2018-11-14 17:04:47,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-14 17:04:47,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 67 transitions. [2018-11-14 17:04:47,030 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 67 transitions. [2018-11-14 17:04:47,135 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:47,137 INFO L225 Difference]: With dead ends: 70 [2018-11-14 17:04:47,137 INFO L226 Difference]: Without dead ends: 43 [2018-11-14 17:04:47,138 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-14 17:04:47,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-11-14 17:04:47,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 41. [2018-11-14 17:04:47,207 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:47,207 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand 41 states. [2018-11-14 17:04:47,207 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 41 states. [2018-11-14 17:04:47,207 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 41 states. [2018-11-14 17:04:47,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:47,209 INFO L93 Difference]: Finished difference Result 43 states and 49 transitions. [2018-11-14 17:04:47,209 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 49 transitions. [2018-11-14 17:04:47,210 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:47,210 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:47,211 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 43 states. [2018-11-14 17:04:47,211 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 43 states. [2018-11-14 17:04:47,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:47,213 INFO L93 Difference]: Finished difference Result 43 states and 49 transitions. [2018-11-14 17:04:47,213 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 49 transitions. [2018-11-14 17:04:47,214 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:47,214 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:47,214 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:47,214 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:47,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-14 17:04:47,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 46 transitions. [2018-11-14 17:04:47,217 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 46 transitions. Word has length 27 [2018-11-14 17:04:47,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:47,217 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 46 transitions. [2018-11-14 17:04:47,217 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-14 17:04:47,218 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 46 transitions. [2018-11-14 17:04:47,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-14 17:04:47,219 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:47,219 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:47,219 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:47,220 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:47,220 INFO L82 PathProgramCache]: Analyzing trace with hash -2094472037, now seen corresponding path program 2 times [2018-11-14 17:04:47,220 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:47,220 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:47,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:47,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:47,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:47,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:47,406 INFO L256 TraceCheckUtils]: 0: Hoare triple {1119#true} call ULTIMATE.init(); {1119#true} is VALID [2018-11-14 17:04:47,407 INFO L273 TraceCheckUtils]: 1: Hoare triple {1119#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {1119#true} is VALID [2018-11-14 17:04:47,407 INFO L273 TraceCheckUtils]: 2: Hoare triple {1119#true} assume true; {1119#true} is VALID [2018-11-14 17:04:47,408 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1119#true} {1119#true} #86#return; {1119#true} is VALID [2018-11-14 17:04:47,408 INFO L256 TraceCheckUtils]: 4: Hoare triple {1119#true} call #t~ret8 := main(); {1119#true} is VALID [2018-11-14 17:04:47,408 INFO L273 TraceCheckUtils]: 5: Hoare triple {1119#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1119#true} is VALID [2018-11-14 17:04:47,408 INFO L273 TraceCheckUtils]: 6: Hoare triple {1119#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {1119#true} is VALID [2018-11-14 17:04:47,409 INFO L273 TraceCheckUtils]: 7: Hoare triple {1119#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {1119#true} is VALID [2018-11-14 17:04:47,409 INFO L273 TraceCheckUtils]: 8: Hoare triple {1119#true} assume true; {1119#true} is VALID [2018-11-14 17:04:47,409 INFO L273 TraceCheckUtils]: 9: Hoare triple {1119#true} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,410 INFO L273 TraceCheckUtils]: 10: Hoare triple {1121#(<= 5 main_~j~0)} assume true; {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,422 INFO L273 TraceCheckUtils]: 11: Hoare triple {1121#(<= 5 main_~j~0)} assume !!(~j~0 >= 1); {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,423 INFO L273 TraceCheckUtils]: 12: Hoare triple {1121#(<= 5 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,424 INFO L273 TraceCheckUtils]: 13: Hoare triple {1121#(<= 5 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,424 INFO L273 TraceCheckUtils]: 14: Hoare triple {1122#(<= 4 main_~j~0)} assume true; {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,426 INFO L273 TraceCheckUtils]: 15: Hoare triple {1122#(<= 4 main_~j~0)} assume !!(~j~0 >= 1); {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,426 INFO L273 TraceCheckUtils]: 16: Hoare triple {1122#(<= 4 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,428 INFO L273 TraceCheckUtils]: 17: Hoare triple {1122#(<= 4 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1123#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:47,433 INFO L273 TraceCheckUtils]: 18: Hoare triple {1123#(<= 3 main_~j~0)} assume true; {1123#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:47,434 INFO L273 TraceCheckUtils]: 19: Hoare triple {1123#(<= 3 main_~j~0)} assume !(~j~0 >= 1); {1120#false} is VALID [2018-11-14 17:04:47,434 INFO L273 TraceCheckUtils]: 20: Hoare triple {1120#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {1120#false} is VALID [2018-11-14 17:04:47,434 INFO L273 TraceCheckUtils]: 21: Hoare triple {1120#false} assume true; {1120#false} is VALID [2018-11-14 17:04:47,434 INFO L273 TraceCheckUtils]: 22: Hoare triple {1120#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {1120#false} is VALID [2018-11-14 17:04:47,435 INFO L273 TraceCheckUtils]: 23: Hoare triple {1120#false} ~i~0 := 0; {1120#false} is VALID [2018-11-14 17:04:47,435 INFO L273 TraceCheckUtils]: 24: Hoare triple {1120#false} assume true; {1120#false} is VALID [2018-11-14 17:04:47,435 INFO L273 TraceCheckUtils]: 25: Hoare triple {1120#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {1120#false} is VALID [2018-11-14 17:04:47,435 INFO L273 TraceCheckUtils]: 26: Hoare triple {1120#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {1120#false} is VALID [2018-11-14 17:04:47,436 INFO L256 TraceCheckUtils]: 27: Hoare triple {1120#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {1120#false} is VALID [2018-11-14 17:04:47,436 INFO L273 TraceCheckUtils]: 28: Hoare triple {1120#false} ~cond := #in~cond; {1120#false} is VALID [2018-11-14 17:04:47,436 INFO L273 TraceCheckUtils]: 29: Hoare triple {1120#false} assume ~cond == 0; {1120#false} is VALID [2018-11-14 17:04:47,437 INFO L273 TraceCheckUtils]: 30: Hoare triple {1120#false} assume !false; {1120#false} is VALID [2018-11-14 17:04:47,439 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:47,439 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:04:47,439 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:04:47,449 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-14 17:04:47,483 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:04:47,483 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:04:47,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:47,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:04:47,741 INFO L256 TraceCheckUtils]: 0: Hoare triple {1119#true} call ULTIMATE.init(); {1119#true} is VALID [2018-11-14 17:04:47,742 INFO L273 TraceCheckUtils]: 1: Hoare triple {1119#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {1119#true} is VALID [2018-11-14 17:04:47,742 INFO L273 TraceCheckUtils]: 2: Hoare triple {1119#true} assume true; {1119#true} is VALID [2018-11-14 17:04:47,743 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1119#true} {1119#true} #86#return; {1119#true} is VALID [2018-11-14 17:04:47,743 INFO L256 TraceCheckUtils]: 4: Hoare triple {1119#true} call #t~ret8 := main(); {1119#true} is VALID [2018-11-14 17:04:47,743 INFO L273 TraceCheckUtils]: 5: Hoare triple {1119#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1119#true} is VALID [2018-11-14 17:04:47,744 INFO L273 TraceCheckUtils]: 6: Hoare triple {1119#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {1119#true} is VALID [2018-11-14 17:04:47,744 INFO L273 TraceCheckUtils]: 7: Hoare triple {1119#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {1119#true} is VALID [2018-11-14 17:04:47,744 INFO L273 TraceCheckUtils]: 8: Hoare triple {1119#true} assume true; {1119#true} is VALID [2018-11-14 17:04:47,745 INFO L273 TraceCheckUtils]: 9: Hoare triple {1119#true} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,745 INFO L273 TraceCheckUtils]: 10: Hoare triple {1121#(<= 5 main_~j~0)} assume true; {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,746 INFO L273 TraceCheckUtils]: 11: Hoare triple {1121#(<= 5 main_~j~0)} assume !!(~j~0 >= 1); {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,746 INFO L273 TraceCheckUtils]: 12: Hoare triple {1121#(<= 5 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1121#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:47,747 INFO L273 TraceCheckUtils]: 13: Hoare triple {1121#(<= 5 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,747 INFO L273 TraceCheckUtils]: 14: Hoare triple {1122#(<= 4 main_~j~0)} assume true; {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,748 INFO L273 TraceCheckUtils]: 15: Hoare triple {1122#(<= 4 main_~j~0)} assume !!(~j~0 >= 1); {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,748 INFO L273 TraceCheckUtils]: 16: Hoare triple {1122#(<= 4 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1122#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:47,749 INFO L273 TraceCheckUtils]: 17: Hoare triple {1122#(<= 4 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1123#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:47,749 INFO L273 TraceCheckUtils]: 18: Hoare triple {1123#(<= 3 main_~j~0)} assume true; {1123#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:47,750 INFO L273 TraceCheckUtils]: 19: Hoare triple {1123#(<= 3 main_~j~0)} assume !(~j~0 >= 1); {1120#false} is VALID [2018-11-14 17:04:47,751 INFO L273 TraceCheckUtils]: 20: Hoare triple {1120#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {1120#false} is VALID [2018-11-14 17:04:47,751 INFO L273 TraceCheckUtils]: 21: Hoare triple {1120#false} assume true; {1120#false} is VALID [2018-11-14 17:04:47,751 INFO L273 TraceCheckUtils]: 22: Hoare triple {1120#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {1120#false} is VALID [2018-11-14 17:04:47,752 INFO L273 TraceCheckUtils]: 23: Hoare triple {1120#false} ~i~0 := 0; {1120#false} is VALID [2018-11-14 17:04:47,752 INFO L273 TraceCheckUtils]: 24: Hoare triple {1120#false} assume true; {1120#false} is VALID [2018-11-14 17:04:47,752 INFO L273 TraceCheckUtils]: 25: Hoare triple {1120#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {1120#false} is VALID [2018-11-14 17:04:47,753 INFO L273 TraceCheckUtils]: 26: Hoare triple {1120#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {1120#false} is VALID [2018-11-14 17:04:47,753 INFO L256 TraceCheckUtils]: 27: Hoare triple {1120#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {1120#false} is VALID [2018-11-14 17:04:47,753 INFO L273 TraceCheckUtils]: 28: Hoare triple {1120#false} ~cond := #in~cond; {1120#false} is VALID [2018-11-14 17:04:47,754 INFO L273 TraceCheckUtils]: 29: Hoare triple {1120#false} assume ~cond == 0; {1120#false} is VALID [2018-11-14 17:04:47,754 INFO L273 TraceCheckUtils]: 30: Hoare triple {1120#false} assume !false; {1120#false} is VALID [2018-11-14 17:04:47,756 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:47,782 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:04:47,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-14 17:04:47,783 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2018-11-14 17:04:47,783 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:47,783 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-14 17:04:47,822 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:47,823 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-14 17:04:47,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-14 17:04:47,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:04:47,824 INFO L87 Difference]: Start difference. First operand 41 states and 46 transitions. Second operand 5 states. [2018-11-14 17:04:48,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:48,061 INFO L93 Difference]: Finished difference Result 78 states and 91 transitions. [2018-11-14 17:04:48,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-14 17:04:48,061 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2018-11-14 17:04:48,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:48,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:04:48,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 72 transitions. [2018-11-14 17:04:48,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:04:48,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 72 transitions. [2018-11-14 17:04:48,066 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 72 transitions. [2018-11-14 17:04:48,273 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:48,275 INFO L225 Difference]: With dead ends: 78 [2018-11-14 17:04:48,275 INFO L226 Difference]: Without dead ends: 47 [2018-11-14 17:04:48,276 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:04:48,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-11-14 17:04:48,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 45. [2018-11-14 17:04:48,354 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:48,355 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand 45 states. [2018-11-14 17:04:48,355 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 45 states. [2018-11-14 17:04:48,355 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 45 states. [2018-11-14 17:04:48,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:48,357 INFO L93 Difference]: Finished difference Result 47 states and 54 transitions. [2018-11-14 17:04:48,357 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 54 transitions. [2018-11-14 17:04:48,358 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:48,358 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:48,358 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 47 states. [2018-11-14 17:04:48,358 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 47 states. [2018-11-14 17:04:48,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:48,361 INFO L93 Difference]: Finished difference Result 47 states and 54 transitions. [2018-11-14 17:04:48,361 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 54 transitions. [2018-11-14 17:04:48,362 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:48,362 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:48,362 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:48,362 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:48,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-11-14 17:04:48,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 51 transitions. [2018-11-14 17:04:48,364 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 51 transitions. Word has length 31 [2018-11-14 17:04:48,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:48,365 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 51 transitions. [2018-11-14 17:04:48,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-14 17:04:48,365 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 51 transitions. [2018-11-14 17:04:48,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-14 17:04:48,366 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:48,366 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:48,366 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:48,367 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:48,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1841148366, now seen corresponding path program 3 times [2018-11-14 17:04:48,367 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:48,367 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:48,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:48,368 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:04:48,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:48,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:48,542 INFO L256 TraceCheckUtils]: 0: Hoare triple {1472#true} call ULTIMATE.init(); {1472#true} is VALID [2018-11-14 17:04:48,543 INFO L273 TraceCheckUtils]: 1: Hoare triple {1472#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {1472#true} is VALID [2018-11-14 17:04:48,543 INFO L273 TraceCheckUtils]: 2: Hoare triple {1472#true} assume true; {1472#true} is VALID [2018-11-14 17:04:48,543 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1472#true} {1472#true} #86#return; {1472#true} is VALID [2018-11-14 17:04:48,544 INFO L256 TraceCheckUtils]: 4: Hoare triple {1472#true} call #t~ret8 := main(); {1472#true} is VALID [2018-11-14 17:04:48,544 INFO L273 TraceCheckUtils]: 5: Hoare triple {1472#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1472#true} is VALID [2018-11-14 17:04:48,545 INFO L273 TraceCheckUtils]: 6: Hoare triple {1472#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,546 INFO L273 TraceCheckUtils]: 7: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,547 INFO L273 TraceCheckUtils]: 8: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,547 INFO L273 TraceCheckUtils]: 9: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,547 INFO L273 TraceCheckUtils]: 10: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,553 INFO L273 TraceCheckUtils]: 11: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~j~0 >= 1); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,554 INFO L273 TraceCheckUtils]: 12: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,555 INFO L273 TraceCheckUtils]: 13: Hoare triple {1474#(<= 2 main_~MINVAL~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,555 INFO L273 TraceCheckUtils]: 14: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,556 INFO L273 TraceCheckUtils]: 15: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~j~0 >= 1); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,556 INFO L273 TraceCheckUtils]: 16: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,556 INFO L273 TraceCheckUtils]: 17: Hoare triple {1474#(<= 2 main_~MINVAL~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,557 INFO L273 TraceCheckUtils]: 18: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,557 INFO L273 TraceCheckUtils]: 19: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~j~0 >= 1); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,558 INFO L273 TraceCheckUtils]: 20: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1475#(<= 2 main_~j~0)} is VALID [2018-11-14 17:04:48,559 INFO L273 TraceCheckUtils]: 21: Hoare triple {1475#(<= 2 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1476#(<= 1 main_~j~0)} is VALID [2018-11-14 17:04:48,559 INFO L273 TraceCheckUtils]: 22: Hoare triple {1476#(<= 1 main_~j~0)} assume true; {1476#(<= 1 main_~j~0)} is VALID [2018-11-14 17:04:48,560 INFO L273 TraceCheckUtils]: 23: Hoare triple {1476#(<= 1 main_~j~0)} assume !(~j~0 >= 1); {1473#false} is VALID [2018-11-14 17:04:48,560 INFO L273 TraceCheckUtils]: 24: Hoare triple {1473#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {1473#false} is VALID [2018-11-14 17:04:48,560 INFO L273 TraceCheckUtils]: 25: Hoare triple {1473#false} assume true; {1473#false} is VALID [2018-11-14 17:04:48,561 INFO L273 TraceCheckUtils]: 26: Hoare triple {1473#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {1473#false} is VALID [2018-11-14 17:04:48,561 INFO L273 TraceCheckUtils]: 27: Hoare triple {1473#false} ~i~0 := 0; {1473#false} is VALID [2018-11-14 17:04:48,561 INFO L273 TraceCheckUtils]: 28: Hoare triple {1473#false} assume true; {1473#false} is VALID [2018-11-14 17:04:48,562 INFO L273 TraceCheckUtils]: 29: Hoare triple {1473#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {1473#false} is VALID [2018-11-14 17:04:48,562 INFO L273 TraceCheckUtils]: 30: Hoare triple {1473#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {1473#false} is VALID [2018-11-14 17:04:48,563 INFO L256 TraceCheckUtils]: 31: Hoare triple {1473#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {1473#false} is VALID [2018-11-14 17:04:48,563 INFO L273 TraceCheckUtils]: 32: Hoare triple {1473#false} ~cond := #in~cond; {1473#false} is VALID [2018-11-14 17:04:48,563 INFO L273 TraceCheckUtils]: 33: Hoare triple {1473#false} assume ~cond == 0; {1473#false} is VALID [2018-11-14 17:04:48,564 INFO L273 TraceCheckUtils]: 34: Hoare triple {1473#false} assume !false; {1473#false} is VALID [2018-11-14 17:04:48,566 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-14 17:04:48,566 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:04:48,566 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:04:48,576 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-14 17:04:48,623 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-14 17:04:48,623 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:04:48,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:48,634 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:04:48,748 INFO L256 TraceCheckUtils]: 0: Hoare triple {1472#true} call ULTIMATE.init(); {1472#true} is VALID [2018-11-14 17:04:48,748 INFO L273 TraceCheckUtils]: 1: Hoare triple {1472#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {1472#true} is VALID [2018-11-14 17:04:48,749 INFO L273 TraceCheckUtils]: 2: Hoare triple {1472#true} assume true; {1472#true} is VALID [2018-11-14 17:04:48,749 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1472#true} {1472#true} #86#return; {1472#true} is VALID [2018-11-14 17:04:48,750 INFO L256 TraceCheckUtils]: 4: Hoare triple {1472#true} call #t~ret8 := main(); {1472#true} is VALID [2018-11-14 17:04:48,750 INFO L273 TraceCheckUtils]: 5: Hoare triple {1472#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1472#true} is VALID [2018-11-14 17:04:48,756 INFO L273 TraceCheckUtils]: 6: Hoare triple {1472#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,756 INFO L273 TraceCheckUtils]: 7: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,757 INFO L273 TraceCheckUtils]: 8: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,757 INFO L273 TraceCheckUtils]: 9: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,757 INFO L273 TraceCheckUtils]: 10: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,758 INFO L273 TraceCheckUtils]: 11: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~j~0 >= 1); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,758 INFO L273 TraceCheckUtils]: 12: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,759 INFO L273 TraceCheckUtils]: 13: Hoare triple {1474#(<= 2 main_~MINVAL~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,759 INFO L273 TraceCheckUtils]: 14: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,760 INFO L273 TraceCheckUtils]: 15: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~j~0 >= 1); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,760 INFO L273 TraceCheckUtils]: 16: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,761 INFO L273 TraceCheckUtils]: 17: Hoare triple {1474#(<= 2 main_~MINVAL~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,762 INFO L273 TraceCheckUtils]: 18: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume true; {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,763 INFO L273 TraceCheckUtils]: 19: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume !!(~j~0 >= 1); {1474#(<= 2 main_~MINVAL~0)} is VALID [2018-11-14 17:04:48,764 INFO L273 TraceCheckUtils]: 20: Hoare triple {1474#(<= 2 main_~MINVAL~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1475#(<= 2 main_~j~0)} is VALID [2018-11-14 17:04:48,765 INFO L273 TraceCheckUtils]: 21: Hoare triple {1475#(<= 2 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1476#(<= 1 main_~j~0)} is VALID [2018-11-14 17:04:48,765 INFO L273 TraceCheckUtils]: 22: Hoare triple {1476#(<= 1 main_~j~0)} assume true; {1476#(<= 1 main_~j~0)} is VALID [2018-11-14 17:04:48,766 INFO L273 TraceCheckUtils]: 23: Hoare triple {1476#(<= 1 main_~j~0)} assume !(~j~0 >= 1); {1473#false} is VALID [2018-11-14 17:04:48,767 INFO L273 TraceCheckUtils]: 24: Hoare triple {1473#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {1473#false} is VALID [2018-11-14 17:04:48,767 INFO L273 TraceCheckUtils]: 25: Hoare triple {1473#false} assume true; {1473#false} is VALID [2018-11-14 17:04:48,767 INFO L273 TraceCheckUtils]: 26: Hoare triple {1473#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {1473#false} is VALID [2018-11-14 17:04:48,768 INFO L273 TraceCheckUtils]: 27: Hoare triple {1473#false} ~i~0 := 0; {1473#false} is VALID [2018-11-14 17:04:48,768 INFO L273 TraceCheckUtils]: 28: Hoare triple {1473#false} assume true; {1473#false} is VALID [2018-11-14 17:04:48,769 INFO L273 TraceCheckUtils]: 29: Hoare triple {1473#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {1473#false} is VALID [2018-11-14 17:04:48,769 INFO L273 TraceCheckUtils]: 30: Hoare triple {1473#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {1473#false} is VALID [2018-11-14 17:04:48,770 INFO L256 TraceCheckUtils]: 31: Hoare triple {1473#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {1473#false} is VALID [2018-11-14 17:04:48,770 INFO L273 TraceCheckUtils]: 32: Hoare triple {1473#false} ~cond := #in~cond; {1473#false} is VALID [2018-11-14 17:04:48,771 INFO L273 TraceCheckUtils]: 33: Hoare triple {1473#false} assume ~cond == 0; {1473#false} is VALID [2018-11-14 17:04:48,771 INFO L273 TraceCheckUtils]: 34: Hoare triple {1473#false} assume !false; {1473#false} is VALID [2018-11-14 17:04:48,773 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-14 17:04:48,805 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:04:48,805 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-11-14 17:04:48,806 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-11-14 17:04:48,806 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:48,806 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-14 17:04:48,873 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:48,873 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-14 17:04:48,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-14 17:04:48,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-14 17:04:48,874 INFO L87 Difference]: Start difference. First operand 45 states and 51 transitions. Second operand 5 states. [2018-11-14 17:04:49,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:49,097 INFO L93 Difference]: Finished difference Result 86 states and 99 transitions. [2018-11-14 17:04:49,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-14 17:04:49,098 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-11-14 17:04:49,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:49,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:04:49,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 64 transitions. [2018-11-14 17:04:49,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-14 17:04:49,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 64 transitions. [2018-11-14 17:04:49,103 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 64 transitions. [2018-11-14 17:04:49,313 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:49,315 INFO L225 Difference]: With dead ends: 86 [2018-11-14 17:04:49,316 INFO L226 Difference]: Without dead ends: 51 [2018-11-14 17:04:49,316 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-14 17:04:49,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-11-14 17:04:49,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 45. [2018-11-14 17:04:49,391 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:49,391 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand 45 states. [2018-11-14 17:04:49,391 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand 45 states. [2018-11-14 17:04:49,391 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 45 states. [2018-11-14 17:04:49,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:49,394 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2018-11-14 17:04:49,394 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2018-11-14 17:04:49,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:49,395 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:49,395 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 51 states. [2018-11-14 17:04:49,395 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 51 states. [2018-11-14 17:04:49,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:49,398 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2018-11-14 17:04:49,398 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2018-11-14 17:04:49,398 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:49,399 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:49,399 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:49,399 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:49,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-11-14 17:04:49,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 51 transitions. [2018-11-14 17:04:49,401 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 51 transitions. Word has length 35 [2018-11-14 17:04:49,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:49,401 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 51 transitions. [2018-11-14 17:04:49,402 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-14 17:04:49,402 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 51 transitions. [2018-11-14 17:04:49,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-14 17:04:49,402 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:49,403 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:49,403 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:49,403 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:49,403 INFO L82 PathProgramCache]: Analyzing trace with hash 1173955252, now seen corresponding path program 1 times [2018-11-14 17:04:49,403 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:49,404 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:49,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:49,405 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-14 17:04:49,405 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:49,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:49,522 INFO L256 TraceCheckUtils]: 0: Hoare triple {1860#true} call ULTIMATE.init(); {1860#true} is VALID [2018-11-14 17:04:49,522 INFO L273 TraceCheckUtils]: 1: Hoare triple {1860#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {1860#true} is VALID [2018-11-14 17:04:49,523 INFO L273 TraceCheckUtils]: 2: Hoare triple {1860#true} assume true; {1860#true} is VALID [2018-11-14 17:04:49,523 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1860#true} {1860#true} #86#return; {1860#true} is VALID [2018-11-14 17:04:49,524 INFO L256 TraceCheckUtils]: 4: Hoare triple {1860#true} call #t~ret8 := main(); {1860#true} is VALID [2018-11-14 17:04:49,524 INFO L273 TraceCheckUtils]: 5: Hoare triple {1860#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1860#true} is VALID [2018-11-14 17:04:49,524 INFO L273 TraceCheckUtils]: 6: Hoare triple {1860#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {1860#true} is VALID [2018-11-14 17:04:49,524 INFO L273 TraceCheckUtils]: 7: Hoare triple {1860#true} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {1860#true} is VALID [2018-11-14 17:04:49,525 INFO L273 TraceCheckUtils]: 8: Hoare triple {1860#true} assume true; {1860#true} is VALID [2018-11-14 17:04:49,526 INFO L273 TraceCheckUtils]: 9: Hoare triple {1860#true} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {1862#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:49,529 INFO L273 TraceCheckUtils]: 10: Hoare triple {1862#(<= 5 main_~j~0)} assume true; {1862#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:49,529 INFO L273 TraceCheckUtils]: 11: Hoare triple {1862#(<= 5 main_~j~0)} assume !!(~j~0 >= 1); {1862#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:49,531 INFO L273 TraceCheckUtils]: 12: Hoare triple {1862#(<= 5 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1862#(<= 5 main_~j~0)} is VALID [2018-11-14 17:04:49,531 INFO L273 TraceCheckUtils]: 13: Hoare triple {1862#(<= 5 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1863#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:49,533 INFO L273 TraceCheckUtils]: 14: Hoare triple {1863#(<= 4 main_~j~0)} assume true; {1863#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:49,533 INFO L273 TraceCheckUtils]: 15: Hoare triple {1863#(<= 4 main_~j~0)} assume !!(~j~0 >= 1); {1863#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:49,535 INFO L273 TraceCheckUtils]: 16: Hoare triple {1863#(<= 4 main_~j~0)} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1863#(<= 4 main_~j~0)} is VALID [2018-11-14 17:04:49,535 INFO L273 TraceCheckUtils]: 17: Hoare triple {1863#(<= 4 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1864#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:49,537 INFO L273 TraceCheckUtils]: 18: Hoare triple {1864#(<= 3 main_~j~0)} assume true; {1864#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:49,537 INFO L273 TraceCheckUtils]: 19: Hoare triple {1864#(<= 3 main_~j~0)} assume !!(~j~0 >= 1); {1864#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:49,539 INFO L273 TraceCheckUtils]: 20: Hoare triple {1864#(<= 3 main_~j~0)} assume !(~j~0 >= ~MINVAL~0);call write~int(0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1864#(<= 3 main_~j~0)} is VALID [2018-11-14 17:04:49,540 INFO L273 TraceCheckUtils]: 21: Hoare triple {1864#(<= 3 main_~j~0)} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1865#(<= 2 main_~j~0)} is VALID [2018-11-14 17:04:49,541 INFO L273 TraceCheckUtils]: 22: Hoare triple {1865#(<= 2 main_~j~0)} assume true; {1865#(<= 2 main_~j~0)} is VALID [2018-11-14 17:04:49,541 INFO L273 TraceCheckUtils]: 23: Hoare triple {1865#(<= 2 main_~j~0)} assume !(~j~0 >= 1); {1861#false} is VALID [2018-11-14 17:04:49,542 INFO L273 TraceCheckUtils]: 24: Hoare triple {1861#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {1861#false} is VALID [2018-11-14 17:04:49,542 INFO L273 TraceCheckUtils]: 25: Hoare triple {1861#false} assume true; {1861#false} is VALID [2018-11-14 17:04:49,542 INFO L273 TraceCheckUtils]: 26: Hoare triple {1861#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {1861#false} is VALID [2018-11-14 17:04:49,543 INFO L273 TraceCheckUtils]: 27: Hoare triple {1861#false} ~i~0 := 0; {1861#false} is VALID [2018-11-14 17:04:49,543 INFO L273 TraceCheckUtils]: 28: Hoare triple {1861#false} assume true; {1861#false} is VALID [2018-11-14 17:04:49,543 INFO L273 TraceCheckUtils]: 29: Hoare triple {1861#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {1861#false} is VALID [2018-11-14 17:04:49,544 INFO L273 TraceCheckUtils]: 30: Hoare triple {1861#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {1861#false} is VALID [2018-11-14 17:04:49,544 INFO L256 TraceCheckUtils]: 31: Hoare triple {1861#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {1861#false} is VALID [2018-11-14 17:04:49,544 INFO L273 TraceCheckUtils]: 32: Hoare triple {1861#false} ~cond := #in~cond; {1861#false} is VALID [2018-11-14 17:04:49,545 INFO L273 TraceCheckUtils]: 33: Hoare triple {1861#false} assume ~cond == 0; {1861#false} is VALID [2018-11-14 17:04:49,545 INFO L273 TraceCheckUtils]: 34: Hoare triple {1861#false} assume !false; {1861#false} is VALID [2018-11-14 17:04:49,546 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:49,547 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:04:49,547 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:04:49,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:49,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:49,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:49,620 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:04:49,812 INFO L256 TraceCheckUtils]: 0: Hoare triple {1860#true} call ULTIMATE.init(); {1860#true} is VALID [2018-11-14 17:04:49,812 INFO L273 TraceCheckUtils]: 1: Hoare triple {1860#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {1860#true} is VALID [2018-11-14 17:04:49,813 INFO L273 TraceCheckUtils]: 2: Hoare triple {1860#true} assume true; {1860#true} is VALID [2018-11-14 17:04:49,813 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1860#true} {1860#true} #86#return; {1860#true} is VALID [2018-11-14 17:04:49,813 INFO L256 TraceCheckUtils]: 4: Hoare triple {1860#true} call #t~ret8 := main(); {1860#true} is VALID [2018-11-14 17:04:49,813 INFO L273 TraceCheckUtils]: 5: Hoare triple {1860#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1860#true} is VALID [2018-11-14 17:04:49,815 INFO L273 TraceCheckUtils]: 6: Hoare triple {1860#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {1887#(<= main_~MINVAL~0 2)} is VALID [2018-11-14 17:04:49,816 INFO L273 TraceCheckUtils]: 7: Hoare triple {1887#(<= main_~MINVAL~0 2)} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {1887#(<= main_~MINVAL~0 2)} is VALID [2018-11-14 17:04:49,816 INFO L273 TraceCheckUtils]: 8: Hoare triple {1887#(<= main_~MINVAL~0 2)} assume true; {1887#(<= main_~MINVAL~0 2)} is VALID [2018-11-14 17:04:49,817 INFO L273 TraceCheckUtils]: 9: Hoare triple {1887#(<= main_~MINVAL~0 2)} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} is VALID [2018-11-14 17:04:49,818 INFO L273 TraceCheckUtils]: 10: Hoare triple {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} assume true; {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} is VALID [2018-11-14 17:04:49,819 INFO L273 TraceCheckUtils]: 11: Hoare triple {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} assume !!(~j~0 >= 1); {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} is VALID [2018-11-14 17:04:49,821 INFO L273 TraceCheckUtils]: 12: Hoare triple {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} is VALID [2018-11-14 17:04:49,822 INFO L273 TraceCheckUtils]: 13: Hoare triple {1897#(and (<= main_~MINVAL~0 2) (<= 5 main_~j~0))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} is VALID [2018-11-14 17:04:49,823 INFO L273 TraceCheckUtils]: 14: Hoare triple {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} assume true; {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} is VALID [2018-11-14 17:04:49,824 INFO L273 TraceCheckUtils]: 15: Hoare triple {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} assume !!(~j~0 >= 1); {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} is VALID [2018-11-14 17:04:49,824 INFO L273 TraceCheckUtils]: 16: Hoare triple {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} is VALID [2018-11-14 17:04:49,825 INFO L273 TraceCheckUtils]: 17: Hoare triple {1910#(and (<= 4 main_~j~0) (<= main_~MINVAL~0 2))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1923#(and (<= main_~MINVAL~0 2) (<= 3 main_~j~0))} is VALID [2018-11-14 17:04:49,826 INFO L273 TraceCheckUtils]: 18: Hoare triple {1923#(and (<= main_~MINVAL~0 2) (<= 3 main_~j~0))} assume true; {1923#(and (<= main_~MINVAL~0 2) (<= 3 main_~j~0))} is VALID [2018-11-14 17:04:49,826 INFO L273 TraceCheckUtils]: 19: Hoare triple {1923#(and (<= main_~MINVAL~0 2) (<= 3 main_~j~0))} assume !!(~j~0 >= 1); {1923#(and (<= main_~MINVAL~0 2) (<= 3 main_~j~0))} is VALID [2018-11-14 17:04:49,827 INFO L273 TraceCheckUtils]: 20: Hoare triple {1923#(and (<= main_~MINVAL~0 2) (<= 3 main_~j~0))} assume !(~j~0 >= ~MINVAL~0);call write~int(0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {1861#false} is VALID [2018-11-14 17:04:49,828 INFO L273 TraceCheckUtils]: 21: Hoare triple {1861#false} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {1861#false} is VALID [2018-11-14 17:04:49,828 INFO L273 TraceCheckUtils]: 22: Hoare triple {1861#false} assume true; {1861#false} is VALID [2018-11-14 17:04:49,828 INFO L273 TraceCheckUtils]: 23: Hoare triple {1861#false} assume !(~j~0 >= 1); {1861#false} is VALID [2018-11-14 17:04:49,829 INFO L273 TraceCheckUtils]: 24: Hoare triple {1861#false} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {1861#false} is VALID [2018-11-14 17:04:49,829 INFO L273 TraceCheckUtils]: 25: Hoare triple {1861#false} assume true; {1861#false} is VALID [2018-11-14 17:04:49,829 INFO L273 TraceCheckUtils]: 26: Hoare triple {1861#false} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {1861#false} is VALID [2018-11-14 17:04:49,829 INFO L273 TraceCheckUtils]: 27: Hoare triple {1861#false} ~i~0 := 0; {1861#false} is VALID [2018-11-14 17:04:49,830 INFO L273 TraceCheckUtils]: 28: Hoare triple {1861#false} assume true; {1861#false} is VALID [2018-11-14 17:04:49,830 INFO L273 TraceCheckUtils]: 29: Hoare triple {1861#false} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {1861#false} is VALID [2018-11-14 17:04:49,830 INFO L273 TraceCheckUtils]: 30: Hoare triple {1861#false} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {1861#false} is VALID [2018-11-14 17:04:49,831 INFO L256 TraceCheckUtils]: 31: Hoare triple {1861#false} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {1861#false} is VALID [2018-11-14 17:04:49,831 INFO L273 TraceCheckUtils]: 32: Hoare triple {1861#false} ~cond := #in~cond; {1861#false} is VALID [2018-11-14 17:04:49,831 INFO L273 TraceCheckUtils]: 33: Hoare triple {1861#false} assume ~cond == 0; {1861#false} is VALID [2018-11-14 17:04:49,831 INFO L273 TraceCheckUtils]: 34: Hoare triple {1861#false} assume !false; {1861#false} is VALID [2018-11-14 17:04:49,834 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 10 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:49,854 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:04:49,854 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-14 17:04:49,855 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 35 [2018-11-14 17:04:49,855 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:04:49,855 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-14 17:04:49,910 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:49,911 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-14 17:04:49,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-14 17:04:49,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-11-14 17:04:49,912 INFO L87 Difference]: Start difference. First operand 45 states and 51 transitions. Second operand 10 states. [2018-11-14 17:04:50,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:50,365 INFO L93 Difference]: Finished difference Result 89 states and 103 transitions. [2018-11-14 17:04:50,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-14 17:04:50,365 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 35 [2018-11-14 17:04:50,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-14 17:04:50,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-14 17:04:50,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 76 transitions. [2018-11-14 17:04:50,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-14 17:04:50,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 76 transitions. [2018-11-14 17:04:50,370 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 76 transitions. [2018-11-14 17:04:50,465 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:04:50,467 INFO L225 Difference]: With dead ends: 89 [2018-11-14 17:04:50,467 INFO L226 Difference]: Without dead ends: 54 [2018-11-14 17:04:50,468 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2018-11-14 17:04:50,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-11-14 17:04:50,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 53. [2018-11-14 17:04:50,597 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-14 17:04:50,597 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand 53 states. [2018-11-14 17:04:50,597 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 53 states. [2018-11-14 17:04:50,598 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 53 states. [2018-11-14 17:04:50,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:50,600 INFO L93 Difference]: Finished difference Result 54 states and 58 transitions. [2018-11-14 17:04:50,600 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2018-11-14 17:04:50,600 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:50,600 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:50,601 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 54 states. [2018-11-14 17:04:50,601 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 54 states. [2018-11-14 17:04:50,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-14 17:04:50,603 INFO L93 Difference]: Finished difference Result 54 states and 58 transitions. [2018-11-14 17:04:50,603 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 58 transitions. [2018-11-14 17:04:50,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-14 17:04:50,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-14 17:04:50,604 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-14 17:04:50,604 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-14 17:04:50,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-11-14 17:04:50,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 57 transitions. [2018-11-14 17:04:50,606 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 57 transitions. Word has length 35 [2018-11-14 17:04:50,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-14 17:04:50,607 INFO L480 AbstractCegarLoop]: Abstraction has 53 states and 57 transitions. [2018-11-14 17:04:50,607 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-14 17:04:50,607 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 57 transitions. [2018-11-14 17:04:50,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-14 17:04:50,608 INFO L367 BasicCegarLoop]: Found error trace [2018-11-14 17:04:50,608 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-14 17:04:50,608 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-14 17:04:50,609 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-14 17:04:50,609 INFO L82 PathProgramCache]: Analyzing trace with hash 1552141154, now seen corresponding path program 2 times [2018-11-14 17:04:50,609 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-14 17:04:50,609 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-14 17:04:50,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:50,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-14 17:04:50,610 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-14 17:04:50,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:52,330 WARN L179 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 34 [2018-11-14 17:04:53,073 INFO L256 TraceCheckUtils]: 0: Hoare triple {2270#true} call ULTIMATE.init(); {2270#true} is VALID [2018-11-14 17:04:53,073 INFO L273 TraceCheckUtils]: 1: Hoare triple {2270#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {2270#true} is VALID [2018-11-14 17:04:53,074 INFO L273 TraceCheckUtils]: 2: Hoare triple {2270#true} assume true; {2270#true} is VALID [2018-11-14 17:04:53,074 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2270#true} {2270#true} #86#return; {2270#true} is VALID [2018-11-14 17:04:53,074 INFO L256 TraceCheckUtils]: 4: Hoare triple {2270#true} call #t~ret8 := main(); {2270#true} is VALID [2018-11-14 17:04:53,074 INFO L273 TraceCheckUtils]: 5: Hoare triple {2270#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2270#true} is VALID [2018-11-14 17:04:53,076 INFO L273 TraceCheckUtils]: 6: Hoare triple {2270#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {2272#(and (<= 2 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:04:53,077 INFO L273 TraceCheckUtils]: 7: Hoare triple {2272#(and (<= 2 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0))} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {2273#(and (<= 2 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:04:53,078 INFO L273 TraceCheckUtils]: 8: Hoare triple {2273#(and (<= 2 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0))} assume true; {2273#(and (<= 2 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:04:53,079 INFO L273 TraceCheckUtils]: 9: Hoare triple {2273#(and (<= 2 ~CELLCOUNT~0) (<= 2 main_~MINVAL~0) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0))} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {2274#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,080 INFO L273 TraceCheckUtils]: 10: Hoare triple {2274#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (< 0 (+ ~CELLCOUNT~0 1)))} assume true; {2274#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,081 INFO L273 TraceCheckUtils]: 11: Hoare triple {2274#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (< 0 (+ ~CELLCOUNT~0 1)))} assume !!(~j~0 >= 1); {2274#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,083 INFO L273 TraceCheckUtils]: 12: Hoare triple {2274#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (< 0 (+ ~CELLCOUNT~0 1)))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2275#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (= main_~j~0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)))) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,084 INFO L273 TraceCheckUtils]: 13: Hoare triple {2275#(and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) main_~j~0) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 (+ main_~MINVAL~0 3)) (= main_~j~0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)))) (< 0 (+ ~CELLCOUNT~0 1)))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,085 INFO L273 TraceCheckUtils]: 14: Hoare triple {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume true; {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,086 INFO L273 TraceCheckUtils]: 15: Hoare triple {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume !!(~j~0 >= 1); {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,088 INFO L273 TraceCheckUtils]: 16: Hoare triple {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,095 INFO L273 TraceCheckUtils]: 17: Hoare triple {2276#(and (<= (+ main_~j~0 1) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,097 INFO L273 TraceCheckUtils]: 18: Hoare triple {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume true; {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,098 INFO L273 TraceCheckUtils]: 19: Hoare triple {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume !!(~j~0 >= 1); {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,099 INFO L273 TraceCheckUtils]: 20: Hoare triple {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,100 INFO L273 TraceCheckUtils]: 21: Hoare triple {2277#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~j~0 2) (div (+ (- 0) (+ |main_~#volArray~0.offset| (* 20 main_~i~0))) 4)) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2278#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,101 INFO L273 TraceCheckUtils]: 22: Hoare triple {2278#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume true; {2278#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,101 INFO L273 TraceCheckUtils]: 23: Hoare triple {2278#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume !!(~j~0 >= 1); {2278#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} is VALID [2018-11-14 17:04:53,103 INFO L273 TraceCheckUtils]: 24: Hoare triple {2278#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) main_~j~0) 0)))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2279#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,104 INFO L273 TraceCheckUtils]: 25: Hoare triple {2279#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (< 0 (+ ~CELLCOUNT~0 1)))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2280#(and (or (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) 0) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,105 INFO L273 TraceCheckUtils]: 26: Hoare triple {2280#(and (or (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) 0) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume true; {2280#(and (or (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) 0) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,106 INFO L273 TraceCheckUtils]: 27: Hoare triple {2280#(and (or (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) 0) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume !!(~j~0 >= 1); {2280#(and (or (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) 0) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,108 INFO L273 TraceCheckUtils]: 28: Hoare triple {2280#(and (or (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (<= (+ main_~MINVAL~0 3) (select (store (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0)) 0) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume !(~j~0 >= ~MINVAL~0);call write~int(0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2281#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (or (and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0))))) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))))} is VALID [2018-11-14 17:04:53,109 INFO L273 TraceCheckUtils]: 29: Hoare triple {2281#(and (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)) (or (and (= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) (* 4 main_~j~0)) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 20 main_~i~0) |main_~#volArray~0.offset| (* (- 4) main_~j~0))))) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2282#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,110 INFO L273 TraceCheckUtils]: 30: Hoare triple {2282#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume true; {2282#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,111 INFO L273 TraceCheckUtils]: 31: Hoare triple {2282#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume !(~j~0 >= 1); {2282#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,130 INFO L273 TraceCheckUtils]: 32: Hoare triple {2282#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {2283#(and (or (and (<= 2 ~CELLCOUNT~0) (<= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) 39)) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,145 INFO L273 TraceCheckUtils]: 33: Hoare triple {2283#(and (or (and (<= 2 ~CELLCOUNT~0) (<= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) 39)) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume true; {2283#(and (or (and (<= 2 ~CELLCOUNT~0) (<= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) 39)) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} is VALID [2018-11-14 17:04:53,159 INFO L273 TraceCheckUtils]: 34: Hoare triple {2283#(and (or (and (<= 2 ~CELLCOUNT~0) (<= (+ |main_~#volArray~0.offset| (* 20 main_~i~0)) 39)) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= ~CELLCOUNT~0 (* 5 (div ~CELLCOUNT~0 5))) (= |main_~#volArray~0.offset| 0) (< 0 (+ ~CELLCOUNT~0 1)))} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {2284#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:04:53,175 INFO L273 TraceCheckUtils]: 35: Hoare triple {2284#(and (or (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) 0)) (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) 0))) (= |main_~#volArray~0.offset| 0))} ~i~0 := 0; {2285#(and (or (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|))) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|)))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0))} is VALID [2018-11-14 17:04:53,191 INFO L273 TraceCheckUtils]: 36: Hoare triple {2285#(and (or (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|))) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|)))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0))} assume true; {2285#(and (or (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|))) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|)))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0))} is VALID [2018-11-14 17:04:53,193 INFO L273 TraceCheckUtils]: 37: Hoare triple {2285#(and (or (<= (+ main_~MINVAL~0 3) (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|))) (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|)))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0))} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {2286#(and (or |main_#t~short7| (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|)))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0))} is VALID [2018-11-14 17:04:53,194 INFO L273 TraceCheckUtils]: 38: Hoare triple {2286#(and (or |main_#t~short7| (= 0 (select (select |#memory_int| |main_~#volArray~0.base|) (+ (* 4 main_~i~0) |main_~#volArray~0.offset|)))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0))} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {2287#|main_#t~short7|} is VALID [2018-11-14 17:04:53,195 INFO L256 TraceCheckUtils]: 39: Hoare triple {2287#|main_#t~short7|} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {2288#(not (= 0 |__VERIFIER_assert_#in~cond|))} is VALID [2018-11-14 17:04:53,197 INFO L273 TraceCheckUtils]: 40: Hoare triple {2288#(not (= 0 |__VERIFIER_assert_#in~cond|))} ~cond := #in~cond; {2289#(not (= 0 __VERIFIER_assert_~cond))} is VALID [2018-11-14 17:04:53,197 INFO L273 TraceCheckUtils]: 41: Hoare triple {2289#(not (= 0 __VERIFIER_assert_~cond))} assume ~cond == 0; {2271#false} is VALID [2018-11-14 17:04:53,197 INFO L273 TraceCheckUtils]: 42: Hoare triple {2271#false} assume !false; {2271#false} is VALID [2018-11-14 17:04:53,213 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 4 proven. 48 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:04:53,213 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-14 17:04:53,213 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-14 17:04:53,222 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-14 17:04:53,242 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-14 17:04:53,242 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-14 17:04:53,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-14 17:04:53,261 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-14 17:04:53,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 15 [2018-11-14 17:04:53,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 14 [2018-11-14 17:04:53,432 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,435 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,448 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,449 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-14 17:04:53,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-14 17:04:53,569 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,570 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 56 [2018-11-14 17:04:53,605 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,653 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,666 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,666 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-11-14 17:04:53,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 38 [2018-11-14 17:04:53,944 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,947 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,948 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,950 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,952 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,953 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:53,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 143 [2018-11-14 17:04:53,958 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:04:53,980 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:04:54,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-14 17:04:54,003 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:62, output treesize:58 [2018-11-14 17:04:54,007 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:04:54,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 50 [2018-11-14 17:04:54,398 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,399 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,401 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,402 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,404 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,406 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,408 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,409 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,412 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,413 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,414 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,416 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 274 [2018-11-14 17:04:54,423 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-14 17:04:54,460 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-14 17:04:54,498 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-14 17:04:54,499 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:81, output treesize:77 [2018-11-14 17:04:54,515 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:04:54,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-11-14 17:04:54,915 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,916 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,917 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,920 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,921 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,924 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,929 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,930 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,934 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,946 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,948 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,949 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,951 INFO L700 Elim1Store]: detected not equals via solver [2018-11-14 17:04:54,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 13 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 8 case distinctions, treesize of input 49 treesize of output 200 [2018-11-14 17:04:55,016 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 16 xjuncts. [2018-11-14 17:04:55,332 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-11-14 17:04:55,487 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 16 dim-0 vars, and 5 xjuncts. [2018-11-14 17:04:55,488 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:79, output treesize:328 [2018-11-14 17:04:57,585 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-14 17:04:58,046 WARN L179 SmtUtils]: Spent 198.00 ms on a formula simplification that was a NOOP. DAG size: 139 [2018-11-14 17:05:02,418 WARN L179 SmtUtils]: Spent 1.54 s on a formula simplification that was a NOOP. DAG size: 141 [2018-11-14 17:05:04,611 WARN L179 SmtUtils]: Spent 1.50 s on a formula simplification. DAG size of input: 149 DAG size of output: 139 [2018-11-14 17:05:04,850 INFO L256 TraceCheckUtils]: 0: Hoare triple {2270#true} call ULTIMATE.init(); {2270#true} is VALID [2018-11-14 17:05:04,851 INFO L273 TraceCheckUtils]: 1: Hoare triple {2270#true} #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];~CELLCOUNT~0 := 0; {2270#true} is VALID [2018-11-14 17:05:04,851 INFO L273 TraceCheckUtils]: 2: Hoare triple {2270#true} assume true; {2270#true} is VALID [2018-11-14 17:05:04,851 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2270#true} {2270#true} #86#return; {2270#true} is VALID [2018-11-14 17:05:04,852 INFO L256 TraceCheckUtils]: 4: Hoare triple {2270#true} call #t~ret8 := main(); {2270#true} is VALID [2018-11-14 17:05:04,852 INFO L273 TraceCheckUtils]: 5: Hoare triple {2270#true} assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2270#true} is VALID [2018-11-14 17:05:04,853 INFO L273 TraceCheckUtils]: 6: Hoare triple {2270#true} assume ~CELLCOUNT~0 > 1;~DEFAULTVALUE~0 := 1;~MINVAL~0 := 2;havoc ~i~0;havoc ~j~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~CELLCOUNT~0 * 4); {2311#(and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,859 INFO L273 TraceCheckUtils]: 7: Hoare triple {2311#(and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0))} assume !((if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) != 0);assume (if (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 % 5 - 5 else ~CELLCOUNT~0 % 5) == 0 then 1 else 0) != 0;~i~0 := 1; {2315#(and (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,859 INFO L273 TraceCheckUtils]: 8: Hoare triple {2315#(and (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume true; {2315#(and (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,863 INFO L273 TraceCheckUtils]: 9: Hoare triple {2315#(and (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume !!(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5));~j~0 := 5; {2322#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,865 INFO L273 TraceCheckUtils]: 10: Hoare triple {2322#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume true; {2322#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,865 INFO L273 TraceCheckUtils]: 11: Hoare triple {2322#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume !!(~j~0 >= 1); {2322#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,866 INFO L273 TraceCheckUtils]: 12: Hoare triple {2322#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2332#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0))} is VALID [2018-11-14 17:05:04,867 INFO L273 TraceCheckUtils]: 13: Hoare triple {2332#(and (= main_~j~0 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2336#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4))} is VALID [2018-11-14 17:05:04,868 INFO L273 TraceCheckUtils]: 14: Hoare triple {2336#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4))} assume true; {2336#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4))} is VALID [2018-11-14 17:05:04,868 INFO L273 TraceCheckUtils]: 15: Hoare triple {2336#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4))} assume !!(~j~0 >= 1); {2336#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4))} is VALID [2018-11-14 17:05:04,869 INFO L273 TraceCheckUtils]: 16: Hoare triple {2336#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2346#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0))} is VALID [2018-11-14 17:05:04,871 INFO L273 TraceCheckUtils]: 17: Hoare triple {2346#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (<= main_~j~0 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2350#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,873 INFO L273 TraceCheckUtils]: 18: Hoare triple {2350#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume true; {2350#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,873 INFO L273 TraceCheckUtils]: 19: Hoare triple {2350#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume !!(~j~0 >= 1); {2350#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,875 INFO L273 TraceCheckUtils]: 20: Hoare triple {2350#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2360#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0))} is VALID [2018-11-14 17:05:04,878 INFO L273 TraceCheckUtils]: 21: Hoare triple {2360#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= v_main_~j~0_16 4) (<= (+ main_~j~0 1) v_main_~j~0_16))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2364#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,879 INFO L273 TraceCheckUtils]: 22: Hoare triple {2364#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume true; {2364#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,880 INFO L273 TraceCheckUtils]: 23: Hoare triple {2364#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume !!(~j~0 >= 1); {2364#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,882 INFO L273 TraceCheckUtils]: 24: Hoare triple {2364#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (<= main_~MINVAL~0 2) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume ~j~0 >= ~MINVAL~0;call write~int(~j~0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,885 INFO L273 TraceCheckUtils]: 25: Hoare triple {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,887 INFO L273 TraceCheckUtils]: 26: Hoare triple {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume true; {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,889 INFO L273 TraceCheckUtils]: 27: Hoare triple {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume !!(~j~0 >= 1); {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} is VALID [2018-11-14 17:05:04,901 INFO L273 TraceCheckUtils]: 28: Hoare triple {2374#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (- 20))) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (main_~j~0 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) (* 20 main_~i~0)))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (<= (+ main_~j~0 1) v_main_~j~0_17) (<= v_main_~j~0_16 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* 20 main_~i~0) (* (- 4) main_~j~0))) main_~j~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) (* 20 main_~i~0))) v_main_~j~0_17))) (= main_~i~0 1) (= |main_~#volArray~0.offset| 0))} assume !(~j~0 >= ~MINVAL~0);call write~int(0, ~#volArray~0.base, ~#volArray~0.offset + (~i~0 * 5 - ~j~0) * 4, 4); {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,902 INFO L273 TraceCheckUtils]: 29: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} #t~post3 := ~j~0;~j~0 := #t~post3 - 1;havoc #t~post3; {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,902 INFO L273 TraceCheckUtils]: 30: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} assume true; {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,903 INFO L273 TraceCheckUtils]: 31: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} assume !(~j~0 >= 1); {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,904 INFO L273 TraceCheckUtils]: 32: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} #t~post2 := ~i~0;~i~0 := #t~post2 + 1;havoc #t~post2; {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,904 INFO L273 TraceCheckUtils]: 33: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} assume true; {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,905 INFO L273 TraceCheckUtils]: 34: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} assume !(~i~0 <= (if ~CELLCOUNT~0 < 0 && ~CELLCOUNT~0 % 5 != 0 then ~CELLCOUNT~0 / 5 + 1 else ~CELLCOUNT~0 / 5)); {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} is VALID [2018-11-14 17:05:04,940 INFO L273 TraceCheckUtils]: 35: Hoare triple {2387#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12)))) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8)))))} ~i~0 := 0; {2409#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8))) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7))) (= main_~i~0 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12))) (= main_~i~0 0)))} is VALID [2018-11-14 17:05:04,941 INFO L273 TraceCheckUtils]: 36: Hoare triple {2409#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8))) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7))) (= main_~i~0 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12))) (= main_~i~0 0)))} assume true; {2409#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8))) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7))) (= main_~i~0 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12))) (= main_~i~0 0)))} is VALID [2018-11-14 17:05:04,964 INFO L273 TraceCheckUtils]: 37: Hoare triple {2409#(or (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8))) (= main_~i~0 0)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7))) (= main_~i~0 0)) (and (<= main_~MINVAL~0 2) (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12))) (= main_~i~0 0)))} assume !!(~i~0 < ~CELLCOUNT~0);call #t~mem5 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem5 >= ~MINVAL~0; {2416#(or (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8))) (= main_~i~0 0)) (and (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12))) (= main_~i~0 0)) (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7))) (= main_~i~0 0)))} is VALID [2018-11-14 17:05:04,966 INFO L273 TraceCheckUtils]: 38: Hoare triple {2416#(or (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_10 Int) (v_prenex_8 Int) (v_prenex_9 Int)) (and (<= v_prenex_8 4) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_10) 20)) v_prenex_10) (= v_prenex_9 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_9) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_8) 20)) 0) (<= (+ v_prenex_10 1) v_prenex_9) (<= (+ v_prenex_9 1) v_prenex_8))) (= main_~i~0 0)) (and (= |main_~#volArray~0.offset| 0) (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 0) (exists ((v_prenex_12 Int) (v_prenex_11 Int) (v_prenex_13 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_13) 20)) v_prenex_13) (= v_prenex_12 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_12) 20))) (= v_prenex_11 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_11) 20))) (<= (+ v_prenex_13 1) v_prenex_11) (<= v_prenex_12 4) (<= (+ v_prenex_11 1) v_prenex_12))) (= main_~i~0 0)) (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (exists ((v_main_~j~0_17 Int) (v_main_~j~0_16 Int) (v_prenex_1 Int)) (and (= v_main_~j~0_16 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_16) 20))) (<= (+ v_main_~j~0_17 1) v_main_~j~0_16) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_1) 20)) 0) (<= v_main_~j~0_16 4) (= v_main_~j~0_17 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_main_~j~0_17) 20))) (<= (+ v_prenex_1 1) v_main_~j~0_17))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (exists ((v_prenex_2 Int) (main_~j~0 Int) (v_prenex_3 Int)) (and (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_3) 20)) v_prenex_3) (= v_prenex_2 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_2) 20))) (<= (+ v_prenex_3 1) main_~j~0) (<= (+ main_~j~0 1) v_prenex_2) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) main_~j~0) 20)) 0) (<= v_prenex_2 4))) (= |main_~#volArray~0.offset| 0) (= main_~i~0 0)) (and |main_#t~short7| (= (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) 5) (= |main_~#volArray~0.offset| 0) (exists ((v_prenex_6 Int)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_6) 20)) 0)) (exists ((v_prenex_7 Int) (v_prenex_4 Int) (v_prenex_5 Int)) (and (<= v_prenex_5 4) (= v_prenex_4 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_4) 20))) (<= (+ v_prenex_4 1) v_prenex_5) (<= (+ v_prenex_7 1) v_prenex_4) (= v_prenex_5 (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_5) 20))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (+ |main_~#volArray~0.offset| (* (- 4) v_prenex_7) 20)) v_prenex_7))) (= main_~i~0 0)))} assume !#t~short7;call #t~mem6 := read~int(~#volArray~0.base, ~#volArray~0.offset + ~i~0 * 4, 4);#t~short7 := #t~mem6 == 0; {2287#|main_#t~short7|} is VALID [2018-11-14 17:05:04,967 INFO L256 TraceCheckUtils]: 39: Hoare triple {2287#|main_#t~short7|} call __VERIFIER_assert((if #t~short7 then 1 else 0)); {2423#(= |__VERIFIER_assert_#in~cond| 1)} is VALID [2018-11-14 17:05:04,968 INFO L273 TraceCheckUtils]: 40: Hoare triple {2423#(= |__VERIFIER_assert_#in~cond| 1)} ~cond := #in~cond; {2427#(= 1 __VERIFIER_assert_~cond)} is VALID [2018-11-14 17:05:04,968 INFO L273 TraceCheckUtils]: 41: Hoare triple {2427#(= 1 __VERIFIER_assert_~cond)} assume ~cond == 0; {2271#false} is VALID [2018-11-14 17:05:04,968 INFO L273 TraceCheckUtils]: 42: Hoare triple {2271#false} assume !false; {2271#false} is VALID [2018-11-14 17:05:05,002 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 10 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-14 17:05:05,023 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-14 17:05:05,023 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18] total 35 [2018-11-14 17:05:05,023 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 43 [2018-11-14 17:05:05,024 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-14 17:05:05,024 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 35 states. [2018-11-14 17:05:05,503 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-14 17:05:05,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-11-14 17:05:05,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-11-14 17:05:05,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=151, Invalid=1039, Unknown=0, NotChecked=0, Total=1190 [2018-11-14 17:05:05,504 INFO L87 Difference]: Start difference. First operand 53 states and 57 transitions. Second operand 35 states. [2018-11-14 17:05:13,064 WARN L179 SmtUtils]: Spent 4.80 s on a formula simplification. DAG size of input: 176 DAG size of output: 139 [2018-11-14 17:05:13,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-14 17:05:13,773 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: Result: VALID Review result: INVALID at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.EfficientHoareTripleChecker.createAssertionError(EfficientHoareTripleChecker.java:142) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.EfficientHoareTripleChecker.reviewInductiveInternal(EfficientHoareTripleChecker.java:117) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.EfficientHoareTripleChecker.checkInternal(EfficientHoareTripleChecker.java:67) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.CachingHoareTripleChecker.checkInternal(CachingHoareTripleChecker.java:98) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton$InternalSuccessorComputationHelper.computeSuccWithSolver(AbstractInterpolantAutomaton.java:359) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.addOtherSuccessors(DeterministicInterpolantAutomaton.java:197) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:77) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:234) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.TotalizeNwa.internalSuccessors(TotalizeNwa.java:213) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ComplementDeterministicNwa.internalSuccessors(ComplementDeterministicNwa.java:121) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:216) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:208) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.addInternalsAndSuccessors(NestedWordAutomatonReachableStates.java:1066) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.(NestedWordAutomatonReachableStates.java:968) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates.(NestedWordAutomatonReachableStates.java:188) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.computeDifference(Difference.java:137) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:90) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.computeAutomataDifference(BasicCegarLoop.java:672) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.refineAbstraction(BasicCegarLoop.java:601) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:472) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:312) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:123) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-11-14 17:05:13,778 INFO L168 Benchmark]: Toolchain (without parser) took 32604.57 ms. Allocated memory was 1.5 GB in the beginning and 2.6 GB in the end (delta: 1.1 GB). Free memory was 1.4 GB in the beginning and 1.8 GB in the end (delta: -383.1 MB). Peak memory consumption was 668.1 MB. Max. memory is 7.1 GB. [2018-11-14 17:05:13,779 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-14 17:05:13,779 INFO L168 Benchmark]: CACSL2BoogieTranslator took 384.95 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. [2018-11-14 17:05:13,780 INFO L168 Benchmark]: Boogie Preprocessor took 52.45 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-11-14 17:05:13,780 INFO L168 Benchmark]: RCFGBuilder took 813.68 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 740.3 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -773.8 MB). Peak memory consumption was 26.3 MB. Max. memory is 7.1 GB. [2018-11-14 17:05:13,781 INFO L168 Benchmark]: TraceAbstraction took 31348.37 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 310.9 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 380.1 MB). Peak memory consumption was 691.0 MB. Max. memory is 7.1 GB. [2018-11-14 17:05:13,784 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - GenericResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 384.95 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 52.45 ms. Allocated memory is still 1.5 GB. Free memory is still 1.4 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 813.68 ms. Allocated memory was 1.5 GB in the beginning and 2.3 GB in the end (delta: 740.3 MB). Free memory was 1.4 GB in the beginning and 2.2 GB in the end (delta: -773.8 MB). Peak memory consumption was 26.3 MB. Max. memory is 7.1 GB. * TraceAbstraction took 31348.37 ms. Allocated memory was 2.3 GB in the beginning and 2.6 GB in the end (delta: 310.9 MB). Free memory was 2.2 GB in the beginning and 1.8 GB in the end (delta: 380.1 MB). Peak memory consumption was 691.0 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: Result: VALID Review result: INVALID de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: Result: VALID Review result: INVALID: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.EfficientHoareTripleChecker.createAssertionError(EfficientHoareTripleChecker.java:142) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request...