java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/rewnif_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-18e5b2d-m [2018-11-18 21:11:12,309 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 21:11:12,311 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 21:11:12,323 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 21:11:12,324 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 21:11:12,325 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 21:11:12,326 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 21:11:12,328 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 21:11:12,330 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 21:11:12,331 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 21:11:12,332 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 21:11:12,332 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 21:11:12,333 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 21:11:12,334 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 21:11:12,335 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 21:11:12,336 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 21:11:12,337 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 21:11:12,338 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 21:11:12,340 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 21:11:12,342 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 21:11:12,343 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 21:11:12,344 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 21:11:12,347 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 21:11:12,347 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 21:11:12,347 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 21:11:12,348 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 21:11:12,349 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 21:11:12,350 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 21:11:12,350 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 21:11:12,352 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 21:11:12,352 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 21:11:12,353 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 21:11:12,353 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 21:11:12,353 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 21:11:12,354 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 21:11:12,355 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 21:11:12,355 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-18 21:11:12,370 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 21:11:12,370 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 21:11:12,371 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 21:11:12,371 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-18 21:11:12,371 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 21:11:12,372 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 21:11:12,372 INFO L133 SettingsManager]: * Use SBE=true [2018-11-18 21:11:12,372 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 21:11:12,372 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 21:11:12,372 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 21:11:12,373 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 21:11:12,373 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 21:11:12,373 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 21:11:12,373 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 21:11:12,373 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 21:11:12,374 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 21:11:12,374 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 21:11:12,374 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 21:11:12,374 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 21:11:12,374 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 21:11:12,375 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 21:11:12,375 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 21:11:12,375 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 21:11:12,375 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 21:11:12,375 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 21:11:12,376 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 21:11:12,377 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 21:11:12,377 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 21:11:12,377 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-18 21:11:12,377 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 21:11:12,377 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 21:11:12,378 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 21:11:12,378 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 21:11:12,442 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 21:11:12,457 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 21:11:12,462 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 21:11:12,463 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 21:11:12,464 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 21:11:12,464 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/rewnif_true-unreach-call.i [2018-11-18 21:11:12,517 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c78a9ba16/174e9259b3e94b31b4449a3cd91b6d41/FLAGbdf621368 [2018-11-18 21:11:12,939 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 21:11:12,939 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/rewnif_true-unreach-call.i [2018-11-18 21:11:12,945 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c78a9ba16/174e9259b3e94b31b4449a3cd91b6d41/FLAGbdf621368 [2018-11-18 21:11:13,317 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c78a9ba16/174e9259b3e94b31b4449a3cd91b6d41 [2018-11-18 21:11:13,327 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 21:11:13,328 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-18 21:11:13,329 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 21:11:13,329 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 21:11:13,333 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 21:11:13,335 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,338 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1762d5ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13, skipping insertion in model container [2018-11-18 21:11:13,338 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,350 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 21:11:13,377 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 21:11:13,634 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 21:11:13,640 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 21:11:13,669 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 21:11:13,704 INFO L195 MainTranslator]: Completed translation [2018-11-18 21:11:13,705 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13 WrapperNode [2018-11-18 21:11:13,705 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 21:11:13,706 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 21:11:13,706 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 21:11:13,706 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 21:11:13,723 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,723 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,738 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,739 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,764 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,773 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... [2018-11-18 21:11:13,778 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 21:11:13,779 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 21:11:13,779 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 21:11:13,779 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 21:11:13,780 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 21:11:13,961 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 21:11:13,961 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 21:11:13,962 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-18 21:11:13,962 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 21:11:13,962 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-18 21:11:13,962 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assume [2018-11-18 21:11:13,962 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-18 21:11:13,962 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-18 21:11:13,963 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 21:11:13,963 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 21:11:13,963 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-18 21:11:13,963 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-18 21:11:13,963 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-18 21:11:13,963 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 21:11:13,964 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 21:11:13,964 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-18 21:11:14,582 INFO L280 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 21:11:14,583 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:11:14 BoogieIcfgContainer [2018-11-18 21:11:14,583 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 21:11:14,584 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 21:11:14,584 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 21:11:14,587 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 21:11:14,588 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 09:11:13" (1/3) ... [2018-11-18 21:11:14,589 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a06f11b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 09:11:14, skipping insertion in model container [2018-11-18 21:11:14,589 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 09:11:13" (2/3) ... [2018-11-18 21:11:14,589 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a06f11b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 09:11:14, skipping insertion in model container [2018-11-18 21:11:14,589 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 09:11:14" (3/3) ... [2018-11-18 21:11:14,591 INFO L112 eAbstractionObserver]: Analyzing ICFG rewnif_true-unreach-call.i [2018-11-18 21:11:14,601 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 21:11:14,611 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 21:11:14,628 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 21:11:14,661 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 21:11:14,662 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 21:11:14,662 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 21:11:14,663 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 21:11:14,663 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 21:11:14,663 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 21:11:14,663 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 21:11:14,664 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 21:11:14,664 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 21:11:14,688 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states. [2018-11-18 21:11:14,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-11-18 21:11:14,694 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:11:14,695 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:11:14,698 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:11:14,704 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:11:14,704 INFO L82 PathProgramCache]: Analyzing trace with hash -780591074, now seen corresponding path program 1 times [2018-11-18 21:11:14,708 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:11:14,708 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:11:14,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 21:11:14,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:14,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:11:14,904 INFO L256 TraceCheckUtils]: 0: Hoare triple {33#true} call ULTIMATE.init(); {33#true} is VALID [2018-11-18 21:11:14,908 INFO L273 TraceCheckUtils]: 1: Hoare triple {33#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {33#true} is VALID [2018-11-18 21:11:14,909 INFO L273 TraceCheckUtils]: 2: Hoare triple {33#true} assume true; {33#true} is VALID [2018-11-18 21:11:14,910 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {33#true} {33#true} #65#return; {33#true} is VALID [2018-11-18 21:11:14,910 INFO L256 TraceCheckUtils]: 4: Hoare triple {33#true} call #t~ret5 := main(); {33#true} is VALID [2018-11-18 21:11:14,911 INFO L273 TraceCheckUtils]: 5: Hoare triple {33#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {33#true} is VALID [2018-11-18 21:11:14,911 INFO L273 TraceCheckUtils]: 6: Hoare triple {33#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {33#true} is VALID [2018-11-18 21:11:14,924 INFO L273 TraceCheckUtils]: 7: Hoare triple {33#true} assume !true; {34#false} is VALID [2018-11-18 21:11:14,925 INFO L273 TraceCheckUtils]: 8: Hoare triple {34#false} ~i~0 := 0bv32; {34#false} is VALID [2018-11-18 21:11:14,925 INFO L273 TraceCheckUtils]: 9: Hoare triple {34#false} assume true; {34#false} is VALID [2018-11-18 21:11:14,925 INFO L273 TraceCheckUtils]: 10: Hoare triple {34#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {34#false} is VALID [2018-11-18 21:11:14,926 INFO L256 TraceCheckUtils]: 11: Hoare triple {34#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {34#false} is VALID [2018-11-18 21:11:14,926 INFO L273 TraceCheckUtils]: 12: Hoare triple {34#false} ~cond := #in~cond; {34#false} is VALID [2018-11-18 21:11:14,926 INFO L273 TraceCheckUtils]: 13: Hoare triple {34#false} assume 0bv32 == ~cond; {34#false} is VALID [2018-11-18 21:11:14,927 INFO L273 TraceCheckUtils]: 14: Hoare triple {34#false} assume !false; {34#false} is VALID [2018-11-18 21:11:14,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:14,930 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 21:11:14,935 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 21:11:14,935 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-18 21:11:14,940 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 15 [2018-11-18 21:11:14,945 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:11:14,950 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-18 21:11:15,134 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:15,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-18 21:11:15,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-18 21:11:15,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 21:11:15,149 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 2 states. [2018-11-18 21:11:15,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:15,307 INFO L93 Difference]: Finished difference Result 48 states and 57 transitions. [2018-11-18 21:11:15,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-18 21:11:15,308 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 15 [2018-11-18 21:11:15,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:11:15,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-18 21:11:15,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 57 transitions. [2018-11-18 21:11:15,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-18 21:11:15,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 57 transitions. [2018-11-18 21:11:15,326 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 57 transitions. [2018-11-18 21:11:15,653 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:15,665 INFO L225 Difference]: With dead ends: 48 [2018-11-18 21:11:15,665 INFO L226 Difference]: Without dead ends: 24 [2018-11-18 21:11:15,669 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 21:11:15,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-11-18 21:11:15,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-11-18 21:11:15,706 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:11:15,707 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand 24 states. [2018-11-18 21:11:15,708 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-18 21:11:15,708 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-18 21:11:15,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:15,713 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2018-11-18 21:11:15,713 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-18 21:11:15,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:15,714 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:15,714 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-18 21:11:15,714 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-18 21:11:15,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:15,719 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2018-11-18 21:11:15,719 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-18 21:11:15,720 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:15,720 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:15,720 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:11:15,720 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:11:15,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-18 21:11:15,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2018-11-18 21:11:15,731 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 15 [2018-11-18 21:11:15,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:11:15,732 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2018-11-18 21:11:15,732 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-18 21:11:15,732 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2018-11-18 21:11:15,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-18 21:11:15,733 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:11:15,733 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:11:15,733 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:11:15,734 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:11:15,734 INFO L82 PathProgramCache]: Analyzing trace with hash 629098255, now seen corresponding path program 1 times [2018-11-18 21:11:15,734 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:11:15,734 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:11:15,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 21:11:15,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:15,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:15,805 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:11:15,904 INFO L256 TraceCheckUtils]: 0: Hoare triple {218#true} call ULTIMATE.init(); {218#true} is VALID [2018-11-18 21:11:15,905 INFO L273 TraceCheckUtils]: 1: Hoare triple {218#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {218#true} is VALID [2018-11-18 21:11:15,905 INFO L273 TraceCheckUtils]: 2: Hoare triple {218#true} assume true; {218#true} is VALID [2018-11-18 21:11:15,905 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {218#true} {218#true} #65#return; {218#true} is VALID [2018-11-18 21:11:15,906 INFO L256 TraceCheckUtils]: 4: Hoare triple {218#true} call #t~ret5 := main(); {218#true} is VALID [2018-11-18 21:11:15,906 INFO L273 TraceCheckUtils]: 5: Hoare triple {218#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {218#true} is VALID [2018-11-18 21:11:15,907 INFO L273 TraceCheckUtils]: 6: Hoare triple {218#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:15,909 INFO L273 TraceCheckUtils]: 7: Hoare triple {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:15,911 INFO L273 TraceCheckUtils]: 8: Hoare triple {241#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {219#false} is VALID [2018-11-18 21:11:15,912 INFO L273 TraceCheckUtils]: 9: Hoare triple {219#false} ~i~0 := 0bv32; {219#false} is VALID [2018-11-18 21:11:15,912 INFO L273 TraceCheckUtils]: 10: Hoare triple {219#false} assume true; {219#false} is VALID [2018-11-18 21:11:15,913 INFO L273 TraceCheckUtils]: 11: Hoare triple {219#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {219#false} is VALID [2018-11-18 21:11:15,913 INFO L256 TraceCheckUtils]: 12: Hoare triple {219#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {219#false} is VALID [2018-11-18 21:11:15,914 INFO L273 TraceCheckUtils]: 13: Hoare triple {219#false} ~cond := #in~cond; {219#false} is VALID [2018-11-18 21:11:15,914 INFO L273 TraceCheckUtils]: 14: Hoare triple {219#false} assume 0bv32 == ~cond; {219#false} is VALID [2018-11-18 21:11:15,915 INFO L273 TraceCheckUtils]: 15: Hoare triple {219#false} assume !false; {219#false} is VALID [2018-11-18 21:11:15,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:15,917 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 21:11:15,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 21:11:15,922 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 21:11:15,923 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-18 21:11:15,923 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:11:15,924 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-18 21:11:15,985 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:15,986 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 21:11:15,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 21:11:15,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 21:11:15,987 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand 3 states. [2018-11-18 21:11:16,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:16,498 INFO L93 Difference]: Finished difference Result 46 states and 52 transitions. [2018-11-18 21:11:16,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 21:11:16,498 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-18 21:11:16,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:11:16,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-18 21:11:16,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 52 transitions. [2018-11-18 21:11:16,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-18 21:11:16,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 52 transitions. [2018-11-18 21:11:16,506 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 52 transitions. [2018-11-18 21:11:16,660 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:16,664 INFO L225 Difference]: With dead ends: 46 [2018-11-18 21:11:16,664 INFO L226 Difference]: Without dead ends: 29 [2018-11-18 21:11:16,665 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 21:11:16,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-18 21:11:16,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 27. [2018-11-18 21:11:16,702 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:11:16,702 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 27 states. [2018-11-18 21:11:16,702 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 27 states. [2018-11-18 21:11:16,702 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 27 states. [2018-11-18 21:11:16,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:16,704 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2018-11-18 21:11:16,705 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-11-18 21:11:16,705 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:16,706 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:16,706 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 29 states. [2018-11-18 21:11:16,706 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 29 states. [2018-11-18 21:11:16,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:16,709 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2018-11-18 21:11:16,709 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-11-18 21:11:16,709 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:16,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:16,710 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:11:16,710 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:11:16,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-18 21:11:16,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2018-11-18 21:11:16,713 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 29 transitions. Word has length 16 [2018-11-18 21:11:16,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:11:16,713 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 29 transitions. [2018-11-18 21:11:16,713 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 21:11:16,713 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 29 transitions. [2018-11-18 21:11:16,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-18 21:11:16,714 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:11:16,715 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:11:16,715 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:11:16,715 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:11:16,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1434210682, now seen corresponding path program 1 times [2018-11-18 21:11:16,716 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:11:16,716 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:11:16,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 21:11:16,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:16,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:16,783 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:11:17,016 INFO L256 TraceCheckUtils]: 0: Hoare triple {421#true} call ULTIMATE.init(); {421#true} is VALID [2018-11-18 21:11:17,016 INFO L273 TraceCheckUtils]: 1: Hoare triple {421#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {421#true} is VALID [2018-11-18 21:11:17,016 INFO L273 TraceCheckUtils]: 2: Hoare triple {421#true} assume true; {421#true} is VALID [2018-11-18 21:11:17,017 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {421#true} {421#true} #65#return; {421#true} is VALID [2018-11-18 21:11:17,017 INFO L256 TraceCheckUtils]: 4: Hoare triple {421#true} call #t~ret5 := main(); {421#true} is VALID [2018-11-18 21:11:17,017 INFO L273 TraceCheckUtils]: 5: Hoare triple {421#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {421#true} is VALID [2018-11-18 21:11:17,018 INFO L273 TraceCheckUtils]: 6: Hoare triple {421#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:17,022 INFO L273 TraceCheckUtils]: 7: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:17,022 INFO L273 TraceCheckUtils]: 8: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:17,024 INFO L273 TraceCheckUtils]: 9: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:17,026 INFO L273 TraceCheckUtils]: 10: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:11:17,028 INFO L273 TraceCheckUtils]: 11: Hoare triple {444#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:17,029 INFO L273 TraceCheckUtils]: 12: Hoare triple {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:17,030 INFO L273 TraceCheckUtils]: 13: Hoare triple {460#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {422#false} is VALID [2018-11-18 21:11:17,031 INFO L273 TraceCheckUtils]: 14: Hoare triple {422#false} ~i~0 := 0bv32; {422#false} is VALID [2018-11-18 21:11:17,031 INFO L273 TraceCheckUtils]: 15: Hoare triple {422#false} assume true; {422#false} is VALID [2018-11-18 21:11:17,031 INFO L273 TraceCheckUtils]: 16: Hoare triple {422#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {422#false} is VALID [2018-11-18 21:11:17,032 INFO L256 TraceCheckUtils]: 17: Hoare triple {422#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {422#false} is VALID [2018-11-18 21:11:17,033 INFO L273 TraceCheckUtils]: 18: Hoare triple {422#false} ~cond := #in~cond; {422#false} is VALID [2018-11-18 21:11:17,033 INFO L273 TraceCheckUtils]: 19: Hoare triple {422#false} assume 0bv32 == ~cond; {422#false} is VALID [2018-11-18 21:11:17,033 INFO L273 TraceCheckUtils]: 20: Hoare triple {422#false} assume !false; {422#false} is VALID [2018-11-18 21:11:17,035 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:17,036 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:11:17,194 INFO L273 TraceCheckUtils]: 20: Hoare triple {422#false} assume !false; {422#false} is VALID [2018-11-18 21:11:17,195 INFO L273 TraceCheckUtils]: 19: Hoare triple {422#false} assume 0bv32 == ~cond; {422#false} is VALID [2018-11-18 21:11:17,195 INFO L273 TraceCheckUtils]: 18: Hoare triple {422#false} ~cond := #in~cond; {422#false} is VALID [2018-11-18 21:11:17,195 INFO L256 TraceCheckUtils]: 17: Hoare triple {422#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {422#false} is VALID [2018-11-18 21:11:17,195 INFO L273 TraceCheckUtils]: 16: Hoare triple {422#false} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {422#false} is VALID [2018-11-18 21:11:17,196 INFO L273 TraceCheckUtils]: 15: Hoare triple {422#false} assume true; {422#false} is VALID [2018-11-18 21:11:17,196 INFO L273 TraceCheckUtils]: 14: Hoare triple {422#false} ~i~0 := 0bv32; {422#false} is VALID [2018-11-18 21:11:17,202 INFO L273 TraceCheckUtils]: 13: Hoare triple {509#(bvslt main_~i~0 ~SIZE~0)} assume !~bvslt32(~i~0, ~SIZE~0); {422#false} is VALID [2018-11-18 21:11:17,203 INFO L273 TraceCheckUtils]: 12: Hoare triple {509#(bvslt main_~i~0 ~SIZE~0)} assume true; {509#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-18 21:11:17,219 INFO L273 TraceCheckUtils]: 11: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {509#(bvslt main_~i~0 ~SIZE~0)} is VALID [2018-11-18 21:11:17,221 INFO L273 TraceCheckUtils]: 10: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-18 21:11:17,222 INFO L273 TraceCheckUtils]: 9: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-18 21:11:17,224 INFO L273 TraceCheckUtils]: 8: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume !!~bvslt32(~i~0, ~SIZE~0); {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-18 21:11:17,224 INFO L273 TraceCheckUtils]: 7: Hoare triple {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} assume true; {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-18 21:11:17,226 INFO L273 TraceCheckUtils]: 6: Hoare triple {421#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {516#(bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0)} is VALID [2018-11-18 21:11:17,226 INFO L273 TraceCheckUtils]: 5: Hoare triple {421#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {421#true} is VALID [2018-11-18 21:11:17,227 INFO L256 TraceCheckUtils]: 4: Hoare triple {421#true} call #t~ret5 := main(); {421#true} is VALID [2018-11-18 21:11:17,227 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {421#true} {421#true} #65#return; {421#true} is VALID [2018-11-18 21:11:17,227 INFO L273 TraceCheckUtils]: 2: Hoare triple {421#true} assume true; {421#true} is VALID [2018-11-18 21:11:17,228 INFO L273 TraceCheckUtils]: 1: Hoare triple {421#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {421#true} is VALID [2018-11-18 21:11:17,228 INFO L256 TraceCheckUtils]: 0: Hoare triple {421#true} call ULTIMATE.init(); {421#true} is VALID [2018-11-18 21:11:17,229 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:17,230 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:11:17,231 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-18 21:11:17,231 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-11-18 21:11:17,232 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:11:17,232 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-18 21:11:17,330 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:17,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 21:11:17,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 21:11:17,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-18 21:11:17,332 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. Second operand 6 states. [2018-11-18 21:11:17,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:17,963 INFO L93 Difference]: Finished difference Result 52 states and 57 transitions. [2018-11-18 21:11:17,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-18 21:11:17,964 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-11-18 21:11:17,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:11:17,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-18 21:11:17,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 57 transitions. [2018-11-18 21:11:17,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-18 21:11:17,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 57 transitions. [2018-11-18 21:11:17,971 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 57 transitions. [2018-11-18 21:11:18,136 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:18,139 INFO L225 Difference]: With dead ends: 52 [2018-11-18 21:11:18,139 INFO L226 Difference]: Without dead ends: 40 [2018-11-18 21:11:18,139 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-11-18 21:11:18,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-18 21:11:18,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 31. [2018-11-18 21:11:18,164 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:11:18,164 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 31 states. [2018-11-18 21:11:18,165 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 31 states. [2018-11-18 21:11:18,165 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 31 states. [2018-11-18 21:11:18,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:18,168 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-11-18 21:11:18,168 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 43 transitions. [2018-11-18 21:11:18,169 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:18,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:18,169 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 40 states. [2018-11-18 21:11:18,169 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 40 states. [2018-11-18 21:11:18,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:18,172 INFO L93 Difference]: Finished difference Result 40 states and 43 transitions. [2018-11-18 21:11:18,173 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 43 transitions. [2018-11-18 21:11:18,173 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:18,173 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:18,174 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:11:18,174 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:11:18,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-18 21:11:18,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2018-11-18 21:11:18,176 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 21 [2018-11-18 21:11:18,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:11:18,177 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2018-11-18 21:11:18,177 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 21:11:18,177 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2018-11-18 21:11:18,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-18 21:11:18,178 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:11:18,178 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:11:18,178 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:11:18,179 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:11:18,179 INFO L82 PathProgramCache]: Analyzing trace with hash 1167828013, now seen corresponding path program 1 times [2018-11-18 21:11:18,179 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:11:18,180 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:11:18,206 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 21:11:18,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:18,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:18,280 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:11:18,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-18 21:11:18,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-18 21:11:18,429 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,434 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,449 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,449 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-18 21:11:18,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-18 21:11:18,577 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:18,579 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:18,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-11-18 21:11:18,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,598 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,622 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,623 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-11-18 21:11:18,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 21:11:18,826 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:18,827 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:18,830 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:18,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-11-18 21:11:18,835 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,842 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,849 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:18,850 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:7 [2018-11-18 21:11:18,856 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:11:19,116 INFO L256 TraceCheckUtils]: 0: Hoare triple {743#true} call ULTIMATE.init(); {743#true} is VALID [2018-11-18 21:11:19,117 INFO L273 TraceCheckUtils]: 1: Hoare triple {743#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {743#true} is VALID [2018-11-18 21:11:19,117 INFO L273 TraceCheckUtils]: 2: Hoare triple {743#true} assume true; {743#true} is VALID [2018-11-18 21:11:19,117 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {743#true} {743#true} #65#return; {743#true} is VALID [2018-11-18 21:11:19,117 INFO L256 TraceCheckUtils]: 4: Hoare triple {743#true} call #t~ret5 := main(); {743#true} is VALID [2018-11-18 21:11:19,118 INFO L273 TraceCheckUtils]: 5: Hoare triple {743#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {743#true} is VALID [2018-11-18 21:11:19,126 INFO L273 TraceCheckUtils]: 6: Hoare triple {743#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,127 INFO L273 TraceCheckUtils]: 7: Hoare triple {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,131 INFO L273 TraceCheckUtils]: 8: Hoare triple {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,131 INFO L273 TraceCheckUtils]: 9: Hoare triple {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,133 INFO L273 TraceCheckUtils]: 10: Hoare triple {766#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {779#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,134 INFO L273 TraceCheckUtils]: 11: Hoare triple {779#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:19,135 INFO L273 TraceCheckUtils]: 12: Hoare triple {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:19,137 INFO L273 TraceCheckUtils]: 13: Hoare triple {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:19,139 INFO L273 TraceCheckUtils]: 14: Hoare triple {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:19,141 INFO L273 TraceCheckUtils]: 15: Hoare triple {783#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:19,145 INFO L273 TraceCheckUtils]: 16: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:19,146 INFO L273 TraceCheckUtils]: 17: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume true; {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:19,147 INFO L273 TraceCheckUtils]: 18: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:19,149 INFO L273 TraceCheckUtils]: 19: Hoare triple {796#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,150 INFO L273 TraceCheckUtils]: 20: Hoare triple {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,152 INFO L273 TraceCheckUtils]: 21: Hoare triple {809#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {816#(and (= (_ bv0 32) |main_#t~mem4|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:19,154 INFO L256 TraceCheckUtils]: 22: Hoare triple {816#(and (= (_ bv0 32) |main_#t~mem4|) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {820#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:11:19,155 INFO L273 TraceCheckUtils]: 23: Hoare triple {820#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {824#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:11:19,156 INFO L273 TraceCheckUtils]: 24: Hoare triple {824#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {744#false} is VALID [2018-11-18 21:11:19,156 INFO L273 TraceCheckUtils]: 25: Hoare triple {744#false} assume !false; {744#false} is VALID [2018-11-18 21:11:19,161 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:19,161 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:11:19,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-11-18 21:11:19,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 26 [2018-11-18 21:11:19,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 16 [2018-11-18 21:11:19,609 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-11-18 21:11:19,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 8 [2018-11-18 21:11:19,614 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:19,635 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-18 21:11:19,662 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:11:19,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:11:19,676 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:24, output treesize:21 [2018-11-18 21:11:19,683 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:11:19,761 INFO L273 TraceCheckUtils]: 25: Hoare triple {744#false} assume !false; {744#false} is VALID [2018-11-18 21:11:19,763 INFO L273 TraceCheckUtils]: 24: Hoare triple {834#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {744#false} is VALID [2018-11-18 21:11:19,767 INFO L273 TraceCheckUtils]: 23: Hoare triple {838#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {834#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-18 21:11:19,769 INFO L256 TraceCheckUtils]: 22: Hoare triple {842#(bvsge |main_#t~mem4| main_~i~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {838#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-18 21:11:19,770 INFO L273 TraceCheckUtils]: 21: Hoare triple {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {842#(bvsge |main_#t~mem4| main_~i~0)} is VALID [2018-11-18 21:11:19,770 INFO L273 TraceCheckUtils]: 20: Hoare triple {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume true; {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:11:19,775 INFO L273 TraceCheckUtils]: 19: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {846#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:11:19,779 INFO L273 TraceCheckUtils]: 18: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,780 INFO L273 TraceCheckUtils]: 17: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} assume true; {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,780 INFO L273 TraceCheckUtils]: 16: Hoare triple {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,792 INFO L273 TraceCheckUtils]: 15: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {853#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,793 INFO L273 TraceCheckUtils]: 14: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,793 INFO L273 TraceCheckUtils]: 13: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,794 INFO L273 TraceCheckUtils]: 12: Hoare triple {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume true; {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,797 INFO L273 TraceCheckUtils]: 11: Hoare triple {879#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {866#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,803 INFO L273 TraceCheckUtils]: 10: Hoare triple {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {879#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:19,806 INFO L273 TraceCheckUtils]: 9: Hoare triple {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} is VALID [2018-11-18 21:11:19,807 INFO L273 TraceCheckUtils]: 8: Hoare triple {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} assume !!~bvslt32(~i~0, ~SIZE~0); {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} is VALID [2018-11-18 21:11:19,807 INFO L273 TraceCheckUtils]: 7: Hoare triple {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} assume true; {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} is VALID [2018-11-18 21:11:19,808 INFO L273 TraceCheckUtils]: 6: Hoare triple {743#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {883#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv0 32)) (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))))} is VALID [2018-11-18 21:11:19,808 INFO L273 TraceCheckUtils]: 5: Hoare triple {743#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {743#true} is VALID [2018-11-18 21:11:19,809 INFO L256 TraceCheckUtils]: 4: Hoare triple {743#true} call #t~ret5 := main(); {743#true} is VALID [2018-11-18 21:11:19,809 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {743#true} {743#true} #65#return; {743#true} is VALID [2018-11-18 21:11:19,809 INFO L273 TraceCheckUtils]: 2: Hoare triple {743#true} assume true; {743#true} is VALID [2018-11-18 21:11:19,809 INFO L273 TraceCheckUtils]: 1: Hoare triple {743#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {743#true} is VALID [2018-11-18 21:11:19,810 INFO L256 TraceCheckUtils]: 0: Hoare triple {743#true} call ULTIMATE.init(); {743#true} is VALID [2018-11-18 21:11:19,813 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:19,821 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:11:19,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-18 21:11:19,823 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 26 [2018-11-18 21:11:19,823 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:11:19,823 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-18 21:11:19,914 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:19,915 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 21:11:19,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 21:11:19,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=248, Unknown=0, NotChecked=0, Total=306 [2018-11-18 21:11:19,916 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand 18 states. [2018-11-18 21:11:23,762 WARN L180 SmtUtils]: Spent 2.11 s on a formula simplification. DAG size of input: 28 DAG size of output: 21 [2018-11-18 21:11:25,925 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 17 [2018-11-18 21:11:28,184 WARN L180 SmtUtils]: Spent 2.12 s on a formula simplification. DAG size of input: 30 DAG size of output: 23 [2018-11-18 21:11:30,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:30,552 INFO L93 Difference]: Finished difference Result 116 states and 134 transitions. [2018-11-18 21:11:30,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-18 21:11:30,552 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 26 [2018-11-18 21:11:30,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:11:30,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-18 21:11:30,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 126 transitions. [2018-11-18 21:11:30,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-18 21:11:30,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 126 transitions. [2018-11-18 21:11:30,568 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 25 states and 126 transitions. [2018-11-18 21:11:31,072 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:31,078 INFO L225 Difference]: With dead ends: 116 [2018-11-18 21:11:31,078 INFO L226 Difference]: Without dead ends: 114 [2018-11-18 21:11:31,079 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=204, Invalid=726, Unknown=0, NotChecked=0, Total=930 [2018-11-18 21:11:31,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-11-18 21:11:31,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 68. [2018-11-18 21:11:31,167 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:11:31,168 INFO L82 GeneralOperation]: Start isEquivalent. First operand 114 states. Second operand 68 states. [2018-11-18 21:11:31,168 INFO L74 IsIncluded]: Start isIncluded. First operand 114 states. Second operand 68 states. [2018-11-18 21:11:31,168 INFO L87 Difference]: Start difference. First operand 114 states. Second operand 68 states. [2018-11-18 21:11:31,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:31,177 INFO L93 Difference]: Finished difference Result 114 states and 132 transitions. [2018-11-18 21:11:31,177 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 132 transitions. [2018-11-18 21:11:31,179 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:31,179 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:31,179 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand 114 states. [2018-11-18 21:11:31,179 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 114 states. [2018-11-18 21:11:31,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:11:31,186 INFO L93 Difference]: Finished difference Result 114 states and 132 transitions. [2018-11-18 21:11:31,187 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 132 transitions. [2018-11-18 21:11:31,188 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:11:31,189 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:11:31,189 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:11:31,189 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:11:31,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-11-18 21:11:31,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 77 transitions. [2018-11-18 21:11:31,193 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 77 transitions. Word has length 26 [2018-11-18 21:11:31,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:11:31,193 INFO L480 AbstractCegarLoop]: Abstraction has 68 states and 77 transitions. [2018-11-18 21:11:31,193 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 21:11:31,193 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 77 transitions. [2018-11-18 21:11:31,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-11-18 21:11:31,195 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:11:31,195 INFO L375 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:11:31,195 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:11:31,196 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:11:31,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1835613837, now seen corresponding path program 2 times [2018-11-18 21:11:31,196 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:11:31,196 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:11:31,227 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 21:11:31,303 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 21:11:31,303 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 21:11:31,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:11:31,343 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:11:31,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-18 21:11:31,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-18 21:11:31,567 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,600 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,611 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-18 21:11:31,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-11-18 21:11:31,723 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:31,724 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:31,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 37 [2018-11-18 21:11:31,728 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,739 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,759 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,760 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:28 [2018-11-18 21:11:31,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-11-18 21:11:31,836 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:31,839 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:31,841 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:31,844 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:31,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 78 [2018-11-18 21:11:31,851 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,867 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,892 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:31,893 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-11-18 21:11:32,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 42 [2018-11-18 21:11:32,197 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,210 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,213 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,216 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,219 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,223 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,226 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,228 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 9 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 151 [2018-11-18 21:11:32,240 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,273 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,312 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,312 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:53 [2018-11-18 21:11:32,438 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-11-18 21:11:32,526 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,529 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,531 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,540 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,544 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,546 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 9 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 151 [2018-11-18 21:11:32,554 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,584 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:68, output treesize:51 [2018-11-18 21:11:32,645 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:11:32,790 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 47 [2018-11-18 21:11:32,817 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,818 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,820 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,823 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,825 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,827 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,830 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,834 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,837 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,839 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,841 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:32,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 12 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 141 [2018-11-18 21:11:32,848 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,885 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,905 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:32,906 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:40 [2018-11-18 21:11:32,926 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:11:33,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 28 [2018-11-18 21:11:33,202 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,203 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,203 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,204 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:33,205 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,228 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,250 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,256 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,258 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:11:33,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 13 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 39 [2018-11-18 21:11:33,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:33,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:33,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:11:33,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:7 [2018-11-18 21:11:33,290 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:11:33,395 INFO L256 TraceCheckUtils]: 0: Hoare triple {1410#true} call ULTIMATE.init(); {1410#true} is VALID [2018-11-18 21:11:33,396 INFO L273 TraceCheckUtils]: 1: Hoare triple {1410#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1410#true} is VALID [2018-11-18 21:11:33,397 INFO L273 TraceCheckUtils]: 2: Hoare triple {1410#true} assume true; {1410#true} is VALID [2018-11-18 21:11:33,397 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1410#true} {1410#true} #65#return; {1410#true} is VALID [2018-11-18 21:11:33,397 INFO L256 TraceCheckUtils]: 4: Hoare triple {1410#true} call #t~ret5 := main(); {1410#true} is VALID [2018-11-18 21:11:33,398 INFO L273 TraceCheckUtils]: 5: Hoare triple {1410#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1410#true} is VALID [2018-11-18 21:11:33,401 INFO L273 TraceCheckUtils]: 6: Hoare triple {1410#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:33,402 INFO L273 TraceCheckUtils]: 7: Hoare triple {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:33,402 INFO L273 TraceCheckUtils]: 8: Hoare triple {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:33,403 INFO L273 TraceCheckUtils]: 9: Hoare triple {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:33,404 INFO L273 TraceCheckUtils]: 10: Hoare triple {1433#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1446#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:33,405 INFO L273 TraceCheckUtils]: 11: Hoare triple {1446#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1450#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:33,406 INFO L273 TraceCheckUtils]: 12: Hoare triple {1450#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {1450#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:33,407 INFO L273 TraceCheckUtils]: 13: Hoare triple {1450#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1450#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:33,410 INFO L273 TraceCheckUtils]: 14: Hoare triple {1450#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1460#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:33,414 INFO L273 TraceCheckUtils]: 15: Hoare triple {1460#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1464#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:33,417 INFO L273 TraceCheckUtils]: 16: Hoare triple {1464#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1468#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:11:33,418 INFO L273 TraceCheckUtils]: 17: Hoare triple {1468#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume true; {1468#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:11:33,420 INFO L273 TraceCheckUtils]: 18: Hoare triple {1468#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !!~bvslt32(~i~0, ~SIZE~0); {1468#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:11:33,423 INFO L273 TraceCheckUtils]: 19: Hoare triple {1468#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1478#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:11:33,428 INFO L273 TraceCheckUtils]: 20: Hoare triple {1478#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (_ bv2 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1482#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:11:33,431 INFO L273 TraceCheckUtils]: 21: Hoare triple {1482#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:33,432 INFO L273 TraceCheckUtils]: 22: Hoare triple {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume true; {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:33,433 INFO L273 TraceCheckUtils]: 23: Hoare triple {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:33,434 INFO L273 TraceCheckUtils]: 24: Hoare triple {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:11:33,436 INFO L273 TraceCheckUtils]: 25: Hoare triple {1486#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:11:33,437 INFO L273 TraceCheckUtils]: 26: Hoare triple {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:11:33,439 INFO L273 TraceCheckUtils]: 27: Hoare triple {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume true; {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:11:33,440 INFO L273 TraceCheckUtils]: 28: Hoare triple {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume !~bvslt32(~i~0, ~SIZE~0); {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:11:33,441 INFO L273 TraceCheckUtils]: 29: Hoare triple {1499#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} ~i~0 := 0bv32; {1512#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:11:33,443 INFO L273 TraceCheckUtils]: 30: Hoare triple {1512#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume true; {1512#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:11:33,444 INFO L273 TraceCheckUtils]: 31: Hoare triple {1512#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1519#(and (= (_ bv0 32) |main_#t~mem4|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:11:33,446 INFO L256 TraceCheckUtils]: 32: Hoare triple {1519#(and (= (_ bv0 32) |main_#t~mem4|) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {1523#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:11:33,447 INFO L273 TraceCheckUtils]: 33: Hoare triple {1523#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1527#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:11:33,447 INFO L273 TraceCheckUtils]: 34: Hoare triple {1527#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {1411#false} is VALID [2018-11-18 21:11:33,448 INFO L273 TraceCheckUtils]: 35: Hoare triple {1411#false} assume !false; {1411#false} is VALID [2018-11-18 21:11:33,457 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:33,457 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:11:34,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2018-11-18 21:11:34,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 46 [2018-11-18 21:11:34,474 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,475 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 72 [2018-11-18 21:11:34,511 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,511 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,512 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,512 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 123 [2018-11-18 21:11:34,715 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 35 [2018-11-18 21:11:34,775 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,776 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,776 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,777 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,778 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,780 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 63 [2018-11-18 21:11:34,790 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-18 21:11:34,844 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,845 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,845 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,856 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,857 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,858 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:11:34,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 42 treesize of output 100 [2018-11-18 21:11:34,905 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 4 xjuncts. [2018-11-18 21:11:35,025 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-11-18 21:11:35,087 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:11:35,104 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:11:35,123 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:11:35,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:11:35,143 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 2 variables, input treesize:44, output treesize:37 [2018-11-18 21:11:35,149 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:11:35,342 INFO L273 TraceCheckUtils]: 35: Hoare triple {1411#false} assume !false; {1411#false} is VALID [2018-11-18 21:11:35,343 INFO L273 TraceCheckUtils]: 34: Hoare triple {1537#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {1411#false} is VALID [2018-11-18 21:11:35,344 INFO L273 TraceCheckUtils]: 33: Hoare triple {1541#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1537#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-18 21:11:35,344 INFO L256 TraceCheckUtils]: 32: Hoare triple {1545#(bvsge |main_#t~mem4| main_~i~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {1541#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-18 21:11:35,345 INFO L273 TraceCheckUtils]: 31: Hoare triple {1549#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1545#(bvsge |main_#t~mem4| main_~i~0)} is VALID [2018-11-18 21:11:35,346 INFO L273 TraceCheckUtils]: 30: Hoare triple {1549#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume true; {1549#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:11:35,347 INFO L273 TraceCheckUtils]: 29: Hoare triple {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {1549#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:11:35,347 INFO L273 TraceCheckUtils]: 28: Hoare triple {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,348 INFO L273 TraceCheckUtils]: 27: Hoare triple {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} assume true; {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,348 INFO L273 TraceCheckUtils]: 26: Hoare triple {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,358 INFO L273 TraceCheckUtils]: 25: Hoare triple {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1556#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,358 INFO L273 TraceCheckUtils]: 24: Hoare triple {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,359 INFO L273 TraceCheckUtils]: 23: Hoare triple {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,359 INFO L273 TraceCheckUtils]: 22: Hoare triple {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume true; {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,363 INFO L273 TraceCheckUtils]: 21: Hoare triple {1582#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1569#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,373 INFO L273 TraceCheckUtils]: 20: Hoare triple {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1582#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,387 INFO L273 TraceCheckUtils]: 19: Hoare triple {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,388 INFO L273 TraceCheckUtils]: 18: Hoare triple {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,388 INFO L273 TraceCheckUtils]: 17: Hoare triple {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,394 INFO L273 TraceCheckUtils]: 16: Hoare triple {1599#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1586#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,410 INFO L273 TraceCheckUtils]: 15: Hoare triple {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1599#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,428 INFO L273 TraceCheckUtils]: 14: Hoare triple {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,429 INFO L273 TraceCheckUtils]: 13: Hoare triple {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,429 INFO L273 TraceCheckUtils]: 12: Hoare triple {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,437 INFO L273 TraceCheckUtils]: 11: Hoare triple {1616#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1603#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,457 INFO L273 TraceCheckUtils]: 10: Hoare triple {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1616#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:11:35,458 INFO L273 TraceCheckUtils]: 9: Hoare triple {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:35,458 INFO L273 TraceCheckUtils]: 8: Hoare triple {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:35,460 INFO L273 TraceCheckUtils]: 7: Hoare triple {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} assume true; {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:35,460 INFO L273 TraceCheckUtils]: 6: Hoare triple {1410#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {1620#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-18 21:11:35,461 INFO L273 TraceCheckUtils]: 5: Hoare triple {1410#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {1410#true} is VALID [2018-11-18 21:11:35,461 INFO L256 TraceCheckUtils]: 4: Hoare triple {1410#true} call #t~ret5 := main(); {1410#true} is VALID [2018-11-18 21:11:35,461 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1410#true} {1410#true} #65#return; {1410#true} is VALID [2018-11-18 21:11:35,462 INFO L273 TraceCheckUtils]: 2: Hoare triple {1410#true} assume true; {1410#true} is VALID [2018-11-18 21:11:35,462 INFO L273 TraceCheckUtils]: 1: Hoare triple {1410#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {1410#true} is VALID [2018-11-18 21:11:35,462 INFO L256 TraceCheckUtils]: 0: Hoare triple {1410#true} call ULTIMATE.init(); {1410#true} is VALID [2018-11-18 21:11:35,466 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:11:35,468 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:11:35,468 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14] total 28 [2018-11-18 21:11:35,469 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 36 [2018-11-18 21:11:35,469 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:11:35,469 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 28 states. [2018-11-18 21:11:35,671 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:11:35,671 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-11-18 21:11:35,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-11-18 21:11:35,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=614, Unknown=0, NotChecked=0, Total=756 [2018-11-18 21:11:35,672 INFO L87 Difference]: Start difference. First operand 68 states and 77 transitions. Second operand 28 states. [2018-11-18 21:11:42,051 WARN L180 SmtUtils]: Spent 4.20 s on a formula simplification. DAG size of input: 52 DAG size of output: 41 [2018-11-18 21:11:48,003 WARN L180 SmtUtils]: Spent 4.21 s on a formula simplification. DAG size of input: 54 DAG size of output: 43 [2018-11-18 21:11:49,406 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 43 [2018-11-18 21:11:54,772 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 22 [2018-11-18 21:11:57,109 WARN L180 SmtUtils]: Spent 2.19 s on a formula simplification. DAG size of input: 26 DAG size of output: 21 [2018-11-18 21:12:00,003 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 17 [2018-11-18 21:12:02,391 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 46 [2018-11-18 21:12:04,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:04,519 INFO L93 Difference]: Finished difference Result 208 states and 243 transitions. [2018-11-18 21:12:04,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-11-18 21:12:04,519 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 36 [2018-11-18 21:12:04,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:12:04,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-18 21:12:04,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 210 transitions. [2018-11-18 21:12:04,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-11-18 21:12:04,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 210 transitions. [2018-11-18 21:12:04,535 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 49 states and 210 transitions. [2018-11-18 21:12:06,708 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 210 edges. 210 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:12:06,715 INFO L225 Difference]: With dead ends: 208 [2018-11-18 21:12:06,715 INFO L226 Difference]: Without dead ends: 206 [2018-11-18 21:12:06,717 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 842 ImplicationChecksByTransitivity, 20.0s TimeCoverageRelationStatistics Valid=774, Invalid=2532, Unknown=0, NotChecked=0, Total=3306 [2018-11-18 21:12:06,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-11-18 21:12:06,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 131. [2018-11-18 21:12:06,883 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:12:06,883 INFO L82 GeneralOperation]: Start isEquivalent. First operand 206 states. Second operand 131 states. [2018-11-18 21:12:06,883 INFO L74 IsIncluded]: Start isIncluded. First operand 206 states. Second operand 131 states. [2018-11-18 21:12:06,884 INFO L87 Difference]: Start difference. First operand 206 states. Second operand 131 states. [2018-11-18 21:12:06,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:06,894 INFO L93 Difference]: Finished difference Result 206 states and 241 transitions. [2018-11-18 21:12:06,894 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 241 transitions. [2018-11-18 21:12:06,896 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:12:06,896 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:12:06,897 INFO L74 IsIncluded]: Start isIncluded. First operand 131 states. Second operand 206 states. [2018-11-18 21:12:06,897 INFO L87 Difference]: Start difference. First operand 131 states. Second operand 206 states. [2018-11-18 21:12:06,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:06,906 INFO L93 Difference]: Finished difference Result 206 states and 241 transitions. [2018-11-18 21:12:06,907 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 241 transitions. [2018-11-18 21:12:06,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:12:06,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:12:06,908 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:12:06,908 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:12:06,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-11-18 21:12:06,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 151 transitions. [2018-11-18 21:12:06,913 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 151 transitions. Word has length 36 [2018-11-18 21:12:06,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:12:06,914 INFO L480 AbstractCegarLoop]: Abstraction has 131 states and 151 transitions. [2018-11-18 21:12:06,914 INFO L481 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-11-18 21:12:06,914 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 151 transitions. [2018-11-18 21:12:06,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-11-18 21:12:06,915 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:12:06,915 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:12:06,916 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:12:06,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:12:06,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1166315301, now seen corresponding path program 1 times [2018-11-18 21:12:06,916 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:12:06,917 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:12:06,945 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-18 21:12:07,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:12:07,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:12:07,035 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:12:07,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-18 21:12:07,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-18 21:12:07,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,125 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,138 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,138 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-11-18 21:12:07,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-11-18 21:12:07,477 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:07,500 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:07,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-11-18 21:12:07,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,530 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,543 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,544 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-11-18 21:12:07,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-11-18 21:12:07,793 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:07,794 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:07,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-18 21:12:07,797 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,802 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:07,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:9 [2018-11-18 21:12:07,814 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:12:07,873 INFO L256 TraceCheckUtils]: 0: Hoare triple {2563#true} call ULTIMATE.init(); {2563#true} is VALID [2018-11-18 21:12:07,873 INFO L273 TraceCheckUtils]: 1: Hoare triple {2563#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2563#true} is VALID [2018-11-18 21:12:07,874 INFO L273 TraceCheckUtils]: 2: Hoare triple {2563#true} assume true; {2563#true} is VALID [2018-11-18 21:12:07,874 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2563#true} {2563#true} #65#return; {2563#true} is VALID [2018-11-18 21:12:07,874 INFO L256 TraceCheckUtils]: 4: Hoare triple {2563#true} call #t~ret5 := main(); {2563#true} is VALID [2018-11-18 21:12:07,874 INFO L273 TraceCheckUtils]: 5: Hoare triple {2563#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2563#true} is VALID [2018-11-18 21:12:07,882 INFO L273 TraceCheckUtils]: 6: Hoare triple {2563#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,883 INFO L273 TraceCheckUtils]: 7: Hoare triple {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,883 INFO L273 TraceCheckUtils]: 8: Hoare triple {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,884 INFO L273 TraceCheckUtils]: 9: Hoare triple {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,884 INFO L273 TraceCheckUtils]: 10: Hoare triple {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,885 INFO L273 TraceCheckUtils]: 11: Hoare triple {2586#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,885 INFO L273 TraceCheckUtils]: 12: Hoare triple {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,886 INFO L273 TraceCheckUtils]: 13: Hoare triple {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,887 INFO L273 TraceCheckUtils]: 14: Hoare triple {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,889 INFO L273 TraceCheckUtils]: 15: Hoare triple {2602#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2615#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,892 INFO L273 TraceCheckUtils]: 16: Hoare triple {2615#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:12:07,893 INFO L273 TraceCheckUtils]: 17: Hoare triple {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume true; {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:12:07,893 INFO L273 TraceCheckUtils]: 18: Hoare triple {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:12:07,894 INFO L273 TraceCheckUtils]: 19: Hoare triple {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:12:07,896 INFO L273 TraceCheckUtils]: 20: Hoare triple {2619#(and (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:07,897 INFO L273 TraceCheckUtils]: 21: Hoare triple {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:07,898 INFO L273 TraceCheckUtils]: 22: Hoare triple {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume true; {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:07,899 INFO L273 TraceCheckUtils]: 23: Hoare triple {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:07,900 INFO L273 TraceCheckUtils]: 24: Hoare triple {2632#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,901 INFO L273 TraceCheckUtils]: 25: Hoare triple {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,902 INFO L273 TraceCheckUtils]: 26: Hoare triple {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,905 INFO L256 TraceCheckUtils]: 27: Hoare triple {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:07,906 INFO L273 TraceCheckUtils]: 28: Hoare triple {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} ~cond := #in~cond; {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:07,906 INFO L273 TraceCheckUtils]: 29: Hoare triple {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:07,907 INFO L273 TraceCheckUtils]: 30: Hoare triple {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} assume true; {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:07,908 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {2655#(exists ((|v_main_~#a~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_1|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32))))} {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #69#return; {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,909 INFO L273 TraceCheckUtils]: 32: Hoare triple {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} havoc #t~mem4; {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:07,910 INFO L273 TraceCheckUtils]: 33: Hoare triple {2645#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2674#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,911 INFO L273 TraceCheckUtils]: 34: Hoare triple {2674#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {2674#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,913 INFO L273 TraceCheckUtils]: 35: Hoare triple {2674#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2681#(and (= (_ bv1 32) |main_#t~mem4|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:07,915 INFO L256 TraceCheckUtils]: 36: Hoare triple {2681#(and (= (_ bv1 32) |main_#t~mem4|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {2685#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:12:07,915 INFO L273 TraceCheckUtils]: 37: Hoare triple {2685#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {2689#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:12:07,916 INFO L273 TraceCheckUtils]: 38: Hoare triple {2689#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {2564#false} is VALID [2018-11-18 21:12:07,916 INFO L273 TraceCheckUtils]: 39: Hoare triple {2564#false} assume !false; {2564#false} is VALID [2018-11-18 21:12:07,924 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:12:07,924 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:12:08,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2018-11-18 21:12:08,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 28 [2018-11-18 21:12:08,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 6 [2018-11-18 21:12:08,546 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:08,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 18 [2018-11-18 21:12:08,597 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-11-18 21:12:08,622 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-18 21:12:08,652 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:12:08,669 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:12:08,669 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:21 [2018-11-18 21:12:08,675 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:12:08,867 INFO L273 TraceCheckUtils]: 39: Hoare triple {2564#false} assume !false; {2564#false} is VALID [2018-11-18 21:12:08,868 INFO L273 TraceCheckUtils]: 38: Hoare triple {2699#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {2564#false} is VALID [2018-11-18 21:12:08,868 INFO L273 TraceCheckUtils]: 37: Hoare triple {2703#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {2699#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-18 21:12:08,869 INFO L256 TraceCheckUtils]: 36: Hoare triple {2707#(bvsge |main_#t~mem4| main_~i~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {2703#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-18 21:12:08,870 INFO L273 TraceCheckUtils]: 35: Hoare triple {2711#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2707#(bvsge |main_#t~mem4| main_~i~0)} is VALID [2018-11-18 21:12:08,871 INFO L273 TraceCheckUtils]: 34: Hoare triple {2711#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume true; {2711#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:12:10,897 INFO L273 TraceCheckUtils]: 33: Hoare triple {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2711#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is UNKNOWN [2018-11-18 21:12:10,898 INFO L273 TraceCheckUtils]: 32: Hoare triple {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} havoc #t~mem4; {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:10,899 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {2563#true} {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} #69#return; {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:10,899 INFO L273 TraceCheckUtils]: 30: Hoare triple {2563#true} assume true; {2563#true} is VALID [2018-11-18 21:12:10,899 INFO L273 TraceCheckUtils]: 29: Hoare triple {2563#true} assume !(0bv32 == ~cond); {2563#true} is VALID [2018-11-18 21:12:10,899 INFO L273 TraceCheckUtils]: 28: Hoare triple {2563#true} ~cond := #in~cond; {2563#true} is VALID [2018-11-18 21:12:10,899 INFO L256 TraceCheckUtils]: 27: Hoare triple {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {2563#true} is VALID [2018-11-18 21:12:10,900 INFO L273 TraceCheckUtils]: 26: Hoare triple {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:10,900 INFO L273 TraceCheckUtils]: 25: Hoare triple {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} assume true; {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:10,901 INFO L273 TraceCheckUtils]: 24: Hoare triple {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} ~i~0 := 0bv32; {2718#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:10,903 INFO L273 TraceCheckUtils]: 23: Hoare triple {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,906 INFO L273 TraceCheckUtils]: 22: Hoare triple {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume true; {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,909 INFO L273 TraceCheckUtils]: 21: Hoare triple {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,932 INFO L273 TraceCheckUtils]: 20: Hoare triple {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2746#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,933 INFO L273 TraceCheckUtils]: 19: Hoare triple {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,933 INFO L273 TraceCheckUtils]: 18: Hoare triple {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,934 INFO L273 TraceCheckUtils]: 17: Hoare triple {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume true; {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,938 INFO L273 TraceCheckUtils]: 16: Hoare triple {2772#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2759#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,963 INFO L273 TraceCheckUtils]: 15: Hoare triple {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2772#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:10,964 INFO L273 TraceCheckUtils]: 14: Hoare triple {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-18 21:12:10,965 INFO L273 TraceCheckUtils]: 13: Hoare triple {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~SIZE~0); {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-18 21:12:10,965 INFO L273 TraceCheckUtils]: 12: Hoare triple {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} assume true; {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-18 21:12:10,970 INFO L273 TraceCheckUtils]: 11: Hoare triple {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2776#(and (bvsge (bvadd main_~i~0 (_ bv1 32)) (_ bv1 32)) (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-18 21:12:10,970 INFO L273 TraceCheckUtils]: 10: Hoare triple {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:10,971 INFO L273 TraceCheckUtils]: 9: Hoare triple {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:10,971 INFO L273 TraceCheckUtils]: 8: Hoare triple {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:10,972 INFO L273 TraceCheckUtils]: 7: Hoare triple {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} assume true; {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:10,973 INFO L273 TraceCheckUtils]: 6: Hoare triple {2563#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {2789#(and (or (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv2 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:10,973 INFO L273 TraceCheckUtils]: 5: Hoare triple {2563#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {2563#true} is VALID [2018-11-18 21:12:10,973 INFO L256 TraceCheckUtils]: 4: Hoare triple {2563#true} call #t~ret5 := main(); {2563#true} is VALID [2018-11-18 21:12:10,973 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2563#true} {2563#true} #65#return; {2563#true} is VALID [2018-11-18 21:12:10,974 INFO L273 TraceCheckUtils]: 2: Hoare triple {2563#true} assume true; {2563#true} is VALID [2018-11-18 21:12:10,974 INFO L273 TraceCheckUtils]: 1: Hoare triple {2563#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {2563#true} is VALID [2018-11-18 21:12:10,974 INFO L256 TraceCheckUtils]: 0: Hoare triple {2563#true} call ULTIMATE.init(); {2563#true} is VALID [2018-11-18 21:12:10,978 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:12:10,980 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:12:10,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 23 [2018-11-18 21:12:10,981 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 40 [2018-11-18 21:12:10,981 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:12:10,981 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states. [2018-11-18 21:12:13,171 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 72 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-18 21:12:13,172 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-11-18 21:12:13,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-11-18 21:12:13,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=423, Unknown=0, NotChecked=0, Total=506 [2018-11-18 21:12:13,172 INFO L87 Difference]: Start difference. First operand 131 states and 151 transitions. Second operand 23 states. [2018-11-18 21:12:21,066 WARN L180 SmtUtils]: Spent 4.13 s on a formula simplification. DAG size of input: 35 DAG size of output: 21 [2018-11-18 21:12:23,371 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-18 21:12:27,467 WARN L180 SmtUtils]: Spent 2.09 s on a formula simplification. DAG size of input: 28 DAG size of output: 21 [2018-11-18 21:12:29,919 WARN L180 SmtUtils]: Spent 2.14 s on a formula simplification. DAG size of input: 30 DAG size of output: 23 [2018-11-18 21:12:32,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:32,410 INFO L93 Difference]: Finished difference Result 252 states and 290 transitions. [2018-11-18 21:12:32,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-11-18 21:12:32,410 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 40 [2018-11-18 21:12:32,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:12:32,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-18 21:12:32,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 173 transitions. [2018-11-18 21:12:32,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-11-18 21:12:32,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 173 transitions. [2018-11-18 21:12:32,421 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 37 states and 173 transitions. [2018-11-18 21:12:34,927 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 172 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-18 21:12:34,932 INFO L225 Difference]: With dead ends: 252 [2018-11-18 21:12:34,933 INFO L226 Difference]: Without dead ends: 250 [2018-11-18 21:12:34,934 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 406 ImplicationChecksByTransitivity, 13.1s TimeCoverageRelationStatistics Valid=337, Invalid=1643, Unknown=0, NotChecked=0, Total=1980 [2018-11-18 21:12:34,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-11-18 21:12:35,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 176. [2018-11-18 21:12:35,159 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:12:35,159 INFO L82 GeneralOperation]: Start isEquivalent. First operand 250 states. Second operand 176 states. [2018-11-18 21:12:35,160 INFO L74 IsIncluded]: Start isIncluded. First operand 250 states. Second operand 176 states. [2018-11-18 21:12:35,160 INFO L87 Difference]: Start difference. First operand 250 states. Second operand 176 states. [2018-11-18 21:12:35,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:35,171 INFO L93 Difference]: Finished difference Result 250 states and 287 transitions. [2018-11-18 21:12:35,171 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 287 transitions. [2018-11-18 21:12:35,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:12:35,173 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:12:35,173 INFO L74 IsIncluded]: Start isIncluded. First operand 176 states. Second operand 250 states. [2018-11-18 21:12:35,173 INFO L87 Difference]: Start difference. First operand 176 states. Second operand 250 states. [2018-11-18 21:12:35,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:35,184 INFO L93 Difference]: Finished difference Result 250 states and 287 transitions. [2018-11-18 21:12:35,184 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 287 transitions. [2018-11-18 21:12:35,185 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:12:35,185 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:12:35,185 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:12:35,185 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:12:35,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-11-18 21:12:35,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 202 transitions. [2018-11-18 21:12:35,192 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 202 transitions. Word has length 40 [2018-11-18 21:12:35,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:12:35,193 INFO L480 AbstractCegarLoop]: Abstraction has 176 states and 202 transitions. [2018-11-18 21:12:35,193 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-11-18 21:12:35,193 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 202 transitions. [2018-11-18 21:12:35,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-18 21:12:35,194 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:12:35,194 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:12:35,195 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:12:35,195 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:12:35,195 INFO L82 PathProgramCache]: Analyzing trace with hash 1920862669, now seen corresponding path program 2 times [2018-11-18 21:12:35,195 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:12:35,195 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:12:35,217 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 21:12:35,276 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 21:12:35,276 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 21:12:35,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:12:35,291 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:12:35,461 INFO L256 TraceCheckUtils]: 0: Hoare triple {3924#true} call ULTIMATE.init(); {3924#true} is VALID [2018-11-18 21:12:35,462 INFO L273 TraceCheckUtils]: 1: Hoare triple {3924#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3924#true} is VALID [2018-11-18 21:12:35,462 INFO L273 TraceCheckUtils]: 2: Hoare triple {3924#true} assume true; {3924#true} is VALID [2018-11-18 21:12:35,462 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3924#true} {3924#true} #65#return; {3924#true} is VALID [2018-11-18 21:12:35,463 INFO L256 TraceCheckUtils]: 4: Hoare triple {3924#true} call #t~ret5 := main(); {3924#true} is VALID [2018-11-18 21:12:35,463 INFO L273 TraceCheckUtils]: 5: Hoare triple {3924#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3924#true} is VALID [2018-11-18 21:12:35,464 INFO L273 TraceCheckUtils]: 6: Hoare triple {3924#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,464 INFO L273 TraceCheckUtils]: 7: Hoare triple {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,464 INFO L273 TraceCheckUtils]: 8: Hoare triple {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,465 INFO L273 TraceCheckUtils]: 9: Hoare triple {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,465 INFO L273 TraceCheckUtils]: 10: Hoare triple {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,466 INFO L273 TraceCheckUtils]: 11: Hoare triple {3947#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3963#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,467 INFO L273 TraceCheckUtils]: 12: Hoare triple {3963#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {3963#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,468 INFO L273 TraceCheckUtils]: 13: Hoare triple {3963#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {3963#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,469 INFO L273 TraceCheckUtils]: 14: Hoare triple {3963#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,469 INFO L273 TraceCheckUtils]: 15: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,470 INFO L273 TraceCheckUtils]: 16: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,471 INFO L273 TraceCheckUtils]: 17: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,472 INFO L273 TraceCheckUtils]: 18: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,472 INFO L273 TraceCheckUtils]: 19: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~i~0 := 0bv32; {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,473 INFO L273 TraceCheckUtils]: 20: Hoare triple {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,474 INFO L273 TraceCheckUtils]: 21: Hoare triple {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,475 INFO L256 TraceCheckUtils]: 22: Hoare triple {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,476 INFO L273 TraceCheckUtils]: 23: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~cond := #in~cond; {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,477 INFO L273 TraceCheckUtils]: 24: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !(0bv32 == ~cond); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,477 INFO L273 TraceCheckUtils]: 25: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,478 INFO L268 TraceCheckUtils]: 26: Hoare quadruple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #69#return; {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,478 INFO L273 TraceCheckUtils]: 27: Hoare triple {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} havoc #t~mem4; {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,481 INFO L273 TraceCheckUtils]: 28: Hoare triple {3989#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,482 INFO L273 TraceCheckUtils]: 29: Hoare triple {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,482 INFO L273 TraceCheckUtils]: 30: Hoare triple {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,484 INFO L256 TraceCheckUtils]: 31: Hoare triple {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,485 INFO L273 TraceCheckUtils]: 32: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~cond := #in~cond; {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,485 INFO L273 TraceCheckUtils]: 33: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !(0bv32 == ~cond); {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,485 INFO L273 TraceCheckUtils]: 34: Hoare triple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:35,486 INFO L268 TraceCheckUtils]: 35: Hoare quadruple {3973#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #69#return; {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,487 INFO L273 TraceCheckUtils]: 36: Hoare triple {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:35,487 INFO L273 TraceCheckUtils]: 37: Hoare triple {4017#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4045#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:12:35,488 INFO L273 TraceCheckUtils]: 38: Hoare triple {4045#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume true; {4045#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:12:35,489 INFO L273 TraceCheckUtils]: 39: Hoare triple {4045#(and (not (bvslt (_ bv2 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3925#false} is VALID [2018-11-18 21:12:35,489 INFO L256 TraceCheckUtils]: 40: Hoare triple {3925#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {3925#false} is VALID [2018-11-18 21:12:35,489 INFO L273 TraceCheckUtils]: 41: Hoare triple {3925#false} ~cond := #in~cond; {3925#false} is VALID [2018-11-18 21:12:35,490 INFO L273 TraceCheckUtils]: 42: Hoare triple {3925#false} assume 0bv32 == ~cond; {3925#false} is VALID [2018-11-18 21:12:35,490 INFO L273 TraceCheckUtils]: 43: Hoare triple {3925#false} assume !false; {3925#false} is VALID [2018-11-18 21:12:35,494 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 21:12:35,494 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:12:35,734 INFO L273 TraceCheckUtils]: 43: Hoare triple {3925#false} assume !false; {3925#false} is VALID [2018-11-18 21:12:35,734 INFO L273 TraceCheckUtils]: 42: Hoare triple {3925#false} assume 0bv32 == ~cond; {3925#false} is VALID [2018-11-18 21:12:35,734 INFO L273 TraceCheckUtils]: 41: Hoare triple {3925#false} ~cond := #in~cond; {3925#false} is VALID [2018-11-18 21:12:35,734 INFO L256 TraceCheckUtils]: 40: Hoare triple {3925#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {3925#false} is VALID [2018-11-18 21:12:35,735 INFO L273 TraceCheckUtils]: 39: Hoare triple {4076#(not (bvslt main_~i~0 ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3925#false} is VALID [2018-11-18 21:12:35,736 INFO L273 TraceCheckUtils]: 38: Hoare triple {4076#(not (bvslt main_~i~0 ~SIZE~0))} assume true; {4076#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-18 21:12:35,737 INFO L273 TraceCheckUtils]: 37: Hoare triple {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4076#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-18 21:12:35,737 INFO L273 TraceCheckUtils]: 36: Hoare triple {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} havoc #t~mem4; {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,738 INFO L268 TraceCheckUtils]: 35: Hoare quadruple {3924#true} {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #69#return; {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,738 INFO L273 TraceCheckUtils]: 34: Hoare triple {3924#true} assume true; {3924#true} is VALID [2018-11-18 21:12:35,738 INFO L273 TraceCheckUtils]: 33: Hoare triple {3924#true} assume !(0bv32 == ~cond); {3924#true} is VALID [2018-11-18 21:12:35,738 INFO L273 TraceCheckUtils]: 32: Hoare triple {3924#true} ~cond := #in~cond; {3924#true} is VALID [2018-11-18 21:12:35,738 INFO L256 TraceCheckUtils]: 31: Hoare triple {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {3924#true} is VALID [2018-11-18 21:12:35,739 INFO L273 TraceCheckUtils]: 30: Hoare triple {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,739 INFO L273 TraceCheckUtils]: 29: Hoare triple {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume true; {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,762 INFO L273 TraceCheckUtils]: 28: Hoare triple {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4083#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,772 INFO L273 TraceCheckUtils]: 27: Hoare triple {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} havoc #t~mem4; {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,773 INFO L268 TraceCheckUtils]: 26: Hoare quadruple {3924#true} {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #69#return; {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,773 INFO L273 TraceCheckUtils]: 25: Hoare triple {3924#true} assume true; {3924#true} is VALID [2018-11-18 21:12:35,774 INFO L273 TraceCheckUtils]: 24: Hoare triple {3924#true} assume !(0bv32 == ~cond); {3924#true} is VALID [2018-11-18 21:12:35,774 INFO L273 TraceCheckUtils]: 23: Hoare triple {3924#true} ~cond := #in~cond; {3924#true} is VALID [2018-11-18 21:12:35,774 INFO L256 TraceCheckUtils]: 22: Hoare triple {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {3924#true} is VALID [2018-11-18 21:12:35,774 INFO L273 TraceCheckUtils]: 21: Hoare triple {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,775 INFO L273 TraceCheckUtils]: 20: Hoare triple {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume true; {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,775 INFO L273 TraceCheckUtils]: 19: Hoare triple {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} ~i~0 := 0bv32; {4111#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,776 INFO L273 TraceCheckUtils]: 18: Hoare triple {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-18 21:12:35,776 INFO L273 TraceCheckUtils]: 17: Hoare triple {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} assume true; {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-18 21:12:35,777 INFO L273 TraceCheckUtils]: 16: Hoare triple {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-18 21:12:35,777 INFO L273 TraceCheckUtils]: 15: Hoare triple {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-18 21:12:35,778 INFO L273 TraceCheckUtils]: 14: Hoare triple {4155#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {4139#(not (bvslt (_ bv2 32) ~SIZE~0))} is VALID [2018-11-18 21:12:35,779 INFO L273 TraceCheckUtils]: 13: Hoare triple {4155#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {4155#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,779 INFO L273 TraceCheckUtils]: 12: Hoare triple {4155#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume true; {4155#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,812 INFO L273 TraceCheckUtils]: 11: Hoare triple {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4155#(or (not (bvslt (_ bv2 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:12:35,813 INFO L273 TraceCheckUtils]: 10: Hoare triple {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} is VALID [2018-11-18 21:12:35,813 INFO L273 TraceCheckUtils]: 9: Hoare triple {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} is VALID [2018-11-18 21:12:35,814 INFO L273 TraceCheckUtils]: 8: Hoare triple {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} assume !!~bvslt32(~i~0, ~SIZE~0); {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} is VALID [2018-11-18 21:12:35,814 INFO L273 TraceCheckUtils]: 7: Hoare triple {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} assume true; {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} is VALID [2018-11-18 21:12:35,815 INFO L273 TraceCheckUtils]: 6: Hoare triple {3924#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {4165#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0) (not (bvslt (_ bv2 32) ~SIZE~0)))} is VALID [2018-11-18 21:12:35,816 INFO L273 TraceCheckUtils]: 5: Hoare triple {3924#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {3924#true} is VALID [2018-11-18 21:12:35,816 INFO L256 TraceCheckUtils]: 4: Hoare triple {3924#true} call #t~ret5 := main(); {3924#true} is VALID [2018-11-18 21:12:35,816 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3924#true} {3924#true} #65#return; {3924#true} is VALID [2018-11-18 21:12:35,816 INFO L273 TraceCheckUtils]: 2: Hoare triple {3924#true} assume true; {3924#true} is VALID [2018-11-18 21:12:35,816 INFO L273 TraceCheckUtils]: 1: Hoare triple {3924#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {3924#true} is VALID [2018-11-18 21:12:35,816 INFO L256 TraceCheckUtils]: 0: Hoare triple {3924#true} call ULTIMATE.init(); {3924#true} is VALID [2018-11-18 21:12:35,818 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-18 21:12:35,820 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:12:35,820 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-18 21:12:35,820 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-11-18 21:12:35,821 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:12:35,821 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-18 21:12:35,983 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:12:35,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-18 21:12:35,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-18 21:12:35,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2018-11-18 21:12:35,985 INFO L87 Difference]: Start difference. First operand 176 states and 202 transitions. Second operand 14 states. [2018-11-18 21:12:37,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:37,770 INFO L93 Difference]: Finished difference Result 283 states and 320 transitions. [2018-11-18 21:12:37,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-18 21:12:37,770 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-11-18 21:12:37,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:12:37,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-18 21:12:37,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 95 transitions. [2018-11-18 21:12:37,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-18 21:12:37,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 95 transitions. [2018-11-18 21:12:37,776 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 95 transitions. [2018-11-18 21:12:38,014 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:12:38,018 INFO L225 Difference]: With dead ends: 283 [2018-11-18 21:12:38,018 INFO L226 Difference]: Without dead ends: 139 [2018-11-18 21:12:38,019 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2018-11-18 21:12:38,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-11-18 21:12:38,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 118. [2018-11-18 21:12:38,256 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:12:38,257 INFO L82 GeneralOperation]: Start isEquivalent. First operand 139 states. Second operand 118 states. [2018-11-18 21:12:38,257 INFO L74 IsIncluded]: Start isIncluded. First operand 139 states. Second operand 118 states. [2018-11-18 21:12:38,257 INFO L87 Difference]: Start difference. First operand 139 states. Second operand 118 states. [2018-11-18 21:12:38,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:38,261 INFO L93 Difference]: Finished difference Result 139 states and 150 transitions. [2018-11-18 21:12:38,262 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 150 transitions. [2018-11-18 21:12:38,262 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:12:38,262 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:12:38,262 INFO L74 IsIncluded]: Start isIncluded. First operand 118 states. Second operand 139 states. [2018-11-18 21:12:38,263 INFO L87 Difference]: Start difference. First operand 118 states. Second operand 139 states. [2018-11-18 21:12:38,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:12:38,268 INFO L93 Difference]: Finished difference Result 139 states and 150 transitions. [2018-11-18 21:12:38,268 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 150 transitions. [2018-11-18 21:12:38,268 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:12:38,269 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:12:38,269 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:12:38,269 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:12:38,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-11-18 21:12:38,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-11-18 21:12:38,273 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 44 [2018-11-18 21:12:38,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:12:38,273 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-11-18 21:12:38,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-18 21:12:38,274 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-11-18 21:12:38,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 21:12:38,275 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:12:38,275 INFO L375 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:12:38,275 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:12:38,275 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:12:38,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1740333883, now seen corresponding path program 3 times [2018-11-18 21:12:38,276 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:12:38,276 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:12:38,305 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-18 21:12:38,767 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-11-18 21:12:38,768 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 21:12:38,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:12:38,813 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:12:38,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-18 21:12:38,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-18 21:12:38,930 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:38,933 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:38,946 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:38,947 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-11-18 21:12:39,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-18 21:12:39,120 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,121 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 45 [2018-11-18 21:12:39,127 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,140 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,157 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-11-18 21:12:39,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-11-18 21:12:39,231 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,233 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,236 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,238 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 86 [2018-11-18 21:12:39,244 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,283 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:45, output treesize:41 [2018-11-18 21:12:39,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 37 [2018-11-18 21:12:39,431 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,433 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,436 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,437 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,439 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,441 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,443 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,445 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,447 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 9 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 135 [2018-11-18 21:12:39,451 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,482 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,510 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:50 [2018-11-18 21:12:39,603 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 54 [2018-11-18 21:12:39,623 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,625 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,627 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,629 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,633 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,636 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,638 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,640 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,640 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:39,642 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,644 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 167 [2018-11-18 21:12:39,657 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,694 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,721 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,721 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:50 [2018-11-18 21:12:39,742 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:12:39,906 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51 [2018-11-18 21:12:39,922 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,924 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,926 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,929 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,931 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,933 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,935 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,937 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,940 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,942 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,945 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:39,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 12 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 143 [2018-11-18 21:12:39,950 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:39,989 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:40,010 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:40,011 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:57, output treesize:42 [2018-11-18 21:12:40,027 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:12:40,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 28 [2018-11-18 21:12:40,404 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:40,406 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:40,407 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:40,408 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:40,409 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:40,410 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:40,411 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:12:40,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 12 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 35 [2018-11-18 21:12:40,415 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:40,424 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:40,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:12:40,430 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:9 [2018-11-18 21:12:40,435 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:12:40,537 INFO L256 TraceCheckUtils]: 0: Hoare triple {5002#true} call ULTIMATE.init(); {5002#true} is VALID [2018-11-18 21:12:40,537 INFO L273 TraceCheckUtils]: 1: Hoare triple {5002#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {5002#true} is VALID [2018-11-18 21:12:40,537 INFO L273 TraceCheckUtils]: 2: Hoare triple {5002#true} assume true; {5002#true} is VALID [2018-11-18 21:12:40,537 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5002#true} {5002#true} #65#return; {5002#true} is VALID [2018-11-18 21:12:40,538 INFO L256 TraceCheckUtils]: 4: Hoare triple {5002#true} call #t~ret5 := main(); {5002#true} is VALID [2018-11-18 21:12:40,538 INFO L273 TraceCheckUtils]: 5: Hoare triple {5002#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {5002#true} is VALID [2018-11-18 21:12:40,538 INFO L273 TraceCheckUtils]: 6: Hoare triple {5002#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:40,539 INFO L273 TraceCheckUtils]: 7: Hoare triple {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:40,539 INFO L273 TraceCheckUtils]: 8: Hoare triple {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:40,540 INFO L273 TraceCheckUtils]: 9: Hoare triple {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:40,540 INFO L273 TraceCheckUtils]: 10: Hoare triple {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:12:40,541 INFO L273 TraceCheckUtils]: 11: Hoare triple {5025#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,541 INFO L273 TraceCheckUtils]: 12: Hoare triple {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,542 INFO L273 TraceCheckUtils]: 13: Hoare triple {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,543 INFO L273 TraceCheckUtils]: 14: Hoare triple {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,545 INFO L273 TraceCheckUtils]: 15: Hoare triple {5041#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5054#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,549 INFO L273 TraceCheckUtils]: 16: Hoare triple {5054#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5058#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,550 INFO L273 TraceCheckUtils]: 17: Hoare triple {5058#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume true; {5058#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,550 INFO L273 TraceCheckUtils]: 18: Hoare triple {5058#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5058#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,554 INFO L273 TraceCheckUtils]: 19: Hoare triple {5058#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5068#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:12:40,556 INFO L273 TraceCheckUtils]: 20: Hoare triple {5068#(and (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5072#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:12:40,558 INFO L273 TraceCheckUtils]: 21: Hoare triple {5072#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5076#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,559 INFO L273 TraceCheckUtils]: 22: Hoare triple {5076#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume true; {5076#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,560 INFO L273 TraceCheckUtils]: 23: Hoare triple {5076#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5076#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,565 INFO L273 TraceCheckUtils]: 24: Hoare triple {5076#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5086#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:12:40,568 INFO L273 TraceCheckUtils]: 25: Hoare triple {5086#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5090#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:12:40,569 INFO L273 TraceCheckUtils]: 26: Hoare triple {5090#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,570 INFO L273 TraceCheckUtils]: 27: Hoare triple {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume true; {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,571 INFO L273 TraceCheckUtils]: 28: Hoare triple {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,571 INFO L273 TraceCheckUtils]: 29: Hoare triple {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} is VALID [2018-11-18 21:12:40,576 INFO L273 TraceCheckUtils]: 30: Hoare triple {5094#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,577 INFO L273 TraceCheckUtils]: 31: Hoare triple {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,577 INFO L273 TraceCheckUtils]: 32: Hoare triple {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume true; {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,578 INFO L273 TraceCheckUtils]: 33: Hoare triple {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume !~bvslt32(~i~0, ~SIZE~0); {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,579 INFO L273 TraceCheckUtils]: 34: Hoare triple {5107#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} ~i~0 := 0bv32; {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,579 INFO L273 TraceCheckUtils]: 35: Hoare triple {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume true; {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,581 INFO L273 TraceCheckUtils]: 36: Hoare triple {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,583 INFO L256 TraceCheckUtils]: 37: Hoare triple {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:40,584 INFO L273 TraceCheckUtils]: 38: Hoare triple {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} ~cond := #in~cond; {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:40,584 INFO L273 TraceCheckUtils]: 39: Hoare triple {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:40,585 INFO L273 TraceCheckUtils]: 40: Hoare triple {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} assume true; {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-18 21:12:40,585 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {5130#(exists ((|v_main_~#a~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv16 32)) (_ bv4294967292 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv8 32)) (_ bv4294967294 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv4 32)) (_ bv4294967295 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |v_main_~#a~0.base_BEFORE_CALL_3|) (_ bv12 32)) (_ bv4294967293 32)) (_ bv0 32))))} {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} #69#return; {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,586 INFO L273 TraceCheckUtils]: 42: Hoare triple {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} havoc #t~mem4; {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} is VALID [2018-11-18 21:12:40,587 INFO L273 TraceCheckUtils]: 43: Hoare triple {5120#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5149#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,588 INFO L273 TraceCheckUtils]: 44: Hoare triple {5149#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {5149#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,590 INFO L273 TraceCheckUtils]: 45: Hoare triple {5149#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5156#(and (= (_ bv1 32) |main_#t~mem4|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:12:40,591 INFO L256 TraceCheckUtils]: 46: Hoare triple {5156#(and (= (_ bv1 32) |main_#t~mem4|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {5160#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:12:40,592 INFO L273 TraceCheckUtils]: 47: Hoare triple {5160#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {5164#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:12:40,592 INFO L273 TraceCheckUtils]: 48: Hoare triple {5164#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {5003#false} is VALID [2018-11-18 21:12:40,592 INFO L273 TraceCheckUtils]: 49: Hoare triple {5003#false} assume !false; {5003#false} is VALID [2018-11-18 21:12:40,605 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:12:40,605 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:12:42,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 44 [2018-11-18 21:12:42,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 48 [2018-11-18 21:12:42,032 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,033 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 74 [2018-11-18 21:12:42,066 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,067 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,067 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,068 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 125 [2018-11-18 21:12:42,326 WARN L180 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 36 [2018-11-18 21:12:42,335 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,335 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,336 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,337 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,337 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,338 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 63 [2018-11-18 21:12:42,342 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-18 21:12:42,372 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,373 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,373 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,389 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,390 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,391 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:12:42,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 44 treesize of output 106 [2018-11-18 21:12:42,432 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 4 xjuncts. [2018-11-18 21:12:42,575 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 8 xjuncts. [2018-11-18 21:12:42,664 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:12:42,684 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:12:42,704 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:12:42,726 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:12:42,727 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 2 variables, input treesize:46, output treesize:43 [2018-11-18 21:12:42,735 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:12:43,000 INFO L273 TraceCheckUtils]: 49: Hoare triple {5003#false} assume !false; {5003#false} is VALID [2018-11-18 21:12:43,001 INFO L273 TraceCheckUtils]: 48: Hoare triple {5174#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {5003#false} is VALID [2018-11-18 21:12:43,002 INFO L273 TraceCheckUtils]: 47: Hoare triple {5178#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {5174#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-18 21:12:43,002 INFO L256 TraceCheckUtils]: 46: Hoare triple {5182#(bvsge |main_#t~mem4| main_~i~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {5178#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-18 21:12:43,003 INFO L273 TraceCheckUtils]: 45: Hoare triple {5186#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5182#(bvsge |main_#t~mem4| main_~i~0)} is VALID [2018-11-18 21:12:43,004 INFO L273 TraceCheckUtils]: 44: Hoare triple {5186#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume true; {5186#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:12:45,019 INFO L273 TraceCheckUtils]: 43: Hoare triple {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {5186#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is UNKNOWN [2018-11-18 21:12:45,020 INFO L273 TraceCheckUtils]: 42: Hoare triple {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} havoc #t~mem4; {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:45,020 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {5002#true} {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} #69#return; {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:45,020 INFO L273 TraceCheckUtils]: 40: Hoare triple {5002#true} assume true; {5002#true} is VALID [2018-11-18 21:12:45,021 INFO L273 TraceCheckUtils]: 39: Hoare triple {5002#true} assume !(0bv32 == ~cond); {5002#true} is VALID [2018-11-18 21:12:45,021 INFO L273 TraceCheckUtils]: 38: Hoare triple {5002#true} ~cond := #in~cond; {5002#true} is VALID [2018-11-18 21:12:45,021 INFO L256 TraceCheckUtils]: 37: Hoare triple {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {5002#true} is VALID [2018-11-18 21:12:45,021 INFO L273 TraceCheckUtils]: 36: Hoare triple {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:45,021 INFO L273 TraceCheckUtils]: 35: Hoare triple {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} assume true; {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:45,022 INFO L273 TraceCheckUtils]: 34: Hoare triple {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} ~i~0 := 0bv32; {5193#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) (bvadd main_~i~0 (_ bv1 32)))} is VALID [2018-11-18 21:12:45,022 INFO L273 TraceCheckUtils]: 33: Hoare triple {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !~bvslt32(~i~0, ~SIZE~0); {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,023 INFO L273 TraceCheckUtils]: 32: Hoare triple {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume true; {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,023 INFO L273 TraceCheckUtils]: 31: Hoare triple {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,049 INFO L273 TraceCheckUtils]: 30: Hoare triple {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5221#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,050 INFO L273 TraceCheckUtils]: 29: Hoare triple {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,050 INFO L273 TraceCheckUtils]: 28: Hoare triple {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,051 INFO L273 TraceCheckUtils]: 27: Hoare triple {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume true; {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,055 INFO L273 TraceCheckUtils]: 26: Hoare triple {5247#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5234#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,083 INFO L273 TraceCheckUtils]: 25: Hoare triple {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5247#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,105 INFO L273 TraceCheckUtils]: 24: Hoare triple {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,106 INFO L273 TraceCheckUtils]: 23: Hoare triple {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,106 INFO L273 TraceCheckUtils]: 22: Hoare triple {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume true; {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,115 INFO L273 TraceCheckUtils]: 21: Hoare triple {5264#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5251#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,152 INFO L273 TraceCheckUtils]: 20: Hoare triple {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5264#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,181 INFO L273 TraceCheckUtils]: 19: Hoare triple {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,182 INFO L273 TraceCheckUtils]: 18: Hoare triple {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,183 INFO L273 TraceCheckUtils]: 17: Hoare triple {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} assume true; {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,193 INFO L273 TraceCheckUtils]: 16: Hoare triple {5281#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5268#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,207 INFO L273 TraceCheckUtils]: 15: Hoare triple {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5281#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv1 32))} is VALID [2018-11-18 21:12:45,208 INFO L273 TraceCheckUtils]: 14: Hoare triple {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,209 INFO L273 TraceCheckUtils]: 13: Hoare triple {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,209 INFO L273 TraceCheckUtils]: 12: Hoare triple {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} assume true; {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,215 INFO L273 TraceCheckUtils]: 11: Hoare triple {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5285#(and (or (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32)) (= (_ bv4 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv3 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,216 INFO L273 TraceCheckUtils]: 10: Hoare triple {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,217 INFO L273 TraceCheckUtils]: 9: Hoare triple {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,217 INFO L273 TraceCheckUtils]: 8: Hoare triple {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,218 INFO L273 TraceCheckUtils]: 7: Hoare triple {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} assume true; {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,218 INFO L273 TraceCheckUtils]: 6: Hoare triple {5002#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {5298#(and (or (= (_ bv4294967284 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967292 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (_ bv0 32))) (bvsge (bvadd main_~i~0 (_ bv4 32)) (_ bv1 32)))} is VALID [2018-11-18 21:12:45,218 INFO L273 TraceCheckUtils]: 5: Hoare triple {5002#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {5002#true} is VALID [2018-11-18 21:12:45,219 INFO L256 TraceCheckUtils]: 4: Hoare triple {5002#true} call #t~ret5 := main(); {5002#true} is VALID [2018-11-18 21:12:45,219 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5002#true} {5002#true} #65#return; {5002#true} is VALID [2018-11-18 21:12:45,219 INFO L273 TraceCheckUtils]: 2: Hoare triple {5002#true} assume true; {5002#true} is VALID [2018-11-18 21:12:45,219 INFO L273 TraceCheckUtils]: 1: Hoare triple {5002#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {5002#true} is VALID [2018-11-18 21:12:45,219 INFO L256 TraceCheckUtils]: 0: Hoare triple {5002#true} call ULTIMATE.init(); {5002#true} is VALID [2018-11-18 21:12:45,227 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 2 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:12:45,229 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:12:45,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 16] total 33 [2018-11-18 21:12:45,230 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 50 [2018-11-18 21:12:45,230 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:12:45,230 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 33 states. [2018-11-18 21:12:47,612 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 93 edges. 92 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-18 21:12:47,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-18 21:12:47,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-18 21:12:47,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=881, Unknown=0, NotChecked=0, Total=1056 [2018-11-18 21:12:47,614 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 33 states. [2018-11-18 21:12:50,827 WARN L180 SmtUtils]: Spent 277.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 38 [2018-11-18 21:12:51,306 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 31 [2018-11-18 21:12:53,633 WARN L180 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 47 [2018-11-18 21:12:54,464 WARN L180 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 40 [2018-11-18 21:12:56,336 WARN L180 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 39 [2018-11-18 21:13:01,748 WARN L180 SmtUtils]: Spent 2.14 s on a formula simplification. DAG size of input: 32 DAG size of output: 27 [2018-11-18 21:13:04,236 WARN L180 SmtUtils]: Spent 2.09 s on a formula simplification. DAG size of input: 36 DAG size of output: 26 [2018-11-18 21:13:04,958 WARN L180 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 41 [2018-11-18 21:13:08,914 WARN L180 SmtUtils]: Spent 2.03 s on a formula simplification that was a NOOP. DAG size: 22 [2018-11-18 21:13:11,224 WARN L180 SmtUtils]: Spent 2.07 s on a formula simplification. DAG size of input: 26 DAG size of output: 21 [2018-11-18 21:13:17,421 WARN L180 SmtUtils]: Spent 2.04 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-18 21:13:19,788 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 37 [2018-11-18 21:13:22,440 WARN L180 SmtUtils]: Spent 207.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 49 [2018-11-18 21:13:22,855 WARN L180 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 51 [2018-11-18 21:13:24,304 WARN L180 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 42 [2018-11-18 21:13:24,678 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 44 [2018-11-18 21:13:27,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:13:27,027 INFO L93 Difference]: Finished difference Result 250 states and 273 transitions. [2018-11-18 21:13:27,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-11-18 21:13:27,027 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 50 [2018-11-18 21:13:27,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:13:27,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-18 21:13:27,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 213 transitions. [2018-11-18 21:13:27,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-11-18 21:13:27,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 213 transitions. [2018-11-18 21:13:27,038 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 56 states and 213 transitions. [2018-11-18 21:13:32,153 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 213 edges. 211 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-18 21:13:32,158 INFO L225 Difference]: With dead ends: 250 [2018-11-18 21:13:32,159 INFO L226 Difference]: Without dead ends: 248 [2018-11-18 21:13:32,160 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 66 SyntacticMatches, 3 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1093 ImplicationChecksByTransitivity, 19.7s TimeCoverageRelationStatistics Valid=840, Invalid=3582, Unknown=0, NotChecked=0, Total=4422 [2018-11-18 21:13:32,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-11-18 21:13:32,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 183. [2018-11-18 21:13:32,920 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:13:32,921 INFO L82 GeneralOperation]: Start isEquivalent. First operand 248 states. Second operand 183 states. [2018-11-18 21:13:32,921 INFO L74 IsIncluded]: Start isIncluded. First operand 248 states. Second operand 183 states. [2018-11-18 21:13:32,921 INFO L87 Difference]: Start difference. First operand 248 states. Second operand 183 states. [2018-11-18 21:13:32,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:13:32,932 INFO L93 Difference]: Finished difference Result 248 states and 270 transitions. [2018-11-18 21:13:32,932 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 270 transitions. [2018-11-18 21:13:32,933 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:13:32,934 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:13:32,934 INFO L74 IsIncluded]: Start isIncluded. First operand 183 states. Second operand 248 states. [2018-11-18 21:13:32,934 INFO L87 Difference]: Start difference. First operand 183 states. Second operand 248 states. [2018-11-18 21:13:32,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:13:32,944 INFO L93 Difference]: Finished difference Result 248 states and 270 transitions. [2018-11-18 21:13:32,944 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 270 transitions. [2018-11-18 21:13:32,945 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:13:32,945 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:13:32,946 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:13:32,946 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:13:32,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-11-18 21:13:32,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 197 transitions. [2018-11-18 21:13:32,952 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 197 transitions. Word has length 50 [2018-11-18 21:13:32,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:13:32,953 INFO L480 AbstractCegarLoop]: Abstraction has 183 states and 197 transitions. [2018-11-18 21:13:32,953 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-18 21:13:32,953 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 197 transitions. [2018-11-18 21:13:32,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-18 21:13:32,954 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:13:32,954 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:13:32,954 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:13:32,955 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:13:32,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1655617797, now seen corresponding path program 4 times [2018-11-18 21:13:32,955 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:13:32,955 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:13:32,991 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-18 21:13:33,061 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-18 21:13:33,061 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 21:13:33,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:13:33,116 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:13:33,366 INFO L256 TraceCheckUtils]: 0: Hoare triple {6470#true} call ULTIMATE.init(); {6470#true} is VALID [2018-11-18 21:13:33,366 INFO L273 TraceCheckUtils]: 1: Hoare triple {6470#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {6470#true} is VALID [2018-11-18 21:13:33,367 INFO L273 TraceCheckUtils]: 2: Hoare triple {6470#true} assume true; {6470#true} is VALID [2018-11-18 21:13:33,367 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6470#true} {6470#true} #65#return; {6470#true} is VALID [2018-11-18 21:13:33,367 INFO L256 TraceCheckUtils]: 4: Hoare triple {6470#true} call #t~ret5 := main(); {6470#true} is VALID [2018-11-18 21:13:33,367 INFO L273 TraceCheckUtils]: 5: Hoare triple {6470#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {6470#true} is VALID [2018-11-18 21:13:33,368 INFO L273 TraceCheckUtils]: 6: Hoare triple {6470#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,368 INFO L273 TraceCheckUtils]: 7: Hoare triple {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,369 INFO L273 TraceCheckUtils]: 8: Hoare triple {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,369 INFO L273 TraceCheckUtils]: 9: Hoare triple {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,370 INFO L273 TraceCheckUtils]: 10: Hoare triple {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,371 INFO L273 TraceCheckUtils]: 11: Hoare triple {6493#(and (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,372 INFO L273 TraceCheckUtils]: 12: Hoare triple {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,372 INFO L273 TraceCheckUtils]: 13: Hoare triple {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,373 INFO L273 TraceCheckUtils]: 14: Hoare triple {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,374 INFO L273 TraceCheckUtils]: 15: Hoare triple {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,375 INFO L273 TraceCheckUtils]: 16: Hoare triple {6509#(and (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6525#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,376 INFO L273 TraceCheckUtils]: 17: Hoare triple {6525#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6525#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,376 INFO L273 TraceCheckUtils]: 18: Hoare triple {6525#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {6525#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,378 INFO L273 TraceCheckUtils]: 19: Hoare triple {6525#(and (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,378 INFO L273 TraceCheckUtils]: 20: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,379 INFO L273 TraceCheckUtils]: 21: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,380 INFO L273 TraceCheckUtils]: 22: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,381 INFO L273 TraceCheckUtils]: 23: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,381 INFO L273 TraceCheckUtils]: 24: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~i~0 := 0bv32; {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,382 INFO L273 TraceCheckUtils]: 25: Hoare triple {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,383 INFO L273 TraceCheckUtils]: 26: Hoare triple {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,384 INFO L256 TraceCheckUtils]: 27: Hoare triple {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,385 INFO L273 TraceCheckUtils]: 28: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~cond := #in~cond; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,386 INFO L273 TraceCheckUtils]: 29: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !(0bv32 == ~cond); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,386 INFO L273 TraceCheckUtils]: 30: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,387 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #69#return; {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,388 INFO L273 TraceCheckUtils]: 32: Hoare triple {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} havoc #t~mem4; {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,389 INFO L273 TraceCheckUtils]: 33: Hoare triple {6551#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= main_~i~0 (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,390 INFO L273 TraceCheckUtils]: 34: Hoare triple {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,390 INFO L273 TraceCheckUtils]: 35: Hoare triple {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,392 INFO L256 TraceCheckUtils]: 36: Hoare triple {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,393 INFO L273 TraceCheckUtils]: 37: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~cond := #in~cond; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,393 INFO L273 TraceCheckUtils]: 38: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !(0bv32 == ~cond); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,394 INFO L273 TraceCheckUtils]: 39: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,395 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #69#return; {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,396 INFO L273 TraceCheckUtils]: 41: Hoare triple {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem4; {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:33,396 INFO L273 TraceCheckUtils]: 42: Hoare triple {6579#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:13:33,397 INFO L273 TraceCheckUtils]: 43: Hoare triple {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume true; {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:13:33,398 INFO L273 TraceCheckUtils]: 44: Hoare triple {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:13:33,399 INFO L256 TraceCheckUtils]: 45: Hoare triple {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,400 INFO L273 TraceCheckUtils]: 46: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} ~cond := #in~cond; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,415 INFO L273 TraceCheckUtils]: 47: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !(0bv32 == ~cond); {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,416 INFO L273 TraceCheckUtils]: 48: Hoare triple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,417 INFO L268 TraceCheckUtils]: 49: Hoare quadruple {6535#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)))} {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} #69#return; {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:13:33,417 INFO L273 TraceCheckUtils]: 50: Hoare triple {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} havoc #t~mem4; {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-18 21:13:33,418 INFO L273 TraceCheckUtils]: 51: Hoare triple {6607#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (bvsgt ~SIZE~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6635#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,419 INFO L273 TraceCheckUtils]: 52: Hoare triple {6635#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume true; {6635#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} is VALID [2018-11-18 21:13:33,419 INFO L273 TraceCheckUtils]: 53: Hoare triple {6635#(and (not (bvslt (_ bv3 32) ~SIZE~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~SIZE~0 (_ bv1 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6471#false} is VALID [2018-11-18 21:13:33,420 INFO L256 TraceCheckUtils]: 54: Hoare triple {6471#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6471#false} is VALID [2018-11-18 21:13:33,420 INFO L273 TraceCheckUtils]: 55: Hoare triple {6471#false} ~cond := #in~cond; {6471#false} is VALID [2018-11-18 21:13:33,420 INFO L273 TraceCheckUtils]: 56: Hoare triple {6471#false} assume 0bv32 == ~cond; {6471#false} is VALID [2018-11-18 21:13:33,420 INFO L273 TraceCheckUtils]: 57: Hoare triple {6471#false} assume !false; {6471#false} is VALID [2018-11-18 21:13:33,428 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 9 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 21:13:33,428 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:13:33,802 INFO L273 TraceCheckUtils]: 57: Hoare triple {6471#false} assume !false; {6471#false} is VALID [2018-11-18 21:13:33,802 INFO L273 TraceCheckUtils]: 56: Hoare triple {6471#false} assume 0bv32 == ~cond; {6471#false} is VALID [2018-11-18 21:13:33,803 INFO L273 TraceCheckUtils]: 55: Hoare triple {6471#false} ~cond := #in~cond; {6471#false} is VALID [2018-11-18 21:13:33,803 INFO L256 TraceCheckUtils]: 54: Hoare triple {6471#false} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6471#false} is VALID [2018-11-18 21:13:33,803 INFO L273 TraceCheckUtils]: 53: Hoare triple {6666#(not (bvslt main_~i~0 ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6471#false} is VALID [2018-11-18 21:13:33,804 INFO L273 TraceCheckUtils]: 52: Hoare triple {6666#(not (bvslt main_~i~0 ~SIZE~0))} assume true; {6666#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-18 21:13:33,805 INFO L273 TraceCheckUtils]: 51: Hoare triple {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6666#(not (bvslt main_~i~0 ~SIZE~0))} is VALID [2018-11-18 21:13:33,805 INFO L273 TraceCheckUtils]: 50: Hoare triple {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} havoc #t~mem4; {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,806 INFO L268 TraceCheckUtils]: 49: Hoare quadruple {6470#true} {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} #69#return; {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,806 INFO L273 TraceCheckUtils]: 48: Hoare triple {6470#true} assume true; {6470#true} is VALID [2018-11-18 21:13:33,807 INFO L273 TraceCheckUtils]: 47: Hoare triple {6470#true} assume !(0bv32 == ~cond); {6470#true} is VALID [2018-11-18 21:13:33,807 INFO L273 TraceCheckUtils]: 46: Hoare triple {6470#true} ~cond := #in~cond; {6470#true} is VALID [2018-11-18 21:13:33,807 INFO L256 TraceCheckUtils]: 45: Hoare triple {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6470#true} is VALID [2018-11-18 21:13:33,807 INFO L273 TraceCheckUtils]: 44: Hoare triple {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,807 INFO L273 TraceCheckUtils]: 43: Hoare triple {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume true; {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,832 INFO L273 TraceCheckUtils]: 42: Hoare triple {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6673#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,833 INFO L273 TraceCheckUtils]: 41: Hoare triple {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} havoc #t~mem4; {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,834 INFO L268 TraceCheckUtils]: 40: Hoare quadruple {6470#true} {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #69#return; {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,834 INFO L273 TraceCheckUtils]: 39: Hoare triple {6470#true} assume true; {6470#true} is VALID [2018-11-18 21:13:33,834 INFO L273 TraceCheckUtils]: 38: Hoare triple {6470#true} assume !(0bv32 == ~cond); {6470#true} is VALID [2018-11-18 21:13:33,834 INFO L273 TraceCheckUtils]: 37: Hoare triple {6470#true} ~cond := #in~cond; {6470#true} is VALID [2018-11-18 21:13:33,834 INFO L256 TraceCheckUtils]: 36: Hoare triple {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6470#true} is VALID [2018-11-18 21:13:33,834 INFO L273 TraceCheckUtils]: 35: Hoare triple {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,835 INFO L273 TraceCheckUtils]: 34: Hoare triple {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume true; {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,856 INFO L273 TraceCheckUtils]: 33: Hoare triple {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6701#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,857 INFO L273 TraceCheckUtils]: 32: Hoare triple {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} havoc #t~mem4; {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,857 INFO L268 TraceCheckUtils]: 31: Hoare quadruple {6470#true} {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #69#return; {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,858 INFO L273 TraceCheckUtils]: 30: Hoare triple {6470#true} assume true; {6470#true} is VALID [2018-11-18 21:13:33,858 INFO L273 TraceCheckUtils]: 29: Hoare triple {6470#true} assume !(0bv32 == ~cond); {6470#true} is VALID [2018-11-18 21:13:33,858 INFO L273 TraceCheckUtils]: 28: Hoare triple {6470#true} ~cond := #in~cond; {6470#true} is VALID [2018-11-18 21:13:33,858 INFO L256 TraceCheckUtils]: 27: Hoare triple {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {6470#true} is VALID [2018-11-18 21:13:33,858 INFO L273 TraceCheckUtils]: 26: Hoare triple {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,859 INFO L273 TraceCheckUtils]: 25: Hoare triple {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume true; {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,859 INFO L273 TraceCheckUtils]: 24: Hoare triple {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} ~i~0 := 0bv32; {6729#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,859 INFO L273 TraceCheckUtils]: 23: Hoare triple {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} assume !~bvslt32(~i~0, ~SIZE~0); {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-18 21:13:33,860 INFO L273 TraceCheckUtils]: 22: Hoare triple {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} assume true; {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-18 21:13:33,860 INFO L273 TraceCheckUtils]: 21: Hoare triple {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-18 21:13:33,861 INFO L273 TraceCheckUtils]: 20: Hoare triple {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-18 21:13:33,861 INFO L273 TraceCheckUtils]: 19: Hoare triple {6773#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {6757#(not (bvslt (_ bv3 32) ~SIZE~0))} is VALID [2018-11-18 21:13:33,862 INFO L273 TraceCheckUtils]: 18: Hoare triple {6773#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {6773#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,862 INFO L273 TraceCheckUtils]: 17: Hoare triple {6773#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} assume true; {6773#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,890 INFO L273 TraceCheckUtils]: 16: Hoare triple {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6773#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,891 INFO L273 TraceCheckUtils]: 15: Hoare triple {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,891 INFO L273 TraceCheckUtils]: 14: Hoare triple {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,892 INFO L273 TraceCheckUtils]: 13: Hoare triple {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,892 INFO L273 TraceCheckUtils]: 12: Hoare triple {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} assume true; {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,918 INFO L273 TraceCheckUtils]: 11: Hoare triple {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6783#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,918 INFO L273 TraceCheckUtils]: 10: Hoare triple {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,919 INFO L273 TraceCheckUtils]: 9: Hoare triple {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,919 INFO L273 TraceCheckUtils]: 8: Hoare triple {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume !!~bvslt32(~i~0, ~SIZE~0); {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,919 INFO L273 TraceCheckUtils]: 7: Hoare triple {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} assume true; {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,920 INFO L273 TraceCheckUtils]: 6: Hoare triple {6470#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {6799#(or (not (bvslt (_ bv3 32) ~SIZE~0)) (bvslt (bvadd main_~i~0 (_ bv3 32)) ~SIZE~0))} is VALID [2018-11-18 21:13:33,920 INFO L273 TraceCheckUtils]: 5: Hoare triple {6470#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {6470#true} is VALID [2018-11-18 21:13:33,920 INFO L256 TraceCheckUtils]: 4: Hoare triple {6470#true} call #t~ret5 := main(); {6470#true} is VALID [2018-11-18 21:13:33,921 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6470#true} {6470#true} #65#return; {6470#true} is VALID [2018-11-18 21:13:33,921 INFO L273 TraceCheckUtils]: 2: Hoare triple {6470#true} assume true; {6470#true} is VALID [2018-11-18 21:13:33,921 INFO L273 TraceCheckUtils]: 1: Hoare triple {6470#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {6470#true} is VALID [2018-11-18 21:13:33,921 INFO L256 TraceCheckUtils]: 0: Hoare triple {6470#true} call ULTIMATE.init(); {6470#true} is VALID [2018-11-18 21:13:33,925 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 19 proven. 32 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-18 21:13:33,927 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:13:33,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-18 21:13:33,928 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 58 [2018-11-18 21:13:33,928 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:13:33,928 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-18 21:13:34,186 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:13:34,187 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-18 21:13:34,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-18 21:13:34,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=227, Unknown=0, NotChecked=0, Total=306 [2018-11-18 21:13:34,187 INFO L87 Difference]: Start difference. First operand 183 states and 197 transitions. Second operand 18 states. [2018-11-18 21:13:37,113 WARN L180 SmtUtils]: Spent 202.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-18 21:13:40,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:13:40,145 INFO L93 Difference]: Finished difference Result 222 states and 239 transitions. [2018-11-18 21:13:40,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-18 21:13:40,145 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 58 [2018-11-18 21:13:40,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 21:13:40,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-18 21:13:40,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 102 transitions. [2018-11-18 21:13:40,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. [2018-11-18 21:13:40,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 102 transitions. [2018-11-18 21:13:40,151 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states and 102 transitions. [2018-11-18 21:13:40,609 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:13:40,614 INFO L225 Difference]: With dead ends: 222 [2018-11-18 21:13:40,614 INFO L226 Difference]: Without dead ends: 177 [2018-11-18 21:13:40,615 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=104, Invalid=276, Unknown=0, NotChecked=0, Total=380 [2018-11-18 21:13:40,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-11-18 21:13:40,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 162. [2018-11-18 21:13:40,934 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 21:13:40,934 INFO L82 GeneralOperation]: Start isEquivalent. First operand 177 states. Second operand 162 states. [2018-11-18 21:13:40,934 INFO L74 IsIncluded]: Start isIncluded. First operand 177 states. Second operand 162 states. [2018-11-18 21:13:40,934 INFO L87 Difference]: Start difference. First operand 177 states. Second operand 162 states. [2018-11-18 21:13:40,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:13:40,942 INFO L93 Difference]: Finished difference Result 177 states and 193 transitions. [2018-11-18 21:13:40,942 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-11-18 21:13:40,943 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:13:40,943 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:13:40,943 INFO L74 IsIncluded]: Start isIncluded. First operand 162 states. Second operand 177 states. [2018-11-18 21:13:40,943 INFO L87 Difference]: Start difference. First operand 162 states. Second operand 177 states. [2018-11-18 21:13:40,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 21:13:40,950 INFO L93 Difference]: Finished difference Result 177 states and 193 transitions. [2018-11-18 21:13:40,950 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-11-18 21:13:40,951 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 21:13:40,951 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 21:13:40,951 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 21:13:40,952 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 21:13:40,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-11-18 21:13:40,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 175 transitions. [2018-11-18 21:13:40,956 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 175 transitions. Word has length 58 [2018-11-18 21:13:40,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 21:13:40,956 INFO L480 AbstractCegarLoop]: Abstraction has 162 states and 175 transitions. [2018-11-18 21:13:40,956 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-18 21:13:40,956 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 175 transitions. [2018-11-18 21:13:40,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-18 21:13:40,957 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 21:13:40,957 INFO L375 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 21:13:40,958 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 21:13:40,958 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 21:13:40,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1587153741, now seen corresponding path program 3 times [2018-11-18 21:13:40,958 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 21:13:40,958 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 21:13:40,987 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-18 21:13:41,917 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-11-18 21:13:41,917 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 21:13:41,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 21:13:41,962 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 21:13:41,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-18 21:13:42,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-18 21:13:42,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,011 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-18 21:13:42,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2018-11-18 21:13:42,138 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,140 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 37 [2018-11-18 21:13:42,144 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,171 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,171 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:28 [2018-11-18 21:13:42,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-11-18 21:13:42,230 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,233 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,234 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,236 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 78 [2018-11-18 21:13:42,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,259 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,277 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-11-18 21:13:42,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 35 [2018-11-18 21:13:42,403 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,403 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,404 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,405 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,406 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,408 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,409 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,414 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,415 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 9 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 123 [2018-11-18 21:13:42,422 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,479 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,479 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:52, output treesize:48 [2018-11-18 21:13:42,557 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 52 [2018-11-18 21:13:42,574 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,576 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,579 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,580 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:42,582 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,584 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,586 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,588 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,591 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 129 [2018-11-18 21:13:42,595 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,626 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:42,650 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:48 [2018-11-18 21:13:42,685 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:42,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 51 [2018-11-18 21:13:42,914 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,916 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,918 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,921 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,923 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,926 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,928 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,930 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,933 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,934 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,937 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,939 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,942 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,945 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,948 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,950 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:42,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 243 [2018-11-18 21:13:42,955 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,007 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,040 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,041 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-11-18 21:13:43,146 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 68 [2018-11-18 21:13:43,218 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,220 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,223 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,224 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,226 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,229 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,231 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,234 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,236 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,238 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,242 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,245 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,247 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 16 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 250 [2018-11-18 21:13:43,256 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,307 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,339 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,339 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:79, output treesize:62 [2018-11-18 21:13:43,382 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:43,618 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-11-18 21:13:43,715 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,718 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,721 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,724 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,727 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,728 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,731 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,734 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,737 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,740 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,743 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,745 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,748 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,751 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,753 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,756 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,758 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,762 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,764 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,767 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,770 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,772 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,792 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,796 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,799 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:43,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 25 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 389 [2018-11-18 21:13:43,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,913 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:43,951 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:82, output treesize:78 [2018-11-18 21:13:44,090 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 80 [2018-11-18 21:13:44,185 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,187 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,191 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,193 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,196 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,200 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,203 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,209 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,212 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,214 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,216 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,219 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,221 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,225 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,229 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,232 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,236 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,240 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,244 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,248 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,251 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 25 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 405 [2018-11-18 21:13:44,265 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:44,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:44,385 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:44,385 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:91, output treesize:74 [2018-11-18 21:13:44,430 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:44,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 60 [2018-11-18 21:13:44,729 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,732 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,736 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,739 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,743 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,746 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,748 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,752 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,755 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,757 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,760 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,765 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,768 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,769 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,773 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,776 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,780 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,782 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,786 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,790 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,793 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,801 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,805 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,808 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,812 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,815 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,818 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,821 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,824 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,827 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,831 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,834 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,837 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,840 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,844 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,847 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:44,847 INFO L303 Elim1Store]: Index analysis took 129 ms [2018-11-18 21:13:44,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 36 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 445 [2018-11-18 21:13:44,855 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:44,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:45,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:45,016 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-11-18 21:13:45,152 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 77 [2018-11-18 21:13:45,178 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,182 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,186 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,189 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,193 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,196 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,199 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,203 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,206 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,209 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,212 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,215 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,218 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,221 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,223 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,226 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,230 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,233 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,237 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,240 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,243 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,247 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,250 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,253 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,257 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,261 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,261 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:45,265 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,269 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,272 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,275 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,279 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,282 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,285 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,288 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,291 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,294 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,297 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,299 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,302 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,305 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,306 INFO L303 Elim1Store]: Index analysis took 136 ms [2018-11-18 21:13:45,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 543 [2018-11-18 21:13:45,318 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:45,504 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:45,556 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:45,556 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:92, output treesize:77 [2018-11-18 21:13:45,595 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:45,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 67 [2018-11-18 21:13:45,929 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,933 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,936 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,941 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,944 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,948 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,952 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,955 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,960 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,963 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,967 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,971 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,975 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,979 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,983 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,987 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,991 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,995 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:45,998 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,003 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,007 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,010 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,014 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,018 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,021 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,025 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,029 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,032 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,036 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,039 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,043 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,047 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,051 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,053 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,057 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,061 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,064 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,069 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,073 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,077 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,081 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,086 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,090 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,093 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,097 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,101 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,104 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,108 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,112 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,112 INFO L303 Elim1Store]: Index analysis took 197 ms [2018-11-18 21:13:46,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 49 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 599 [2018-11-18 21:13:46,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:46,305 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:46,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:46,349 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:92, output treesize:88 [2018-11-18 21:13:46,530 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 84 [2018-11-18 21:13:46,561 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,566 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,570 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,575 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,579 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,585 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,591 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,596 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,600 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,604 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,622 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,626 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,631 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,631 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:46,636 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,640 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,645 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,650 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,654 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,659 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,664 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,669 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,673 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,678 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,682 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,687 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,692 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,697 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,702 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,707 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,713 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,717 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,722 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,729 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,734 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,740 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,745 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,751 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,754 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,759 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,764 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,769 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,774 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,780 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,785 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,790 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,796 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,802 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,808 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,814 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:46,814 INFO L303 Elim1Store]: Index analysis took 265 ms [2018-11-18 21:13:46,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 50 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 627 [2018-11-18 21:13:46,826 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:47,229 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:47,279 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:47,279 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:101, output treesize:88 [2018-11-18 21:13:47,324 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:47,641 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 81 [2018-11-18 21:13:47,699 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,700 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,701 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,702 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,703 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,704 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,705 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,707 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,712 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,713 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,714 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,715 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,716 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,718 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,719 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,720 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,721 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,723 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,724 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,726 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,727 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,728 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,730 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,731 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,733 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,734 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,735 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,737 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,759 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,760 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,761 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,763 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,764 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,766 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,767 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,769 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,771 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,773 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,775 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,776 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,778 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,779 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,781 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,783 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,784 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,785 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,787 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,788 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,790 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,791 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,793 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,794 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,796 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,797 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,799 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:47,800 INFO L303 Elim1Store]: Index analysis took 140 ms [2018-11-18 21:13:47,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 56 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 633 [2018-11-18 21:13:47,836 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:48,037 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:48,076 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:48,076 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:95, output treesize:80 [2018-11-18 21:13:48,122 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:48,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 50 [2018-11-18 21:13:48,479 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,480 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,481 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,481 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,482 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,483 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,484 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,484 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:48,486 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,487 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,488 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,489 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,490 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,491 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,492 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,493 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,494 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,495 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,496 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,497 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,498 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,500 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,501 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,502 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,503 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,504 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,505 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,506 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,507 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,508 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,509 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,511 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,512 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,513 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,514 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 21:13:48,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 59 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 75 [2018-11-18 21:13:48,522 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:48,544 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:48,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 21:13:48,551 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:71, output treesize:7 [2018-11-18 21:13:48,558 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:48,790 INFO L256 TraceCheckUtils]: 0: Hoare triple {7699#true} call ULTIMATE.init(); {7699#true} is VALID [2018-11-18 21:13:48,790 INFO L273 TraceCheckUtils]: 1: Hoare triple {7699#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {7699#true} is VALID [2018-11-18 21:13:48,790 INFO L273 TraceCheckUtils]: 2: Hoare triple {7699#true} assume true; {7699#true} is VALID [2018-11-18 21:13:48,790 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7699#true} {7699#true} #65#return; {7699#true} is VALID [2018-11-18 21:13:48,791 INFO L256 TraceCheckUtils]: 4: Hoare triple {7699#true} call #t~ret5 := main(); {7699#true} is VALID [2018-11-18 21:13:48,791 INFO L273 TraceCheckUtils]: 5: Hoare triple {7699#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {7699#true} is VALID [2018-11-18 21:13:48,791 INFO L273 TraceCheckUtils]: 6: Hoare triple {7699#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:13:48,792 INFO L273 TraceCheckUtils]: 7: Hoare triple {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume true; {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:13:48,792 INFO L273 TraceCheckUtils]: 8: Hoare triple {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:13:48,792 INFO L273 TraceCheckUtils]: 9: Hoare triple {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:13:48,794 INFO L273 TraceCheckUtils]: 10: Hoare triple {7722#(and (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7735#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:13:48,795 INFO L273 TraceCheckUtils]: 11: Hoare triple {7735#(and (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7739#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,796 INFO L273 TraceCheckUtils]: 12: Hoare triple {7739#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume true; {7739#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,797 INFO L273 TraceCheckUtils]: 13: Hoare triple {7739#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {7739#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,799 INFO L273 TraceCheckUtils]: 14: Hoare triple {7739#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7749#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,802 INFO L273 TraceCheckUtils]: 15: Hoare triple {7749#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7753#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,803 INFO L273 TraceCheckUtils]: 16: Hoare triple {7753#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7757#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-18 21:13:48,803 INFO L273 TraceCheckUtils]: 17: Hoare triple {7757#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume true; {7757#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-18 21:13:48,804 INFO L273 TraceCheckUtils]: 18: Hoare triple {7757#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume !!~bvslt32(~i~0, ~SIZE~0); {7757#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-18 21:13:48,806 INFO L273 TraceCheckUtils]: 19: Hoare triple {7757#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7767#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} is VALID [2018-11-18 21:13:48,811 INFO L273 TraceCheckUtils]: 20: Hoare triple {7767#(and (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7771#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:13:48,816 INFO L273 TraceCheckUtils]: 21: Hoare triple {7771#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967294 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7775#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,818 INFO L273 TraceCheckUtils]: 22: Hoare triple {7775#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume true; {7775#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,819 INFO L273 TraceCheckUtils]: 23: Hoare triple {7775#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !!~bvslt32(~i~0, ~SIZE~0); {7775#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,822 INFO L273 TraceCheckUtils]: 24: Hoare triple {7775#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7785#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,825 INFO L273 TraceCheckUtils]: 25: Hoare triple {7785#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7789#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:13:48,826 INFO L273 TraceCheckUtils]: 26: Hoare triple {7789#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7793#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,827 INFO L273 TraceCheckUtils]: 27: Hoare triple {7793#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume true; {7793#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,828 INFO L273 TraceCheckUtils]: 28: Hoare triple {7793#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume !!~bvslt32(~i~0, ~SIZE~0); {7793#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,834 INFO L273 TraceCheckUtils]: 29: Hoare triple {7793#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7803#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} is VALID [2018-11-18 21:13:48,839 INFO L273 TraceCheckUtils]: 30: Hoare triple {7803#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7807#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} is VALID [2018-11-18 21:13:48,842 INFO L273 TraceCheckUtils]: 31: Hoare triple {7807#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv4 32) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967294 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967288 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4294967292 32)))) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7811#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,844 INFO L273 TraceCheckUtils]: 32: Hoare triple {7811#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume true; {7811#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,845 INFO L273 TraceCheckUtils]: 33: Hoare triple {7811#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {7811#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,851 INFO L273 TraceCheckUtils]: 34: Hoare triple {7811#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7821#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,857 INFO L273 TraceCheckUtils]: 35: Hoare triple {7821#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7825#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,859 INFO L273 TraceCheckUtils]: 36: Hoare triple {7825#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7829#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,860 INFO L273 TraceCheckUtils]: 37: Hoare triple {7829#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume true; {7829#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,861 INFO L273 TraceCheckUtils]: 38: Hoare triple {7829#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {7829#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,869 INFO L273 TraceCheckUtils]: 39: Hoare triple {7829#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7839#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,875 INFO L273 TraceCheckUtils]: 40: Hoare triple {7839#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7843#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,877 INFO L273 TraceCheckUtils]: 41: Hoare triple {7843#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= main_~i~0 (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)))) (= (bvadd main_~i~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~i~0) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,889 INFO L273 TraceCheckUtils]: 42: Hoare triple {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume true; {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,890 INFO L273 TraceCheckUtils]: 43: Hoare triple {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,891 INFO L273 TraceCheckUtils]: 44: Hoare triple {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,896 INFO L273 TraceCheckUtils]: 45: Hoare triple {7847#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967290 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32))) (_ bv4294967295 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,897 INFO L273 TraceCheckUtils]: 46: Hoare triple {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,898 INFO L273 TraceCheckUtils]: 47: Hoare triple {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume true; {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,898 INFO L273 TraceCheckUtils]: 48: Hoare triple {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~SIZE~0); {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,901 INFO L273 TraceCheckUtils]: 49: Hoare triple {7860#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} ~i~0 := 0bv32; {7873#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,904 INFO L273 TraceCheckUtils]: 50: Hoare triple {7873#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume true; {7873#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:48,906 INFO L273 TraceCheckUtils]: 51: Hoare triple {7873#(and (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv16 32))) (_ bv4294967292 32)) (_ bv0 32)) (= (_ bv6 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv24 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv12 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv28 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32)) (= (_ bv2 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv8 32)))) (= |main_~#a~0.offset| (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (= (_ bv1 32) (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv4 32)))) (= (bvadd (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (_ bv20 32))) (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7880#(and (= (_ bv0 32) |main_#t~mem4|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-18 21:13:48,907 INFO L256 TraceCheckUtils]: 52: Hoare triple {7880#(and (= (_ bv0 32) |main_#t~mem4|) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {7884#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:13:48,908 INFO L273 TraceCheckUtils]: 53: Hoare triple {7884#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {7888#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 21:13:48,909 INFO L273 TraceCheckUtils]: 54: Hoare triple {7888#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {7700#false} is VALID [2018-11-18 21:13:48,909 INFO L273 TraceCheckUtils]: 55: Hoare triple {7700#false} assume !false; {7700#false} is VALID [2018-11-18 21:13:48,933 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:13:48,933 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 21:13:53,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 82 [2018-11-18 21:13:53,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 86 [2018-11-18 21:13:53,339 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,340 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 112 [2018-11-18 21:13:53,351 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,352 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,352 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,352 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 163 [2018-11-18 21:13:53,392 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,392 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,393 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,394 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,394 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,395 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 239 [2018-11-18 21:13:53,465 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,465 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,466 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,466 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,467 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,468 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,468 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,469 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 20 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 164 treesize of output 340 [2018-11-18 21:13:53,561 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,561 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,562 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,562 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,563 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,563 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,564 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,565 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,566 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,566 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 30 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 214 treesize of output 466 [2018-11-18 21:13:53,743 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,743 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,744 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,744 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,744 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,745 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,745 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,746 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,747 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,748 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,749 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,750 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:53,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 42 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 276 treesize of output 617 [2018-11-18 21:13:54,253 WARN L180 SmtUtils]: Spent 437.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 62 [2018-11-18 21:13:54,388 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,388 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,388 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,389 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,389 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,390 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,390 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,390 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,407 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,416 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,429 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,432 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,432 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,434 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,434 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,434 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,435 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,435 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,436 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,436 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,437 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,437 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,438 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,439 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,440 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,440 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,441 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,442 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,443 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,444 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,445 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,445 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,446 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,447 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,449 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,449 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,451 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,452 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,453 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,454 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,454 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,455 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 42 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 409 [2018-11-18 21:13:54,495 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-11-18 21:13:54,656 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,657 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,662 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,666 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,667 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,667 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,667 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,668 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,706 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,707 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,707 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,707 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,714 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,714 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,714 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,722 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,723 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,723 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,742 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,743 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,743 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,744 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,745 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,746 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,756 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,756 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,757 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,759 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,760 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,767 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,768 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,768 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,769 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,776 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,778 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,778 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,788 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,789 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,789 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,809 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,809 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,810 INFO L682 Elim1Store]: detected equality via solver [2018-11-18 21:13:54,812 INFO L303 Elim1Store]: Index analysis took 183 ms [2018-11-18 21:13:54,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 42 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 7 case distinctions, treesize of input 94 treesize of output 508 [2018-11-18 21:13:54,925 WARN L138 XnfTransformerHelper]: expecting exponential blowup for input size 7 [2018-11-18 21:13:55,051 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 8 xjuncts. [2018-11-18 21:13:55,670 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-11-18 21:13:55,836 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:55,903 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:55,966 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:56,007 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:56,041 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:56,071 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:56,097 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:56,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-18 21:13:56,127 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 2 variables, input treesize:84, output treesize:67 [2018-11-18 21:13:56,137 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 21:13:56,413 INFO L273 TraceCheckUtils]: 55: Hoare triple {7700#false} assume !false; {7700#false} is VALID [2018-11-18 21:13:56,414 INFO L273 TraceCheckUtils]: 54: Hoare triple {7898#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {7700#false} is VALID [2018-11-18 21:13:56,415 INFO L273 TraceCheckUtils]: 53: Hoare triple {7902#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {7898#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-18 21:13:56,415 INFO L256 TraceCheckUtils]: 52: Hoare triple {7906#(bvsge |main_#t~mem4| main_~i~0)} call __VERIFIER_assert((if ~bvsge32(#t~mem4, ~i~0) then 1bv32 else 0bv32)); {7902#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-18 21:13:56,416 INFO L273 TraceCheckUtils]: 51: Hoare triple {7910#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume !!~bvslt32(~i~0, ~SIZE~0);call #t~mem4 := read~intINTTYPE4(~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7906#(bvsge |main_#t~mem4| main_~i~0)} is VALID [2018-11-18 21:13:56,417 INFO L273 TraceCheckUtils]: 50: Hoare triple {7910#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} assume true; {7910#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:13:56,430 INFO L273 TraceCheckUtils]: 49: Hoare triple {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {7910#(bvsge (select (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~i~0)} is VALID [2018-11-18 21:13:56,431 INFO L273 TraceCheckUtils]: 48: Hoare triple {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~SIZE~0); {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,431 INFO L273 TraceCheckUtils]: 47: Hoare triple {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} assume true; {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,432 INFO L273 TraceCheckUtils]: 46: Hoare triple {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,447 INFO L273 TraceCheckUtils]: 45: Hoare triple {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7917#(bvsge (select (select |#memory_int| |main_~#a~0.base|) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,447 INFO L273 TraceCheckUtils]: 44: Hoare triple {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume !~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0); {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,448 INFO L273 TraceCheckUtils]: 43: Hoare triple {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,448 INFO L273 TraceCheckUtils]: 42: Hoare triple {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} assume true; {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,451 INFO L273 TraceCheckUtils]: 41: Hoare triple {7943#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7930#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,463 INFO L273 TraceCheckUtils]: 40: Hoare triple {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7943#(bvsge (select (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,480 INFO L273 TraceCheckUtils]: 39: Hoare triple {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,480 INFO L273 TraceCheckUtils]: 38: Hoare triple {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,481 INFO L273 TraceCheckUtils]: 37: Hoare triple {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,487 INFO L273 TraceCheckUtils]: 36: Hoare triple {7960#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7947#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,501 INFO L273 TraceCheckUtils]: 35: Hoare triple {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7960#(bvsge (select (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,519 INFO L273 TraceCheckUtils]: 34: Hoare triple {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,520 INFO L273 TraceCheckUtils]: 33: Hoare triple {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,540 INFO L273 TraceCheckUtils]: 32: Hoare triple {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,549 INFO L273 TraceCheckUtils]: 31: Hoare triple {7977#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7964#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,570 INFO L273 TraceCheckUtils]: 30: Hoare triple {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7977#(bvsge (select (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,589 INFO L273 TraceCheckUtils]: 29: Hoare triple {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,590 INFO L273 TraceCheckUtils]: 28: Hoare triple {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,590 INFO L273 TraceCheckUtils]: 27: Hoare triple {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,603 INFO L273 TraceCheckUtils]: 26: Hoare triple {7994#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7981#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,622 INFO L273 TraceCheckUtils]: 25: Hoare triple {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7994#(bvsge (select (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,643 INFO L273 TraceCheckUtils]: 24: Hoare triple {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,643 INFO L273 TraceCheckUtils]: 23: Hoare triple {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,644 INFO L273 TraceCheckUtils]: 22: Hoare triple {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,663 INFO L273 TraceCheckUtils]: 21: Hoare triple {8011#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7998#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,684 INFO L273 TraceCheckUtils]: 20: Hoare triple {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8011#(bvsge (select (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,708 INFO L273 TraceCheckUtils]: 19: Hoare triple {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,708 INFO L273 TraceCheckUtils]: 18: Hoare triple {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,709 INFO L273 TraceCheckUtils]: 17: Hoare triple {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,732 INFO L273 TraceCheckUtils]: 16: Hoare triple {8028#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8015#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,750 INFO L273 TraceCheckUtils]: 15: Hoare triple {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8028#(bvsge (select (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,776 INFO L273 TraceCheckUtils]: 14: Hoare triple {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,776 INFO L273 TraceCheckUtils]: 13: Hoare triple {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~SIZE~0); {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,777 INFO L273 TraceCheckUtils]: 12: Hoare triple {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} assume true; {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,800 INFO L273 TraceCheckUtils]: 11: Hoare triple {8045#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv28 32)) (bvadd main_~i~0 (_ bv7 32))) |main_~#a~0.offset|) (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8032#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0)) main_~i~0) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,822 INFO L273 TraceCheckUtils]: 10: Hoare triple {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {8045#(bvsge (select (store (store (store (store (store (store (store (select |#memory_int| |main_~#a~0.base|) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (bvadd main_~i~0 (_ bv1 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32)) (bvadd main_~i~0 (_ bv2 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (bvadd main_~i~0 (_ bv3 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv16 32)) (bvadd main_~i~0 (_ bv4 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv20 32)) (bvadd main_~i~0 (_ bv5 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv24 32)) (bvadd main_~i~0 (_ bv6 32))) (bvadd |main_~#a~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv28 32)) (bvadd main_~i~0 (_ bv7 32))) |main_~#a~0.offset|) (_ bv0 32))} is VALID [2018-11-18 21:13:56,823 INFO L273 TraceCheckUtils]: 9: Hoare triple {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} assume ~bvslt32(~bvadd32(1bv32, ~i~0), ~SIZE~0);call write~intINTTYPE4(~i~0, ~#a~0.base, ~bvadd32(~#a~0.offset, ~bvmul32(4bv32, ~bvadd32(1bv32, ~i~0))), 4bv32); {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:56,823 INFO L273 TraceCheckUtils]: 8: Hoare triple {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~SIZE~0); {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:56,824 INFO L273 TraceCheckUtils]: 7: Hoare triple {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} assume true; {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:56,825 INFO L273 TraceCheckUtils]: 6: Hoare triple {7699#true} assume ~bvsgt32(~SIZE~0, 1bv32);havoc ~i~0;call ~#a~0.base, ~#a~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~SIZE~0));~i~0 := 0bv32; {8049#(and (or (= (_ bv4294967288 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv0 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967268 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967280 32) (bvmul (_ bv4 32) main_~i~0)) (= (_ bv4294967272 32) (bvmul (_ bv4 32) main_~i~0)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv12 32)) (_ bv0 32)) (= (bvadd (bvmul (_ bv4 32) main_~i~0) (_ bv4 32)) (_ bv0 32)) (= (_ bv4294967276 32) (bvmul (_ bv4 32) main_~i~0))) (bvsge (bvadd main_~i~0 (_ bv7 32)) (_ bv0 32)))} is VALID [2018-11-18 21:13:56,825 INFO L273 TraceCheckUtils]: 5: Hoare triple {7699#true} ~SIZE~0 := #t~nondet1;havoc #t~nondet1; {7699#true} is VALID [2018-11-18 21:13:56,825 INFO L256 TraceCheckUtils]: 4: Hoare triple {7699#true} call #t~ret5 := main(); {7699#true} is VALID [2018-11-18 21:13:56,825 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7699#true} {7699#true} #65#return; {7699#true} is VALID [2018-11-18 21:13:56,825 INFO L273 TraceCheckUtils]: 2: Hoare triple {7699#true} assume true; {7699#true} is VALID [2018-11-18 21:13:56,825 INFO L273 TraceCheckUtils]: 1: Hoare triple {7699#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~SIZE~0 := 0bv32; {7699#true} is VALID [2018-11-18 21:13:56,826 INFO L256 TraceCheckUtils]: 0: Hoare triple {7699#true} call ULTIMATE.init(); {7699#true} is VALID [2018-11-18 21:13:56,842 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 21:13:56,845 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 21:13:56,845 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 22] total 48 [2018-11-18 21:13:56,847 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 56 [2018-11-18 21:13:56,848 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 21:13:56,848 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states. [2018-11-18 21:13:57,432 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 105 edges. 105 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 21:13:57,432 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-18 21:13:57,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-18 21:13:57,433 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=450, Invalid=1806, Unknown=0, NotChecked=0, Total=2256 [2018-11-18 21:13:57,433 INFO L87 Difference]: Start difference. First operand 162 states and 175 transitions. Second operand 48 states. [2018-11-18 21:14:04,159 WARN L180 SmtUtils]: Spent 2.51 s on a formula simplification. DAG size of input: 82 DAG size of output: 50 [2018-11-18 21:14:07,018 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 50 [2018-11-18 21:14:11,622 WARN L180 SmtUtils]: Spent 2.40 s on a formula simplification. DAG size of input: 99 DAG size of output: 66 [2018-11-18 21:14:14,277 WARN L180 SmtUtils]: Spent 351.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 68 [2018-11-18 21:14:20,211 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 48 [2018-11-18 21:14:23,930 WARN L180 SmtUtils]: Spent 272.00 ms on a formula simplification. DAG size of input: 110 DAG size of output: 84 [2018-11-18 21:14:25,476 WARN L180 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 102 DAG size of output: 78 [2018-11-18 21:14:28,286 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 50 [2018-11-18 21:14:29,724 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 46 [2018-11-18 21:14:30,885 WARN L180 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 45 [2018-11-18 21:14:37,130 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 41 [2018-11-18 21:14:37,644 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 40 [2018-11-18 21:14:42,960 WARN L180 SmtUtils]: Spent 2.10 s on a formula simplification. DAG size of input: 51 DAG size of output: 36 [2018-11-18 21:14:45,475 WARN L180 SmtUtils]: Spent 2.11 s on a formula simplification. DAG size of input: 55 DAG size of output: 35 [2018-11-18 21:14:45,816 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 53