java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-examples/standard_partition_true-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-18e5b2d-m [2018-11-18 20:49:43,714 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-18 20:49:43,716 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-18 20:49:43,731 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-18 20:49:43,731 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-18 20:49:43,733 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-18 20:49:43,734 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-18 20:49:43,736 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-18 20:49:43,738 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-18 20:49:43,739 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-18 20:49:43,740 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-18 20:49:43,740 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-18 20:49:43,741 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-18 20:49:43,742 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-18 20:49:43,743 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-18 20:49:43,744 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-18 20:49:43,745 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-18 20:49:43,747 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-18 20:49:43,749 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-18 20:49:43,751 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-18 20:49:43,752 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-18 20:49:43,753 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-18 20:49:43,756 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-18 20:49:43,756 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-18 20:49:43,756 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-18 20:49:43,757 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-18 20:49:43,758 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-18 20:49:43,759 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-18 20:49:43,760 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-18 20:49:43,761 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-18 20:49:43,761 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-18 20:49:43,762 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-18 20:49:43,762 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-18 20:49:43,763 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-18 20:49:43,764 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-18 20:49:43,764 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-18 20:49:43,765 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-18 20:49:43,783 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-18 20:49:43,784 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-18 20:49:43,784 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-18 20:49:43,785 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-11-18 20:49:43,785 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-18 20:49:43,785 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-18 20:49:43,786 INFO L133 SettingsManager]: * Use SBE=true [2018-11-18 20:49:43,786 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-18 20:49:43,786 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-18 20:49:43,786 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-18 20:49:43,786 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-18 20:49:43,787 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-18 20:49:43,787 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-18 20:49:43,787 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-18 20:49:43,787 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-18 20:49:43,787 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-18 20:49:43,788 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-18 20:49:43,788 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-18 20:49:43,788 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-18 20:49:43,788 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-18 20:49:43,788 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-18 20:49:43,789 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-18 20:49:43,789 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-18 20:49:43,789 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-18 20:49:43,789 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 20:49:43,789 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-18 20:49:43,790 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-18 20:49:43,790 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-18 20:49:43,790 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-18 20:49:43,790 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-18 20:49:43,790 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-18 20:49:43,791 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-18 20:49:43,791 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-18 20:49:43,835 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-18 20:49:43,848 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-18 20:49:43,852 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-18 20:49:43,853 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-18 20:49:43,854 INFO L276 PluginConnector]: CDTParser initialized [2018-11-18 20:49:43,854 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_partition_true-unreach-call_ground.i [2018-11-18 20:49:43,916 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b386025fe/482a2c5defec434893bfd040c5a99d24/FLAGec92a1a19 [2018-11-18 20:49:44,339 INFO L307 CDTParser]: Found 1 translation units. [2018-11-18 20:49:44,340 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-examples/standard_partition_true-unreach-call_ground.i [2018-11-18 20:49:44,347 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b386025fe/482a2c5defec434893bfd040c5a99d24/FLAGec92a1a19 [2018-11-18 20:49:44,722 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b386025fe/482a2c5defec434893bfd040c5a99d24 [2018-11-18 20:49:44,732 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-18 20:49:44,733 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-11-18 20:49:44,734 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-18 20:49:44,734 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-18 20:49:44,737 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-18 20:49:44,739 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:49:44" (1/1) ... [2018-11-18 20:49:44,741 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ac038aa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:44, skipping insertion in model container [2018-11-18 20:49:44,741 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:49:44" (1/1) ... [2018-11-18 20:49:44,752 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-18 20:49:44,774 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-18 20:49:45,046 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 20:49:45,053 INFO L191 MainTranslator]: Completed pre-run [2018-11-18 20:49:45,087 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-18 20:49:45,117 INFO L195 MainTranslator]: Completed translation [2018-11-18 20:49:45,117 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45 WrapperNode [2018-11-18 20:49:45,118 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-18 20:49:45,118 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-18 20:49:45,118 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-18 20:49:45,119 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-18 20:49:45,130 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,130 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,139 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,139 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,158 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,165 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,166 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... [2018-11-18 20:49:45,169 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-18 20:49:45,170 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-18 20:49:45,170 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-18 20:49:45,170 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-18 20:49:45,171 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-18 20:49:45,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-18 20:49:45,295 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-18 20:49:45,295 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-18 20:49:45,296 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-18 20:49:45,296 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-11-18 20:49:45,296 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-18 20:49:45,296 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-18 20:49:45,296 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-18 20:49:45,296 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-18 20:49:45,297 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-18 20:49:45,297 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-18 20:49:45,297 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-18 20:49:45,297 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-18 20:49:45,297 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2018-11-18 20:49:45,867 INFO L280 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-18 20:49:45,868 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:49:45 BoogieIcfgContainer [2018-11-18 20:49:45,869 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-18 20:49:45,870 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-18 20:49:45,870 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-18 20:49:45,873 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-18 20:49:45,874 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:49:44" (1/3) ... [2018-11-18 20:49:45,875 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3dc8cccf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:49:45, skipping insertion in model container [2018-11-18 20:49:45,875 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:49:45" (2/3) ... [2018-11-18 20:49:45,875 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3dc8cccf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:49:45, skipping insertion in model container [2018-11-18 20:49:45,875 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:49:45" (3/3) ... [2018-11-18 20:49:45,877 INFO L112 eAbstractionObserver]: Analyzing ICFG standard_partition_true-unreach-call_ground.i [2018-11-18 20:49:45,888 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-18 20:49:45,896 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-18 20:49:45,915 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-18 20:49:45,949 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-18 20:49:45,950 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-18 20:49:45,950 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-18 20:49:45,951 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-18 20:49:45,951 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-18 20:49:45,952 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-18 20:49:45,952 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-18 20:49:45,952 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-18 20:49:45,952 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-18 20:49:45,971 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-11-18 20:49:45,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-18 20:49:45,979 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 20:49:45,980 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 20:49:45,982 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 20:49:45,988 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 20:49:45,988 INFO L82 PathProgramCache]: Analyzing trace with hash 1217308819, now seen corresponding path program 1 times [2018-11-18 20:49:45,992 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 20:49:45,993 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 20:49:46,011 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 20:49:46,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:46,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:46,095 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 20:49:46,321 INFO L256 TraceCheckUtils]: 0: Hoare triple {35#true} call ULTIMATE.init(); {35#true} is VALID [2018-11-18 20:49:46,326 INFO L273 TraceCheckUtils]: 1: Hoare triple {35#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {35#true} is VALID [2018-11-18 20:49:46,327 INFO L273 TraceCheckUtils]: 2: Hoare triple {35#true} assume true; {35#true} is VALID [2018-11-18 20:49:46,328 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {35#true} {35#true} #78#return; {35#true} is VALID [2018-11-18 20:49:46,328 INFO L256 TraceCheckUtils]: 4: Hoare triple {35#true} call #t~ret6 := main(); {35#true} is VALID [2018-11-18 20:49:46,328 INFO L273 TraceCheckUtils]: 5: Hoare triple {35#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {35#true} is VALID [2018-11-18 20:49:46,341 INFO L273 TraceCheckUtils]: 6: Hoare triple {35#true} assume !true; {36#false} is VALID [2018-11-18 20:49:46,342 INFO L273 TraceCheckUtils]: 7: Hoare triple {36#false} ~a~0 := 0bv32; {36#false} is VALID [2018-11-18 20:49:46,342 INFO L273 TraceCheckUtils]: 8: Hoare triple {36#false} assume !true; {36#false} is VALID [2018-11-18 20:49:46,343 INFO L273 TraceCheckUtils]: 9: Hoare triple {36#false} havoc ~x~0;~x~0 := 0bv32; {36#false} is VALID [2018-11-18 20:49:46,343 INFO L273 TraceCheckUtils]: 10: Hoare triple {36#false} assume true; {36#false} is VALID [2018-11-18 20:49:46,343 INFO L273 TraceCheckUtils]: 11: Hoare triple {36#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {36#false} is VALID [2018-11-18 20:49:46,344 INFO L256 TraceCheckUtils]: 12: Hoare triple {36#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {36#false} is VALID [2018-11-18 20:49:46,344 INFO L273 TraceCheckUtils]: 13: Hoare triple {36#false} ~cond := #in~cond; {36#false} is VALID [2018-11-18 20:49:46,345 INFO L273 TraceCheckUtils]: 14: Hoare triple {36#false} assume 0bv32 == ~cond; {36#false} is VALID [2018-11-18 20:49:46,345 INFO L273 TraceCheckUtils]: 15: Hoare triple {36#false} assume !false; {36#false} is VALID [2018-11-18 20:49:46,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 20:49:46,349 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 20:49:46,358 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 20:49:46,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-18 20:49:46,364 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-11-18 20:49:46,367 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 20:49:46,371 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-18 20:49:46,568 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:46,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-18 20:49:46,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-18 20:49:46,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 20:49:46,582 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 2 states. [2018-11-18 20:49:46,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:46,724 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2018-11-18 20:49:46,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-18 20:49:46,724 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 16 [2018-11-18 20:49:46,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 20:49:46,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-18 20:49:46,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 68 transitions. [2018-11-18 20:49:46,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-18 20:49:46,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 68 transitions. [2018-11-18 20:49:46,744 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 68 transitions. [2018-11-18 20:49:47,041 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:47,053 INFO L225 Difference]: With dead ends: 54 [2018-11-18 20:49:47,053 INFO L226 Difference]: Without dead ends: 27 [2018-11-18 20:49:47,057 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-18 20:49:47,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-11-18 20:49:47,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-11-18 20:49:47,134 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 20:49:47,135 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand 27 states. [2018-11-18 20:49:47,135 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-18 20:49:47,136 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-18 20:49:47,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:47,140 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-11-18 20:49:47,141 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 31 transitions. [2018-11-18 20:49:47,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:47,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:47,142 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-18 20:49:47,142 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-18 20:49:47,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:47,147 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-11-18 20:49:47,147 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 31 transitions. [2018-11-18 20:49:47,148 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:47,148 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:47,148 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 20:49:47,149 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 20:49:47,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-18 20:49:47,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2018-11-18 20:49:47,154 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 31 transitions. Word has length 16 [2018-11-18 20:49:47,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 20:49:47,154 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 31 transitions. [2018-11-18 20:49:47,154 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-18 20:49:47,154 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 31 transitions. [2018-11-18 20:49:47,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-11-18 20:49:47,155 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 20:49:47,156 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 20:49:47,156 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 20:49:47,156 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 20:49:47,157 INFO L82 PathProgramCache]: Analyzing trace with hash 1824347044, now seen corresponding path program 1 times [2018-11-18 20:49:47,157 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 20:49:47,157 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 20:49:47,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 20:49:47,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:47,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:47,227 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 20:49:47,298 INFO L256 TraceCheckUtils]: 0: Hoare triple {241#true} call ULTIMATE.init(); {241#true} is VALID [2018-11-18 20:49:47,299 INFO L273 TraceCheckUtils]: 1: Hoare triple {241#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {241#true} is VALID [2018-11-18 20:49:47,299 INFO L273 TraceCheckUtils]: 2: Hoare triple {241#true} assume true; {241#true} is VALID [2018-11-18 20:49:47,299 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {241#true} {241#true} #78#return; {241#true} is VALID [2018-11-18 20:49:47,300 INFO L256 TraceCheckUtils]: 4: Hoare triple {241#true} call #t~ret6 := main(); {241#true} is VALID [2018-11-18 20:49:47,303 INFO L273 TraceCheckUtils]: 5: Hoare triple {241#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {261#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:47,305 INFO L273 TraceCheckUtils]: 6: Hoare triple {261#(= main_~a~0 (_ bv0 32))} assume true; {261#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:47,305 INFO L273 TraceCheckUtils]: 7: Hoare triple {261#(= main_~a~0 (_ bv0 32))} assume !~bvslt32(~a~0, 100000bv32); {242#false} is VALID [2018-11-18 20:49:47,306 INFO L273 TraceCheckUtils]: 8: Hoare triple {242#false} ~a~0 := 0bv32; {242#false} is VALID [2018-11-18 20:49:47,306 INFO L273 TraceCheckUtils]: 9: Hoare triple {242#false} assume true; {242#false} is VALID [2018-11-18 20:49:47,307 INFO L273 TraceCheckUtils]: 10: Hoare triple {242#false} assume !~bvslt32(~a~0, 100000bv32); {242#false} is VALID [2018-11-18 20:49:47,307 INFO L273 TraceCheckUtils]: 11: Hoare triple {242#false} havoc ~x~0;~x~0 := 0bv32; {242#false} is VALID [2018-11-18 20:49:47,308 INFO L273 TraceCheckUtils]: 12: Hoare triple {242#false} assume true; {242#false} is VALID [2018-11-18 20:49:47,308 INFO L273 TraceCheckUtils]: 13: Hoare triple {242#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {242#false} is VALID [2018-11-18 20:49:47,308 INFO L256 TraceCheckUtils]: 14: Hoare triple {242#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {242#false} is VALID [2018-11-18 20:49:47,309 INFO L273 TraceCheckUtils]: 15: Hoare triple {242#false} ~cond := #in~cond; {242#false} is VALID [2018-11-18 20:49:47,309 INFO L273 TraceCheckUtils]: 16: Hoare triple {242#false} assume 0bv32 == ~cond; {242#false} is VALID [2018-11-18 20:49:47,309 INFO L273 TraceCheckUtils]: 17: Hoare triple {242#false} assume !false; {242#false} is VALID [2018-11-18 20:49:47,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-18 20:49:47,311 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-18 20:49:47,313 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-18 20:49:47,314 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-18 20:49:47,319 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-11-18 20:49:47,319 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 20:49:47,320 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-18 20:49:47,413 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:47,413 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-18 20:49:47,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-18 20:49:47,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 20:49:47,415 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. Second operand 3 states. [2018-11-18 20:49:47,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:47,869 INFO L93 Difference]: Finished difference Result 52 states and 62 transitions. [2018-11-18 20:49:47,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-18 20:49:47,870 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2018-11-18 20:49:47,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 20:49:47,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-18 20:49:47,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 62 transitions. [2018-11-18 20:49:47,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-18 20:49:47,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 62 transitions. [2018-11-18 20:49:47,877 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 62 transitions. [2018-11-18 20:49:48,050 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:48,052 INFO L225 Difference]: With dead ends: 52 [2018-11-18 20:49:48,052 INFO L226 Difference]: Without dead ends: 35 [2018-11-18 20:49:48,054 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-18 20:49:48,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-18 20:49:48,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 31. [2018-11-18 20:49:48,068 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 20:49:48,068 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 31 states. [2018-11-18 20:49:48,068 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 31 states. [2018-11-18 20:49:48,069 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 31 states. [2018-11-18 20:49:48,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:48,072 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-11-18 20:49:48,072 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-18 20:49:48,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:48,073 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:48,073 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 35 states. [2018-11-18 20:49:48,073 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 35 states. [2018-11-18 20:49:48,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:48,077 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2018-11-18 20:49:48,077 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 41 transitions. [2018-11-18 20:49:48,077 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:48,079 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:48,079 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 20:49:48,079 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 20:49:48,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-18 20:49:48,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 35 transitions. [2018-11-18 20:49:48,082 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 35 transitions. Word has length 18 [2018-11-18 20:49:48,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 20:49:48,083 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 35 transitions. [2018-11-18 20:49:48,083 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-18 20:49:48,083 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 35 transitions. [2018-11-18 20:49:48,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-18 20:49:48,085 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 20:49:48,085 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 20:49:48,086 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 20:49:48,086 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 20:49:48,086 INFO L82 PathProgramCache]: Analyzing trace with hash 2119751076, now seen corresponding path program 1 times [2018-11-18 20:49:48,087 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 20:49:48,087 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 20:49:48,103 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-18 20:49:48,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:48,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:48,174 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 20:49:48,291 INFO L256 TraceCheckUtils]: 0: Hoare triple {476#true} call ULTIMATE.init(); {476#true} is VALID [2018-11-18 20:49:48,291 INFO L273 TraceCheckUtils]: 1: Hoare triple {476#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {476#true} is VALID [2018-11-18 20:49:48,292 INFO L273 TraceCheckUtils]: 2: Hoare triple {476#true} assume true; {476#true} is VALID [2018-11-18 20:49:48,292 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {476#true} {476#true} #78#return; {476#true} is VALID [2018-11-18 20:49:48,292 INFO L256 TraceCheckUtils]: 4: Hoare triple {476#true} call #t~ret6 := main(); {476#true} is VALID [2018-11-18 20:49:48,298 INFO L273 TraceCheckUtils]: 5: Hoare triple {476#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {496#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:48,299 INFO L273 TraceCheckUtils]: 6: Hoare triple {496#(= main_~a~0 (_ bv0 32))} assume true; {496#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:48,300 INFO L273 TraceCheckUtils]: 7: Hoare triple {496#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {496#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:48,301 INFO L273 TraceCheckUtils]: 8: Hoare triple {496#(= main_~a~0 (_ bv0 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {496#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:48,301 INFO L273 TraceCheckUtils]: 9: Hoare triple {496#(= main_~a~0 (_ bv0 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {509#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:48,302 INFO L273 TraceCheckUtils]: 10: Hoare triple {509#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {509#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:48,303 INFO L273 TraceCheckUtils]: 11: Hoare triple {509#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvslt32(~a~0, 100000bv32); {477#false} is VALID [2018-11-18 20:49:48,303 INFO L273 TraceCheckUtils]: 12: Hoare triple {477#false} ~a~0 := 0bv32; {477#false} is VALID [2018-11-18 20:49:48,304 INFO L273 TraceCheckUtils]: 13: Hoare triple {477#false} assume true; {477#false} is VALID [2018-11-18 20:49:48,304 INFO L273 TraceCheckUtils]: 14: Hoare triple {477#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {477#false} is VALID [2018-11-18 20:49:48,304 INFO L273 TraceCheckUtils]: 15: Hoare triple {477#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {477#false} is VALID [2018-11-18 20:49:48,305 INFO L273 TraceCheckUtils]: 16: Hoare triple {477#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {477#false} is VALID [2018-11-18 20:49:48,305 INFO L273 TraceCheckUtils]: 17: Hoare triple {477#false} assume true; {477#false} is VALID [2018-11-18 20:49:48,305 INFO L273 TraceCheckUtils]: 18: Hoare triple {477#false} assume !~bvslt32(~a~0, 100000bv32); {477#false} is VALID [2018-11-18 20:49:48,306 INFO L273 TraceCheckUtils]: 19: Hoare triple {477#false} havoc ~x~0;~x~0 := 0bv32; {477#false} is VALID [2018-11-18 20:49:48,307 INFO L273 TraceCheckUtils]: 20: Hoare triple {477#false} assume true; {477#false} is VALID [2018-11-18 20:49:48,307 INFO L273 TraceCheckUtils]: 21: Hoare triple {477#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {477#false} is VALID [2018-11-18 20:49:48,307 INFO L256 TraceCheckUtils]: 22: Hoare triple {477#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {477#false} is VALID [2018-11-18 20:49:48,308 INFO L273 TraceCheckUtils]: 23: Hoare triple {477#false} ~cond := #in~cond; {477#false} is VALID [2018-11-18 20:49:48,308 INFO L273 TraceCheckUtils]: 24: Hoare triple {477#false} assume 0bv32 == ~cond; {477#false} is VALID [2018-11-18 20:49:48,308 INFO L273 TraceCheckUtils]: 25: Hoare triple {477#false} assume !false; {477#false} is VALID [2018-11-18 20:49:48,310 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 20:49:48,311 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 20:49:48,406 INFO L273 TraceCheckUtils]: 25: Hoare triple {477#false} assume !false; {477#false} is VALID [2018-11-18 20:49:48,407 INFO L273 TraceCheckUtils]: 24: Hoare triple {477#false} assume 0bv32 == ~cond; {477#false} is VALID [2018-11-18 20:49:48,407 INFO L273 TraceCheckUtils]: 23: Hoare triple {477#false} ~cond := #in~cond; {477#false} is VALID [2018-11-18 20:49:48,407 INFO L256 TraceCheckUtils]: 22: Hoare triple {477#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {477#false} is VALID [2018-11-18 20:49:48,408 INFO L273 TraceCheckUtils]: 21: Hoare triple {477#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {477#false} is VALID [2018-11-18 20:49:48,408 INFO L273 TraceCheckUtils]: 20: Hoare triple {477#false} assume true; {477#false} is VALID [2018-11-18 20:49:48,408 INFO L273 TraceCheckUtils]: 19: Hoare triple {477#false} havoc ~x~0;~x~0 := 0bv32; {477#false} is VALID [2018-11-18 20:49:48,408 INFO L273 TraceCheckUtils]: 18: Hoare triple {477#false} assume !~bvslt32(~a~0, 100000bv32); {477#false} is VALID [2018-11-18 20:49:48,409 INFO L273 TraceCheckUtils]: 17: Hoare triple {477#false} assume true; {477#false} is VALID [2018-11-18 20:49:48,409 INFO L273 TraceCheckUtils]: 16: Hoare triple {477#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {477#false} is VALID [2018-11-18 20:49:48,409 INFO L273 TraceCheckUtils]: 15: Hoare triple {477#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {477#false} is VALID [2018-11-18 20:49:48,410 INFO L273 TraceCheckUtils]: 14: Hoare triple {477#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {477#false} is VALID [2018-11-18 20:49:48,410 INFO L273 TraceCheckUtils]: 13: Hoare triple {477#false} assume true; {477#false} is VALID [2018-11-18 20:49:48,410 INFO L273 TraceCheckUtils]: 12: Hoare triple {477#false} ~a~0 := 0bv32; {477#false} is VALID [2018-11-18 20:49:48,411 INFO L273 TraceCheckUtils]: 11: Hoare triple {600#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {477#false} is VALID [2018-11-18 20:49:48,415 INFO L273 TraceCheckUtils]: 10: Hoare triple {600#(bvslt main_~a~0 (_ bv100000 32))} assume true; {600#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-18 20:49:48,415 INFO L273 TraceCheckUtils]: 9: Hoare triple {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {600#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-18 20:49:48,419 INFO L273 TraceCheckUtils]: 8: Hoare triple {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:48,420 INFO L273 TraceCheckUtils]: 7: Hoare triple {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:48,422 INFO L273 TraceCheckUtils]: 6: Hoare triple {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume true; {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:48,432 INFO L273 TraceCheckUtils]: 5: Hoare triple {476#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {607#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:48,432 INFO L256 TraceCheckUtils]: 4: Hoare triple {476#true} call #t~ret6 := main(); {476#true} is VALID [2018-11-18 20:49:48,433 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {476#true} {476#true} #78#return; {476#true} is VALID [2018-11-18 20:49:48,433 INFO L273 TraceCheckUtils]: 2: Hoare triple {476#true} assume true; {476#true} is VALID [2018-11-18 20:49:48,433 INFO L273 TraceCheckUtils]: 1: Hoare triple {476#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {476#true} is VALID [2018-11-18 20:49:48,433 INFO L256 TraceCheckUtils]: 0: Hoare triple {476#true} call ULTIMATE.init(); {476#true} is VALID [2018-11-18 20:49:48,435 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-18 20:49:48,437 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 20:49:48,437 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-18 20:49:48,437 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-11-18 20:49:48,438 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 20:49:48,438 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-18 20:49:48,537 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:48,537 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-18 20:49:48,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-18 20:49:48,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-18 20:49:48,538 INFO L87 Difference]: Start difference. First operand 31 states and 35 transitions. Second operand 6 states. [2018-11-18 20:49:49,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:49,088 INFO L93 Difference]: Finished difference Result 74 states and 92 transitions. [2018-11-18 20:49:49,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-18 20:49:49,089 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-11-18 20:49:49,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 20:49:49,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-18 20:49:49,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 90 transitions. [2018-11-18 20:49:49,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-18 20:49:49,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 90 transitions. [2018-11-18 20:49:49,097 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 90 transitions. [2018-11-18 20:49:49,282 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:49,284 INFO L225 Difference]: With dead ends: 74 [2018-11-18 20:49:49,285 INFO L226 Difference]: Without dead ends: 55 [2018-11-18 20:49:49,286 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-18 20:49:49,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-11-18 20:49:49,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-11-18 20:49:49,311 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 20:49:49,311 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand 55 states. [2018-11-18 20:49:49,311 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand 55 states. [2018-11-18 20:49:49,311 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 55 states. [2018-11-18 20:49:49,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:49,315 INFO L93 Difference]: Finished difference Result 55 states and 65 transitions. [2018-11-18 20:49:49,315 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 65 transitions. [2018-11-18 20:49:49,316 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:49,316 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:49,317 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand 55 states. [2018-11-18 20:49:49,317 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 55 states. [2018-11-18 20:49:49,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:49,320 INFO L93 Difference]: Finished difference Result 55 states and 65 transitions. [2018-11-18 20:49:49,321 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 65 transitions. [2018-11-18 20:49:49,321 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:49,322 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:49,322 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 20:49:49,322 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 20:49:49,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-11-18 20:49:49,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 65 transitions. [2018-11-18 20:49:49,326 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 65 transitions. Word has length 26 [2018-11-18 20:49:49,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 20:49:49,327 INFO L480 AbstractCegarLoop]: Abstraction has 55 states and 65 transitions. [2018-11-18 20:49:49,327 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-18 20:49:49,327 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 65 transitions. [2018-11-18 20:49:49,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-18 20:49:49,329 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 20:49:49,329 INFO L375 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 20:49:49,329 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 20:49:49,330 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 20:49:49,330 INFO L82 PathProgramCache]: Analyzing trace with hash -425123932, now seen corresponding path program 2 times [2018-11-18 20:49:49,331 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 20:49:49,331 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 20:49:49,354 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-18 20:49:49,449 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-18 20:49:49,450 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 20:49:49,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-18 20:49:49,483 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 20:49:49,680 INFO L256 TraceCheckUtils]: 0: Hoare triple {917#true} call ULTIMATE.init(); {917#true} is VALID [2018-11-18 20:49:49,681 INFO L273 TraceCheckUtils]: 1: Hoare triple {917#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {917#true} is VALID [2018-11-18 20:49:49,681 INFO L273 TraceCheckUtils]: 2: Hoare triple {917#true} assume true; {917#true} is VALID [2018-11-18 20:49:49,681 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {917#true} {917#true} #78#return; {917#true} is VALID [2018-11-18 20:49:49,682 INFO L256 TraceCheckUtils]: 4: Hoare triple {917#true} call #t~ret6 := main(); {917#true} is VALID [2018-11-18 20:49:49,682 INFO L273 TraceCheckUtils]: 5: Hoare triple {917#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {937#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:49,683 INFO L273 TraceCheckUtils]: 6: Hoare triple {937#(= main_~a~0 (_ bv0 32))} assume true; {937#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:49,683 INFO L273 TraceCheckUtils]: 7: Hoare triple {937#(= main_~a~0 (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {937#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:49,684 INFO L273 TraceCheckUtils]: 8: Hoare triple {937#(= main_~a~0 (_ bv0 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {937#(= main_~a~0 (_ bv0 32))} is VALID [2018-11-18 20:49:49,684 INFO L273 TraceCheckUtils]: 9: Hoare triple {937#(= main_~a~0 (_ bv0 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,685 INFO L273 TraceCheckUtils]: 10: Hoare triple {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} assume true; {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,686 INFO L273 TraceCheckUtils]: 11: Hoare triple {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,686 INFO L273 TraceCheckUtils]: 12: Hoare triple {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,688 INFO L273 TraceCheckUtils]: 13: Hoare triple {950#(= (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv0 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,689 INFO L273 TraceCheckUtils]: 14: Hoare triple {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} assume true; {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,690 INFO L273 TraceCheckUtils]: 15: Hoare triple {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,690 INFO L273 TraceCheckUtils]: 16: Hoare triple {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,691 INFO L273 TraceCheckUtils]: 17: Hoare triple {963#(= (bvadd main_~a~0 (_ bv4294967294 32)) (_ bv0 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {976#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-18 20:49:49,692 INFO L273 TraceCheckUtils]: 18: Hoare triple {976#(= (_ bv3 32) main_~a~0)} assume true; {976#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-18 20:49:49,693 INFO L273 TraceCheckUtils]: 19: Hoare triple {976#(= (_ bv3 32) main_~a~0)} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {976#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-18 20:49:49,700 INFO L273 TraceCheckUtils]: 20: Hoare triple {976#(= (_ bv3 32) main_~a~0)} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {976#(= (_ bv3 32) main_~a~0)} is VALID [2018-11-18 20:49:49,701 INFO L273 TraceCheckUtils]: 21: Hoare triple {976#(= (_ bv3 32) main_~a~0)} ~a~0 := ~bvadd32(1bv32, ~a~0); {989#(= (bvadd main_~a~0 (_ bv4294967292 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,702 INFO L273 TraceCheckUtils]: 22: Hoare triple {989#(= (bvadd main_~a~0 (_ bv4294967292 32)) (_ bv0 32))} assume true; {989#(= (bvadd main_~a~0 (_ bv4294967292 32)) (_ bv0 32))} is VALID [2018-11-18 20:49:49,702 INFO L273 TraceCheckUtils]: 23: Hoare triple {989#(= (bvadd main_~a~0 (_ bv4294967292 32)) (_ bv0 32))} assume !~bvslt32(~a~0, 100000bv32); {918#false} is VALID [2018-11-18 20:49:49,703 INFO L273 TraceCheckUtils]: 24: Hoare triple {918#false} ~a~0 := 0bv32; {918#false} is VALID [2018-11-18 20:49:49,703 INFO L273 TraceCheckUtils]: 25: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,703 INFO L273 TraceCheckUtils]: 26: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,703 INFO L273 TraceCheckUtils]: 27: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,704 INFO L273 TraceCheckUtils]: 28: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,704 INFO L273 TraceCheckUtils]: 29: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,704 INFO L273 TraceCheckUtils]: 30: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,704 INFO L273 TraceCheckUtils]: 31: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,705 INFO L273 TraceCheckUtils]: 32: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,705 INFO L273 TraceCheckUtils]: 33: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,705 INFO L273 TraceCheckUtils]: 34: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,705 INFO L273 TraceCheckUtils]: 35: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,705 INFO L273 TraceCheckUtils]: 36: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,706 INFO L273 TraceCheckUtils]: 37: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,706 INFO L273 TraceCheckUtils]: 38: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,706 INFO L273 TraceCheckUtils]: 39: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,707 INFO L273 TraceCheckUtils]: 40: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,707 INFO L273 TraceCheckUtils]: 41: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,707 INFO L273 TraceCheckUtils]: 42: Hoare triple {918#false} assume !~bvslt32(~a~0, 100000bv32); {918#false} is VALID [2018-11-18 20:49:49,708 INFO L273 TraceCheckUtils]: 43: Hoare triple {918#false} havoc ~x~0;~x~0 := 0bv32; {918#false} is VALID [2018-11-18 20:49:49,708 INFO L273 TraceCheckUtils]: 44: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,708 INFO L273 TraceCheckUtils]: 45: Hoare triple {918#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,709 INFO L256 TraceCheckUtils]: 46: Hoare triple {918#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {918#false} is VALID [2018-11-18 20:49:49,709 INFO L273 TraceCheckUtils]: 47: Hoare triple {918#false} ~cond := #in~cond; {918#false} is VALID [2018-11-18 20:49:49,709 INFO L273 TraceCheckUtils]: 48: Hoare triple {918#false} assume 0bv32 == ~cond; {918#false} is VALID [2018-11-18 20:49:49,709 INFO L273 TraceCheckUtils]: 49: Hoare triple {918#false} assume !false; {918#false} is VALID [2018-11-18 20:49:49,715 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-11-18 20:49:49,715 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 20:49:49,979 INFO L273 TraceCheckUtils]: 49: Hoare triple {918#false} assume !false; {918#false} is VALID [2018-11-18 20:49:49,979 INFO L273 TraceCheckUtils]: 48: Hoare triple {918#false} assume 0bv32 == ~cond; {918#false} is VALID [2018-11-18 20:49:49,980 INFO L273 TraceCheckUtils]: 47: Hoare triple {918#false} ~cond := #in~cond; {918#false} is VALID [2018-11-18 20:49:49,980 INFO L256 TraceCheckUtils]: 46: Hoare triple {918#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {918#false} is VALID [2018-11-18 20:49:49,980 INFO L273 TraceCheckUtils]: 45: Hoare triple {918#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,981 INFO L273 TraceCheckUtils]: 44: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,981 INFO L273 TraceCheckUtils]: 43: Hoare triple {918#false} havoc ~x~0;~x~0 := 0bv32; {918#false} is VALID [2018-11-18 20:49:49,981 INFO L273 TraceCheckUtils]: 42: Hoare triple {918#false} assume !~bvslt32(~a~0, 100000bv32); {918#false} is VALID [2018-11-18 20:49:49,982 INFO L273 TraceCheckUtils]: 41: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,982 INFO L273 TraceCheckUtils]: 40: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,982 INFO L273 TraceCheckUtils]: 39: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,982 INFO L273 TraceCheckUtils]: 38: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,982 INFO L273 TraceCheckUtils]: 37: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,983 INFO L273 TraceCheckUtils]: 36: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,983 INFO L273 TraceCheckUtils]: 35: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,983 INFO L273 TraceCheckUtils]: 34: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,984 INFO L273 TraceCheckUtils]: 33: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,984 INFO L273 TraceCheckUtils]: 32: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,984 INFO L273 TraceCheckUtils]: 31: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,984 INFO L273 TraceCheckUtils]: 30: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,985 INFO L273 TraceCheckUtils]: 29: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,985 INFO L273 TraceCheckUtils]: 28: Hoare triple {918#false} ~a~0 := ~bvadd32(1bv32, ~a~0); {918#false} is VALID [2018-11-18 20:49:49,985 INFO L273 TraceCheckUtils]: 27: Hoare triple {918#false} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {918#false} is VALID [2018-11-18 20:49:49,986 INFO L273 TraceCheckUtils]: 26: Hoare triple {918#false} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {918#false} is VALID [2018-11-18 20:49:49,986 INFO L273 TraceCheckUtils]: 25: Hoare triple {918#false} assume true; {918#false} is VALID [2018-11-18 20:49:49,986 INFO L273 TraceCheckUtils]: 24: Hoare triple {918#false} ~a~0 := 0bv32; {918#false} is VALID [2018-11-18 20:49:49,987 INFO L273 TraceCheckUtils]: 23: Hoare triple {1152#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {918#false} is VALID [2018-11-18 20:49:49,987 INFO L273 TraceCheckUtils]: 22: Hoare triple {1152#(bvslt main_~a~0 (_ bv100000 32))} assume true; {1152#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-18 20:49:49,988 INFO L273 TraceCheckUtils]: 21: Hoare triple {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1152#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-18 20:49:50,005 INFO L273 TraceCheckUtils]: 20: Hoare triple {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,006 INFO L273 TraceCheckUtils]: 19: Hoare triple {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,006 INFO L273 TraceCheckUtils]: 18: Hoare triple {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} assume true; {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,012 INFO L273 TraceCheckUtils]: 17: Hoare triple {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1159#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,013 INFO L273 TraceCheckUtils]: 16: Hoare triple {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,013 INFO L273 TraceCheckUtils]: 15: Hoare triple {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,014 INFO L273 TraceCheckUtils]: 14: Hoare triple {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} assume true; {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,021 INFO L273 TraceCheckUtils]: 13: Hoare triple {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1172#(bvslt (bvadd main_~a~0 (_ bv2 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,021 INFO L273 TraceCheckUtils]: 12: Hoare triple {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,022 INFO L273 TraceCheckUtils]: 11: Hoare triple {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,022 INFO L273 TraceCheckUtils]: 10: Hoare triple {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} assume true; {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,031 INFO L273 TraceCheckUtils]: 9: Hoare triple {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1185#(bvslt (bvadd main_~a~0 (_ bv3 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,031 INFO L273 TraceCheckUtils]: 8: Hoare triple {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,032 INFO L273 TraceCheckUtils]: 7: Hoare triple {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,032 INFO L273 TraceCheckUtils]: 6: Hoare triple {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} assume true; {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,033 INFO L273 TraceCheckUtils]: 5: Hoare triple {917#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {1198#(bvslt (bvadd main_~a~0 (_ bv4 32)) (_ bv100000 32))} is VALID [2018-11-18 20:49:50,033 INFO L256 TraceCheckUtils]: 4: Hoare triple {917#true} call #t~ret6 := main(); {917#true} is VALID [2018-11-18 20:49:50,033 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {917#true} {917#true} #78#return; {917#true} is VALID [2018-11-18 20:49:50,034 INFO L273 TraceCheckUtils]: 2: Hoare triple {917#true} assume true; {917#true} is VALID [2018-11-18 20:49:50,034 INFO L273 TraceCheckUtils]: 1: Hoare triple {917#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {917#true} is VALID [2018-11-18 20:49:50,034 INFO L256 TraceCheckUtils]: 0: Hoare triple {917#true} call ULTIMATE.init(); {917#true} is VALID [2018-11-18 20:49:50,039 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-11-18 20:49:50,041 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 20:49:50,041 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-18 20:49:50,042 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 50 [2018-11-18 20:49:50,044 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 20:49:50,044 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-18 20:49:50,244 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:50,244 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-18 20:49:50,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-18 20:49:50,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-18 20:49:50,246 INFO L87 Difference]: Start difference. First operand 55 states and 65 transitions. Second operand 12 states. [2018-11-18 20:49:52,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:52,289 INFO L93 Difference]: Finished difference Result 134 states and 173 transitions. [2018-11-18 20:49:52,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-18 20:49:52,289 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 50 [2018-11-18 20:49:52,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-18 20:49:52,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-18 20:49:52,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 156 transitions. [2018-11-18 20:49:52,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-18 20:49:52,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 156 transitions. [2018-11-18 20:49:52,300 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 156 transitions. [2018-11-18 20:49:52,649 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 156 edges. 156 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-18 20:49:52,653 INFO L225 Difference]: With dead ends: 134 [2018-11-18 20:49:52,659 INFO L226 Difference]: Without dead ends: 103 [2018-11-18 20:49:52,660 INFO L604 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2018-11-18 20:49:52,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-11-18 20:49:52,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-11-18 20:49:52,716 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-18 20:49:52,716 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand 103 states. [2018-11-18 20:49:52,716 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand 103 states. [2018-11-18 20:49:52,716 INFO L87 Difference]: Start difference. First operand 103 states. Second operand 103 states. [2018-11-18 20:49:52,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:52,722 INFO L93 Difference]: Finished difference Result 103 states and 125 transitions. [2018-11-18 20:49:52,722 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 125 transitions. [2018-11-18 20:49:52,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:52,724 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:52,724 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand 103 states. [2018-11-18 20:49:52,724 INFO L87 Difference]: Start difference. First operand 103 states. Second operand 103 states. [2018-11-18 20:49:52,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-18 20:49:52,730 INFO L93 Difference]: Finished difference Result 103 states and 125 transitions. [2018-11-18 20:49:52,730 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 125 transitions. [2018-11-18 20:49:52,731 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-18 20:49:52,731 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-18 20:49:52,731 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-18 20:49:52,732 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-18 20:49:52,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-18 20:49:52,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 125 transitions. [2018-11-18 20:49:52,737 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 125 transitions. Word has length 50 [2018-11-18 20:49:52,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-18 20:49:52,737 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 125 transitions. [2018-11-18 20:49:52,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-18 20:49:52,738 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 125 transitions. [2018-11-18 20:49:52,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-18 20:49:52,741 INFO L367 BasicCegarLoop]: Found error trace [2018-11-18 20:49:52,742 INFO L375 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-18 20:49:52,742 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-18 20:49:52,742 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-18 20:49:52,742 INFO L82 PathProgramCache]: Analyzing trace with hash -144333404, now seen corresponding path program 3 times [2018-11-18 20:49:52,743 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-18 20:49:52,744 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-18 20:49:52,774 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-18 20:49:52,861 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-18 20:49:52,861 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-18 20:49:54,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2018-11-18 20:49:54,907 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-18 20:49:55,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-11-18 20:49:55,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-18 20:49:55,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 20:49:55,012 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:4 [2018-11-18 20:49:55,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36 [2018-11-18 20:49:55,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-11-18 20:49:55,224 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 20:49:55,242 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 20:49:55,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-18 20:49:55,268 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:42, output treesize:38 [2018-11-18 20:49:55,288 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 20:49:57,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 40 [2018-11-18 20:49:57,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 1 [2018-11-18 20:49:57,474 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 20:49:57,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 21 [2018-11-18 20:49:57,683 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-11-18 20:49:57,696 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-18 20:49:57,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-11-18 20:49:57,767 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:60, output treesize:34 [2018-11-18 20:49:57,781 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 20:49:58,190 INFO L256 TraceCheckUtils]: 0: Hoare triple {1745#true} call ULTIMATE.init(); {1745#true} is VALID [2018-11-18 20:49:58,191 INFO L273 TraceCheckUtils]: 1: Hoare triple {1745#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1745#true} is VALID [2018-11-18 20:49:58,192 INFO L273 TraceCheckUtils]: 2: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:49:58,192 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1745#true} {1745#true} #78#return; {1745#true} is VALID [2018-11-18 20:49:58,193 INFO L256 TraceCheckUtils]: 4: Hoare triple {1745#true} call #t~ret6 := main(); {1745#true} is VALID [2018-11-18 20:49:58,200 INFO L273 TraceCheckUtils]: 5: Hoare triple {1745#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,204 INFO L273 TraceCheckUtils]: 6: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,205 INFO L273 TraceCheckUtils]: 7: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,205 INFO L273 TraceCheckUtils]: 8: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,206 INFO L273 TraceCheckUtils]: 9: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,207 INFO L273 TraceCheckUtils]: 10: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,207 INFO L273 TraceCheckUtils]: 11: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,208 INFO L273 TraceCheckUtils]: 12: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,208 INFO L273 TraceCheckUtils]: 13: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,209 INFO L273 TraceCheckUtils]: 14: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,210 INFO L273 TraceCheckUtils]: 15: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,212 INFO L273 TraceCheckUtils]: 16: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,212 INFO L273 TraceCheckUtils]: 17: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,219 INFO L273 TraceCheckUtils]: 18: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,220 INFO L273 TraceCheckUtils]: 19: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,220 INFO L273 TraceCheckUtils]: 20: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,220 INFO L273 TraceCheckUtils]: 21: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,221 INFO L273 TraceCheckUtils]: 22: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,221 INFO L273 TraceCheckUtils]: 23: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,222 INFO L273 TraceCheckUtils]: 24: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,222 INFO L273 TraceCheckUtils]: 25: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,223 INFO L273 TraceCheckUtils]: 26: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,223 INFO L273 TraceCheckUtils]: 27: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,224 INFO L273 TraceCheckUtils]: 28: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,225 INFO L273 TraceCheckUtils]: 29: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,225 INFO L273 TraceCheckUtils]: 30: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,226 INFO L273 TraceCheckUtils]: 31: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,227 INFO L273 TraceCheckUtils]: 32: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,227 INFO L273 TraceCheckUtils]: 33: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,228 INFO L273 TraceCheckUtils]: 34: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,229 INFO L273 TraceCheckUtils]: 35: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,230 INFO L273 TraceCheckUtils]: 36: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,230 INFO L273 TraceCheckUtils]: 37: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,231 INFO L273 TraceCheckUtils]: 38: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,232 INFO L273 TraceCheckUtils]: 39: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,233 INFO L273 TraceCheckUtils]: 40: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,233 INFO L273 TraceCheckUtils]: 41: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,234 INFO L273 TraceCheckUtils]: 42: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume true; {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} is VALID [2018-11-18 20:49:58,235 INFO L273 TraceCheckUtils]: 43: Hoare triple {1765#(not (= |main_~#bb~0.base| |main_~#aa~0.base|))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1880#(and (= (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) |main_#t~mem0|) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt main_~a~0 (_ bv100000 32)))} is VALID [2018-11-18 20:49:58,239 INFO L273 TraceCheckUtils]: 44: Hoare triple {1880#(and (= (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) |main_#t~mem0|) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt main_~a~0 (_ bv100000 32)))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1884#(and (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)) (bvslt main_~a~0 (_ bv100000 32)) (exists ((|main_~#bb~0.offset| (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (= (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13)))))))} is VALID [2018-11-18 20:50:00,246 INFO L273 TraceCheckUtils]: 45: Hoare triple {1884#(and (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)) (bvslt main_~a~0 (_ bv100000 32)) (exists ((|main_~#bb~0.offset| (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (= (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13)))))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1888#(and (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (exists ((|main_~#bb~0.offset| (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)))) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)))} is UNKNOWN [2018-11-18 20:50:00,248 INFO L273 TraceCheckUtils]: 46: Hoare triple {1888#(and (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (exists ((|main_~#bb~0.offset| (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)))) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)))} assume true; {1888#(and (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (exists ((|main_~#bb~0.offset| (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)))) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)))} is VALID [2018-11-18 20:50:00,259 INFO L273 TraceCheckUtils]: 47: Hoare triple {1888#(and (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (exists ((|main_~#bb~0.offset| (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)))) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)))} assume !~bvslt32(~a~0, 100000bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,260 INFO L273 TraceCheckUtils]: 48: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := 0bv32; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,262 INFO L273 TraceCheckUtils]: 49: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,263 INFO L273 TraceCheckUtils]: 50: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,264 INFO L273 TraceCheckUtils]: 51: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,264 INFO L273 TraceCheckUtils]: 52: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,265 INFO L273 TraceCheckUtils]: 53: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,265 INFO L273 TraceCheckUtils]: 54: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,267 INFO L273 TraceCheckUtils]: 55: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,268 INFO L273 TraceCheckUtils]: 56: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,268 INFO L273 TraceCheckUtils]: 57: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,286 INFO L273 TraceCheckUtils]: 58: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,301 INFO L273 TraceCheckUtils]: 59: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,309 INFO L273 TraceCheckUtils]: 60: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,310 INFO L273 TraceCheckUtils]: 61: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,310 INFO L273 TraceCheckUtils]: 62: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,311 INFO L273 TraceCheckUtils]: 63: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,311 INFO L273 TraceCheckUtils]: 64: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,311 INFO L273 TraceCheckUtils]: 65: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,312 INFO L273 TraceCheckUtils]: 66: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,314 INFO L273 TraceCheckUtils]: 67: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,318 INFO L273 TraceCheckUtils]: 68: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,321 INFO L273 TraceCheckUtils]: 69: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,324 INFO L273 TraceCheckUtils]: 70: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,324 INFO L273 TraceCheckUtils]: 71: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,326 INFO L273 TraceCheckUtils]: 72: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,329 INFO L273 TraceCheckUtils]: 73: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,329 INFO L273 TraceCheckUtils]: 74: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,330 INFO L273 TraceCheckUtils]: 75: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,330 INFO L273 TraceCheckUtils]: 76: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,333 INFO L273 TraceCheckUtils]: 77: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,336 INFO L273 TraceCheckUtils]: 78: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,336 INFO L273 TraceCheckUtils]: 79: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,337 INFO L273 TraceCheckUtils]: 80: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,337 INFO L273 TraceCheckUtils]: 81: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,337 INFO L273 TraceCheckUtils]: 82: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,338 INFO L273 TraceCheckUtils]: 83: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,338 INFO L273 TraceCheckUtils]: 84: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:00,339 INFO L273 TraceCheckUtils]: 85: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume true; {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} is VALID [2018-11-18 20:50:02,360 INFO L273 TraceCheckUtils]: 86: Hoare triple {1895#(exists ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~a~0 (_ BitVec 32)) (v_main_~b~0_13 (_ BitVec 32)) (|main_~#bb~0.base| (_ BitVec 32))) (and (not (bvslt main_~a~0 (_ bv100000 32))) (= (select (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) v_main_~b~0_13))) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32)))) (bvsge (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0) (_ bv4294967292 32))) (_ bv0 32)) (not (= |main_~#bb~0.base| |main_~#aa~0.base|)) (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2013#(or (and (bvslt main_~a~0 (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (= (bvadd (bvmul (_ bv4 32) v_prenex_1) (_ bv4294967292 32)) (bvmul (_ bv4 32) main_~a~0))) (not (bvslt v_prenex_1 (_ bv100000 32)))))) (and (bvslt main_~a~0 (_ bv100000 32)) (bvsge |main_#t~mem2| (_ bv0 32))))} is UNKNOWN [2018-11-18 20:50:02,361 INFO L273 TraceCheckUtils]: 87: Hoare triple {2013#(or (and (bvslt main_~a~0 (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (= (bvadd (bvmul (_ bv4 32) v_prenex_1) (_ bv4294967292 32)) (bvmul (_ bv4 32) main_~a~0))) (not (bvslt v_prenex_1 (_ bv100000 32)))))) (and (bvslt main_~a~0 (_ bv100000 32)) (bvsge |main_#t~mem2| (_ bv0 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2017#(and (bvslt main_~a~0 (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (= (bvadd (bvmul (_ bv4 32) v_prenex_1) (_ bv4294967292 32)) (bvmul (_ bv4 32) main_~a~0))) (not (bvslt v_prenex_1 (_ bv100000 32))))))} is VALID [2018-11-18 20:50:02,373 INFO L273 TraceCheckUtils]: 88: Hoare triple {2017#(and (bvslt main_~a~0 (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (= (bvadd (bvmul (_ bv4 32) v_prenex_1) (_ bv4294967292 32)) (bvmul (_ bv4 32) main_~a~0))) (not (bvslt v_prenex_1 (_ bv100000 32))))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2021#(and (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (bvslt v_prenex_1 (_ bv100000 32))) (not (= (bvmul (_ bv4 32) v_prenex_1) (bvmul (_ bv4 32) main_~a~0))))))} is VALID [2018-11-18 20:50:02,374 INFO L273 TraceCheckUtils]: 89: Hoare triple {2021#(and (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (bvslt v_prenex_1 (_ bv100000 32))) (not (= (bvmul (_ bv4 32) v_prenex_1) (bvmul (_ bv4 32) main_~a~0))))))} assume true; {2021#(and (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (bvslt v_prenex_1 (_ bv100000 32))) (not (= (bvmul (_ bv4 32) v_prenex_1) (bvmul (_ bv4 32) main_~a~0))))))} is VALID [2018-11-18 20:50:02,381 INFO L273 TraceCheckUtils]: 90: Hoare triple {2021#(and (bvslt (bvadd main_~a~0 (_ bv4294967295 32)) (_ bv100000 32)) (exists ((v_prenex_1 (_ BitVec 32))) (and (bvslt (bvadd v_prenex_1 (_ bv4294967295 32)) (_ bv100000 32)) (not (bvslt v_prenex_1 (_ bv100000 32))) (not (= (bvmul (_ bv4 32) v_prenex_1) (bvmul (_ bv4 32) main_~a~0))))))} assume !~bvslt32(~a~0, 100000bv32); {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L273 TraceCheckUtils]: 91: Hoare triple {1746#false} havoc ~x~0;~x~0 := 0bv32; {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L273 TraceCheckUtils]: 92: Hoare triple {1746#false} assume true; {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L273 TraceCheckUtils]: 93: Hoare triple {1746#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L256 TraceCheckUtils]: 94: Hoare triple {1746#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L273 TraceCheckUtils]: 95: Hoare triple {1746#false} ~cond := #in~cond; {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L273 TraceCheckUtils]: 96: Hoare triple {1746#false} assume 0bv32 == ~cond; {1746#false} is VALID [2018-11-18 20:50:02,382 INFO L273 TraceCheckUtils]: 97: Hoare triple {1746#false} assume !false; {1746#false} is VALID [2018-11-18 20:50:02,445 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 9 proven. 67 refuted. 0 times theorem prover too weak. 324 trivial. 0 not checked. [2018-11-18 20:50:02,445 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-18 20:51:21,416 WARN L180 SmtUtils]: Spent 58.46 s on a formula simplification. DAG size of input: 42 DAG size of output: 39 [2018-11-18 20:51:23,431 INFO L303 Elim1Store]: Index analysis took 2010 ms [2018-11-18 20:51:23,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 32 [2018-11-18 20:51:27,468 WARN L669 Elim1Store]: solver failed to check if following equality is implied: (= (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0)) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) [2018-11-18 20:51:27,472 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 20:51:27,473 INFO L303 Elim1Store]: Index analysis took 4037 ms [2018-11-18 20:51:27,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 21 [2018-11-18 20:51:27,479 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-18 20:51:27,482 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 20:51:29,500 INFO L303 Elim1Store]: Index analysis took 2017 ms [2018-11-18 20:51:29,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-11-18 20:51:33,567 WARN L669 Elim1Store]: solver failed to check if following equality is implied: (= (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0)) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) [2018-11-18 20:51:33,571 INFO L700 Elim1Store]: detected not equals via solver [2018-11-18 20:51:33,572 INFO L303 Elim1Store]: Index analysis took 4041 ms [2018-11-18 20:51:33,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 21 [2018-11-18 20:51:33,580 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-18 20:51:33,582 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-18 20:51:33,583 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-18 20:51:33,583 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:63, output treesize:1 [2018-11-18 20:51:35,593 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-18 20:51:35,628 INFO L273 TraceCheckUtils]: 97: Hoare triple {1746#false} assume !false; {1746#false} is VALID [2018-11-18 20:51:35,629 INFO L273 TraceCheckUtils]: 96: Hoare triple {1746#false} assume 0bv32 == ~cond; {1746#false} is VALID [2018-11-18 20:51:35,629 INFO L273 TraceCheckUtils]: 95: Hoare triple {1746#false} ~cond := #in~cond; {1746#false} is VALID [2018-11-18 20:51:35,629 INFO L256 TraceCheckUtils]: 94: Hoare triple {1746#false} call __VERIFIER_assert((if ~bvsge32(#t~mem5, 0bv32) then 1bv32 else 0bv32)); {1746#false} is VALID [2018-11-18 20:51:35,629 INFO L273 TraceCheckUtils]: 93: Hoare triple {1746#false} assume !!~bvslt32(~x~0, ~b~0);call #t~mem5 := read~intINTTYPE4(~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1746#false} is VALID [2018-11-18 20:51:35,629 INFO L273 TraceCheckUtils]: 92: Hoare triple {1746#false} assume true; {1746#false} is VALID [2018-11-18 20:51:35,630 INFO L273 TraceCheckUtils]: 91: Hoare triple {1746#false} havoc ~x~0;~x~0 := 0bv32; {1746#false} is VALID [2018-11-18 20:51:35,630 INFO L273 TraceCheckUtils]: 90: Hoare triple {2070#(bvslt main_~a~0 (_ bv100000 32))} assume !~bvslt32(~a~0, 100000bv32); {1746#false} is VALID [2018-11-18 20:51:35,630 INFO L273 TraceCheckUtils]: 89: Hoare triple {2070#(bvslt main_~a~0 (_ bv100000 32))} assume true; {2070#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-18 20:51:35,631 INFO L273 TraceCheckUtils]: 88: Hoare triple {2077#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2070#(bvslt main_~a~0 (_ bv100000 32))} is VALID [2018-11-18 20:51:35,632 INFO L273 TraceCheckUtils]: 87: Hoare triple {2081#(or (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt |main_#t~mem2| (_ bv0 32))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2077#(bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32))} is VALID [2018-11-18 20:51:35,635 INFO L273 TraceCheckUtils]: 86: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2081#(or (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt |main_#t~mem2| (_ bv0 32))))} is VALID [2018-11-18 20:51:35,636 INFO L273 TraceCheckUtils]: 85: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,637 INFO L273 TraceCheckUtils]: 84: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,637 INFO L273 TraceCheckUtils]: 83: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,638 INFO L273 TraceCheckUtils]: 82: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,638 INFO L273 TraceCheckUtils]: 81: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,638 INFO L273 TraceCheckUtils]: 80: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,639 INFO L273 TraceCheckUtils]: 79: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,639 INFO L273 TraceCheckUtils]: 78: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,640 INFO L273 TraceCheckUtils]: 77: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,640 INFO L273 TraceCheckUtils]: 76: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,641 INFO L273 TraceCheckUtils]: 75: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,642 INFO L273 TraceCheckUtils]: 74: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,642 INFO L273 TraceCheckUtils]: 73: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,645 INFO L273 TraceCheckUtils]: 72: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,645 INFO L273 TraceCheckUtils]: 71: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,652 INFO L273 TraceCheckUtils]: 70: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,653 INFO L273 TraceCheckUtils]: 69: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,653 INFO L273 TraceCheckUtils]: 68: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,654 INFO L273 TraceCheckUtils]: 67: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,654 INFO L273 TraceCheckUtils]: 66: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,654 INFO L273 TraceCheckUtils]: 65: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,655 INFO L273 TraceCheckUtils]: 64: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,655 INFO L273 TraceCheckUtils]: 63: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,655 INFO L273 TraceCheckUtils]: 62: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,656 INFO L273 TraceCheckUtils]: 61: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,656 INFO L273 TraceCheckUtils]: 60: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,657 INFO L273 TraceCheckUtils]: 59: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,657 INFO L273 TraceCheckUtils]: 58: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,658 INFO L273 TraceCheckUtils]: 57: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,659 INFO L273 TraceCheckUtils]: 56: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,659 INFO L273 TraceCheckUtils]: 55: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,660 INFO L273 TraceCheckUtils]: 54: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,660 INFO L273 TraceCheckUtils]: 53: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,661 INFO L273 TraceCheckUtils]: 52: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,662 INFO L273 TraceCheckUtils]: 51: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume ~bvslt32(#t~mem2, 0bv32);havoc #t~mem2;call #t~mem3 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);~cc~0 := ~cc~0[~c~0 := #t~mem3];havoc #t~mem3;~c~0 := ~bvadd32(1bv32, ~c~0); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,662 INFO L273 TraceCheckUtils]: 50: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem2 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,663 INFO L273 TraceCheckUtils]: 49: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} assume true; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,664 INFO L273 TraceCheckUtils]: 48: Hoare triple {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} ~a~0 := 0bv32; {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,668 INFO L273 TraceCheckUtils]: 47: Hoare triple {2203#(or (bvslt main_~a~0 (_ bv100000 32)) (forall ((v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} assume !~bvslt32(~a~0, 100000bv32); {2085#(forall ((main_~a~0 (_ BitVec 32))) (or (not (bvslt main_~a~0 (_ bv100000 32))) (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))) (_ bv0 32)))))} is VALID [2018-11-18 20:51:35,669 INFO L273 TraceCheckUtils]: 46: Hoare triple {2203#(or (bvslt main_~a~0 (_ bv100000 32)) (forall ((v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} assume true; {2203#(or (bvslt main_~a~0 (_ bv100000 32)) (forall ((v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} is VALID [2018-11-18 20:51:35,686 INFO L273 TraceCheckUtils]: 45: Hoare triple {2210#(or (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (forall ((v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} ~a~0 := ~bvadd32(1bv32, ~a~0); {2203#(or (bvslt main_~a~0 (_ bv100000 32)) (forall ((v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} is VALID [2018-11-18 20:51:35,697 INFO L273 TraceCheckUtils]: 44: Hoare triple {2214#(or (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge |main_#t~mem0| (_ bv0 32))) (forall ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~b~0 (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select (store |#memory_int| |main_~#bb~0.base| (store (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) main_~b~0)) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))))) |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {2210#(or (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (forall ((v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} is VALID [2018-11-18 20:51:37,713 INFO L273 TraceCheckUtils]: 43: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {2214#(or (bvslt (bvadd main_~a~0 (_ bv1 32)) (_ bv100000 32)) (not (bvsge |main_#t~mem0| (_ bv0 32))) (forall ((|main_~#bb~0.offset| (_ BitVec 32)) (main_~b~0 (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (or (bvslt (bvadd v_prenex_2 (_ bv1 32)) (_ bv100000 32)) (not (bvslt v_prenex_2 (_ bv100000 32))) (not (bvslt (select (select (store |#memory_int| |main_~#bb~0.base| (store (select |#memory_int| |main_~#bb~0.base|) (bvadd |main_~#bb~0.offset| (bvmul (_ bv4 32) main_~b~0)) (select (select |#memory_int| |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) main_~a~0))))) |main_~#aa~0.base|) (bvadd |main_~#aa~0.offset| (bvmul (_ bv4 32) v_prenex_2))) (_ bv0 32))))))} is UNKNOWN [2018-11-18 20:51:37,714 INFO L273 TraceCheckUtils]: 42: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,714 INFO L273 TraceCheckUtils]: 41: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,714 INFO L273 TraceCheckUtils]: 40: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,714 INFO L273 TraceCheckUtils]: 39: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,714 INFO L273 TraceCheckUtils]: 38: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,715 INFO L273 TraceCheckUtils]: 37: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,715 INFO L273 TraceCheckUtils]: 36: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,715 INFO L273 TraceCheckUtils]: 35: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,715 INFO L273 TraceCheckUtils]: 34: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,715 INFO L273 TraceCheckUtils]: 33: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,715 INFO L273 TraceCheckUtils]: 32: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,716 INFO L273 TraceCheckUtils]: 31: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,716 INFO L273 TraceCheckUtils]: 30: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,716 INFO L273 TraceCheckUtils]: 29: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,716 INFO L273 TraceCheckUtils]: 28: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,716 INFO L273 TraceCheckUtils]: 27: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,716 INFO L273 TraceCheckUtils]: 26: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,717 INFO L273 TraceCheckUtils]: 25: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,717 INFO L273 TraceCheckUtils]: 24: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,717 INFO L273 TraceCheckUtils]: 23: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,717 INFO L273 TraceCheckUtils]: 22: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,717 INFO L273 TraceCheckUtils]: 21: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,717 INFO L273 TraceCheckUtils]: 20: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,718 INFO L273 TraceCheckUtils]: 19: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,718 INFO L273 TraceCheckUtils]: 18: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,718 INFO L273 TraceCheckUtils]: 17: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,718 INFO L273 TraceCheckUtils]: 16: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,718 INFO L273 TraceCheckUtils]: 15: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,718 INFO L273 TraceCheckUtils]: 14: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,719 INFO L273 TraceCheckUtils]: 13: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,719 INFO L273 TraceCheckUtils]: 12: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,719 INFO L273 TraceCheckUtils]: 11: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,719 INFO L273 TraceCheckUtils]: 10: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,719 INFO L273 TraceCheckUtils]: 9: Hoare triple {1745#true} ~a~0 := ~bvadd32(1bv32, ~a~0); {1745#true} is VALID [2018-11-18 20:51:37,719 INFO L273 TraceCheckUtils]: 8: Hoare triple {1745#true} assume ~bvsge32(#t~mem0, 0bv32);havoc #t~mem0;call #t~mem1 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32);call write~intINTTYPE4(#t~mem1, ~#bb~0.base, ~bvadd32(~#bb~0.offset, ~bvmul32(4bv32, ~b~0)), 4bv32);havoc #t~mem1;~b~0 := ~bvadd32(1bv32, ~b~0); {1745#true} is VALID [2018-11-18 20:51:37,720 INFO L273 TraceCheckUtils]: 7: Hoare triple {1745#true} assume !!~bvslt32(~a~0, 100000bv32);call #t~mem0 := read~intINTTYPE4(~#aa~0.base, ~bvadd32(~#aa~0.offset, ~bvmul32(4bv32, ~a~0)), 4bv32); {1745#true} is VALID [2018-11-18 20:51:37,720 INFO L273 TraceCheckUtils]: 6: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,720 INFO L273 TraceCheckUtils]: 5: Hoare triple {1745#true} call ~#aa~0.base, ~#aa~0.offset := #Ultimate.alloc(400000bv32);~a~0 := 0bv32;~b~0 := 0bv32;~c~0 := 0bv32;call ~#bb~0.base, ~#bb~0.offset := #Ultimate.alloc(400000bv32);havoc ~cc~0; {1745#true} is VALID [2018-11-18 20:51:37,720 INFO L256 TraceCheckUtils]: 4: Hoare triple {1745#true} call #t~ret6 := main(); {1745#true} is VALID [2018-11-18 20:51:37,720 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1745#true} {1745#true} #78#return; {1745#true} is VALID [2018-11-18 20:51:37,721 INFO L273 TraceCheckUtils]: 2: Hoare triple {1745#true} assume true; {1745#true} is VALID [2018-11-18 20:51:37,721 INFO L273 TraceCheckUtils]: 1: Hoare triple {1745#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1745#true} is VALID [2018-11-18 20:51:37,721 INFO L256 TraceCheckUtils]: 0: Hoare triple {1745#true} call ULTIMATE.init(); {1745#true} is VALID [2018-11-18 20:51:37,759 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 38 proven. 38 refuted. 0 times theorem prover too weak. 324 trivial. 0 not checked. [2018-11-18 20:51:37,763 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-18 20:51:37,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-11-18 20:51:37,764 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 98 [2018-11-18 20:51:37,766 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-18 20:51:37,767 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-18 20:51:46,174 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 49 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2018-11-18 20:51:46,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-18 20:51:46,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-18 20:51:46,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=211, Unknown=7, NotChecked=0, Total=272 [2018-11-18 20:51:46,175 INFO L87 Difference]: Start difference. First operand 103 states and 125 transitions. Second operand 17 states. [2018-11-18 20:51:46,581 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 28 [2018-11-18 20:51:47,034 WARN L180 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2018-11-18 20:51:47,525 WARN L180 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 44 [2018-11-18 20:52:07,350 WARN L180 SmtUtils]: Spent 18.37 s on a formula simplification. DAG size of input: 68 DAG size of output: 67 [2018-11-18 20:52:23,769 WARN L180 SmtUtils]: Spent 16.28 s on a formula simplification. DAG size of input: 57 DAG size of output: 56 [2018-11-18 20:52:38,932 WARN L180 SmtUtils]: Spent 12.43 s on a formula simplification. DAG size of input: 70 DAG size of output: 54 [2018-11-18 20:52:45,659 WARN L180 SmtUtils]: Spent 6.13 s on a formula simplification that was a NOOP. DAG size: 44 [2018-11-18 20:52:56,384 WARN L180 SmtUtils]: Spent 8.16 s on a formula simplification that was a NOOP. DAG size: 58 [2018-11-18 20:53:04,585 WARN L180 SmtUtils]: Spent 8.09 s on a formula simplification that was a NOOP. DAG size: 44 [2018-11-18 20:53:19,032 WARN L180 SmtUtils]: Spent 14.23 s on a formula simplification. DAG size of input: 57 DAG size of output: 42 [2018-11-18 20:53:28,894 WARN L180 SmtUtils]: Spent 6.43 s on a formula simplification. DAG size of input: 64 DAG size of output: 42