java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-programs/copysome2_false-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:32:38,737 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:32:38,739 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:32:38,752 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:32:38,752 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:32:38,753 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:32:38,754 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:32:38,756 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:32:38,761 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:32:38,762 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:32:38,763 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:32:38,764 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:32:38,765 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:32:38,766 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:32:38,767 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:32:38,768 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:32:38,769 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:32:38,771 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:32:38,773 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:32:38,775 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:32:38,776 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:32:38,777 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:32:38,780 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:32:38,780 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:32:38,780 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:32:38,781 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:32:38,783 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:32:38,783 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:32:38,784 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:32:38,786 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:32:38,786 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:32:38,787 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:32:38,787 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:32:38,787 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:32:38,788 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:32:38,789 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:32:38,789 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:32:38,806 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:32:38,806 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:32:38,807 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:32:38,807 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:32:38,808 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:32:38,808 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:32:38,808 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:32:38,808 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:32:38,809 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:32:38,809 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:32:38,809 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:32:38,809 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:32:38,809 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:32:38,810 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:32:38,810 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:32:38,810 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:32:38,810 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:32:38,810 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:32:38,811 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:32:38,811 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:32:38,811 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:32:38,811 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:32:38,812 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:32:38,812 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:32:38,812 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:32:38,812 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:32:38,812 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:32:38,813 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:32:38,813 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:32:38,813 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:32:38,813 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:32:38,813 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:32:38,814 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:32:38,875 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:32:38,895 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:32:38,899 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:32:38,900 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:32:38,901 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:32:38,902 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-programs/copysome2_false-unreach-call.i [2018-11-23 10:32:38,966 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/254963455/160a785e9bb44e55a2153502069c6a47/FLAG45c706ba5 [2018-11-23 10:32:39,396 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:32:39,397 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-programs/copysome2_false-unreach-call.i [2018-11-23 10:32:39,403 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/254963455/160a785e9bb44e55a2153502069c6a47/FLAG45c706ba5 [2018-11-23 10:32:39,753 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/254963455/160a785e9bb44e55a2153502069c6a47 [2018-11-23 10:32:39,762 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:32:39,764 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:32:39,766 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:32:39,766 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:32:39,773 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:32:39,775 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:32:39" (1/1) ... [2018-11-23 10:32:39,778 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@19ad2bf4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:39, skipping insertion in model container [2018-11-23 10:32:39,778 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:32:39" (1/1) ... [2018-11-23 10:32:39,789 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:32:39,825 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:32:40,111 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:32:40,119 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:32:40,157 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:32:40,183 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:32:40,183 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40 WrapperNode [2018-11-23 10:32:40,183 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:32:40,184 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:32:40,185 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:32:40,185 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:32:40,195 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,205 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,215 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:32:40,215 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:32:40,215 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:32:40,215 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:32:40,226 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,227 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,229 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,230 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,245 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,252 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,254 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... [2018-11-23 10:32:40,257 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:32:40,258 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:32:40,258 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:32:40,258 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:32:40,259 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:32:40,400 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:32:40,400 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:32:40,400 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:32:40,401 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:32:40,401 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:32:40,401 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:32:40,402 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:32:40,402 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:32:40,402 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:32:40,402 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:32:40,403 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:32:40,403 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:32:41,119 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:32:41,119 INFO L280 CfgBuilder]: Removed 4 assue(true) statements. [2018-11-23 10:32:41,120 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:32:41 BoogieIcfgContainer [2018-11-23 10:32:41,120 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:32:41,121 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:32:41,121 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:32:41,125 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:32:41,125 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:32:39" (1/3) ... [2018-11-23 10:32:41,126 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12122197 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:32:41, skipping insertion in model container [2018-11-23 10:32:41,126 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:40" (2/3) ... [2018-11-23 10:32:41,127 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12122197 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:32:41, skipping insertion in model container [2018-11-23 10:32:41,127 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:32:41" (3/3) ... [2018-11-23 10:32:41,129 INFO L112 eAbstractionObserver]: Analyzing ICFG copysome2_false-unreach-call.i [2018-11-23 10:32:41,138 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:32:41,146 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:32:41,162 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:32:41,195 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:32:41,195 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:32:41,196 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:32:41,196 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:32:41,196 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:32:41,196 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:32:41,197 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:32:41,197 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:32:41,197 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:32:41,216 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-11-23 10:32:41,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 10:32:41,223 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:41,224 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:41,226 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:41,232 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:41,233 INFO L82 PathProgramCache]: Analyzing trace with hash 696803616, now seen corresponding path program 1 times [2018-11-23 10:32:41,237 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:41,238 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:41,257 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:41,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:41,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:41,347 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:41,507 INFO L256 TraceCheckUtils]: 0: Hoare triple {35#true} call ULTIMATE.init(); {35#true} is VALID [2018-11-23 10:32:41,511 INFO L273 TraceCheckUtils]: 1: Hoare triple {35#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {35#true} is VALID [2018-11-23 10:32:41,513 INFO L273 TraceCheckUtils]: 2: Hoare triple {35#true} assume true; {35#true} is VALID [2018-11-23 10:32:41,514 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {35#true} {35#true} #87#return; {35#true} is VALID [2018-11-23 10:32:41,514 INFO L256 TraceCheckUtils]: 4: Hoare triple {35#true} call #t~ret12 := main(); {35#true} is VALID [2018-11-23 10:32:41,515 INFO L273 TraceCheckUtils]: 5: Hoare triple {35#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {35#true} is VALID [2018-11-23 10:32:41,528 INFO L273 TraceCheckUtils]: 6: Hoare triple {35#true} assume !true; {36#false} is VALID [2018-11-23 10:32:41,528 INFO L273 TraceCheckUtils]: 7: Hoare triple {36#false} ~i~0 := 0bv32; {36#false} is VALID [2018-11-23 10:32:41,529 INFO L273 TraceCheckUtils]: 8: Hoare triple {36#false} assume !true; {36#false} is VALID [2018-11-23 10:32:41,529 INFO L273 TraceCheckUtils]: 9: Hoare triple {36#false} ~i~0 := 0bv32; {36#false} is VALID [2018-11-23 10:32:41,529 INFO L273 TraceCheckUtils]: 10: Hoare triple {36#false} assume !true; {36#false} is VALID [2018-11-23 10:32:41,530 INFO L273 TraceCheckUtils]: 11: Hoare triple {36#false} havoc ~x~0;~x~0 := 0bv32; {36#false} is VALID [2018-11-23 10:32:41,530 INFO L273 TraceCheckUtils]: 12: Hoare triple {36#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {36#false} is VALID [2018-11-23 10:32:41,530 INFO L256 TraceCheckUtils]: 13: Hoare triple {36#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {36#false} is VALID [2018-11-23 10:32:41,531 INFO L273 TraceCheckUtils]: 14: Hoare triple {36#false} ~cond := #in~cond; {36#false} is VALID [2018-11-23 10:32:41,531 INFO L273 TraceCheckUtils]: 15: Hoare triple {36#false} assume 0bv32 == ~cond; {36#false} is VALID [2018-11-23 10:32:41,532 INFO L273 TraceCheckUtils]: 16: Hoare triple {36#false} assume !false; {36#false} is VALID [2018-11-23 10:32:41,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:41,535 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:41,542 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:41,542 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:32:41,547 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-23 10:32:41,550 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:41,554 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:32:41,760 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:41,760 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:32:41,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:32:41,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:32:41,774 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 2 states. [2018-11-23 10:32:41,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:41,905 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2018-11-23 10:32:41,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:32:41,906 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-23 10:32:41,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:41,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:32:41,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 75 transitions. [2018-11-23 10:32:41,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:32:41,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 75 transitions. [2018-11-23 10:32:41,926 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 75 transitions. [2018-11-23 10:32:42,241 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:42,252 INFO L225 Difference]: With dead ends: 56 [2018-11-23 10:32:42,253 INFO L226 Difference]: Without dead ends: 27 [2018-11-23 10:32:42,256 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:32:42,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-11-23 10:32:42,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-11-23 10:32:42,309 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:42,310 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:42,310 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:42,311 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:42,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:42,316 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2018-11-23 10:32:42,316 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2018-11-23 10:32:42,317 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:42,317 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:42,317 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:42,317 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:42,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:42,322 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2018-11-23 10:32:42,322 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2018-11-23 10:32:42,323 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:42,323 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:42,323 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:42,323 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:42,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 10:32:42,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 32 transitions. [2018-11-23 10:32:42,333 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 32 transitions. Word has length 17 [2018-11-23 10:32:42,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:42,334 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 32 transitions. [2018-11-23 10:32:42,334 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:32:42,334 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2018-11-23 10:32:42,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 10:32:42,335 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:42,335 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:42,336 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:42,337 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:42,337 INFO L82 PathProgramCache]: Analyzing trace with hash 123133892, now seen corresponding path program 1 times [2018-11-23 10:32:42,338 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:42,338 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:42,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:42,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:42,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:42,400 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:42,472 INFO L256 TraceCheckUtils]: 0: Hoare triple {249#true} call ULTIMATE.init(); {249#true} is VALID [2018-11-23 10:32:42,473 INFO L273 TraceCheckUtils]: 1: Hoare triple {249#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {249#true} is VALID [2018-11-23 10:32:42,473 INFO L273 TraceCheckUtils]: 2: Hoare triple {249#true} assume true; {249#true} is VALID [2018-11-23 10:32:42,474 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {249#true} {249#true} #87#return; {249#true} is VALID [2018-11-23 10:32:42,474 INFO L256 TraceCheckUtils]: 4: Hoare triple {249#true} call #t~ret12 := main(); {249#true} is VALID [2018-11-23 10:32:42,478 INFO L273 TraceCheckUtils]: 5: Hoare triple {249#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {269#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:42,478 INFO L273 TraceCheckUtils]: 6: Hoare triple {269#(= main_~i~0 (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {250#false} is VALID [2018-11-23 10:32:42,479 INFO L273 TraceCheckUtils]: 7: Hoare triple {250#false} ~i~0 := 0bv32; {250#false} is VALID [2018-11-23 10:32:42,479 INFO L273 TraceCheckUtils]: 8: Hoare triple {250#false} assume !~bvslt32(~i~0, 200000bv32); {250#false} is VALID [2018-11-23 10:32:42,479 INFO L273 TraceCheckUtils]: 9: Hoare triple {250#false} ~i~0 := 0bv32; {250#false} is VALID [2018-11-23 10:32:42,480 INFO L273 TraceCheckUtils]: 10: Hoare triple {250#false} assume !~bvslt32(~i~0, 200000bv32); {250#false} is VALID [2018-11-23 10:32:42,480 INFO L273 TraceCheckUtils]: 11: Hoare triple {250#false} havoc ~x~0;~x~0 := 0bv32; {250#false} is VALID [2018-11-23 10:32:42,480 INFO L273 TraceCheckUtils]: 12: Hoare triple {250#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {250#false} is VALID [2018-11-23 10:32:42,481 INFO L256 TraceCheckUtils]: 13: Hoare triple {250#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {250#false} is VALID [2018-11-23 10:32:42,481 INFO L273 TraceCheckUtils]: 14: Hoare triple {250#false} ~cond := #in~cond; {250#false} is VALID [2018-11-23 10:32:42,481 INFO L273 TraceCheckUtils]: 15: Hoare triple {250#false} assume 0bv32 == ~cond; {250#false} is VALID [2018-11-23 10:32:42,481 INFO L273 TraceCheckUtils]: 16: Hoare triple {250#false} assume !false; {250#false} is VALID [2018-11-23 10:32:42,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:42,483 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:42,491 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:42,491 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:32:42,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-23 10:32:42,493 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:42,493 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:32:42,710 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:42,710 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:32:42,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:32:42,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:42,711 INFO L87 Difference]: Start difference. First operand 27 states and 32 transitions. Second operand 3 states. [2018-11-23 10:32:43,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:43,219 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2018-11-23 10:32:43,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:32:43,219 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-23 10:32:43,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:43,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:43,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 68 transitions. [2018-11-23 10:32:43,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:43,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 68 transitions. [2018-11-23 10:32:43,227 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 68 transitions. [2018-11-23 10:32:43,390 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:43,393 INFO L225 Difference]: With dead ends: 54 [2018-11-23 10:32:43,394 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 10:32:43,395 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:43,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 10:32:43,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 30. [2018-11-23 10:32:43,409 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:43,409 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 30 states. [2018-11-23 10:32:43,409 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 30 states. [2018-11-23 10:32:43,410 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 30 states. [2018-11-23 10:32:43,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:43,413 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2018-11-23 10:32:43,413 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2018-11-23 10:32:43,414 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:43,414 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:43,414 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 35 states. [2018-11-23 10:32:43,414 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 35 states. [2018-11-23 10:32:43,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:43,418 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2018-11-23 10:32:43,418 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2018-11-23 10:32:43,418 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:43,419 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:43,419 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:43,419 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:43,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 10:32:43,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 35 transitions. [2018-11-23 10:32:43,421 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 35 transitions. Word has length 17 [2018-11-23 10:32:43,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:43,422 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 35 transitions. [2018-11-23 10:32:43,422 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:32:43,422 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 35 transitions. [2018-11-23 10:32:43,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 10:32:43,423 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:43,424 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:43,424 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:43,424 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:43,424 INFO L82 PathProgramCache]: Analyzing trace with hash -204061721, now seen corresponding path program 1 times [2018-11-23 10:32:43,425 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:43,426 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:43,443 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:43,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:43,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:43,486 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:43,901 INFO L256 TraceCheckUtils]: 0: Hoare triple {487#true} call ULTIMATE.init(); {487#true} is VALID [2018-11-23 10:32:43,901 INFO L273 TraceCheckUtils]: 1: Hoare triple {487#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {487#true} is VALID [2018-11-23 10:32:43,901 INFO L273 TraceCheckUtils]: 2: Hoare triple {487#true} assume true; {487#true} is VALID [2018-11-23 10:32:43,902 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {487#true} {487#true} #87#return; {487#true} is VALID [2018-11-23 10:32:43,902 INFO L256 TraceCheckUtils]: 4: Hoare triple {487#true} call #t~ret12 := main(); {487#true} is VALID [2018-11-23 10:32:43,903 INFO L273 TraceCheckUtils]: 5: Hoare triple {487#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:43,904 INFO L273 TraceCheckUtils]: 6: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:43,906 INFO L273 TraceCheckUtils]: 7: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:43,907 INFO L273 TraceCheckUtils]: 8: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:43,907 INFO L273 TraceCheckUtils]: 9: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:43,909 INFO L273 TraceCheckUtils]: 10: Hoare triple {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:43,911 INFO L273 TraceCheckUtils]: 11: Hoare triple {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !(~i~0 != ~z~0); {488#false} is VALID [2018-11-23 10:32:43,911 INFO L273 TraceCheckUtils]: 12: Hoare triple {488#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {488#false} is VALID [2018-11-23 10:32:43,912 INFO L273 TraceCheckUtils]: 13: Hoare triple {488#false} assume !~bvslt32(~i~0, 200000bv32); {488#false} is VALID [2018-11-23 10:32:43,912 INFO L273 TraceCheckUtils]: 14: Hoare triple {488#false} ~i~0 := 0bv32; {488#false} is VALID [2018-11-23 10:32:43,912 INFO L273 TraceCheckUtils]: 15: Hoare triple {488#false} assume !!~bvslt32(~i~0, 200000bv32); {488#false} is VALID [2018-11-23 10:32:43,913 INFO L273 TraceCheckUtils]: 16: Hoare triple {488#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {488#false} is VALID [2018-11-23 10:32:43,913 INFO L273 TraceCheckUtils]: 17: Hoare triple {488#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {488#false} is VALID [2018-11-23 10:32:43,913 INFO L273 TraceCheckUtils]: 18: Hoare triple {488#false} assume !~bvslt32(~i~0, 200000bv32); {488#false} is VALID [2018-11-23 10:32:43,914 INFO L273 TraceCheckUtils]: 19: Hoare triple {488#false} havoc ~x~0;~x~0 := 0bv32; {488#false} is VALID [2018-11-23 10:32:43,914 INFO L273 TraceCheckUtils]: 20: Hoare triple {488#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {488#false} is VALID [2018-11-23 10:32:43,914 INFO L256 TraceCheckUtils]: 21: Hoare triple {488#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {488#false} is VALID [2018-11-23 10:32:43,915 INFO L273 TraceCheckUtils]: 22: Hoare triple {488#false} ~cond := #in~cond; {488#false} is VALID [2018-11-23 10:32:43,915 INFO L273 TraceCheckUtils]: 23: Hoare triple {488#false} assume 0bv32 == ~cond; {488#false} is VALID [2018-11-23 10:32:43,916 INFO L273 TraceCheckUtils]: 24: Hoare triple {488#false} assume !false; {488#false} is VALID [2018-11-23 10:32:43,918 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:32:43,918 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:43,920 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:43,920 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:32:43,920 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-11-23 10:32:43,922 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:43,922 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:32:44,036 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:44,036 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:32:44,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:32:44,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:32:44,038 INFO L87 Difference]: Start difference. First operand 30 states and 35 transitions. Second operand 4 states. [2018-11-23 10:32:44,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:44,442 INFO L93 Difference]: Finished difference Result 54 states and 65 transitions. [2018-11-23 10:32:44,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:32:44,442 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-11-23 10:32:44,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:44,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:32:44,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 64 transitions. [2018-11-23 10:32:44,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:32:44,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 64 transitions. [2018-11-23 10:32:44,450 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 64 transitions. [2018-11-23 10:32:44,627 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:44,629 INFO L225 Difference]: With dead ends: 54 [2018-11-23 10:32:44,629 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 10:32:44,629 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:32:44,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 10:32:44,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 32. [2018-11-23 10:32:44,660 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:44,660 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 32 states. [2018-11-23 10:32:44,661 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 32 states. [2018-11-23 10:32:44,661 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 32 states. [2018-11-23 10:32:44,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:44,664 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2018-11-23 10:32:44,664 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 40 transitions. [2018-11-23 10:32:44,664 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:44,665 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:44,665 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 35 states. [2018-11-23 10:32:44,665 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 35 states. [2018-11-23 10:32:44,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:44,668 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2018-11-23 10:32:44,668 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 40 transitions. [2018-11-23 10:32:44,668 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:44,669 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:44,669 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:44,669 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:44,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 10:32:44,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 37 transitions. [2018-11-23 10:32:44,671 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 37 transitions. Word has length 25 [2018-11-23 10:32:44,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:44,672 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 37 transitions. [2018-11-23 10:32:44,672 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:32:44,672 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 37 transitions. [2018-11-23 10:32:44,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 10:32:44,673 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:44,673 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:44,674 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:44,674 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:44,674 INFO L82 PathProgramCache]: Analyzing trace with hash 807055529, now seen corresponding path program 1 times [2018-11-23 10:32:44,675 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:44,675 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:44,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:44,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:44,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:44,744 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:44,807 INFO L256 TraceCheckUtils]: 0: Hoare triple {753#true} call ULTIMATE.init(); {753#true} is VALID [2018-11-23 10:32:44,807 INFO L273 TraceCheckUtils]: 1: Hoare triple {753#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {753#true} is VALID [2018-11-23 10:32:44,808 INFO L273 TraceCheckUtils]: 2: Hoare triple {753#true} assume true; {753#true} is VALID [2018-11-23 10:32:44,808 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {753#true} {753#true} #87#return; {753#true} is VALID [2018-11-23 10:32:44,809 INFO L256 TraceCheckUtils]: 4: Hoare triple {753#true} call #t~ret12 := main(); {753#true} is VALID [2018-11-23 10:32:44,811 INFO L273 TraceCheckUtils]: 5: Hoare triple {753#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {773#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:44,811 INFO L273 TraceCheckUtils]: 6: Hoare triple {773#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {773#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:44,813 INFO L273 TraceCheckUtils]: 7: Hoare triple {773#(= main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {780#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:44,815 INFO L273 TraceCheckUtils]: 8: Hoare triple {780#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,815 INFO L273 TraceCheckUtils]: 9: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:44,815 INFO L273 TraceCheckUtils]: 10: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,815 INFO L273 TraceCheckUtils]: 11: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {754#false} is VALID [2018-11-23 10:32:44,816 INFO L273 TraceCheckUtils]: 12: Hoare triple {754#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {754#false} is VALID [2018-11-23 10:32:44,816 INFO L273 TraceCheckUtils]: 13: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,816 INFO L273 TraceCheckUtils]: 14: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:44,816 INFO L273 TraceCheckUtils]: 15: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,817 INFO L273 TraceCheckUtils]: 16: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {754#false} is VALID [2018-11-23 10:32:44,817 INFO L273 TraceCheckUtils]: 17: Hoare triple {754#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {754#false} is VALID [2018-11-23 10:32:44,817 INFO L273 TraceCheckUtils]: 18: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,817 INFO L273 TraceCheckUtils]: 19: Hoare triple {754#false} havoc ~x~0;~x~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:44,817 INFO L273 TraceCheckUtils]: 20: Hoare triple {754#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {754#false} is VALID [2018-11-23 10:32:44,818 INFO L256 TraceCheckUtils]: 21: Hoare triple {754#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {754#false} is VALID [2018-11-23 10:32:44,818 INFO L273 TraceCheckUtils]: 22: Hoare triple {754#false} ~cond := #in~cond; {754#false} is VALID [2018-11-23 10:32:44,818 INFO L273 TraceCheckUtils]: 23: Hoare triple {754#false} assume 0bv32 == ~cond; {754#false} is VALID [2018-11-23 10:32:44,818 INFO L273 TraceCheckUtils]: 24: Hoare triple {754#false} assume !false; {754#false} is VALID [2018-11-23 10:32:44,820 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:32:44,820 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:44,874 INFO L273 TraceCheckUtils]: 24: Hoare triple {754#false} assume !false; {754#false} is VALID [2018-11-23 10:32:44,874 INFO L273 TraceCheckUtils]: 23: Hoare triple {754#false} assume 0bv32 == ~cond; {754#false} is VALID [2018-11-23 10:32:44,875 INFO L273 TraceCheckUtils]: 22: Hoare triple {754#false} ~cond := #in~cond; {754#false} is VALID [2018-11-23 10:32:44,875 INFO L256 TraceCheckUtils]: 21: Hoare triple {754#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {754#false} is VALID [2018-11-23 10:32:44,875 INFO L273 TraceCheckUtils]: 20: Hoare triple {754#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {754#false} is VALID [2018-11-23 10:32:44,876 INFO L273 TraceCheckUtils]: 19: Hoare triple {754#false} havoc ~x~0;~x~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:44,876 INFO L273 TraceCheckUtils]: 18: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,877 INFO L273 TraceCheckUtils]: 17: Hoare triple {754#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {754#false} is VALID [2018-11-23 10:32:44,877 INFO L273 TraceCheckUtils]: 16: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {754#false} is VALID [2018-11-23 10:32:44,877 INFO L273 TraceCheckUtils]: 15: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,878 INFO L273 TraceCheckUtils]: 14: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:44,878 INFO L273 TraceCheckUtils]: 13: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,878 INFO L273 TraceCheckUtils]: 12: Hoare triple {754#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {754#false} is VALID [2018-11-23 10:32:44,879 INFO L273 TraceCheckUtils]: 11: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {754#false} is VALID [2018-11-23 10:32:44,879 INFO L273 TraceCheckUtils]: 10: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,879 INFO L273 TraceCheckUtils]: 9: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:44,881 INFO L273 TraceCheckUtils]: 8: Hoare triple {880#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:44,882 INFO L273 TraceCheckUtils]: 7: Hoare triple {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {880#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:32:44,885 INFO L273 TraceCheckUtils]: 6: Hoare triple {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:44,886 INFO L273 TraceCheckUtils]: 5: Hoare triple {753#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:44,886 INFO L256 TraceCheckUtils]: 4: Hoare triple {753#true} call #t~ret12 := main(); {753#true} is VALID [2018-11-23 10:32:44,886 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {753#true} {753#true} #87#return; {753#true} is VALID [2018-11-23 10:32:44,886 INFO L273 TraceCheckUtils]: 2: Hoare triple {753#true} assume true; {753#true} is VALID [2018-11-23 10:32:44,887 INFO L273 TraceCheckUtils]: 1: Hoare triple {753#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {753#true} is VALID [2018-11-23 10:32:44,887 INFO L256 TraceCheckUtils]: 0: Hoare triple {753#true} call ULTIMATE.init(); {753#true} is VALID [2018-11-23 10:32:44,888 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:32:44,893 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:44,894 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 10:32:44,894 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-11-23 10:32:44,895 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:44,895 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:32:44,950 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:44,950 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:32:44,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:32:44,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:32:44,951 INFO L87 Difference]: Start difference. First operand 32 states and 37 transitions. Second operand 6 states. [2018-11-23 10:32:45,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:45,643 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2018-11-23 10:32:45,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:32:45,643 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-11-23 10:32:45,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:45,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:32:45,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 95 transitions. [2018-11-23 10:32:45,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:32:45,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 95 transitions. [2018-11-23 10:32:45,650 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 95 transitions. [2018-11-23 10:32:45,872 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:45,874 INFO L225 Difference]: With dead ends: 77 [2018-11-23 10:32:45,874 INFO L226 Difference]: Without dead ends: 54 [2018-11-23 10:32:45,875 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:32:45,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-11-23 10:32:45,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-11-23 10:32:45,975 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:45,975 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:45,975 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:45,976 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:45,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:45,979 INFO L93 Difference]: Finished difference Result 54 states and 63 transitions. [2018-11-23 10:32:45,979 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 63 transitions. [2018-11-23 10:32:45,979 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:45,980 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:45,980 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:45,980 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:45,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:45,983 INFO L93 Difference]: Finished difference Result 54 states and 63 transitions. [2018-11-23 10:32:45,983 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 63 transitions. [2018-11-23 10:32:45,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:45,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:45,984 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:45,985 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:45,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-23 10:32:45,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 63 transitions. [2018-11-23 10:32:45,988 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 63 transitions. Word has length 25 [2018-11-23 10:32:45,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:45,988 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 63 transitions. [2018-11-23 10:32:45,988 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:32:45,988 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 63 transitions. [2018-11-23 10:32:45,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 10:32:45,990 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:45,990 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:45,991 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:45,991 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:45,991 INFO L82 PathProgramCache]: Analyzing trace with hash -763048002, now seen corresponding path program 1 times [2018-11-23 10:32:45,991 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:45,991 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:46,009 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:46,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:46,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:46,094 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:46,230 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-23 10:32:46,231 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-23 10:32:46,231 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-23 10:32:46,232 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-23 10:32:46,232 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret12 := main(); {1200#true} is VALID [2018-11-23 10:32:46,233 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,233 INFO L273 TraceCheckUtils]: 6: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,234 INFO L273 TraceCheckUtils]: 7: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,235 INFO L273 TraceCheckUtils]: 8: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,235 INFO L273 TraceCheckUtils]: 9: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,236 INFO L273 TraceCheckUtils]: 10: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,237 INFO L273 TraceCheckUtils]: 11: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,253 INFO L273 TraceCheckUtils]: 12: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,254 INFO L273 TraceCheckUtils]: 13: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,254 INFO L273 TraceCheckUtils]: 14: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,255 INFO L273 TraceCheckUtils]: 15: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,258 INFO L273 TraceCheckUtils]: 16: Hoare triple {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,260 INFO L273 TraceCheckUtils]: 17: Hoare triple {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,261 INFO L273 TraceCheckUtils]: 18: Hoare triple {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,265 INFO L273 TraceCheckUtils]: 19: Hoare triple {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,265 INFO L273 TraceCheckUtils]: 20: Hoare triple {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:46,266 INFO L273 TraceCheckUtils]: 21: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:46,266 INFO L273 TraceCheckUtils]: 22: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,266 INFO L273 TraceCheckUtils]: 23: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:46,266 INFO L273 TraceCheckUtils]: 24: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:46,266 INFO L273 TraceCheckUtils]: 25: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,267 INFO L273 TraceCheckUtils]: 26: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:46,267 INFO L273 TraceCheckUtils]: 27: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:46,267 INFO L273 TraceCheckUtils]: 28: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,267 INFO L273 TraceCheckUtils]: 29: Hoare triple {1201#false} ~i~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:46,267 INFO L273 TraceCheckUtils]: 30: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,268 INFO L273 TraceCheckUtils]: 31: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,268 INFO L273 TraceCheckUtils]: 32: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,268 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,268 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,269 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,269 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,269 INFO L273 TraceCheckUtils]: 37: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,269 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,269 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,270 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,270 INFO L273 TraceCheckUtils]: 41: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,270 INFO L273 TraceCheckUtils]: 42: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,270 INFO L273 TraceCheckUtils]: 43: Hoare triple {1201#false} havoc ~x~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:46,270 INFO L273 TraceCheckUtils]: 44: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1201#false} is VALID [2018-11-23 10:32:46,271 INFO L256 TraceCheckUtils]: 45: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-23 10:32:46,271 INFO L273 TraceCheckUtils]: 46: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-23 10:32:46,271 INFO L273 TraceCheckUtils]: 47: Hoare triple {1201#false} assume 0bv32 == ~cond; {1201#false} is VALID [2018-11-23 10:32:46,271 INFO L273 TraceCheckUtils]: 48: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-23 10:32:46,277 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-23 10:32:46,277 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:46,429 INFO L273 TraceCheckUtils]: 48: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-23 10:32:46,429 INFO L273 TraceCheckUtils]: 47: Hoare triple {1201#false} assume 0bv32 == ~cond; {1201#false} is VALID [2018-11-23 10:32:46,429 INFO L273 TraceCheckUtils]: 46: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-23 10:32:46,430 INFO L256 TraceCheckUtils]: 45: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-23 10:32:46,430 INFO L273 TraceCheckUtils]: 44: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1201#false} is VALID [2018-11-23 10:32:46,431 INFO L273 TraceCheckUtils]: 43: Hoare triple {1201#false} havoc ~x~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:46,431 INFO L273 TraceCheckUtils]: 42: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,431 INFO L273 TraceCheckUtils]: 41: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,432 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,432 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,432 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,432 INFO L273 TraceCheckUtils]: 37: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,432 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,433 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,433 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,433 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,433 INFO L273 TraceCheckUtils]: 32: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:46,434 INFO L273 TraceCheckUtils]: 31: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:46,434 INFO L273 TraceCheckUtils]: 30: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,434 INFO L273 TraceCheckUtils]: 29: Hoare triple {1201#false} ~i~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:46,434 INFO L273 TraceCheckUtils]: 28: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,435 INFO L273 TraceCheckUtils]: 27: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:46,435 INFO L273 TraceCheckUtils]: 26: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:46,435 INFO L273 TraceCheckUtils]: 25: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,436 INFO L273 TraceCheckUtils]: 24: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:46,436 INFO L273 TraceCheckUtils]: 23: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:46,436 INFO L273 TraceCheckUtils]: 22: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:46,436 INFO L273 TraceCheckUtils]: 21: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:46,440 INFO L273 TraceCheckUtils]: 20: Hoare triple {1436#(not (= main_~z~0 main_~i~0))} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:46,442 INFO L273 TraceCheckUtils]: 19: Hoare triple {1436#(not (= main_~z~0 main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {1436#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:46,445 INFO L273 TraceCheckUtils]: 18: Hoare triple {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1436#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:46,448 INFO L273 TraceCheckUtils]: 17: Hoare triple {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:46,450 INFO L273 TraceCheckUtils]: 16: Hoare triple {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:46,450 INFO L273 TraceCheckUtils]: 15: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} ~i~0 := 0bv32; {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:46,451 INFO L273 TraceCheckUtils]: 14: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, 200000bv32); {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,453 INFO L273 TraceCheckUtils]: 13: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,453 INFO L273 TraceCheckUtils]: 12: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,455 INFO L273 TraceCheckUtils]: 11: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,455 INFO L273 TraceCheckUtils]: 10: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,457 INFO L273 TraceCheckUtils]: 9: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,457 INFO L273 TraceCheckUtils]: 8: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,460 INFO L273 TraceCheckUtils]: 7: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,460 INFO L273 TraceCheckUtils]: 6: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,462 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:46,462 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret12 := main(); {1200#true} is VALID [2018-11-23 10:32:46,462 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-23 10:32:46,462 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-23 10:32:46,463 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-23 10:32:46,463 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-23 10:32:46,468 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-23 10:32:46,475 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:46,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-23 10:32:46,476 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-11-23 10:32:46,476 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:46,477 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 10:32:46,588 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:46,588 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 10:32:46,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 10:32:46,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 10:32:46,589 INFO L87 Difference]: Start difference. First operand 54 states and 63 transitions. Second operand 8 states. [2018-11-23 10:32:47,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:47,423 INFO L93 Difference]: Finished difference Result 94 states and 114 transitions. [2018-11-23 10:32:47,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 10:32:47,423 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-11-23 10:32:47,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:47,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 10:32:47,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 94 transitions. [2018-11-23 10:32:47,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 10:32:47,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 94 transitions. [2018-11-23 10:32:47,430 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 94 transitions. [2018-11-23 10:32:47,669 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:47,671 INFO L225 Difference]: With dead ends: 94 [2018-11-23 10:32:47,671 INFO L226 Difference]: Without dead ends: 61 [2018-11-23 10:32:47,672 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=64, Unknown=0, NotChecked=0, Total=110 [2018-11-23 10:32:47,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-11-23 10:32:47,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-11-23 10:32:47,723 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:47,723 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand 60 states. [2018-11-23 10:32:47,723 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 60 states. [2018-11-23 10:32:47,723 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 60 states. [2018-11-23 10:32:47,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:47,727 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2018-11-23 10:32:47,727 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2018-11-23 10:32:47,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:47,728 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:47,728 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand 61 states. [2018-11-23 10:32:47,728 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 61 states. [2018-11-23 10:32:47,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:47,731 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2018-11-23 10:32:47,731 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2018-11-23 10:32:47,732 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:47,732 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:47,732 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:47,732 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:47,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-11-23 10:32:47,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 67 transitions. [2018-11-23 10:32:47,735 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 67 transitions. Word has length 49 [2018-11-23 10:32:47,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:47,736 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 67 transitions. [2018-11-23 10:32:47,736 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 10:32:47,736 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 67 transitions. [2018-11-23 10:32:47,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 10:32:47,737 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:47,737 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:47,738 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:47,738 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:47,738 INFO L82 PathProgramCache]: Analyzing trace with hash -405852676, now seen corresponding path program 2 times [2018-11-23 10:32:47,738 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:47,738 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:47,766 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:32:47,852 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:32:47,852 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:47,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:47,878 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:47,992 INFO L256 TraceCheckUtils]: 0: Hoare triple {1842#true} call ULTIMATE.init(); {1842#true} is VALID [2018-11-23 10:32:47,992 INFO L273 TraceCheckUtils]: 1: Hoare triple {1842#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1842#true} is VALID [2018-11-23 10:32:47,993 INFO L273 TraceCheckUtils]: 2: Hoare triple {1842#true} assume true; {1842#true} is VALID [2018-11-23 10:32:47,993 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1842#true} {1842#true} #87#return; {1842#true} is VALID [2018-11-23 10:32:47,993 INFO L256 TraceCheckUtils]: 4: Hoare triple {1842#true} call #t~ret12 := main(); {1842#true} is VALID [2018-11-23 10:32:48,011 INFO L273 TraceCheckUtils]: 5: Hoare triple {1842#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {1862#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:48,025 INFO L273 TraceCheckUtils]: 6: Hoare triple {1862#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1862#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:48,033 INFO L273 TraceCheckUtils]: 7: Hoare triple {1862#(= main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,034 INFO L273 TraceCheckUtils]: 8: Hoare triple {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,039 INFO L273 TraceCheckUtils]: 9: Hoare triple {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1876#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:48,039 INFO L273 TraceCheckUtils]: 10: Hoare triple {1876#(= (_ bv2 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1876#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:48,040 INFO L273 TraceCheckUtils]: 11: Hoare triple {1876#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,041 INFO L273 TraceCheckUtils]: 12: Hoare triple {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,041 INFO L273 TraceCheckUtils]: 13: Hoare triple {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1890#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:32:48,042 INFO L273 TraceCheckUtils]: 14: Hoare triple {1890#(= (_ bv4 32) main_~i~0)} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,042 INFO L273 TraceCheckUtils]: 15: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:48,042 INFO L273 TraceCheckUtils]: 16: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,043 INFO L273 TraceCheckUtils]: 17: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,043 INFO L273 TraceCheckUtils]: 18: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,044 INFO L273 TraceCheckUtils]: 19: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,044 INFO L273 TraceCheckUtils]: 20: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,045 INFO L273 TraceCheckUtils]: 21: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,045 INFO L273 TraceCheckUtils]: 22: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,045 INFO L273 TraceCheckUtils]: 23: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,045 INFO L273 TraceCheckUtils]: 24: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,046 INFO L273 TraceCheckUtils]: 25: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,046 INFO L273 TraceCheckUtils]: 26: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,046 INFO L273 TraceCheckUtils]: 27: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,046 INFO L273 TraceCheckUtils]: 28: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,046 INFO L273 TraceCheckUtils]: 29: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:48,047 INFO L273 TraceCheckUtils]: 30: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,047 INFO L273 TraceCheckUtils]: 31: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,047 INFO L273 TraceCheckUtils]: 32: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,047 INFO L273 TraceCheckUtils]: 33: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,047 INFO L273 TraceCheckUtils]: 34: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,048 INFO L273 TraceCheckUtils]: 35: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,048 INFO L273 TraceCheckUtils]: 36: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,048 INFO L273 TraceCheckUtils]: 37: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,048 INFO L273 TraceCheckUtils]: 38: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,048 INFO L273 TraceCheckUtils]: 39: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,049 INFO L273 TraceCheckUtils]: 40: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,049 INFO L273 TraceCheckUtils]: 41: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,049 INFO L273 TraceCheckUtils]: 42: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,049 INFO L273 TraceCheckUtils]: 43: Hoare triple {1843#false} havoc ~x~0;~x~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:48,050 INFO L273 TraceCheckUtils]: 44: Hoare triple {1843#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1843#false} is VALID [2018-11-23 10:32:48,050 INFO L256 TraceCheckUtils]: 45: Hoare triple {1843#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1843#false} is VALID [2018-11-23 10:32:48,050 INFO L273 TraceCheckUtils]: 46: Hoare triple {1843#false} ~cond := #in~cond; {1843#false} is VALID [2018-11-23 10:32:48,050 INFO L273 TraceCheckUtils]: 47: Hoare triple {1843#false} assume 0bv32 == ~cond; {1843#false} is VALID [2018-11-23 10:32:48,051 INFO L273 TraceCheckUtils]: 48: Hoare triple {1843#false} assume !false; {1843#false} is VALID [2018-11-23 10:32:48,054 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-23 10:32:48,054 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:48,339 INFO L273 TraceCheckUtils]: 48: Hoare triple {1843#false} assume !false; {1843#false} is VALID [2018-11-23 10:32:48,339 INFO L273 TraceCheckUtils]: 47: Hoare triple {1843#false} assume 0bv32 == ~cond; {1843#false} is VALID [2018-11-23 10:32:48,340 INFO L273 TraceCheckUtils]: 46: Hoare triple {1843#false} ~cond := #in~cond; {1843#false} is VALID [2018-11-23 10:32:48,340 INFO L256 TraceCheckUtils]: 45: Hoare triple {1843#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1843#false} is VALID [2018-11-23 10:32:48,340 INFO L273 TraceCheckUtils]: 44: Hoare triple {1843#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1843#false} is VALID [2018-11-23 10:32:48,340 INFO L273 TraceCheckUtils]: 43: Hoare triple {1843#false} havoc ~x~0;~x~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:48,341 INFO L273 TraceCheckUtils]: 42: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,341 INFO L273 TraceCheckUtils]: 41: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,341 INFO L273 TraceCheckUtils]: 40: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,341 INFO L273 TraceCheckUtils]: 39: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,341 INFO L273 TraceCheckUtils]: 38: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,342 INFO L273 TraceCheckUtils]: 37: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,342 INFO L273 TraceCheckUtils]: 36: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,342 INFO L273 TraceCheckUtils]: 35: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,342 INFO L273 TraceCheckUtils]: 34: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,343 INFO L273 TraceCheckUtils]: 33: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,343 INFO L273 TraceCheckUtils]: 32: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:48,343 INFO L273 TraceCheckUtils]: 31: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:48,343 INFO L273 TraceCheckUtils]: 30: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,343 INFO L273 TraceCheckUtils]: 29: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:48,344 INFO L273 TraceCheckUtils]: 28: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,344 INFO L273 TraceCheckUtils]: 27: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,344 INFO L273 TraceCheckUtils]: 26: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,344 INFO L273 TraceCheckUtils]: 25: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,344 INFO L273 TraceCheckUtils]: 24: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,345 INFO L273 TraceCheckUtils]: 23: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,345 INFO L273 TraceCheckUtils]: 22: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,345 INFO L273 TraceCheckUtils]: 21: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,345 INFO L273 TraceCheckUtils]: 20: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,345 INFO L273 TraceCheckUtils]: 19: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,345 INFO L273 TraceCheckUtils]: 18: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:48,346 INFO L273 TraceCheckUtils]: 17: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:48,346 INFO L273 TraceCheckUtils]: 16: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,346 INFO L273 TraceCheckUtils]: 15: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:48,348 INFO L273 TraceCheckUtils]: 14: Hoare triple {2098#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:48,348 INFO L273 TraceCheckUtils]: 13: Hoare triple {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2098#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:32:48,349 INFO L273 TraceCheckUtils]: 12: Hoare triple {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,354 INFO L273 TraceCheckUtils]: 11: Hoare triple {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,355 INFO L273 TraceCheckUtils]: 10: Hoare triple {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,360 INFO L273 TraceCheckUtils]: 9: Hoare triple {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,361 INFO L273 TraceCheckUtils]: 8: Hoare triple {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,368 INFO L273 TraceCheckUtils]: 7: Hoare triple {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,369 INFO L273 TraceCheckUtils]: 6: Hoare triple {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,370 INFO L273 TraceCheckUtils]: 5: Hoare triple {1842#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:48,370 INFO L256 TraceCheckUtils]: 4: Hoare triple {1842#true} call #t~ret12 := main(); {1842#true} is VALID [2018-11-23 10:32:48,370 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1842#true} {1842#true} #87#return; {1842#true} is VALID [2018-11-23 10:32:48,370 INFO L273 TraceCheckUtils]: 2: Hoare triple {1842#true} assume true; {1842#true} is VALID [2018-11-23 10:32:48,370 INFO L273 TraceCheckUtils]: 1: Hoare triple {1842#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1842#true} is VALID [2018-11-23 10:32:48,371 INFO L256 TraceCheckUtils]: 0: Hoare triple {1842#true} call ULTIMATE.init(); {1842#true} is VALID [2018-11-23 10:32:48,373 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-23 10:32:48,375 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:48,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 10:32:48,376 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 49 [2018-11-23 10:32:48,376 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:48,377 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 10:32:48,462 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:48,462 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 10:32:48,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 10:32:48,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 10:32:48,463 INFO L87 Difference]: Start difference. First operand 60 states and 67 transitions. Second operand 12 states. [2018-11-23 10:32:51,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:51,561 INFO L93 Difference]: Finished difference Result 181 states and 232 transitions. [2018-11-23 10:32:51,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:32:51,561 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 49 [2018-11-23 10:32:51,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:51,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:32:51,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 158 transitions. [2018-11-23 10:32:51,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:32:51,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 158 transitions. [2018-11-23 10:32:51,569 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 158 transitions. [2018-11-23 10:32:51,961 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:51,964 INFO L225 Difference]: With dead ends: 181 [2018-11-23 10:32:51,965 INFO L226 Difference]: Without dead ends: 136 [2018-11-23 10:32:51,966 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:32:51,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-11-23 10:32:52,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-11-23 10:32:52,080 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:52,080 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:52,081 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:52,081 INFO L87 Difference]: Start difference. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:52,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:52,085 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-11-23 10:32:52,086 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:32:52,086 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:52,086 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:52,086 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:52,087 INFO L87 Difference]: Start difference. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:52,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:52,092 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-11-23 10:32:52,092 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:32:52,093 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:52,093 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:52,093 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:52,093 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:52,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-23 10:32:52,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 153 transitions. [2018-11-23 10:32:52,098 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 153 transitions. Word has length 49 [2018-11-23 10:32:52,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:52,098 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 153 transitions. [2018-11-23 10:32:52,098 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 10:32:52,099 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:32:52,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-23 10:32:52,101 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:52,101 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 7, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:52,102 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:52,102 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:52,102 INFO L82 PathProgramCache]: Analyzing trace with hash 1927085322, now seen corresponding path program 2 times [2018-11-23 10:32:52,102 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:52,103 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:52,122 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 10:32:52,226 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:32:52,227 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:52,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:52,274 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:52,504 INFO L256 TraceCheckUtils]: 0: Hoare triple {2863#true} call ULTIMATE.init(); {2863#true} is VALID [2018-11-23 10:32:52,504 INFO L273 TraceCheckUtils]: 1: Hoare triple {2863#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2863#true} is VALID [2018-11-23 10:32:52,504 INFO L273 TraceCheckUtils]: 2: Hoare triple {2863#true} assume true; {2863#true} is VALID [2018-11-23 10:32:52,505 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2863#true} {2863#true} #87#return; {2863#true} is VALID [2018-11-23 10:32:52,505 INFO L256 TraceCheckUtils]: 4: Hoare triple {2863#true} call #t~ret12 := main(); {2863#true} is VALID [2018-11-23 10:32:52,506 INFO L273 TraceCheckUtils]: 5: Hoare triple {2863#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,507 INFO L273 TraceCheckUtils]: 6: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,507 INFO L273 TraceCheckUtils]: 7: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,508 INFO L273 TraceCheckUtils]: 8: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,508 INFO L273 TraceCheckUtils]: 9: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,508 INFO L273 TraceCheckUtils]: 10: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,509 INFO L273 TraceCheckUtils]: 11: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,509 INFO L273 TraceCheckUtils]: 12: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,509 INFO L273 TraceCheckUtils]: 13: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,510 INFO L273 TraceCheckUtils]: 14: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,510 INFO L273 TraceCheckUtils]: 15: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,510 INFO L273 TraceCheckUtils]: 16: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,511 INFO L273 TraceCheckUtils]: 17: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,511 INFO L273 TraceCheckUtils]: 18: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,512 INFO L273 TraceCheckUtils]: 19: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,512 INFO L273 TraceCheckUtils]: 20: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,513 INFO L273 TraceCheckUtils]: 21: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,513 INFO L273 TraceCheckUtils]: 22: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,514 INFO L273 TraceCheckUtils]: 23: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,515 INFO L273 TraceCheckUtils]: 24: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,515 INFO L273 TraceCheckUtils]: 25: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,516 INFO L273 TraceCheckUtils]: 26: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:52,516 INFO L273 TraceCheckUtils]: 27: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,517 INFO L273 TraceCheckUtils]: 28: Hoare triple {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,518 INFO L273 TraceCheckUtils]: 29: Hoare triple {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,519 INFO L273 TraceCheckUtils]: 30: Hoare triple {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,520 INFO L273 TraceCheckUtils]: 31: Hoare triple {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,521 INFO L273 TraceCheckUtils]: 32: Hoare triple {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,522 INFO L273 TraceCheckUtils]: 33: Hoare triple {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:52,522 INFO L273 TraceCheckUtils]: 34: Hoare triple {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:52,523 INFO L273 TraceCheckUtils]: 35: Hoare triple {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:52,524 INFO L273 TraceCheckUtils]: 36: Hoare triple {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,525 INFO L273 TraceCheckUtils]: 37: Hoare triple {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,526 INFO L273 TraceCheckUtils]: 38: Hoare triple {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,528 INFO L273 TraceCheckUtils]: 39: Hoare triple {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,528 INFO L273 TraceCheckUtils]: 40: Hoare triple {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,529 INFO L273 TraceCheckUtils]: 41: Hoare triple {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:52,529 INFO L273 TraceCheckUtils]: 42: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,529 INFO L273 TraceCheckUtils]: 43: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,530 INFO L273 TraceCheckUtils]: 44: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:52,530 INFO L273 TraceCheckUtils]: 45: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,530 INFO L273 TraceCheckUtils]: 46: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,530 INFO L273 TraceCheckUtils]: 47: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:52,531 INFO L273 TraceCheckUtils]: 48: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,531 INFO L273 TraceCheckUtils]: 49: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,531 INFO L273 TraceCheckUtils]: 50: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:52,531 INFO L273 TraceCheckUtils]: 51: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,531 INFO L273 TraceCheckUtils]: 52: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,532 INFO L273 TraceCheckUtils]: 53: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:52,532 INFO L273 TraceCheckUtils]: 54: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,532 INFO L273 TraceCheckUtils]: 55: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,533 INFO L273 TraceCheckUtils]: 56: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:52,533 INFO L273 TraceCheckUtils]: 57: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,533 INFO L273 TraceCheckUtils]: 58: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,533 INFO L273 TraceCheckUtils]: 59: Hoare triple {2864#false} ~i~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:52,533 INFO L273 TraceCheckUtils]: 60: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,534 INFO L273 TraceCheckUtils]: 61: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,534 INFO L273 TraceCheckUtils]: 62: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,534 INFO L273 TraceCheckUtils]: 63: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,534 INFO L273 TraceCheckUtils]: 64: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,534 INFO L273 TraceCheckUtils]: 65: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,535 INFO L273 TraceCheckUtils]: 66: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,535 INFO L273 TraceCheckUtils]: 67: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,535 INFO L273 TraceCheckUtils]: 68: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,535 INFO L273 TraceCheckUtils]: 69: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,535 INFO L273 TraceCheckUtils]: 70: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,536 INFO L273 TraceCheckUtils]: 71: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,536 INFO L273 TraceCheckUtils]: 72: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,536 INFO L273 TraceCheckUtils]: 73: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,536 INFO L273 TraceCheckUtils]: 74: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,536 INFO L273 TraceCheckUtils]: 75: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,537 INFO L273 TraceCheckUtils]: 76: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,538 INFO L273 TraceCheckUtils]: 77: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,538 INFO L273 TraceCheckUtils]: 78: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,538 INFO L273 TraceCheckUtils]: 79: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,538 INFO L273 TraceCheckUtils]: 80: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,539 INFO L273 TraceCheckUtils]: 81: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,539 INFO L273 TraceCheckUtils]: 82: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,539 INFO L273 TraceCheckUtils]: 83: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,540 INFO L273 TraceCheckUtils]: 84: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,540 INFO L273 TraceCheckUtils]: 85: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,541 INFO L273 TraceCheckUtils]: 86: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,541 INFO L273 TraceCheckUtils]: 87: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,541 INFO L273 TraceCheckUtils]: 88: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,541 INFO L273 TraceCheckUtils]: 89: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,541 INFO L273 TraceCheckUtils]: 90: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,541 INFO L273 TraceCheckUtils]: 91: Hoare triple {2864#false} havoc ~x~0;~x~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:52,542 INFO L273 TraceCheckUtils]: 92: Hoare triple {2864#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2864#false} is VALID [2018-11-23 10:32:52,542 INFO L256 TraceCheckUtils]: 93: Hoare triple {2864#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {2864#false} is VALID [2018-11-23 10:32:52,542 INFO L273 TraceCheckUtils]: 94: Hoare triple {2864#false} ~cond := #in~cond; {2864#false} is VALID [2018-11-23 10:32:52,542 INFO L273 TraceCheckUtils]: 95: Hoare triple {2864#false} assume 0bv32 == ~cond; {2864#false} is VALID [2018-11-23 10:32:52,542 INFO L273 TraceCheckUtils]: 96: Hoare triple {2864#false} assume !false; {2864#false} is VALID [2018-11-23 10:32:52,552 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 79 proven. 26 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2018-11-23 10:32:52,552 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:52,917 INFO L273 TraceCheckUtils]: 96: Hoare triple {2864#false} assume !false; {2864#false} is VALID [2018-11-23 10:32:52,918 INFO L273 TraceCheckUtils]: 95: Hoare triple {2864#false} assume 0bv32 == ~cond; {2864#false} is VALID [2018-11-23 10:32:52,918 INFO L273 TraceCheckUtils]: 94: Hoare triple {2864#false} ~cond := #in~cond; {2864#false} is VALID [2018-11-23 10:32:52,918 INFO L256 TraceCheckUtils]: 93: Hoare triple {2864#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {2864#false} is VALID [2018-11-23 10:32:52,918 INFO L273 TraceCheckUtils]: 92: Hoare triple {2864#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2864#false} is VALID [2018-11-23 10:32:52,918 INFO L273 TraceCheckUtils]: 91: Hoare triple {2864#false} havoc ~x~0;~x~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:52,918 INFO L273 TraceCheckUtils]: 90: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 89: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 88: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 87: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 86: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 85: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 84: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,919 INFO L273 TraceCheckUtils]: 83: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 82: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 81: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 80: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 79: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 78: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 77: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,920 INFO L273 TraceCheckUtils]: 76: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 75: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 74: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 73: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 72: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 71: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 70: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 69: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,921 INFO L273 TraceCheckUtils]: 68: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 67: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 66: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 65: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 64: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 63: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 62: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:52,922 INFO L273 TraceCheckUtils]: 61: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:52,923 INFO L273 TraceCheckUtils]: 60: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,923 INFO L273 TraceCheckUtils]: 59: Hoare triple {2864#false} ~i~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:52,923 INFO L273 TraceCheckUtils]: 58: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,923 INFO L273 TraceCheckUtils]: 57: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,923 INFO L273 TraceCheckUtils]: 56: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:52,923 INFO L273 TraceCheckUtils]: 55: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 54: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 53: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 52: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 51: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 50: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 49: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,924 INFO L273 TraceCheckUtils]: 48: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,925 INFO L273 TraceCheckUtils]: 47: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:52,925 INFO L273 TraceCheckUtils]: 46: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,925 INFO L273 TraceCheckUtils]: 45: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,925 INFO L273 TraceCheckUtils]: 44: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:52,925 INFO L273 TraceCheckUtils]: 43: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:52,925 INFO L273 TraceCheckUtils]: 42: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:52,926 INFO L273 TraceCheckUtils]: 41: Hoare triple {3327#(not (= main_~z~0 main_~i~0))} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:52,926 INFO L273 TraceCheckUtils]: 40: Hoare triple {3327#(not (= main_~z~0 main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3327#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:52,926 INFO L273 TraceCheckUtils]: 39: Hoare triple {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3327#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:52,927 INFO L273 TraceCheckUtils]: 38: Hoare triple {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,927 INFO L273 TraceCheckUtils]: 37: Hoare triple {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,947 INFO L273 TraceCheckUtils]: 36: Hoare triple {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,947 INFO L273 TraceCheckUtils]: 35: Hoare triple {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:32:52,948 INFO L273 TraceCheckUtils]: 34: Hoare triple {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:32:52,962 INFO L273 TraceCheckUtils]: 33: Hoare triple {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:32:52,963 INFO L273 TraceCheckUtils]: 32: Hoare triple {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,963 INFO L273 TraceCheckUtils]: 31: Hoare triple {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,986 INFO L273 TraceCheckUtils]: 30: Hoare triple {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,986 INFO L273 TraceCheckUtils]: 29: Hoare triple {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,987 INFO L273 TraceCheckUtils]: 28: Hoare triple {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,987 INFO L273 TraceCheckUtils]: 27: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} ~i~0 := 0bv32; {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:32:52,988 INFO L273 TraceCheckUtils]: 26: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, 200000bv32); {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,988 INFO L273 TraceCheckUtils]: 25: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,988 INFO L273 TraceCheckUtils]: 24: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,989 INFO L273 TraceCheckUtils]: 23: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,989 INFO L273 TraceCheckUtils]: 22: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,989 INFO L273 TraceCheckUtils]: 21: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,990 INFO L273 TraceCheckUtils]: 20: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,991 INFO L273 TraceCheckUtils]: 19: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,991 INFO L273 TraceCheckUtils]: 18: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,992 INFO L273 TraceCheckUtils]: 17: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,992 INFO L273 TraceCheckUtils]: 16: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,993 INFO L273 TraceCheckUtils]: 15: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,993 INFO L273 TraceCheckUtils]: 14: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,994 INFO L273 TraceCheckUtils]: 13: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,995 INFO L273 TraceCheckUtils]: 12: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,995 INFO L273 TraceCheckUtils]: 11: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,996 INFO L273 TraceCheckUtils]: 10: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,996 INFO L273 TraceCheckUtils]: 9: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,997 INFO L273 TraceCheckUtils]: 8: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,997 INFO L273 TraceCheckUtils]: 7: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,998 INFO L273 TraceCheckUtils]: 6: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,999 INFO L273 TraceCheckUtils]: 5: Hoare triple {2863#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:52,999 INFO L256 TraceCheckUtils]: 4: Hoare triple {2863#true} call #t~ret12 := main(); {2863#true} is VALID [2018-11-23 10:32:53,000 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2863#true} {2863#true} #87#return; {2863#true} is VALID [2018-11-23 10:32:53,000 INFO L273 TraceCheckUtils]: 2: Hoare triple {2863#true} assume true; {2863#true} is VALID [2018-11-23 10:32:53,000 INFO L273 TraceCheckUtils]: 1: Hoare triple {2863#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2863#true} is VALID [2018-11-23 10:32:53,000 INFO L256 TraceCheckUtils]: 0: Hoare triple {2863#true} call ULTIMATE.init(); {2863#true} is VALID [2018-11-23 10:32:53,009 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 79 proven. 26 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2018-11-23 10:32:53,010 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:53,011 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 10:32:53,011 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 97 [2018-11-23 10:32:53,012 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:53,012 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 10:32:53,158 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:53,159 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 10:32:53,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 10:32:53,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-11-23 10:32:53,160 INFO L87 Difference]: Start difference. First operand 136 states and 153 transitions. Second operand 14 states. [2018-11-23 10:32:56,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:56,058 INFO L93 Difference]: Finished difference Result 218 states and 261 transitions. [2018-11-23 10:32:56,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 10:32:56,058 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 97 [2018-11-23 10:32:56,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:56,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:32:56,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 154 transitions. [2018-11-23 10:32:56,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:32:56,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 154 transitions. [2018-11-23 10:32:56,066 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 154 transitions. [2018-11-23 10:32:56,359 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:56,363 INFO L225 Difference]: With dead ends: 218 [2018-11-23 10:32:56,363 INFO L226 Difference]: Without dead ends: 127 [2018-11-23 10:32:56,364 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=145, Invalid=235, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:32:56,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-11-23 10:32:56,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 126. [2018-11-23 10:32:56,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:56,800 INFO L82 GeneralOperation]: Start isEquivalent. First operand 127 states. Second operand 126 states. [2018-11-23 10:32:56,800 INFO L74 IsIncluded]: Start isIncluded. First operand 127 states. Second operand 126 states. [2018-11-23 10:32:56,800 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 126 states. [2018-11-23 10:32:56,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:56,804 INFO L93 Difference]: Finished difference Result 127 states and 140 transitions. [2018-11-23 10:32:56,804 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 140 transitions. [2018-11-23 10:32:56,804 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:56,805 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:56,805 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand 127 states. [2018-11-23 10:32:56,805 INFO L87 Difference]: Start difference. First operand 126 states. Second operand 127 states. [2018-11-23 10:32:56,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:56,809 INFO L93 Difference]: Finished difference Result 127 states and 140 transitions. [2018-11-23 10:32:56,810 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 140 transitions. [2018-11-23 10:32:56,810 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:56,810 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:56,810 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:56,810 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:56,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-11-23 10:32:56,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 139 transitions. [2018-11-23 10:32:56,815 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 139 transitions. Word has length 97 [2018-11-23 10:32:56,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:56,815 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 139 transitions. [2018-11-23 10:32:56,815 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 10:32:56,815 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 139 transitions. [2018-11-23 10:32:56,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-23 10:32:56,816 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:56,817 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:56,817 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:56,817 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:56,817 INFO L82 PathProgramCache]: Analyzing trace with hash 121911376, now seen corresponding path program 3 times [2018-11-23 10:32:56,818 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:56,818 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:56,841 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:32:59,603 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-23 10:32:59,603 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:59,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:59,654 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:59,847 INFO L256 TraceCheckUtils]: 0: Hoare triple {4195#true} call ULTIMATE.init(); {4195#true} is VALID [2018-11-23 10:32:59,848 INFO L273 TraceCheckUtils]: 1: Hoare triple {4195#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4195#true} is VALID [2018-11-23 10:32:59,848 INFO L273 TraceCheckUtils]: 2: Hoare triple {4195#true} assume true; {4195#true} is VALID [2018-11-23 10:32:59,848 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4195#true} {4195#true} #87#return; {4195#true} is VALID [2018-11-23 10:32:59,849 INFO L256 TraceCheckUtils]: 4: Hoare triple {4195#true} call #t~ret12 := main(); {4195#true} is VALID [2018-11-23 10:32:59,849 INFO L273 TraceCheckUtils]: 5: Hoare triple {4195#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {4195#true} is VALID [2018-11-23 10:32:59,849 INFO L273 TraceCheckUtils]: 6: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,849 INFO L273 TraceCheckUtils]: 7: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,850 INFO L273 TraceCheckUtils]: 8: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,850 INFO L273 TraceCheckUtils]: 9: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,850 INFO L273 TraceCheckUtils]: 10: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,851 INFO L273 TraceCheckUtils]: 11: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,851 INFO L273 TraceCheckUtils]: 12: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,852 INFO L273 TraceCheckUtils]: 13: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,852 INFO L273 TraceCheckUtils]: 14: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,852 INFO L273 TraceCheckUtils]: 15: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,852 INFO L273 TraceCheckUtils]: 16: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,852 INFO L273 TraceCheckUtils]: 17: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,853 INFO L273 TraceCheckUtils]: 18: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,853 INFO L273 TraceCheckUtils]: 19: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,853 INFO L273 TraceCheckUtils]: 20: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,853 INFO L273 TraceCheckUtils]: 21: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,854 INFO L273 TraceCheckUtils]: 22: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,854 INFO L273 TraceCheckUtils]: 23: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,854 INFO L273 TraceCheckUtils]: 24: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:32:59,854 INFO L273 TraceCheckUtils]: 25: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:32:59,855 INFO L273 TraceCheckUtils]: 26: Hoare triple {4195#true} assume !~bvslt32(~i~0, 200000bv32); {4195#true} is VALID [2018-11-23 10:32:59,866 INFO L273 TraceCheckUtils]: 27: Hoare triple {4195#true} ~i~0 := 0bv32; {4281#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:59,866 INFO L273 TraceCheckUtils]: 28: Hoare triple {4281#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4281#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:59,867 INFO L273 TraceCheckUtils]: 29: Hoare triple {4281#(= main_~i~0 (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4281#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:59,867 INFO L273 TraceCheckUtils]: 30: Hoare triple {4281#(= main_~i~0 (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,868 INFO L273 TraceCheckUtils]: 31: Hoare triple {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,868 INFO L273 TraceCheckUtils]: 32: Hoare triple {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,869 INFO L273 TraceCheckUtils]: 33: Hoare triple {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4301#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:59,869 INFO L273 TraceCheckUtils]: 34: Hoare triple {4301#(= (_ bv2 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4301#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:59,870 INFO L273 TraceCheckUtils]: 35: Hoare triple {4301#(= (_ bv2 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4301#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:59,870 INFO L273 TraceCheckUtils]: 36: Hoare triple {4301#(= (_ bv2 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,871 INFO L273 TraceCheckUtils]: 37: Hoare triple {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,872 INFO L273 TraceCheckUtils]: 38: Hoare triple {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,872 INFO L273 TraceCheckUtils]: 39: Hoare triple {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4321#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:32:59,873 INFO L273 TraceCheckUtils]: 40: Hoare triple {4321#(= (_ bv4 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4321#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:32:59,874 INFO L273 TraceCheckUtils]: 41: Hoare triple {4321#(= (_ bv4 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4321#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:32:59,875 INFO L273 TraceCheckUtils]: 42: Hoare triple {4321#(= (_ bv4 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,875 INFO L273 TraceCheckUtils]: 43: Hoare triple {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,876 INFO L273 TraceCheckUtils]: 44: Hoare triple {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,877 INFO L273 TraceCheckUtils]: 45: Hoare triple {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4341#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:32:59,878 INFO L273 TraceCheckUtils]: 46: Hoare triple {4341#(= (_ bv6 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4341#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:32:59,878 INFO L273 TraceCheckUtils]: 47: Hoare triple {4341#(= (_ bv6 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4341#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:32:59,879 INFO L273 TraceCheckUtils]: 48: Hoare triple {4341#(= (_ bv6 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,880 INFO L273 TraceCheckUtils]: 49: Hoare triple {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,880 INFO L273 TraceCheckUtils]: 50: Hoare triple {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,881 INFO L273 TraceCheckUtils]: 51: Hoare triple {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4361#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:32:59,882 INFO L273 TraceCheckUtils]: 52: Hoare triple {4361#(= (_ bv8 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4361#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:32:59,883 INFO L273 TraceCheckUtils]: 53: Hoare triple {4361#(= (_ bv8 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4361#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:32:59,883 INFO L273 TraceCheckUtils]: 54: Hoare triple {4361#(= (_ bv8 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,884 INFO L273 TraceCheckUtils]: 55: Hoare triple {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,885 INFO L273 TraceCheckUtils]: 56: Hoare triple {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:59,886 INFO L273 TraceCheckUtils]: 57: Hoare triple {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4381#(= (_ bv10 32) main_~i~0)} is VALID [2018-11-23 10:32:59,886 INFO L273 TraceCheckUtils]: 58: Hoare triple {4381#(= (_ bv10 32) main_~i~0)} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,887 INFO L273 TraceCheckUtils]: 59: Hoare triple {4196#false} ~i~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:32:59,887 INFO L273 TraceCheckUtils]: 60: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,887 INFO L273 TraceCheckUtils]: 61: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,887 INFO L273 TraceCheckUtils]: 62: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,888 INFO L273 TraceCheckUtils]: 63: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,888 INFO L273 TraceCheckUtils]: 64: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,889 INFO L273 TraceCheckUtils]: 65: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,889 INFO L273 TraceCheckUtils]: 66: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,889 INFO L273 TraceCheckUtils]: 67: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,890 INFO L273 TraceCheckUtils]: 68: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,890 INFO L273 TraceCheckUtils]: 69: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,890 INFO L273 TraceCheckUtils]: 70: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,891 INFO L273 TraceCheckUtils]: 71: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,891 INFO L273 TraceCheckUtils]: 72: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,891 INFO L273 TraceCheckUtils]: 73: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,892 INFO L273 TraceCheckUtils]: 74: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,892 INFO L273 TraceCheckUtils]: 75: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,892 INFO L273 TraceCheckUtils]: 76: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,892 INFO L273 TraceCheckUtils]: 77: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,892 INFO L273 TraceCheckUtils]: 78: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,893 INFO L273 TraceCheckUtils]: 79: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,893 INFO L273 TraceCheckUtils]: 80: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,893 INFO L273 TraceCheckUtils]: 81: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,893 INFO L273 TraceCheckUtils]: 82: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,894 INFO L273 TraceCheckUtils]: 83: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,894 INFO L273 TraceCheckUtils]: 84: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,894 INFO L273 TraceCheckUtils]: 85: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,894 INFO L273 TraceCheckUtils]: 86: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,894 INFO L273 TraceCheckUtils]: 87: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,895 INFO L273 TraceCheckUtils]: 88: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:32:59,895 INFO L273 TraceCheckUtils]: 89: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:32:59,895 INFO L273 TraceCheckUtils]: 90: Hoare triple {4196#false} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:32:59,895 INFO L273 TraceCheckUtils]: 91: Hoare triple {4196#false} havoc ~x~0;~x~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:32:59,895 INFO L273 TraceCheckUtils]: 92: Hoare triple {4196#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4196#false} is VALID [2018-11-23 10:32:59,896 INFO L256 TraceCheckUtils]: 93: Hoare triple {4196#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {4196#false} is VALID [2018-11-23 10:32:59,896 INFO L273 TraceCheckUtils]: 94: Hoare triple {4196#false} ~cond := #in~cond; {4196#false} is VALID [2018-11-23 10:32:59,896 INFO L273 TraceCheckUtils]: 95: Hoare triple {4196#false} assume 0bv32 == ~cond; {4196#false} is VALID [2018-11-23 10:32:59,896 INFO L273 TraceCheckUtils]: 96: Hoare triple {4196#false} assume !false; {4196#false} is VALID [2018-11-23 10:32:59,908 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-11-23 10:32:59,908 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:00,612 INFO L273 TraceCheckUtils]: 96: Hoare triple {4196#false} assume !false; {4196#false} is VALID [2018-11-23 10:33:00,613 INFO L273 TraceCheckUtils]: 95: Hoare triple {4196#false} assume 0bv32 == ~cond; {4196#false} is VALID [2018-11-23 10:33:00,613 INFO L273 TraceCheckUtils]: 94: Hoare triple {4196#false} ~cond := #in~cond; {4196#false} is VALID [2018-11-23 10:33:00,613 INFO L256 TraceCheckUtils]: 93: Hoare triple {4196#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {4196#false} is VALID [2018-11-23 10:33:00,613 INFO L273 TraceCheckUtils]: 92: Hoare triple {4196#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4196#false} is VALID [2018-11-23 10:33:00,614 INFO L273 TraceCheckUtils]: 91: Hoare triple {4196#false} havoc ~x~0;~x~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:33:00,614 INFO L273 TraceCheckUtils]: 90: Hoare triple {4196#false} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,614 INFO L273 TraceCheckUtils]: 89: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,615 INFO L273 TraceCheckUtils]: 88: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,615 INFO L273 TraceCheckUtils]: 87: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,615 INFO L273 TraceCheckUtils]: 86: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,615 INFO L273 TraceCheckUtils]: 85: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,615 INFO L273 TraceCheckUtils]: 84: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,615 INFO L273 TraceCheckUtils]: 83: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 82: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 81: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 80: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 79: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 78: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 77: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,616 INFO L273 TraceCheckUtils]: 76: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,617 INFO L273 TraceCheckUtils]: 75: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,617 INFO L273 TraceCheckUtils]: 74: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,617 INFO L273 TraceCheckUtils]: 73: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,617 INFO L273 TraceCheckUtils]: 72: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,617 INFO L273 TraceCheckUtils]: 71: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,617 INFO L273 TraceCheckUtils]: 70: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,618 INFO L273 TraceCheckUtils]: 69: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,618 INFO L273 TraceCheckUtils]: 68: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,618 INFO L273 TraceCheckUtils]: 67: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,618 INFO L273 TraceCheckUtils]: 66: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,618 INFO L273 TraceCheckUtils]: 65: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,618 INFO L273 TraceCheckUtils]: 64: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,619 INFO L273 TraceCheckUtils]: 63: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,619 INFO L273 TraceCheckUtils]: 62: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:00,619 INFO L273 TraceCheckUtils]: 61: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:00,619 INFO L273 TraceCheckUtils]: 60: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,619 INFO L273 TraceCheckUtils]: 59: Hoare triple {4196#false} ~i~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:33:00,620 INFO L273 TraceCheckUtils]: 58: Hoare triple {4613#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:00,620 INFO L273 TraceCheckUtils]: 57: Hoare triple {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4613#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:33:00,621 INFO L273 TraceCheckUtils]: 56: Hoare triple {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,621 INFO L273 TraceCheckUtils]: 55: Hoare triple {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,626 INFO L273 TraceCheckUtils]: 54: Hoare triple {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,627 INFO L273 TraceCheckUtils]: 53: Hoare triple {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,641 INFO L273 TraceCheckUtils]: 52: Hoare triple {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,646 INFO L273 TraceCheckUtils]: 51: Hoare triple {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,647 INFO L273 TraceCheckUtils]: 50: Hoare triple {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,647 INFO L273 TraceCheckUtils]: 49: Hoare triple {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,654 INFO L273 TraceCheckUtils]: 48: Hoare triple {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,654 INFO L273 TraceCheckUtils]: 47: Hoare triple {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,654 INFO L273 TraceCheckUtils]: 46: Hoare triple {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,659 INFO L273 TraceCheckUtils]: 45: Hoare triple {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,659 INFO L273 TraceCheckUtils]: 44: Hoare triple {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,660 INFO L273 TraceCheckUtils]: 43: Hoare triple {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,666 INFO L273 TraceCheckUtils]: 42: Hoare triple {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,666 INFO L273 TraceCheckUtils]: 41: Hoare triple {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,667 INFO L273 TraceCheckUtils]: 40: Hoare triple {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,673 INFO L273 TraceCheckUtils]: 39: Hoare triple {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,674 INFO L273 TraceCheckUtils]: 38: Hoare triple {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,674 INFO L273 TraceCheckUtils]: 37: Hoare triple {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,681 INFO L273 TraceCheckUtils]: 36: Hoare triple {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,682 INFO L273 TraceCheckUtils]: 35: Hoare triple {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,682 INFO L273 TraceCheckUtils]: 34: Hoare triple {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,687 INFO L273 TraceCheckUtils]: 33: Hoare triple {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,687 INFO L273 TraceCheckUtils]: 32: Hoare triple {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,687 INFO L273 TraceCheckUtils]: 31: Hoare triple {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,692 INFO L273 TraceCheckUtils]: 30: Hoare triple {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,693 INFO L273 TraceCheckUtils]: 29: Hoare triple {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,711 INFO L273 TraceCheckUtils]: 28: Hoare triple {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,717 INFO L273 TraceCheckUtils]: 27: Hoare triple {4195#true} ~i~0 := 0bv32; {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:00,717 INFO L273 TraceCheckUtils]: 26: Hoare triple {4195#true} assume !~bvslt32(~i~0, 200000bv32); {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 25: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 24: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 23: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 22: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 21: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 20: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,718 INFO L273 TraceCheckUtils]: 19: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,719 INFO L273 TraceCheckUtils]: 18: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,719 INFO L273 TraceCheckUtils]: 17: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,719 INFO L273 TraceCheckUtils]: 16: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,719 INFO L273 TraceCheckUtils]: 15: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,719 INFO L273 TraceCheckUtils]: 14: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,719 INFO L273 TraceCheckUtils]: 13: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,720 INFO L273 TraceCheckUtils]: 12: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,720 INFO L273 TraceCheckUtils]: 11: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,720 INFO L273 TraceCheckUtils]: 10: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,720 INFO L273 TraceCheckUtils]: 9: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,720 INFO L273 TraceCheckUtils]: 8: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,720 INFO L273 TraceCheckUtils]: 7: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:00,721 INFO L273 TraceCheckUtils]: 6: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:00,721 INFO L273 TraceCheckUtils]: 5: Hoare triple {4195#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {4195#true} is VALID [2018-11-23 10:33:00,721 INFO L256 TraceCheckUtils]: 4: Hoare triple {4195#true} call #t~ret12 := main(); {4195#true} is VALID [2018-11-23 10:33:00,721 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4195#true} {4195#true} #87#return; {4195#true} is VALID [2018-11-23 10:33:00,721 INFO L273 TraceCheckUtils]: 2: Hoare triple {4195#true} assume true; {4195#true} is VALID [2018-11-23 10:33:00,721 INFO L273 TraceCheckUtils]: 1: Hoare triple {4195#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4195#true} is VALID [2018-11-23 10:33:00,722 INFO L256 TraceCheckUtils]: 0: Hoare triple {4195#true} call ULTIMATE.init(); {4195#true} is VALID [2018-11-23 10:33:00,734 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-11-23 10:33:00,737 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:00,737 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 10:33:00,738 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 97 [2018-11-23 10:33:00,739 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:00,739 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:33:00,934 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:00,934 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:33:00,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:33:00,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:33:00,935 INFO L87 Difference]: Start difference. First operand 126 states and 139 transitions. Second operand 24 states. [2018-11-23 10:33:13,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:13,424 INFO L93 Difference]: Finished difference Result 541 states and 700 transitions. [2018-11-23 10:33:13,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 10:33:13,425 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 97 [2018-11-23 10:33:13,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:13,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:33:13,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 284 transitions. [2018-11-23 10:33:13,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:33:13,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 284 transitions. [2018-11-23 10:33:13,435 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 284 transitions. [2018-11-23 10:33:14,023 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 284 edges. 284 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:14,042 INFO L225 Difference]: With dead ends: 541 [2018-11-23 10:33:14,042 INFO L226 Difference]: Without dead ends: 442 [2018-11-23 10:33:14,044 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2018-11-23 10:33:14,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2018-11-23 10:33:15,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 442. [2018-11-23 10:33:15,397 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:15,397 INFO L82 GeneralOperation]: Start isEquivalent. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:15,398 INFO L74 IsIncluded]: Start isIncluded. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:15,398 INFO L87 Difference]: Start difference. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:15,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:15,416 INFO L93 Difference]: Finished difference Result 442 states and 477 transitions. [2018-11-23 10:33:15,416 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 477 transitions. [2018-11-23 10:33:15,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:15,418 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:15,418 INFO L74 IsIncluded]: Start isIncluded. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:15,418 INFO L87 Difference]: Start difference. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:15,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:15,438 INFO L93 Difference]: Finished difference Result 442 states and 477 transitions. [2018-11-23 10:33:15,438 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 477 transitions. [2018-11-23 10:33:15,440 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:15,440 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:15,440 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:15,440 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:15,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 442 states. [2018-11-23 10:33:15,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 477 transitions. [2018-11-23 10:33:15,460 INFO L78 Accepts]: Start accepts. Automaton has 442 states and 477 transitions. Word has length 97 [2018-11-23 10:33:15,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:15,460 INFO L480 AbstractCegarLoop]: Abstraction has 442 states and 477 transitions. [2018-11-23 10:33:15,460 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:33:15,461 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 477 transitions. [2018-11-23 10:33:15,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-23 10:33:15,466 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:15,467 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 22, 19, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:15,467 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:15,467 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:15,468 INFO L82 PathProgramCache]: Analyzing trace with hash -850233738, now seen corresponding path program 3 times [2018-11-23 10:33:15,468 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:15,469 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:15,492 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 10:33:15,748 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:33:15,748 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:15,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:15,829 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:16,159 INFO L256 TraceCheckUtils]: 0: Hoare triple {7050#true} call ULTIMATE.init(); {7050#true} is VALID [2018-11-23 10:33:16,159 INFO L273 TraceCheckUtils]: 1: Hoare triple {7050#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {7050#true} is VALID [2018-11-23 10:33:16,160 INFO L273 TraceCheckUtils]: 2: Hoare triple {7050#true} assume true; {7050#true} is VALID [2018-11-23 10:33:16,160 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7050#true} {7050#true} #87#return; {7050#true} is VALID [2018-11-23 10:33:16,160 INFO L256 TraceCheckUtils]: 4: Hoare triple {7050#true} call #t~ret12 := main(); {7050#true} is VALID [2018-11-23 10:33:16,162 INFO L273 TraceCheckUtils]: 5: Hoare triple {7050#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,162 INFO L273 TraceCheckUtils]: 6: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,162 INFO L273 TraceCheckUtils]: 7: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,163 INFO L273 TraceCheckUtils]: 8: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,163 INFO L273 TraceCheckUtils]: 9: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,164 INFO L273 TraceCheckUtils]: 10: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,164 INFO L273 TraceCheckUtils]: 11: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,165 INFO L273 TraceCheckUtils]: 12: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,165 INFO L273 TraceCheckUtils]: 13: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,166 INFO L273 TraceCheckUtils]: 14: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,166 INFO L273 TraceCheckUtils]: 15: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,169 INFO L273 TraceCheckUtils]: 16: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,170 INFO L273 TraceCheckUtils]: 17: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,170 INFO L273 TraceCheckUtils]: 18: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,171 INFO L273 TraceCheckUtils]: 19: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,171 INFO L273 TraceCheckUtils]: 20: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,171 INFO L273 TraceCheckUtils]: 21: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,172 INFO L273 TraceCheckUtils]: 22: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,172 INFO L273 TraceCheckUtils]: 23: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,173 INFO L273 TraceCheckUtils]: 24: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,173 INFO L273 TraceCheckUtils]: 25: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,174 INFO L273 TraceCheckUtils]: 26: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,175 INFO L273 TraceCheckUtils]: 27: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,175 INFO L273 TraceCheckUtils]: 28: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,176 INFO L273 TraceCheckUtils]: 29: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,176 INFO L273 TraceCheckUtils]: 30: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,177 INFO L273 TraceCheckUtils]: 31: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,178 INFO L273 TraceCheckUtils]: 32: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,178 INFO L273 TraceCheckUtils]: 33: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,179 INFO L273 TraceCheckUtils]: 34: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,180 INFO L273 TraceCheckUtils]: 35: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,180 INFO L273 TraceCheckUtils]: 36: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,181 INFO L273 TraceCheckUtils]: 37: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,181 INFO L273 TraceCheckUtils]: 38: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,182 INFO L273 TraceCheckUtils]: 39: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,183 INFO L273 TraceCheckUtils]: 40: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,183 INFO L273 TraceCheckUtils]: 41: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,184 INFO L273 TraceCheckUtils]: 42: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,185 INFO L273 TraceCheckUtils]: 43: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,185 INFO L273 TraceCheckUtils]: 44: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,186 INFO L273 TraceCheckUtils]: 45: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,186 INFO L273 TraceCheckUtils]: 46: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,187 INFO L273 TraceCheckUtils]: 47: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,188 INFO L273 TraceCheckUtils]: 48: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,188 INFO L273 TraceCheckUtils]: 49: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,189 INFO L273 TraceCheckUtils]: 50: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,190 INFO L273 TraceCheckUtils]: 51: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,190 INFO L273 TraceCheckUtils]: 52: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,191 INFO L273 TraceCheckUtils]: 53: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,191 INFO L273 TraceCheckUtils]: 54: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,192 INFO L273 TraceCheckUtils]: 55: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,193 INFO L273 TraceCheckUtils]: 56: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,193 INFO L273 TraceCheckUtils]: 57: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,194 INFO L273 TraceCheckUtils]: 58: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,194 INFO L273 TraceCheckUtils]: 59: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,195 INFO L273 TraceCheckUtils]: 60: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,196 INFO L273 TraceCheckUtils]: 61: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,196 INFO L273 TraceCheckUtils]: 62: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,197 INFO L273 TraceCheckUtils]: 63: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,198 INFO L273 TraceCheckUtils]: 64: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,198 INFO L273 TraceCheckUtils]: 65: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,199 INFO L273 TraceCheckUtils]: 66: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,199 INFO L273 TraceCheckUtils]: 67: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,200 INFO L273 TraceCheckUtils]: 68: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,201 INFO L273 TraceCheckUtils]: 69: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,201 INFO L273 TraceCheckUtils]: 70: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,202 INFO L273 TraceCheckUtils]: 71: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,203 INFO L273 TraceCheckUtils]: 72: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,203 INFO L273 TraceCheckUtils]: 73: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,204 INFO L273 TraceCheckUtils]: 74: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,204 INFO L273 TraceCheckUtils]: 75: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,205 INFO L273 TraceCheckUtils]: 76: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,206 INFO L273 TraceCheckUtils]: 77: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,206 INFO L273 TraceCheckUtils]: 78: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,207 INFO L273 TraceCheckUtils]: 79: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,208 INFO L273 TraceCheckUtils]: 80: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,208 INFO L273 TraceCheckUtils]: 81: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,209 INFO L273 TraceCheckUtils]: 82: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,209 INFO L273 TraceCheckUtils]: 83: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !(~i~0 != ~z~0); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,229 INFO L273 TraceCheckUtils]: 84: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,242 INFO L273 TraceCheckUtils]: 85: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,251 INFO L273 TraceCheckUtils]: 86: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,265 INFO L273 TraceCheckUtils]: 87: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,273 INFO L273 TraceCheckUtils]: 88: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,281 INFO L273 TraceCheckUtils]: 89: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,282 INFO L273 TraceCheckUtils]: 90: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,283 INFO L273 TraceCheckUtils]: 91: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,283 INFO L273 TraceCheckUtils]: 92: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,286 INFO L273 TraceCheckUtils]: 93: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,304 INFO L273 TraceCheckUtils]: 94: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,313 INFO L273 TraceCheckUtils]: 95: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,335 INFO L273 TraceCheckUtils]: 96: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,340 INFO L273 TraceCheckUtils]: 97: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,341 INFO L273 TraceCheckUtils]: 98: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !(~i~0 != ~z~0); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,341 INFO L273 TraceCheckUtils]: 99: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,341 INFO L273 TraceCheckUtils]: 100: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,342 INFO L273 TraceCheckUtils]: 101: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,342 INFO L273 TraceCheckUtils]: 102: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,342 INFO L273 TraceCheckUtils]: 103: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,343 INFO L273 TraceCheckUtils]: 104: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,343 INFO L273 TraceCheckUtils]: 105: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,343 INFO L273 TraceCheckUtils]: 106: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,348 INFO L273 TraceCheckUtils]: 107: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,348 INFO L273 TraceCheckUtils]: 108: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,350 INFO L273 TraceCheckUtils]: 109: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,350 INFO L273 TraceCheckUtils]: 110: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,353 INFO L273 TraceCheckUtils]: 111: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,353 INFO L273 TraceCheckUtils]: 112: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,356 INFO L273 TraceCheckUtils]: 113: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !(~i~0 != ~z~0); {7395#(= (bvadd main_~i~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,356 INFO L273 TraceCheckUtils]: 114: Hoare triple {7395#(= (bvadd main_~i~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7399#(= (_ bv150001 32) main_~i~0)} is VALID [2018-11-23 10:33:16,359 INFO L273 TraceCheckUtils]: 115: Hoare triple {7399#(= (_ bv150001 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {7399#(= (_ bv150001 32) main_~i~0)} is VALID [2018-11-23 10:33:16,359 INFO L273 TraceCheckUtils]: 116: Hoare triple {7399#(= (_ bv150001 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7399#(= (_ bv150001 32) main_~i~0)} is VALID [2018-11-23 10:33:16,362 INFO L273 TraceCheckUtils]: 117: Hoare triple {7399#(= (_ bv150001 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7409#(= (bvadd main_~i~0 (_ bv4294817294 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:16,362 INFO L273 TraceCheckUtils]: 118: Hoare triple {7409#(= (bvadd main_~i~0 (_ bv4294817294 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,362 INFO L273 TraceCheckUtils]: 119: Hoare triple {7051#false} ~i~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:16,362 INFO L273 TraceCheckUtils]: 120: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,362 INFO L273 TraceCheckUtils]: 121: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 122: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 123: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 124: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 125: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 126: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 127: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 128: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,363 INFO L273 TraceCheckUtils]: 129: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,364 INFO L273 TraceCheckUtils]: 130: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,364 INFO L273 TraceCheckUtils]: 131: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,364 INFO L273 TraceCheckUtils]: 132: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,364 INFO L273 TraceCheckUtils]: 133: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,364 INFO L273 TraceCheckUtils]: 134: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 135: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 136: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 137: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 138: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 139: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 140: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 141: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 142: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,365 INFO L273 TraceCheckUtils]: 143: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 144: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 145: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 146: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 147: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 148: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 149: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 150: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,366 INFO L273 TraceCheckUtils]: 151: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 152: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 153: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 154: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 155: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 156: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 157: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 158: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,367 INFO L273 TraceCheckUtils]: 159: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 160: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 161: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 162: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 163: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 164: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 165: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 166: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 167: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,368 INFO L273 TraceCheckUtils]: 168: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 169: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 170: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 171: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 172: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 173: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 174: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 175: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,369 INFO L273 TraceCheckUtils]: 176: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 177: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 178: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 179: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 180: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 181: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 182: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 183: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 184: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,370 INFO L273 TraceCheckUtils]: 185: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L273 TraceCheckUtils]: 186: Hoare triple {7051#false} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L273 TraceCheckUtils]: 187: Hoare triple {7051#false} havoc ~x~0;~x~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L273 TraceCheckUtils]: 188: Hoare triple {7051#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L256 TraceCheckUtils]: 189: Hoare triple {7051#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L273 TraceCheckUtils]: 190: Hoare triple {7051#false} ~cond := #in~cond; {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L273 TraceCheckUtils]: 191: Hoare triple {7051#false} assume 0bv32 == ~cond; {7051#false} is VALID [2018-11-23 10:33:16,371 INFO L273 TraceCheckUtils]: 192: Hoare triple {7051#false} assume !false; {7051#false} is VALID [2018-11-23 10:33:16,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 1809 trivial. 0 not checked. [2018-11-23 10:33:16,407 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:16,763 INFO L273 TraceCheckUtils]: 192: Hoare triple {7051#false} assume !false; {7051#false} is VALID [2018-11-23 10:33:16,763 INFO L273 TraceCheckUtils]: 191: Hoare triple {7051#false} assume 0bv32 == ~cond; {7051#false} is VALID [2018-11-23 10:33:16,763 INFO L273 TraceCheckUtils]: 190: Hoare triple {7051#false} ~cond := #in~cond; {7051#false} is VALID [2018-11-23 10:33:16,764 INFO L256 TraceCheckUtils]: 189: Hoare triple {7051#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {7051#false} is VALID [2018-11-23 10:33:16,764 INFO L273 TraceCheckUtils]: 188: Hoare triple {7051#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {7051#false} is VALID [2018-11-23 10:33:16,764 INFO L273 TraceCheckUtils]: 187: Hoare triple {7051#false} havoc ~x~0;~x~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:16,764 INFO L273 TraceCheckUtils]: 186: Hoare triple {7051#false} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,764 INFO L273 TraceCheckUtils]: 185: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,765 INFO L273 TraceCheckUtils]: 184: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,765 INFO L273 TraceCheckUtils]: 183: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,765 INFO L273 TraceCheckUtils]: 182: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,765 INFO L273 TraceCheckUtils]: 181: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 180: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 179: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 178: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 177: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 176: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 175: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,766 INFO L273 TraceCheckUtils]: 174: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 173: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 172: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 171: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 170: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 169: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 168: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 167: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,767 INFO L273 TraceCheckUtils]: 166: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 165: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 164: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 163: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 162: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 161: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 160: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 159: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 158: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,768 INFO L273 TraceCheckUtils]: 157: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 156: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 155: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 154: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 153: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 152: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 151: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 150: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,769 INFO L273 TraceCheckUtils]: 149: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 148: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 147: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 146: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 145: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 144: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 143: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 142: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,770 INFO L273 TraceCheckUtils]: 141: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 140: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 139: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 138: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 137: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 136: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 135: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 134: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,771 INFO L273 TraceCheckUtils]: 133: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 132: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 131: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 130: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 129: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 128: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 127: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 126: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 125: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,772 INFO L273 TraceCheckUtils]: 124: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,773 INFO L273 TraceCheckUtils]: 123: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,773 INFO L273 TraceCheckUtils]: 122: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:16,773 INFO L273 TraceCheckUtils]: 121: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:16,773 INFO L273 TraceCheckUtils]: 120: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,773 INFO L273 TraceCheckUtils]: 119: Hoare triple {7051#false} ~i~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:16,773 INFO L273 TraceCheckUtils]: 118: Hoare triple {7857#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:16,774 INFO L273 TraceCheckUtils]: 117: Hoare triple {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7857#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:33:16,774 INFO L273 TraceCheckUtils]: 116: Hoare triple {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,775 INFO L273 TraceCheckUtils]: 115: Hoare triple {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,778 INFO L273 TraceCheckUtils]: 114: Hoare triple {7871#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,779 INFO L273 TraceCheckUtils]: 113: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !(~i~0 != ~z~0); {7871#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,780 INFO L273 TraceCheckUtils]: 112: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,780 INFO L273 TraceCheckUtils]: 111: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,780 INFO L273 TraceCheckUtils]: 110: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,781 INFO L273 TraceCheckUtils]: 109: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,781 INFO L273 TraceCheckUtils]: 108: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,781 INFO L273 TraceCheckUtils]: 107: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,782 INFO L273 TraceCheckUtils]: 106: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,782 INFO L273 TraceCheckUtils]: 105: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,783 INFO L273 TraceCheckUtils]: 104: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,783 INFO L273 TraceCheckUtils]: 103: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,784 INFO L273 TraceCheckUtils]: 102: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,784 INFO L273 TraceCheckUtils]: 101: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,785 INFO L273 TraceCheckUtils]: 100: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,786 INFO L273 TraceCheckUtils]: 99: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,786 INFO L273 TraceCheckUtils]: 98: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !(~i~0 != ~z~0); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,787 INFO L273 TraceCheckUtils]: 97: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,787 INFO L273 TraceCheckUtils]: 96: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,788 INFO L273 TraceCheckUtils]: 95: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,789 INFO L273 TraceCheckUtils]: 94: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,789 INFO L273 TraceCheckUtils]: 93: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,790 INFO L273 TraceCheckUtils]: 92: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,790 INFO L273 TraceCheckUtils]: 91: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,791 INFO L273 TraceCheckUtils]: 90: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,791 INFO L273 TraceCheckUtils]: 89: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,792 INFO L273 TraceCheckUtils]: 88: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,792 INFO L273 TraceCheckUtils]: 87: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,792 INFO L273 TraceCheckUtils]: 86: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,793 INFO L273 TraceCheckUtils]: 85: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,793 INFO L273 TraceCheckUtils]: 84: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,793 INFO L273 TraceCheckUtils]: 83: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !(~i~0 != ~z~0); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,794 INFO L273 TraceCheckUtils]: 82: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,794 INFO L273 TraceCheckUtils]: 81: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,794 INFO L273 TraceCheckUtils]: 80: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,795 INFO L273 TraceCheckUtils]: 79: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,795 INFO L273 TraceCheckUtils]: 78: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,796 INFO L273 TraceCheckUtils]: 77: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,796 INFO L273 TraceCheckUtils]: 76: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,797 INFO L273 TraceCheckUtils]: 75: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,797 INFO L273 TraceCheckUtils]: 74: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,798 INFO L273 TraceCheckUtils]: 73: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,798 INFO L273 TraceCheckUtils]: 72: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,799 INFO L273 TraceCheckUtils]: 71: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,799 INFO L273 TraceCheckUtils]: 70: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,800 INFO L273 TraceCheckUtils]: 69: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,800 INFO L273 TraceCheckUtils]: 68: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,801 INFO L273 TraceCheckUtils]: 67: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,801 INFO L273 TraceCheckUtils]: 66: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,820 INFO L273 TraceCheckUtils]: 65: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,821 INFO L273 TraceCheckUtils]: 64: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,821 INFO L273 TraceCheckUtils]: 63: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,822 INFO L273 TraceCheckUtils]: 62: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,822 INFO L273 TraceCheckUtils]: 61: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,822 INFO L273 TraceCheckUtils]: 60: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,822 INFO L273 TraceCheckUtils]: 59: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,823 INFO L273 TraceCheckUtils]: 58: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,823 INFO L273 TraceCheckUtils]: 57: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,823 INFO L273 TraceCheckUtils]: 56: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,824 INFO L273 TraceCheckUtils]: 55: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,824 INFO L273 TraceCheckUtils]: 54: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,825 INFO L273 TraceCheckUtils]: 53: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,825 INFO L273 TraceCheckUtils]: 52: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,826 INFO L273 TraceCheckUtils]: 51: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} ~i~0 := 0bv32; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,826 INFO L273 TraceCheckUtils]: 50: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,827 INFO L273 TraceCheckUtils]: 49: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,827 INFO L273 TraceCheckUtils]: 48: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,828 INFO L273 TraceCheckUtils]: 47: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,828 INFO L273 TraceCheckUtils]: 46: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,829 INFO L273 TraceCheckUtils]: 45: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,842 INFO L273 TraceCheckUtils]: 44: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,842 INFO L273 TraceCheckUtils]: 43: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,843 INFO L273 TraceCheckUtils]: 42: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,843 INFO L273 TraceCheckUtils]: 41: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,843 INFO L273 TraceCheckUtils]: 40: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,844 INFO L273 TraceCheckUtils]: 39: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,844 INFO L273 TraceCheckUtils]: 38: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,844 INFO L273 TraceCheckUtils]: 37: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,845 INFO L273 TraceCheckUtils]: 36: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,845 INFO L273 TraceCheckUtils]: 35: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,845 INFO L273 TraceCheckUtils]: 34: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,846 INFO L273 TraceCheckUtils]: 33: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,846 INFO L273 TraceCheckUtils]: 32: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,847 INFO L273 TraceCheckUtils]: 31: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,847 INFO L273 TraceCheckUtils]: 30: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,848 INFO L273 TraceCheckUtils]: 29: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,848 INFO L273 TraceCheckUtils]: 28: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,849 INFO L273 TraceCheckUtils]: 27: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,850 INFO L273 TraceCheckUtils]: 26: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,850 INFO L273 TraceCheckUtils]: 25: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,851 INFO L273 TraceCheckUtils]: 24: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,851 INFO L273 TraceCheckUtils]: 23: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,852 INFO L273 TraceCheckUtils]: 22: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,852 INFO L273 TraceCheckUtils]: 21: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,853 INFO L273 TraceCheckUtils]: 20: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,853 INFO L273 TraceCheckUtils]: 19: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,854 INFO L273 TraceCheckUtils]: 18: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,854 INFO L273 TraceCheckUtils]: 17: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,855 INFO L273 TraceCheckUtils]: 16: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,855 INFO L273 TraceCheckUtils]: 15: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,856 INFO L273 TraceCheckUtils]: 14: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,856 INFO L273 TraceCheckUtils]: 13: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,857 INFO L273 TraceCheckUtils]: 12: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,857 INFO L273 TraceCheckUtils]: 11: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,858 INFO L273 TraceCheckUtils]: 10: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,858 INFO L273 TraceCheckUtils]: 9: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,859 INFO L273 TraceCheckUtils]: 8: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,859 INFO L273 TraceCheckUtils]: 7: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,860 INFO L273 TraceCheckUtils]: 6: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,861 INFO L273 TraceCheckUtils]: 5: Hoare triple {7050#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:16,861 INFO L256 TraceCheckUtils]: 4: Hoare triple {7050#true} call #t~ret12 := main(); {7050#true} is VALID [2018-11-23 10:33:16,862 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7050#true} {7050#true} #87#return; {7050#true} is VALID [2018-11-23 10:33:16,862 INFO L273 TraceCheckUtils]: 2: Hoare triple {7050#true} assume true; {7050#true} is VALID [2018-11-23 10:33:16,862 INFO L273 TraceCheckUtils]: 1: Hoare triple {7050#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {7050#true} is VALID [2018-11-23 10:33:16,862 INFO L256 TraceCheckUtils]: 0: Hoare triple {7050#true} call ULTIMATE.init(); {7050#true} is VALID [2018-11-23 10:33:16,897 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 1809 trivial. 0 not checked. [2018-11-23 10:33:16,898 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:16,899 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-23 10:33:16,899 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 193 [2018-11-23 10:33:16,900 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:16,900 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 10:33:16,970 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:16,970 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 10:33:16,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 10:33:16,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-23 10:33:16,970 INFO L87 Difference]: Start difference. First operand 442 states and 477 transitions. Second operand 10 states. [2018-11-23 10:33:18,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:18,808 INFO L93 Difference]: Finished difference Result 675 states and 729 transitions. [2018-11-23 10:33:18,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 10:33:18,808 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 193 [2018-11-23 10:33:18,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:18,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:33:18,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 92 transitions. [2018-11-23 10:33:18,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:33:18,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 92 transitions. [2018-11-23 10:33:18,814 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 92 transitions. [2018-11-23 10:33:18,975 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 92 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:18,992 INFO L225 Difference]: With dead ends: 675 [2018-11-23 10:33:18,992 INFO L226 Difference]: Without dead ends: 474 [2018-11-23 10:33:18,994 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 391 GetRequests, 377 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=159, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:33:18,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2018-11-23 10:33:19,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 366. [2018-11-23 10:33:19,573 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:19,573 INFO L82 GeneralOperation]: Start isEquivalent. First operand 474 states. Second operand 366 states. [2018-11-23 10:33:19,573 INFO L74 IsIncluded]: Start isIncluded. First operand 474 states. Second operand 366 states. [2018-11-23 10:33:19,574 INFO L87 Difference]: Start difference. First operand 474 states. Second operand 366 states. [2018-11-23 10:33:19,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:19,592 INFO L93 Difference]: Finished difference Result 474 states and 501 transitions. [2018-11-23 10:33:19,592 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 501 transitions. [2018-11-23 10:33:19,593 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:19,594 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:19,594 INFO L74 IsIncluded]: Start isIncluded. First operand 366 states. Second operand 474 states. [2018-11-23 10:33:19,594 INFO L87 Difference]: Start difference. First operand 366 states. Second operand 474 states. [2018-11-23 10:33:19,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:19,610 INFO L93 Difference]: Finished difference Result 474 states and 501 transitions. [2018-11-23 10:33:19,610 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 501 transitions. [2018-11-23 10:33:19,611 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:19,611 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:19,611 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:19,611 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:19,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2018-11-23 10:33:19,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 393 transitions. [2018-11-23 10:33:19,623 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 393 transitions. Word has length 193 [2018-11-23 10:33:19,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:19,624 INFO L480 AbstractCegarLoop]: Abstraction has 366 states and 393 transitions. [2018-11-23 10:33:19,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 10:33:19,624 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 393 transitions. [2018-11-23 10:33:19,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-23 10:33:19,626 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:19,626 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 22, 20, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:19,627 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:19,627 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:19,627 INFO L82 PathProgramCache]: Analyzing trace with hash 292268728, now seen corresponding path program 4 times [2018-11-23 10:33:19,628 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:19,628 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:19,657 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:33:19,790 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:33:19,790 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:19,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:19,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:20,261 INFO L256 TraceCheckUtils]: 0: Hoare triple {10594#true} call ULTIMATE.init(); {10594#true} is VALID [2018-11-23 10:33:20,261 INFO L273 TraceCheckUtils]: 1: Hoare triple {10594#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10594#true} is VALID [2018-11-23 10:33:20,261 INFO L273 TraceCheckUtils]: 2: Hoare triple {10594#true} assume true; {10594#true} is VALID [2018-11-23 10:33:20,262 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10594#true} {10594#true} #87#return; {10594#true} is VALID [2018-11-23 10:33:20,262 INFO L256 TraceCheckUtils]: 4: Hoare triple {10594#true} call #t~ret12 := main(); {10594#true} is VALID [2018-11-23 10:33:20,263 INFO L273 TraceCheckUtils]: 5: Hoare triple {10594#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,263 INFO L273 TraceCheckUtils]: 6: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,264 INFO L273 TraceCheckUtils]: 7: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,264 INFO L273 TraceCheckUtils]: 8: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,264 INFO L273 TraceCheckUtils]: 9: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,265 INFO L273 TraceCheckUtils]: 10: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,265 INFO L273 TraceCheckUtils]: 11: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,265 INFO L273 TraceCheckUtils]: 12: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,266 INFO L273 TraceCheckUtils]: 13: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,266 INFO L273 TraceCheckUtils]: 14: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,266 INFO L273 TraceCheckUtils]: 15: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,267 INFO L273 TraceCheckUtils]: 16: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,267 INFO L273 TraceCheckUtils]: 17: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,268 INFO L273 TraceCheckUtils]: 18: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,268 INFO L273 TraceCheckUtils]: 19: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,269 INFO L273 TraceCheckUtils]: 20: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,269 INFO L273 TraceCheckUtils]: 21: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,270 INFO L273 TraceCheckUtils]: 22: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,270 INFO L273 TraceCheckUtils]: 23: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,271 INFO L273 TraceCheckUtils]: 24: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,271 INFO L273 TraceCheckUtils]: 25: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,272 INFO L273 TraceCheckUtils]: 26: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,273 INFO L273 TraceCheckUtils]: 27: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,273 INFO L273 TraceCheckUtils]: 28: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,274 INFO L273 TraceCheckUtils]: 29: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,274 INFO L273 TraceCheckUtils]: 30: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,275 INFO L273 TraceCheckUtils]: 31: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,275 INFO L273 TraceCheckUtils]: 32: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,276 INFO L273 TraceCheckUtils]: 33: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,276 INFO L273 TraceCheckUtils]: 34: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,277 INFO L273 TraceCheckUtils]: 35: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,277 INFO L273 TraceCheckUtils]: 36: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,278 INFO L273 TraceCheckUtils]: 37: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,278 INFO L273 TraceCheckUtils]: 38: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,279 INFO L273 TraceCheckUtils]: 39: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,279 INFO L273 TraceCheckUtils]: 40: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,280 INFO L273 TraceCheckUtils]: 41: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,280 INFO L273 TraceCheckUtils]: 42: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,281 INFO L273 TraceCheckUtils]: 43: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,281 INFO L273 TraceCheckUtils]: 44: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,282 INFO L273 TraceCheckUtils]: 45: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,282 INFO L273 TraceCheckUtils]: 46: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,283 INFO L273 TraceCheckUtils]: 47: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,283 INFO L273 TraceCheckUtils]: 48: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,284 INFO L273 TraceCheckUtils]: 49: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,285 INFO L273 TraceCheckUtils]: 50: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:20,285 INFO L273 TraceCheckUtils]: 51: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,286 INFO L273 TraceCheckUtils]: 52: Hoare triple {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,287 INFO L273 TraceCheckUtils]: 53: Hoare triple {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,288 INFO L273 TraceCheckUtils]: 54: Hoare triple {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,288 INFO L273 TraceCheckUtils]: 55: Hoare triple {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,289 INFO L273 TraceCheckUtils]: 56: Hoare triple {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,290 INFO L273 TraceCheckUtils]: 57: Hoare triple {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:20,291 INFO L273 TraceCheckUtils]: 58: Hoare triple {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:20,291 INFO L273 TraceCheckUtils]: 59: Hoare triple {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:20,292 INFO L273 TraceCheckUtils]: 60: Hoare triple {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,293 INFO L273 TraceCheckUtils]: 61: Hoare triple {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,294 INFO L273 TraceCheckUtils]: 62: Hoare triple {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,295 INFO L273 TraceCheckUtils]: 63: Hoare triple {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,296 INFO L273 TraceCheckUtils]: 64: Hoare triple {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,297 INFO L273 TraceCheckUtils]: 65: Hoare triple {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,297 INFO L273 TraceCheckUtils]: 66: Hoare triple {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,298 INFO L273 TraceCheckUtils]: 67: Hoare triple {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,299 INFO L273 TraceCheckUtils]: 68: Hoare triple {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,300 INFO L273 TraceCheckUtils]: 69: Hoare triple {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,301 INFO L273 TraceCheckUtils]: 70: Hoare triple {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,301 INFO L273 TraceCheckUtils]: 71: Hoare triple {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,302 INFO L273 TraceCheckUtils]: 72: Hoare triple {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,303 INFO L273 TraceCheckUtils]: 73: Hoare triple {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,304 INFO L273 TraceCheckUtils]: 74: Hoare triple {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,305 INFO L273 TraceCheckUtils]: 75: Hoare triple {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,305 INFO L273 TraceCheckUtils]: 76: Hoare triple {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,306 INFO L273 TraceCheckUtils]: 77: Hoare triple {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,307 INFO L273 TraceCheckUtils]: 78: Hoare triple {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,308 INFO L273 TraceCheckUtils]: 79: Hoare triple {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,309 INFO L273 TraceCheckUtils]: 80: Hoare triple {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:20,309 INFO L273 TraceCheckUtils]: 81: Hoare triple {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 10:33:20,310 INFO L273 TraceCheckUtils]: 82: Hoare triple {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 10:33:20,311 INFO L273 TraceCheckUtils]: 83: Hoare triple {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:20,311 INFO L273 TraceCheckUtils]: 84: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,311 INFO L273 TraceCheckUtils]: 85: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,311 INFO L273 TraceCheckUtils]: 86: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,312 INFO L273 TraceCheckUtils]: 87: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,312 INFO L273 TraceCheckUtils]: 88: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,312 INFO L273 TraceCheckUtils]: 89: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,312 INFO L273 TraceCheckUtils]: 90: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,313 INFO L273 TraceCheckUtils]: 91: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,313 INFO L273 TraceCheckUtils]: 92: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,313 INFO L273 TraceCheckUtils]: 93: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,313 INFO L273 TraceCheckUtils]: 94: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,313 INFO L273 TraceCheckUtils]: 95: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,314 INFO L273 TraceCheckUtils]: 96: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,314 INFO L273 TraceCheckUtils]: 97: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,314 INFO L273 TraceCheckUtils]: 98: Hoare triple {10595#false} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:20,314 INFO L273 TraceCheckUtils]: 99: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,314 INFO L273 TraceCheckUtils]: 100: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,315 INFO L273 TraceCheckUtils]: 101: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,315 INFO L273 TraceCheckUtils]: 102: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,315 INFO L273 TraceCheckUtils]: 103: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,315 INFO L273 TraceCheckUtils]: 104: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,315 INFO L273 TraceCheckUtils]: 105: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 106: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 107: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 108: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 109: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 110: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 111: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 112: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,316 INFO L273 TraceCheckUtils]: 113: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 114: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 115: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 116: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 117: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 118: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 119: Hoare triple {10595#false} ~i~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 120: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,317 INFO L273 TraceCheckUtils]: 121: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 122: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 123: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 124: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 125: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 126: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 127: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 128: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,318 INFO L273 TraceCheckUtils]: 129: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 130: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 131: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 132: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 133: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 134: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 135: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 136: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 137: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,319 INFO L273 TraceCheckUtils]: 138: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 139: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 140: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 141: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 142: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 143: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 144: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 145: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,320 INFO L273 TraceCheckUtils]: 146: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 147: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 148: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 149: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 150: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 151: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 152: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 153: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,321 INFO L273 TraceCheckUtils]: 154: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 155: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 156: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 157: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 158: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 159: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 160: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 161: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 162: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,322 INFO L273 TraceCheckUtils]: 163: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 164: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 165: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 166: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 167: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 168: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 169: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 170: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,323 INFO L273 TraceCheckUtils]: 171: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 172: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 173: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 174: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 175: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 176: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 177: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 178: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 179: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,324 INFO L273 TraceCheckUtils]: 180: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 181: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 182: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 183: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 184: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 185: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 186: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 187: Hoare triple {10595#false} havoc ~x~0;~x~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:20,325 INFO L273 TraceCheckUtils]: 188: Hoare triple {10595#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {10595#false} is VALID [2018-11-23 10:33:20,326 INFO L256 TraceCheckUtils]: 189: Hoare triple {10595#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {10595#false} is VALID [2018-11-23 10:33:20,326 INFO L273 TraceCheckUtils]: 190: Hoare triple {10595#false} ~cond := #in~cond; {10595#false} is VALID [2018-11-23 10:33:20,326 INFO L273 TraceCheckUtils]: 191: Hoare triple {10595#false} assume 0bv32 == ~cond; {10595#false} is VALID [2018-11-23 10:33:20,326 INFO L273 TraceCheckUtils]: 192: Hoare triple {10595#false} assume !false; {10595#false} is VALID [2018-11-23 10:33:20,360 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 373 proven. 155 refuted. 0 times theorem prover too weak. 1386 trivial. 0 not checked. [2018-11-23 10:33:20,360 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:21,022 INFO L273 TraceCheckUtils]: 192: Hoare triple {10595#false} assume !false; {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L273 TraceCheckUtils]: 191: Hoare triple {10595#false} assume 0bv32 == ~cond; {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L273 TraceCheckUtils]: 190: Hoare triple {10595#false} ~cond := #in~cond; {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L256 TraceCheckUtils]: 189: Hoare triple {10595#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L273 TraceCheckUtils]: 188: Hoare triple {10595#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L273 TraceCheckUtils]: 187: Hoare triple {10595#false} havoc ~x~0;~x~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L273 TraceCheckUtils]: 186: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,023 INFO L273 TraceCheckUtils]: 185: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 184: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 183: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 182: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 181: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 180: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 179: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,024 INFO L273 TraceCheckUtils]: 178: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 177: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 176: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 175: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 174: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 173: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 172: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 171: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,025 INFO L273 TraceCheckUtils]: 170: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 169: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 168: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 167: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 166: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 165: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 164: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 163: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,026 INFO L273 TraceCheckUtils]: 162: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 161: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 160: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 159: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 158: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 157: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 156: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 155: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 154: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,027 INFO L273 TraceCheckUtils]: 153: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 152: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 151: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 150: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 149: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 148: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 147: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 146: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,028 INFO L273 TraceCheckUtils]: 145: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 144: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 143: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 142: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 141: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 140: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 139: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 138: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,029 INFO L273 TraceCheckUtils]: 137: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 136: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 135: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 134: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 133: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 132: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 131: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 130: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 129: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,030 INFO L273 TraceCheckUtils]: 128: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 127: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 126: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 125: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 124: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 123: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 122: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,031 INFO L273 TraceCheckUtils]: 121: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,032 INFO L273 TraceCheckUtils]: 120: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,032 INFO L273 TraceCheckUtils]: 119: Hoare triple {10595#false} ~i~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:21,032 INFO L273 TraceCheckUtils]: 118: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,032 INFO L273 TraceCheckUtils]: 117: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,032 INFO L273 TraceCheckUtils]: 116: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,032 INFO L273 TraceCheckUtils]: 115: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,033 INFO L273 TraceCheckUtils]: 114: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,033 INFO L273 TraceCheckUtils]: 113: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,033 INFO L273 TraceCheckUtils]: 112: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,033 INFO L273 TraceCheckUtils]: 111: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,033 INFO L273 TraceCheckUtils]: 110: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 109: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 108: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 107: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 106: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 105: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 104: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,034 INFO L273 TraceCheckUtils]: 103: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,035 INFO L273 TraceCheckUtils]: 102: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,035 INFO L273 TraceCheckUtils]: 101: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,035 INFO L273 TraceCheckUtils]: 100: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,035 INFO L273 TraceCheckUtils]: 99: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,035 INFO L273 TraceCheckUtils]: 98: Hoare triple {10595#false} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:21,035 INFO L273 TraceCheckUtils]: 97: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,036 INFO L273 TraceCheckUtils]: 96: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,036 INFO L273 TraceCheckUtils]: 95: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,036 INFO L273 TraceCheckUtils]: 94: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,036 INFO L273 TraceCheckUtils]: 93: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,036 INFO L273 TraceCheckUtils]: 92: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,036 INFO L273 TraceCheckUtils]: 91: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,037 INFO L273 TraceCheckUtils]: 90: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,037 INFO L273 TraceCheckUtils]: 89: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,037 INFO L273 TraceCheckUtils]: 88: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,037 INFO L273 TraceCheckUtils]: 87: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,037 INFO L273 TraceCheckUtils]: 86: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,037 INFO L273 TraceCheckUtils]: 85: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,038 INFO L273 TraceCheckUtils]: 84: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,050 INFO L273 TraceCheckUtils]: 83: Hoare triple {11514#(not (= main_~z~0 main_~i~0))} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:21,051 INFO L273 TraceCheckUtils]: 82: Hoare triple {11514#(not (= main_~z~0 main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11514#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:33:21,052 INFO L273 TraceCheckUtils]: 81: Hoare triple {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11514#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:33:21,052 INFO L273 TraceCheckUtils]: 80: Hoare triple {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,055 INFO L273 TraceCheckUtils]: 79: Hoare triple {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,080 INFO L273 TraceCheckUtils]: 78: Hoare triple {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,080 INFO L273 TraceCheckUtils]: 77: Hoare triple {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,081 INFO L273 TraceCheckUtils]: 76: Hoare triple {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,107 INFO L273 TraceCheckUtils]: 75: Hoare triple {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,108 INFO L273 TraceCheckUtils]: 74: Hoare triple {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,108 INFO L273 TraceCheckUtils]: 73: Hoare triple {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,133 INFO L273 TraceCheckUtils]: 72: Hoare triple {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,133 INFO L273 TraceCheckUtils]: 71: Hoare triple {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,134 INFO L273 TraceCheckUtils]: 70: Hoare triple {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,161 INFO L273 TraceCheckUtils]: 69: Hoare triple {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,162 INFO L273 TraceCheckUtils]: 68: Hoare triple {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,162 INFO L273 TraceCheckUtils]: 67: Hoare triple {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,183 INFO L273 TraceCheckUtils]: 66: Hoare triple {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,184 INFO L273 TraceCheckUtils]: 65: Hoare triple {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,184 INFO L273 TraceCheckUtils]: 64: Hoare triple {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,204 INFO L273 TraceCheckUtils]: 63: Hoare triple {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,204 INFO L273 TraceCheckUtils]: 62: Hoare triple {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,205 INFO L273 TraceCheckUtils]: 61: Hoare triple {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,234 INFO L273 TraceCheckUtils]: 60: Hoare triple {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,235 INFO L273 TraceCheckUtils]: 59: Hoare triple {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,235 INFO L273 TraceCheckUtils]: 58: Hoare triple {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,251 INFO L273 TraceCheckUtils]: 57: Hoare triple {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,251 INFO L273 TraceCheckUtils]: 56: Hoare triple {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,252 INFO L273 TraceCheckUtils]: 55: Hoare triple {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,272 INFO L273 TraceCheckUtils]: 54: Hoare triple {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} is VALID [2018-11-23 10:33:21,272 INFO L273 TraceCheckUtils]: 53: Hoare triple {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,273 INFO L273 TraceCheckUtils]: 52: Hoare triple {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,273 INFO L273 TraceCheckUtils]: 51: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} ~i~0 := 0bv32; {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} is VALID [2018-11-23 10:33:21,273 INFO L273 TraceCheckUtils]: 50: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, 200000bv32); {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,274 INFO L273 TraceCheckUtils]: 49: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,274 INFO L273 TraceCheckUtils]: 48: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,274 INFO L273 TraceCheckUtils]: 47: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,275 INFO L273 TraceCheckUtils]: 46: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,275 INFO L273 TraceCheckUtils]: 45: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,276 INFO L273 TraceCheckUtils]: 44: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,276 INFO L273 TraceCheckUtils]: 43: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,277 INFO L273 TraceCheckUtils]: 42: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,277 INFO L273 TraceCheckUtils]: 41: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,278 INFO L273 TraceCheckUtils]: 40: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,278 INFO L273 TraceCheckUtils]: 39: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,279 INFO L273 TraceCheckUtils]: 38: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,280 INFO L273 TraceCheckUtils]: 37: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,280 INFO L273 TraceCheckUtils]: 36: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,281 INFO L273 TraceCheckUtils]: 35: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,281 INFO L273 TraceCheckUtils]: 34: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,282 INFO L273 TraceCheckUtils]: 33: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,282 INFO L273 TraceCheckUtils]: 32: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,283 INFO L273 TraceCheckUtils]: 31: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,283 INFO L273 TraceCheckUtils]: 30: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,284 INFO L273 TraceCheckUtils]: 29: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,284 INFO L273 TraceCheckUtils]: 28: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,285 INFO L273 TraceCheckUtils]: 27: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,285 INFO L273 TraceCheckUtils]: 26: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,286 INFO L273 TraceCheckUtils]: 25: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,286 INFO L273 TraceCheckUtils]: 24: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,287 INFO L273 TraceCheckUtils]: 23: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,287 INFO L273 TraceCheckUtils]: 22: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,288 INFO L273 TraceCheckUtils]: 21: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,288 INFO L273 TraceCheckUtils]: 20: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,289 INFO L273 TraceCheckUtils]: 19: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,289 INFO L273 TraceCheckUtils]: 18: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,290 INFO L273 TraceCheckUtils]: 17: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,291 INFO L273 TraceCheckUtils]: 16: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,291 INFO L273 TraceCheckUtils]: 15: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,292 INFO L273 TraceCheckUtils]: 14: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,292 INFO L273 TraceCheckUtils]: 13: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,293 INFO L273 TraceCheckUtils]: 12: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,293 INFO L273 TraceCheckUtils]: 11: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,294 INFO L273 TraceCheckUtils]: 10: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,294 INFO L273 TraceCheckUtils]: 9: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,295 INFO L273 TraceCheckUtils]: 8: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,295 INFO L273 TraceCheckUtils]: 7: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,296 INFO L273 TraceCheckUtils]: 6: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,297 INFO L273 TraceCheckUtils]: 5: Hoare triple {10594#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,297 INFO L256 TraceCheckUtils]: 4: Hoare triple {10594#true} call #t~ret12 := main(); {10594#true} is VALID [2018-11-23 10:33:21,297 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10594#true} {10594#true} #87#return; {10594#true} is VALID [2018-11-23 10:33:21,298 INFO L273 TraceCheckUtils]: 2: Hoare triple {10594#true} assume true; {10594#true} is VALID [2018-11-23 10:33:21,298 INFO L273 TraceCheckUtils]: 1: Hoare triple {10594#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10594#true} is VALID [2018-11-23 10:33:21,298 INFO L256 TraceCheckUtils]: 0: Hoare triple {10594#true} call ULTIMATE.init(); {10594#true} is VALID [2018-11-23 10:33:21,329 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 373 proven. 155 refuted. 0 times theorem prover too weak. 1386 trivial. 0 not checked. [2018-11-23 10:33:21,331 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:21,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-11-23 10:33:21,332 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 193 [2018-11-23 10:33:21,332 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:21,332 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states. [2018-11-23 10:33:21,679 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:21,680 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-23 10:33:21,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-23 10:33:21,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-11-23 10:33:21,681 INFO L87 Difference]: Start difference. First operand 366 states and 393 transitions. Second operand 26 states. [2018-11-23 10:33:33,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:33,035 INFO L93 Difference]: Finished difference Result 529 states and 599 transitions. [2018-11-23 10:33:33,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 10:33:33,035 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 193 [2018-11-23 10:33:33,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:33,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 10:33:33,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 264 transitions. [2018-11-23 10:33:33,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 10:33:33,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 264 transitions. [2018-11-23 10:33:33,043 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 264 transitions. [2018-11-23 10:33:33,933 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 264 edges. 264 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:33,940 INFO L225 Difference]: With dead ends: 529 [2018-11-23 10:33:33,940 INFO L226 Difference]: Without dead ends: 259 [2018-11-23 10:33:33,941 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 397 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=505, Invalid=901, Unknown=0, NotChecked=0, Total=1406 [2018-11-23 10:33:33,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-11-23 10:33:34,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 258. [2018-11-23 10:33:34,490 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:34,490 INFO L82 GeneralOperation]: Start isEquivalent. First operand 259 states. Second operand 258 states. [2018-11-23 10:33:34,491 INFO L74 IsIncluded]: Start isIncluded. First operand 259 states. Second operand 258 states. [2018-11-23 10:33:34,491 INFO L87 Difference]: Start difference. First operand 259 states. Second operand 258 states. [2018-11-23 10:33:34,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:34,498 INFO L93 Difference]: Finished difference Result 259 states and 274 transitions. [2018-11-23 10:33:34,498 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 274 transitions. [2018-11-23 10:33:34,498 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:34,499 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:34,499 INFO L74 IsIncluded]: Start isIncluded. First operand 258 states. Second operand 259 states. [2018-11-23 10:33:34,499 INFO L87 Difference]: Start difference. First operand 258 states. Second operand 259 states. [2018-11-23 10:33:34,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:34,505 INFO L93 Difference]: Finished difference Result 259 states and 274 transitions. [2018-11-23 10:33:34,505 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 274 transitions. [2018-11-23 10:33:34,506 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:34,506 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:34,506 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:34,506 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:34,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-11-23 10:33:34,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 273 transitions. [2018-11-23 10:33:34,513 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 273 transitions. Word has length 193 [2018-11-23 10:33:34,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:34,513 INFO L480 AbstractCegarLoop]: Abstraction has 258 states and 273 transitions. [2018-11-23 10:33:34,513 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-23 10:33:34,514 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 273 transitions. [2018-11-23 10:33:34,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-23 10:33:34,516 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:34,516 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:34,516 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:34,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:34,517 INFO L82 PathProgramCache]: Analyzing trace with hash 1072234232, now seen corresponding path program 4 times [2018-11-23 10:33:34,517 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:34,517 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:34,545 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:33:34,859 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:33:34,859 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:34,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:34,976 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:35,658 INFO L256 TraceCheckUtils]: 0: Hoare triple {13388#true} call ULTIMATE.init(); {13388#true} is VALID [2018-11-23 10:33:35,659 INFO L273 TraceCheckUtils]: 1: Hoare triple {13388#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {13388#true} is VALID [2018-11-23 10:33:35,659 INFO L273 TraceCheckUtils]: 2: Hoare triple {13388#true} assume true; {13388#true} is VALID [2018-11-23 10:33:35,659 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {13388#true} {13388#true} #87#return; {13388#true} is VALID [2018-11-23 10:33:35,660 INFO L256 TraceCheckUtils]: 4: Hoare triple {13388#true} call #t~ret12 := main(); {13388#true} is VALID [2018-11-23 10:33:35,660 INFO L273 TraceCheckUtils]: 5: Hoare triple {13388#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {13408#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:35,661 INFO L273 TraceCheckUtils]: 6: Hoare triple {13408#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13408#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:35,662 INFO L273 TraceCheckUtils]: 7: Hoare triple {13408#(= main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,662 INFO L273 TraceCheckUtils]: 8: Hoare triple {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,663 INFO L273 TraceCheckUtils]: 9: Hoare triple {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13422#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:35,663 INFO L273 TraceCheckUtils]: 10: Hoare triple {13422#(= (_ bv2 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13422#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:35,664 INFO L273 TraceCheckUtils]: 11: Hoare triple {13422#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,665 INFO L273 TraceCheckUtils]: 12: Hoare triple {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,665 INFO L273 TraceCheckUtils]: 13: Hoare triple {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13436#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:35,666 INFO L273 TraceCheckUtils]: 14: Hoare triple {13436#(= (_ bv4 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13436#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:35,667 INFO L273 TraceCheckUtils]: 15: Hoare triple {13436#(= (_ bv4 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,667 INFO L273 TraceCheckUtils]: 16: Hoare triple {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,668 INFO L273 TraceCheckUtils]: 17: Hoare triple {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13450#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:35,668 INFO L273 TraceCheckUtils]: 18: Hoare triple {13450#(= (_ bv6 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13450#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:35,669 INFO L273 TraceCheckUtils]: 19: Hoare triple {13450#(= (_ bv6 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,670 INFO L273 TraceCheckUtils]: 20: Hoare triple {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,671 INFO L273 TraceCheckUtils]: 21: Hoare triple {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13464#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:35,671 INFO L273 TraceCheckUtils]: 22: Hoare triple {13464#(= (_ bv8 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13464#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:35,672 INFO L273 TraceCheckUtils]: 23: Hoare triple {13464#(= (_ bv8 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,672 INFO L273 TraceCheckUtils]: 24: Hoare triple {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,673 INFO L273 TraceCheckUtils]: 25: Hoare triple {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13478#(= (_ bv10 32) main_~i~0)} is VALID [2018-11-23 10:33:35,673 INFO L273 TraceCheckUtils]: 26: Hoare triple {13478#(= (_ bv10 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13478#(= (_ bv10 32) main_~i~0)} is VALID [2018-11-23 10:33:35,674 INFO L273 TraceCheckUtils]: 27: Hoare triple {13478#(= (_ bv10 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,675 INFO L273 TraceCheckUtils]: 28: Hoare triple {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,675 INFO L273 TraceCheckUtils]: 29: Hoare triple {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13492#(= (_ bv12 32) main_~i~0)} is VALID [2018-11-23 10:33:35,676 INFO L273 TraceCheckUtils]: 30: Hoare triple {13492#(= (_ bv12 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13492#(= (_ bv12 32) main_~i~0)} is VALID [2018-11-23 10:33:35,677 INFO L273 TraceCheckUtils]: 31: Hoare triple {13492#(= (_ bv12 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,677 INFO L273 TraceCheckUtils]: 32: Hoare triple {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,678 INFO L273 TraceCheckUtils]: 33: Hoare triple {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13506#(= (_ bv14 32) main_~i~0)} is VALID [2018-11-23 10:33:35,678 INFO L273 TraceCheckUtils]: 34: Hoare triple {13506#(= (_ bv14 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13506#(= (_ bv14 32) main_~i~0)} is VALID [2018-11-23 10:33:35,679 INFO L273 TraceCheckUtils]: 35: Hoare triple {13506#(= (_ bv14 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,679 INFO L273 TraceCheckUtils]: 36: Hoare triple {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,680 INFO L273 TraceCheckUtils]: 37: Hoare triple {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13520#(= (_ bv16 32) main_~i~0)} is VALID [2018-11-23 10:33:35,681 INFO L273 TraceCheckUtils]: 38: Hoare triple {13520#(= (_ bv16 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13520#(= (_ bv16 32) main_~i~0)} is VALID [2018-11-23 10:33:35,682 INFO L273 TraceCheckUtils]: 39: Hoare triple {13520#(= (_ bv16 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,682 INFO L273 TraceCheckUtils]: 40: Hoare triple {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,683 INFO L273 TraceCheckUtils]: 41: Hoare triple {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13534#(= (_ bv18 32) main_~i~0)} is VALID [2018-11-23 10:33:35,683 INFO L273 TraceCheckUtils]: 42: Hoare triple {13534#(= (_ bv18 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13534#(= (_ bv18 32) main_~i~0)} is VALID [2018-11-23 10:33:35,684 INFO L273 TraceCheckUtils]: 43: Hoare triple {13534#(= (_ bv18 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,685 INFO L273 TraceCheckUtils]: 44: Hoare triple {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,685 INFO L273 TraceCheckUtils]: 45: Hoare triple {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13548#(= (_ bv20 32) main_~i~0)} is VALID [2018-11-23 10:33:35,686 INFO L273 TraceCheckUtils]: 46: Hoare triple {13548#(= (_ bv20 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13548#(= (_ bv20 32) main_~i~0)} is VALID [2018-11-23 10:33:35,687 INFO L273 TraceCheckUtils]: 47: Hoare triple {13548#(= (_ bv20 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,687 INFO L273 TraceCheckUtils]: 48: Hoare triple {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,688 INFO L273 TraceCheckUtils]: 49: Hoare triple {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13562#(= (bvadd main_~i~0 (_ bv4294967274 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:35,689 INFO L273 TraceCheckUtils]: 50: Hoare triple {13562#(= (bvadd main_~i~0 (_ bv4294967274 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,689 INFO L273 TraceCheckUtils]: 51: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:35,689 INFO L273 TraceCheckUtils]: 52: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,689 INFO L273 TraceCheckUtils]: 53: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,690 INFO L273 TraceCheckUtils]: 54: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,690 INFO L273 TraceCheckUtils]: 55: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,690 INFO L273 TraceCheckUtils]: 56: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,690 INFO L273 TraceCheckUtils]: 57: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,690 INFO L273 TraceCheckUtils]: 58: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,691 INFO L273 TraceCheckUtils]: 59: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,691 INFO L273 TraceCheckUtils]: 60: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,691 INFO L273 TraceCheckUtils]: 61: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,691 INFO L273 TraceCheckUtils]: 62: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,691 INFO L273 TraceCheckUtils]: 63: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,692 INFO L273 TraceCheckUtils]: 64: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,692 INFO L273 TraceCheckUtils]: 65: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,692 INFO L273 TraceCheckUtils]: 66: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,692 INFO L273 TraceCheckUtils]: 67: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,692 INFO L273 TraceCheckUtils]: 68: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,693 INFO L273 TraceCheckUtils]: 69: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,693 INFO L273 TraceCheckUtils]: 70: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,693 INFO L273 TraceCheckUtils]: 71: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,693 INFO L273 TraceCheckUtils]: 72: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,693 INFO L273 TraceCheckUtils]: 73: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,693 INFO L273 TraceCheckUtils]: 74: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 75: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 76: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 77: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 78: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 79: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 80: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 81: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,694 INFO L273 TraceCheckUtils]: 82: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 83: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 84: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 85: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 86: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 87: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 88: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 89: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 90: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,695 INFO L273 TraceCheckUtils]: 91: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 92: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 93: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 94: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 95: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 96: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 97: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 98: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,696 INFO L273 TraceCheckUtils]: 99: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 100: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 101: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 102: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 103: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 104: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 105: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 106: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 107: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,697 INFO L273 TraceCheckUtils]: 108: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 109: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 110: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 111: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 112: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 113: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 114: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 115: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,698 INFO L273 TraceCheckUtils]: 116: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 117: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 118: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 119: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 120: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 121: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 122: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 123: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 124: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,699 INFO L273 TraceCheckUtils]: 125: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 126: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 127: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 128: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 129: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 130: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 131: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 132: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,700 INFO L273 TraceCheckUtils]: 133: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 134: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 135: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 136: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 137: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 138: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 139: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 140: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 141: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,701 INFO L273 TraceCheckUtils]: 142: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 143: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 144: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 145: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 146: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 147: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 148: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 149: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,702 INFO L273 TraceCheckUtils]: 150: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 151: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 152: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 153: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 154: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 155: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 156: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 157: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 158: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,703 INFO L273 TraceCheckUtils]: 159: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 160: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 161: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 162: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 163: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 164: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 165: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 166: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,704 INFO L273 TraceCheckUtils]: 167: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 168: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 169: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 170: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 171: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 172: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 173: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 174: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 175: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,705 INFO L273 TraceCheckUtils]: 176: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 177: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 178: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 179: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 180: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 181: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 182: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 183: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,706 INFO L273 TraceCheckUtils]: 184: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 185: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 186: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 187: Hoare triple {13389#false} havoc ~x~0;~x~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 188: Hoare triple {13389#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L256 TraceCheckUtils]: 189: Hoare triple {13389#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 190: Hoare triple {13389#false} ~cond := #in~cond; {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 191: Hoare triple {13389#false} assume 0bv32 == ~cond; {13389#false} is VALID [2018-11-23 10:33:35,707 INFO L273 TraceCheckUtils]: 192: Hoare triple {13389#false} assume !false; {13389#false} is VALID [2018-11-23 10:33:35,727 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-11-23 10:33:35,727 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:37,698 INFO L273 TraceCheckUtils]: 192: Hoare triple {13389#false} assume !false; {13389#false} is VALID [2018-11-23 10:33:37,698 INFO L273 TraceCheckUtils]: 191: Hoare triple {13389#false} assume 0bv32 == ~cond; {13389#false} is VALID [2018-11-23 10:33:37,698 INFO L273 TraceCheckUtils]: 190: Hoare triple {13389#false} ~cond := #in~cond; {13389#false} is VALID [2018-11-23 10:33:37,698 INFO L256 TraceCheckUtils]: 189: Hoare triple {13389#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 188: Hoare triple {13389#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 187: Hoare triple {13389#false} havoc ~x~0;~x~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 186: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 185: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 184: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 183: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 182: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,699 INFO L273 TraceCheckUtils]: 181: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 180: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 179: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 178: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 177: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 176: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 175: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 174: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 173: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,700 INFO L273 TraceCheckUtils]: 172: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 171: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 170: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 169: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 168: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 167: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 166: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 165: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,701 INFO L273 TraceCheckUtils]: 164: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 163: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 162: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 161: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 160: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 159: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 158: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 157: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 156: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,702 INFO L273 TraceCheckUtils]: 155: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 154: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 153: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 152: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 151: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 150: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 149: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 148: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,703 INFO L273 TraceCheckUtils]: 147: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 146: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 145: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 144: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 143: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 142: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 141: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 140: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 139: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,704 INFO L273 TraceCheckUtils]: 138: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 137: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 136: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 135: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 134: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 133: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 132: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 131: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,705 INFO L273 TraceCheckUtils]: 130: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 129: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 128: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 127: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 126: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 125: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 124: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,706 INFO L273 TraceCheckUtils]: 123: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,707 INFO L273 TraceCheckUtils]: 122: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:37,707 INFO L273 TraceCheckUtils]: 121: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:37,707 INFO L273 TraceCheckUtils]: 120: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,707 INFO L273 TraceCheckUtils]: 119: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:37,707 INFO L273 TraceCheckUtils]: 118: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,707 INFO L273 TraceCheckUtils]: 117: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,708 INFO L273 TraceCheckUtils]: 116: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,708 INFO L273 TraceCheckUtils]: 115: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,708 INFO L273 TraceCheckUtils]: 114: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,708 INFO L273 TraceCheckUtils]: 113: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,708 INFO L273 TraceCheckUtils]: 112: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,708 INFO L273 TraceCheckUtils]: 111: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,709 INFO L273 TraceCheckUtils]: 110: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,709 INFO L273 TraceCheckUtils]: 109: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,709 INFO L273 TraceCheckUtils]: 108: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,709 INFO L273 TraceCheckUtils]: 107: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,709 INFO L273 TraceCheckUtils]: 106: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,709 INFO L273 TraceCheckUtils]: 105: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,710 INFO L273 TraceCheckUtils]: 104: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,710 INFO L273 TraceCheckUtils]: 103: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,710 INFO L273 TraceCheckUtils]: 102: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,710 INFO L273 TraceCheckUtils]: 101: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,710 INFO L273 TraceCheckUtils]: 100: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,710 INFO L273 TraceCheckUtils]: 99: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,711 INFO L273 TraceCheckUtils]: 98: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,711 INFO L273 TraceCheckUtils]: 97: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,711 INFO L273 TraceCheckUtils]: 96: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,711 INFO L273 TraceCheckUtils]: 95: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,711 INFO L273 TraceCheckUtils]: 94: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,711 INFO L273 TraceCheckUtils]: 93: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,712 INFO L273 TraceCheckUtils]: 92: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,712 INFO L273 TraceCheckUtils]: 91: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,712 INFO L273 TraceCheckUtils]: 90: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,712 INFO L273 TraceCheckUtils]: 89: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,712 INFO L273 TraceCheckUtils]: 88: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,712 INFO L273 TraceCheckUtils]: 87: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 86: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 85: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 84: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 83: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 82: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 81: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,713 INFO L273 TraceCheckUtils]: 80: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,714 INFO L273 TraceCheckUtils]: 79: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,714 INFO L273 TraceCheckUtils]: 78: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,714 INFO L273 TraceCheckUtils]: 77: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,714 INFO L273 TraceCheckUtils]: 76: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,714 INFO L273 TraceCheckUtils]: 75: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,714 INFO L273 TraceCheckUtils]: 74: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,715 INFO L273 TraceCheckUtils]: 73: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,715 INFO L273 TraceCheckUtils]: 72: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,715 INFO L273 TraceCheckUtils]: 71: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,715 INFO L273 TraceCheckUtils]: 70: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,715 INFO L273 TraceCheckUtils]: 69: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,715 INFO L273 TraceCheckUtils]: 68: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 67: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 66: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 65: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 64: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 63: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 62: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 61: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,716 INFO L273 TraceCheckUtils]: 60: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 59: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 58: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 57: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 56: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 55: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 54: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 53: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:37,717 INFO L273 TraceCheckUtils]: 52: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,718 INFO L273 TraceCheckUtils]: 51: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:37,719 INFO L273 TraceCheckUtils]: 50: Hoare triple {14418#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:37,719 INFO L273 TraceCheckUtils]: 49: Hoare triple {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14418#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:33:37,721 INFO L273 TraceCheckUtils]: 48: Hoare triple {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,726 INFO L273 TraceCheckUtils]: 47: Hoare triple {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,728 INFO L273 TraceCheckUtils]: 46: Hoare triple {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,733 INFO L273 TraceCheckUtils]: 45: Hoare triple {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,736 INFO L273 TraceCheckUtils]: 44: Hoare triple {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,741 INFO L273 TraceCheckUtils]: 43: Hoare triple {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,742 INFO L273 TraceCheckUtils]: 42: Hoare triple {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,746 INFO L273 TraceCheckUtils]: 41: Hoare triple {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,749 INFO L273 TraceCheckUtils]: 40: Hoare triple {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,754 INFO L273 TraceCheckUtils]: 39: Hoare triple {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,759 INFO L273 TraceCheckUtils]: 38: Hoare triple {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,766 INFO L273 TraceCheckUtils]: 37: Hoare triple {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,766 INFO L273 TraceCheckUtils]: 36: Hoare triple {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,772 INFO L273 TraceCheckUtils]: 35: Hoare triple {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,773 INFO L273 TraceCheckUtils]: 34: Hoare triple {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,777 INFO L273 TraceCheckUtils]: 33: Hoare triple {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,777 INFO L273 TraceCheckUtils]: 32: Hoare triple {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,785 INFO L273 TraceCheckUtils]: 31: Hoare triple {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,786 INFO L273 TraceCheckUtils]: 30: Hoare triple {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,791 INFO L273 TraceCheckUtils]: 29: Hoare triple {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,792 INFO L273 TraceCheckUtils]: 28: Hoare triple {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,801 INFO L273 TraceCheckUtils]: 27: Hoare triple {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,803 INFO L273 TraceCheckUtils]: 26: Hoare triple {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,808 INFO L273 TraceCheckUtils]: 25: Hoare triple {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,809 INFO L273 TraceCheckUtils]: 24: Hoare triple {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,813 INFO L273 TraceCheckUtils]: 23: Hoare triple {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,818 INFO L273 TraceCheckUtils]: 22: Hoare triple {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,822 INFO L273 TraceCheckUtils]: 21: Hoare triple {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,822 INFO L273 TraceCheckUtils]: 20: Hoare triple {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,826 INFO L273 TraceCheckUtils]: 19: Hoare triple {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,828 INFO L273 TraceCheckUtils]: 18: Hoare triple {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,834 INFO L273 TraceCheckUtils]: 17: Hoare triple {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,834 INFO L273 TraceCheckUtils]: 16: Hoare triple {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,840 INFO L273 TraceCheckUtils]: 15: Hoare triple {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,840 INFO L273 TraceCheckUtils]: 14: Hoare triple {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,846 INFO L273 TraceCheckUtils]: 13: Hoare triple {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,865 INFO L273 TraceCheckUtils]: 12: Hoare triple {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,885 INFO L273 TraceCheckUtils]: 11: Hoare triple {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,897 INFO L273 TraceCheckUtils]: 10: Hoare triple {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,905 INFO L273 TraceCheckUtils]: 9: Hoare triple {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,906 INFO L273 TraceCheckUtils]: 8: Hoare triple {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,913 INFO L273 TraceCheckUtils]: 7: Hoare triple {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,914 INFO L273 TraceCheckUtils]: 6: Hoare triple {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,915 INFO L273 TraceCheckUtils]: 5: Hoare triple {13388#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:37,915 INFO L256 TraceCheckUtils]: 4: Hoare triple {13388#true} call #t~ret12 := main(); {13388#true} is VALID [2018-11-23 10:33:37,915 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {13388#true} {13388#true} #87#return; {13388#true} is VALID [2018-11-23 10:33:37,915 INFO L273 TraceCheckUtils]: 2: Hoare triple {13388#true} assume true; {13388#true} is VALID [2018-11-23 10:33:37,915 INFO L273 TraceCheckUtils]: 1: Hoare triple {13388#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {13388#true} is VALID [2018-11-23 10:33:37,915 INFO L256 TraceCheckUtils]: 0: Hoare triple {13388#true} call ULTIMATE.init(); {13388#true} is VALID [2018-11-23 10:33:37,938 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-11-23 10:33:37,940 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:37,940 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-23 10:33:37,941 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 193 [2018-11-23 10:33:37,941 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:37,941 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states. [2018-11-23 10:33:38,277 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:38,278 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-23 10:33:38,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-23 10:33:38,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 10:33:38,279 INFO L87 Difference]: Start difference. First operand 258 states and 273 transitions. Second operand 48 states. [2018-11-23 10:33:54,663 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 7 [2018-11-23 10:33:55,136 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 7 [2018-11-23 10:33:55,664 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 7 [2018-11-23 10:33:56,260 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 7 [2018-11-23 10:33:56,837 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 7 [2018-11-23 10:33:57,425 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 7 [2018-11-23 10:33:57,991 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 7 [2018-11-23 10:34:31,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:31,062 INFO L93 Difference]: Finished difference Result 1747 states and 2054 transitions. [2018-11-23 10:34:31,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-23 10:34:31,063 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 193 [2018-11-23 10:34:31,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:34:31,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 10:34:31,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 536 transitions. [2018-11-23 10:34:31,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 10:34:31,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 536 transitions. [2018-11-23 10:34:31,084 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states and 536 transitions. [2018-11-23 10:34:32,443 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 536 edges. 536 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:34:32,547 INFO L225 Difference]: With dead ends: 1747 [2018-11-23 10:34:32,547 INFO L226 Difference]: Without dead ends: 1540 [2018-11-23 10:34:32,549 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 407 GetRequests, 339 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=1678, Invalid=3152, Unknown=0, NotChecked=0, Total=4830 [2018-11-23 10:34:32,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2018-11-23 10:34:38,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 1460. [2018-11-23 10:34:38,168 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:34:38,168 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1540 states. Second operand 1460 states. [2018-11-23 10:34:38,168 INFO L74 IsIncluded]: Start isIncluded. First operand 1540 states. Second operand 1460 states. [2018-11-23 10:34:38,169 INFO L87 Difference]: Start difference. First operand 1540 states. Second operand 1460 states. [2018-11-23 10:34:38,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:38,292 INFO L93 Difference]: Finished difference Result 1540 states and 1601 transitions. [2018-11-23 10:34:38,292 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 1601 transitions. [2018-11-23 10:34:38,296 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:34:38,296 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:34:38,296 INFO L74 IsIncluded]: Start isIncluded. First operand 1460 states. Second operand 1540 states. [2018-11-23 10:34:38,296 INFO L87 Difference]: Start difference. First operand 1460 states. Second operand 1540 states. [2018-11-23 10:34:38,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:38,435 INFO L93 Difference]: Finished difference Result 1540 states and 1601 transitions. [2018-11-23 10:34:38,435 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 1601 transitions. [2018-11-23 10:34:38,438 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:34:38,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:34:38,439 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:34:38,439 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:34:38,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1460 states. [2018-11-23 10:34:38,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1460 states to 1460 states and 1521 transitions. [2018-11-23 10:34:38,604 INFO L78 Accepts]: Start accepts. Automaton has 1460 states and 1521 transitions. Word has length 193 [2018-11-23 10:34:38,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:34:38,605 INFO L480 AbstractCegarLoop]: Abstraction has 1460 states and 1521 transitions. [2018-11-23 10:34:38,605 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-23 10:34:38,605 INFO L276 IsEmpty]: Start isEmpty. Operand 1460 states and 1521 transitions. [2018-11-23 10:34:38,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 386 [2018-11-23 10:34:38,613 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:34:38,614 INFO L402 BasicCegarLoop]: trace histogram [46, 46, 46, 46, 46, 46, 46, 44, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:34:38,614 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:34:38,614 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:34:38,614 INFO L82 PathProgramCache]: Analyzing trace with hash -1100538744, now seen corresponding path program 5 times [2018-11-23 10:34:38,619 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:34:38,620 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:34:38,646 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1