java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-programs/copysome2_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:32:41,025 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:32:41,027 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:32:41,046 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:32:41,046 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:32:41,047 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:32:41,049 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:32:41,052 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:32:41,054 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:32:41,055 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:32:41,063 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:32:41,063 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:32:41,064 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:32:41,067 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:32:41,069 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:32:41,070 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:32:41,071 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:32:41,073 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:32:41,075 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:32:41,077 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:32:41,079 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:32:41,080 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:32:41,082 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:32:41,083 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:32:41,083 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:32:41,084 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:32:41,085 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:32:41,086 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:32:41,087 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:32:41,090 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:32:41,090 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:32:41,091 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:32:41,091 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:32:41,091 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:32:41,093 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:32:41,095 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:32:41,095 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:32:41,121 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:32:41,122 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:32:41,125 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:32:41,126 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:32:41,126 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:32:41,127 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:32:41,127 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:32:41,127 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:32:41,127 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:32:41,128 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:32:41,129 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:32:41,129 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:32:41,129 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:32:41,129 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:32:41,129 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:32:41,130 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:32:41,130 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:32:41,130 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:32:41,131 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:32:41,131 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:32:41,131 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:32:41,132 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:32:41,132 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:32:41,132 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:32:41,132 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:32:41,132 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:32:41,133 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:32:41,133 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:32:41,133 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:32:41,133 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:32:41,134 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:32:41,134 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:32:41,134 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:32:41,189 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:32:41,203 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:32:41,208 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:32:41,210 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:32:41,210 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:32:41,211 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-programs/copysome2_true-unreach-call.i [2018-11-23 10:32:41,279 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8704d5723/76ed41887d5d48efa99a19d15a53e80d/FLAG2656ca940 [2018-11-23 10:32:41,719 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:32:41,719 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-programs/copysome2_true-unreach-call.i [2018-11-23 10:32:41,726 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8704d5723/76ed41887d5d48efa99a19d15a53e80d/FLAG2656ca940 [2018-11-23 10:32:42,071 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8704d5723/76ed41887d5d48efa99a19d15a53e80d [2018-11-23 10:32:42,079 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:32:42,081 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:32:42,082 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:32:42,082 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:32:42,086 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:32:42,087 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,090 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@62849221 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42, skipping insertion in model container [2018-11-23 10:32:42,090 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,101 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:32:42,125 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:32:42,375 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:32:42,382 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:32:42,422 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:32:42,449 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:32:42,449 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42 WrapperNode [2018-11-23 10:32:42,449 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:32:42,450 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:32:42,451 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:32:42,451 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:32:42,460 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,471 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,478 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:32:42,478 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:32:42,478 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:32:42,478 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:32:42,486 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,486 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,489 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,490 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,505 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,513 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,515 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... [2018-11-23 10:32:42,518 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:32:42,519 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:32:42,519 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:32:42,519 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:32:42,520 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:32:42,647 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:32:42,648 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:32:42,648 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:32:42,648 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:32:42,648 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:32:42,648 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:32:42,648 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:32:42,648 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:32:42,648 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:32:42,649 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:32:42,649 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:32:42,649 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:32:43,329 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:32:43,330 INFO L280 CfgBuilder]: Removed 4 assue(true) statements. [2018-11-23 10:32:43,330 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:32:43 BoogieIcfgContainer [2018-11-23 10:32:43,330 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:32:43,332 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:32:43,332 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:32:43,335 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:32:43,336 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:32:42" (1/3) ... [2018-11-23 10:32:43,337 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3287675e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:32:43, skipping insertion in model container [2018-11-23 10:32:43,337 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:32:42" (2/3) ... [2018-11-23 10:32:43,337 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3287675e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:32:43, skipping insertion in model container [2018-11-23 10:32:43,338 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:32:43" (3/3) ... [2018-11-23 10:32:43,339 INFO L112 eAbstractionObserver]: Analyzing ICFG copysome2_true-unreach-call.i [2018-11-23 10:32:43,349 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:32:43,357 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:32:43,373 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:32:43,412 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:32:43,413 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:32:43,413 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:32:43,413 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:32:43,415 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:32:43,415 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:32:43,415 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:32:43,415 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:32:43,416 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:32:43,433 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-11-23 10:32:43,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 10:32:43,439 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:43,441 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:43,443 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:43,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:43,449 INFO L82 PathProgramCache]: Analyzing trace with hash 696803616, now seen corresponding path program 1 times [2018-11-23 10:32:43,453 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:43,453 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:43,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:43,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:43,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:43,561 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:43,649 INFO L256 TraceCheckUtils]: 0: Hoare triple {35#true} call ULTIMATE.init(); {35#true} is VALID [2018-11-23 10:32:43,653 INFO L273 TraceCheckUtils]: 1: Hoare triple {35#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {35#true} is VALID [2018-11-23 10:32:43,653 INFO L273 TraceCheckUtils]: 2: Hoare triple {35#true} assume true; {35#true} is VALID [2018-11-23 10:32:43,654 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {35#true} {35#true} #87#return; {35#true} is VALID [2018-11-23 10:32:43,654 INFO L256 TraceCheckUtils]: 4: Hoare triple {35#true} call #t~ret12 := main(); {35#true} is VALID [2018-11-23 10:32:43,654 INFO L273 TraceCheckUtils]: 5: Hoare triple {35#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {35#true} is VALID [2018-11-23 10:32:43,657 INFO L273 TraceCheckUtils]: 6: Hoare triple {35#true} assume !true; {36#false} is VALID [2018-11-23 10:32:43,657 INFO L273 TraceCheckUtils]: 7: Hoare triple {36#false} ~i~0 := 0bv32; {36#false} is VALID [2018-11-23 10:32:43,657 INFO L273 TraceCheckUtils]: 8: Hoare triple {36#false} assume !true; {36#false} is VALID [2018-11-23 10:32:43,658 INFO L273 TraceCheckUtils]: 9: Hoare triple {36#false} ~i~0 := 0bv32; {36#false} is VALID [2018-11-23 10:32:43,658 INFO L273 TraceCheckUtils]: 10: Hoare triple {36#false} assume !true; {36#false} is VALID [2018-11-23 10:32:43,658 INFO L273 TraceCheckUtils]: 11: Hoare triple {36#false} havoc ~x~0;~x~0 := 0bv32; {36#false} is VALID [2018-11-23 10:32:43,659 INFO L273 TraceCheckUtils]: 12: Hoare triple {36#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {36#false} is VALID [2018-11-23 10:32:43,659 INFO L256 TraceCheckUtils]: 13: Hoare triple {36#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {36#false} is VALID [2018-11-23 10:32:43,660 INFO L273 TraceCheckUtils]: 14: Hoare triple {36#false} ~cond := #in~cond; {36#false} is VALID [2018-11-23 10:32:43,661 INFO L273 TraceCheckUtils]: 15: Hoare triple {36#false} assume 0bv32 == ~cond; {36#false} is VALID [2018-11-23 10:32:43,661 INFO L273 TraceCheckUtils]: 16: Hoare triple {36#false} assume !false; {36#false} is VALID [2018-11-23 10:32:43,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:43,665 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:43,670 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:43,670 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:32:43,677 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-23 10:32:43,681 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:43,685 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:32:43,911 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:43,911 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:32:43,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:32:43,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:32:43,925 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 2 states. [2018-11-23 10:32:44,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:44,061 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2018-11-23 10:32:44,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:32:44,061 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-23 10:32:44,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:44,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:32:44,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 75 transitions. [2018-11-23 10:32:44,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:32:44,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 75 transitions. [2018-11-23 10:32:44,081 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 75 transitions. [2018-11-23 10:32:44,373 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:44,383 INFO L225 Difference]: With dead ends: 56 [2018-11-23 10:32:44,383 INFO L226 Difference]: Without dead ends: 27 [2018-11-23 10:32:44,387 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:32:44,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-11-23 10:32:44,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-11-23 10:32:44,436 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:44,437 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:44,437 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:44,437 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:44,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:44,442 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2018-11-23 10:32:44,442 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2018-11-23 10:32:44,443 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:44,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:44,443 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:44,444 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 27 states. [2018-11-23 10:32:44,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:44,448 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2018-11-23 10:32:44,448 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2018-11-23 10:32:44,449 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:44,449 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:44,449 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:44,450 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:44,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 10:32:44,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 32 transitions. [2018-11-23 10:32:44,454 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 32 transitions. Word has length 17 [2018-11-23 10:32:44,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:44,455 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 32 transitions. [2018-11-23 10:32:44,455 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:32:44,455 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 32 transitions. [2018-11-23 10:32:44,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 10:32:44,456 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:44,457 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:44,457 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:44,457 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:44,457 INFO L82 PathProgramCache]: Analyzing trace with hash 123133892, now seen corresponding path program 1 times [2018-11-23 10:32:44,458 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:44,458 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:44,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:44,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:44,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:44,528 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:44,729 INFO L256 TraceCheckUtils]: 0: Hoare triple {249#true} call ULTIMATE.init(); {249#true} is VALID [2018-11-23 10:32:44,730 INFO L273 TraceCheckUtils]: 1: Hoare triple {249#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {249#true} is VALID [2018-11-23 10:32:44,730 INFO L273 TraceCheckUtils]: 2: Hoare triple {249#true} assume true; {249#true} is VALID [2018-11-23 10:32:44,731 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {249#true} {249#true} #87#return; {249#true} is VALID [2018-11-23 10:32:44,731 INFO L256 TraceCheckUtils]: 4: Hoare triple {249#true} call #t~ret12 := main(); {249#true} is VALID [2018-11-23 10:32:44,744 INFO L273 TraceCheckUtils]: 5: Hoare triple {249#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {269#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:44,757 INFO L273 TraceCheckUtils]: 6: Hoare triple {269#(= main_~i~0 (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {250#false} is VALID [2018-11-23 10:32:44,758 INFO L273 TraceCheckUtils]: 7: Hoare triple {250#false} ~i~0 := 0bv32; {250#false} is VALID [2018-11-23 10:32:44,759 INFO L273 TraceCheckUtils]: 8: Hoare triple {250#false} assume !~bvslt32(~i~0, 200000bv32); {250#false} is VALID [2018-11-23 10:32:44,759 INFO L273 TraceCheckUtils]: 9: Hoare triple {250#false} ~i~0 := 0bv32; {250#false} is VALID [2018-11-23 10:32:44,759 INFO L273 TraceCheckUtils]: 10: Hoare triple {250#false} assume !~bvslt32(~i~0, 200000bv32); {250#false} is VALID [2018-11-23 10:32:44,760 INFO L273 TraceCheckUtils]: 11: Hoare triple {250#false} havoc ~x~0;~x~0 := 0bv32; {250#false} is VALID [2018-11-23 10:32:44,760 INFO L273 TraceCheckUtils]: 12: Hoare triple {250#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {250#false} is VALID [2018-11-23 10:32:44,760 INFO L256 TraceCheckUtils]: 13: Hoare triple {250#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {250#false} is VALID [2018-11-23 10:32:44,761 INFO L273 TraceCheckUtils]: 14: Hoare triple {250#false} ~cond := #in~cond; {250#false} is VALID [2018-11-23 10:32:44,761 INFO L273 TraceCheckUtils]: 15: Hoare triple {250#false} assume 0bv32 == ~cond; {250#false} is VALID [2018-11-23 10:32:44,761 INFO L273 TraceCheckUtils]: 16: Hoare triple {250#false} assume !false; {250#false} is VALID [2018-11-23 10:32:44,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:32:44,763 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:44,767 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:44,767 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:32:44,770 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-23 10:32:44,771 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:44,771 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:32:44,956 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:44,957 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:32:44,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:32:44,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:44,958 INFO L87 Difference]: Start difference. First operand 27 states and 32 transitions. Second operand 3 states. [2018-11-23 10:32:45,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:45,303 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2018-11-23 10:32:45,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:32:45,303 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-23 10:32:45,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:45,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:45,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 68 transitions. [2018-11-23 10:32:45,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:32:45,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 68 transitions. [2018-11-23 10:32:45,311 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 68 transitions. [2018-11-23 10:32:45,510 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:45,512 INFO L225 Difference]: With dead ends: 54 [2018-11-23 10:32:45,512 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 10:32:45,513 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:32:45,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 10:32:45,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 30. [2018-11-23 10:32:45,527 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:45,527 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 30 states. [2018-11-23 10:32:45,527 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 30 states. [2018-11-23 10:32:45,528 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 30 states. [2018-11-23 10:32:45,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:45,531 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2018-11-23 10:32:45,532 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2018-11-23 10:32:45,532 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:45,533 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:45,533 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 35 states. [2018-11-23 10:32:45,533 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 35 states. [2018-11-23 10:32:45,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:45,536 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2018-11-23 10:32:45,536 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 42 transitions. [2018-11-23 10:32:45,537 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:45,537 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:45,537 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:45,538 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:45,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 10:32:45,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 35 transitions. [2018-11-23 10:32:45,540 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 35 transitions. Word has length 17 [2018-11-23 10:32:45,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:45,541 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 35 transitions. [2018-11-23 10:32:45,541 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:32:45,541 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 35 transitions. [2018-11-23 10:32:45,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 10:32:45,542 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:45,542 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:45,543 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:45,543 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:45,543 INFO L82 PathProgramCache]: Analyzing trace with hash -204061721, now seen corresponding path program 1 times [2018-11-23 10:32:45,544 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:45,544 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:45,562 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:45,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:45,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:45,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:45,742 INFO L256 TraceCheckUtils]: 0: Hoare triple {487#true} call ULTIMATE.init(); {487#true} is VALID [2018-11-23 10:32:45,743 INFO L273 TraceCheckUtils]: 1: Hoare triple {487#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {487#true} is VALID [2018-11-23 10:32:45,743 INFO L273 TraceCheckUtils]: 2: Hoare triple {487#true} assume true; {487#true} is VALID [2018-11-23 10:32:45,744 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {487#true} {487#true} #87#return; {487#true} is VALID [2018-11-23 10:32:45,744 INFO L256 TraceCheckUtils]: 4: Hoare triple {487#true} call #t~ret12 := main(); {487#true} is VALID [2018-11-23 10:32:45,745 INFO L273 TraceCheckUtils]: 5: Hoare triple {487#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:45,746 INFO L273 TraceCheckUtils]: 6: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:45,751 INFO L273 TraceCheckUtils]: 7: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:45,751 INFO L273 TraceCheckUtils]: 8: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:45,752 INFO L273 TraceCheckUtils]: 9: Hoare triple {507#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:45,753 INFO L273 TraceCheckUtils]: 10: Hoare triple {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:45,754 INFO L273 TraceCheckUtils]: 11: Hoare triple {520#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !(~i~0 != ~z~0); {488#false} is VALID [2018-11-23 10:32:45,754 INFO L273 TraceCheckUtils]: 12: Hoare triple {488#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {488#false} is VALID [2018-11-23 10:32:45,755 INFO L273 TraceCheckUtils]: 13: Hoare triple {488#false} assume !~bvslt32(~i~0, 200000bv32); {488#false} is VALID [2018-11-23 10:32:45,755 INFO L273 TraceCheckUtils]: 14: Hoare triple {488#false} ~i~0 := 0bv32; {488#false} is VALID [2018-11-23 10:32:45,755 INFO L273 TraceCheckUtils]: 15: Hoare triple {488#false} assume !!~bvslt32(~i~0, 200000bv32); {488#false} is VALID [2018-11-23 10:32:45,756 INFO L273 TraceCheckUtils]: 16: Hoare triple {488#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {488#false} is VALID [2018-11-23 10:32:45,756 INFO L273 TraceCheckUtils]: 17: Hoare triple {488#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {488#false} is VALID [2018-11-23 10:32:45,757 INFO L273 TraceCheckUtils]: 18: Hoare triple {488#false} assume !~bvslt32(~i~0, 200000bv32); {488#false} is VALID [2018-11-23 10:32:45,757 INFO L273 TraceCheckUtils]: 19: Hoare triple {488#false} havoc ~x~0;~x~0 := 0bv32; {488#false} is VALID [2018-11-23 10:32:45,758 INFO L273 TraceCheckUtils]: 20: Hoare triple {488#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {488#false} is VALID [2018-11-23 10:32:45,758 INFO L256 TraceCheckUtils]: 21: Hoare triple {488#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {488#false} is VALID [2018-11-23 10:32:45,759 INFO L273 TraceCheckUtils]: 22: Hoare triple {488#false} ~cond := #in~cond; {488#false} is VALID [2018-11-23 10:32:45,759 INFO L273 TraceCheckUtils]: 23: Hoare triple {488#false} assume 0bv32 == ~cond; {488#false} is VALID [2018-11-23 10:32:45,759 INFO L273 TraceCheckUtils]: 24: Hoare triple {488#false} assume !false; {488#false} is VALID [2018-11-23 10:32:45,761 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:32:45,762 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:32:45,763 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:32:45,763 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:32:45,764 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-11-23 10:32:45,764 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:45,764 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:32:45,878 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:45,878 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:32:45,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:32:45,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:32:45,879 INFO L87 Difference]: Start difference. First operand 30 states and 35 transitions. Second operand 4 states. [2018-11-23 10:32:46,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:46,293 INFO L93 Difference]: Finished difference Result 54 states and 65 transitions. [2018-11-23 10:32:46,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:32:46,294 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-11-23 10:32:46,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:46,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:32:46,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 64 transitions. [2018-11-23 10:32:46,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:32:46,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 64 transitions. [2018-11-23 10:32:46,301 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 64 transitions. [2018-11-23 10:32:46,429 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 64 edges. 64 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:46,432 INFO L225 Difference]: With dead ends: 54 [2018-11-23 10:32:46,432 INFO L226 Difference]: Without dead ends: 35 [2018-11-23 10:32:46,433 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:32:46,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-11-23 10:32:46,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 32. [2018-11-23 10:32:46,479 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:46,479 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35 states. Second operand 32 states. [2018-11-23 10:32:46,480 INFO L74 IsIncluded]: Start isIncluded. First operand 35 states. Second operand 32 states. [2018-11-23 10:32:46,480 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 32 states. [2018-11-23 10:32:46,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:46,483 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2018-11-23 10:32:46,483 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 40 transitions. [2018-11-23 10:32:46,483 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:46,484 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:46,484 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand 35 states. [2018-11-23 10:32:46,484 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 35 states. [2018-11-23 10:32:46,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:46,487 INFO L93 Difference]: Finished difference Result 35 states and 40 transitions. [2018-11-23 10:32:46,487 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 40 transitions. [2018-11-23 10:32:46,487 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:46,487 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:46,488 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:46,488 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:46,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-11-23 10:32:46,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 37 transitions. [2018-11-23 10:32:46,490 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 37 transitions. Word has length 25 [2018-11-23 10:32:46,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:46,490 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 37 transitions. [2018-11-23 10:32:46,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:32:46,491 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 37 transitions. [2018-11-23 10:32:46,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 10:32:46,492 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:46,492 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:46,492 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:46,492 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:46,493 INFO L82 PathProgramCache]: Analyzing trace with hash 807055529, now seen corresponding path program 1 times [2018-11-23 10:32:46,493 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:46,493 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:46,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:46,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:46,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:46,560 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:46,657 INFO L256 TraceCheckUtils]: 0: Hoare triple {753#true} call ULTIMATE.init(); {753#true} is VALID [2018-11-23 10:32:46,657 INFO L273 TraceCheckUtils]: 1: Hoare triple {753#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {753#true} is VALID [2018-11-23 10:32:46,658 INFO L273 TraceCheckUtils]: 2: Hoare triple {753#true} assume true; {753#true} is VALID [2018-11-23 10:32:46,658 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {753#true} {753#true} #87#return; {753#true} is VALID [2018-11-23 10:32:46,658 INFO L256 TraceCheckUtils]: 4: Hoare triple {753#true} call #t~ret12 := main(); {753#true} is VALID [2018-11-23 10:32:46,661 INFO L273 TraceCheckUtils]: 5: Hoare triple {753#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {773#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:46,664 INFO L273 TraceCheckUtils]: 6: Hoare triple {773#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {773#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:46,665 INFO L273 TraceCheckUtils]: 7: Hoare triple {773#(= main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {780#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:46,666 INFO L273 TraceCheckUtils]: 8: Hoare triple {780#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,666 INFO L273 TraceCheckUtils]: 9: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:46,666 INFO L273 TraceCheckUtils]: 10: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,667 INFO L273 TraceCheckUtils]: 11: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {754#false} is VALID [2018-11-23 10:32:46,667 INFO L273 TraceCheckUtils]: 12: Hoare triple {754#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {754#false} is VALID [2018-11-23 10:32:46,668 INFO L273 TraceCheckUtils]: 13: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,668 INFO L273 TraceCheckUtils]: 14: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:46,668 INFO L273 TraceCheckUtils]: 15: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,669 INFO L273 TraceCheckUtils]: 16: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {754#false} is VALID [2018-11-23 10:32:46,669 INFO L273 TraceCheckUtils]: 17: Hoare triple {754#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {754#false} is VALID [2018-11-23 10:32:46,670 INFO L273 TraceCheckUtils]: 18: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,670 INFO L273 TraceCheckUtils]: 19: Hoare triple {754#false} havoc ~x~0;~x~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:46,670 INFO L273 TraceCheckUtils]: 20: Hoare triple {754#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {754#false} is VALID [2018-11-23 10:32:46,671 INFO L256 TraceCheckUtils]: 21: Hoare triple {754#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {754#false} is VALID [2018-11-23 10:32:46,671 INFO L273 TraceCheckUtils]: 22: Hoare triple {754#false} ~cond := #in~cond; {754#false} is VALID [2018-11-23 10:32:46,671 INFO L273 TraceCheckUtils]: 23: Hoare triple {754#false} assume 0bv32 == ~cond; {754#false} is VALID [2018-11-23 10:32:46,671 INFO L273 TraceCheckUtils]: 24: Hoare triple {754#false} assume !false; {754#false} is VALID [2018-11-23 10:32:46,673 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:32:46,673 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:46,803 INFO L273 TraceCheckUtils]: 24: Hoare triple {754#false} assume !false; {754#false} is VALID [2018-11-23 10:32:46,803 INFO L273 TraceCheckUtils]: 23: Hoare triple {754#false} assume 0bv32 == ~cond; {754#false} is VALID [2018-11-23 10:32:46,804 INFO L273 TraceCheckUtils]: 22: Hoare triple {754#false} ~cond := #in~cond; {754#false} is VALID [2018-11-23 10:32:46,804 INFO L256 TraceCheckUtils]: 21: Hoare triple {754#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {754#false} is VALID [2018-11-23 10:32:46,804 INFO L273 TraceCheckUtils]: 20: Hoare triple {754#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {754#false} is VALID [2018-11-23 10:32:46,804 INFO L273 TraceCheckUtils]: 19: Hoare triple {754#false} havoc ~x~0;~x~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:46,805 INFO L273 TraceCheckUtils]: 18: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,805 INFO L273 TraceCheckUtils]: 17: Hoare triple {754#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {754#false} is VALID [2018-11-23 10:32:46,805 INFO L273 TraceCheckUtils]: 16: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {754#false} is VALID [2018-11-23 10:32:46,805 INFO L273 TraceCheckUtils]: 15: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,806 INFO L273 TraceCheckUtils]: 14: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:46,806 INFO L273 TraceCheckUtils]: 13: Hoare triple {754#false} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,806 INFO L273 TraceCheckUtils]: 12: Hoare triple {754#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {754#false} is VALID [2018-11-23 10:32:46,806 INFO L273 TraceCheckUtils]: 11: Hoare triple {754#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {754#false} is VALID [2018-11-23 10:32:46,807 INFO L273 TraceCheckUtils]: 10: Hoare triple {754#false} assume !!~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,807 INFO L273 TraceCheckUtils]: 9: Hoare triple {754#false} ~i~0 := 0bv32; {754#false} is VALID [2018-11-23 10:32:46,812 INFO L273 TraceCheckUtils]: 8: Hoare triple {880#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {754#false} is VALID [2018-11-23 10:32:46,814 INFO L273 TraceCheckUtils]: 7: Hoare triple {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {880#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:32:46,814 INFO L273 TraceCheckUtils]: 6: Hoare triple {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:46,816 INFO L273 TraceCheckUtils]: 5: Hoare triple {753#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {884#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:46,816 INFO L256 TraceCheckUtils]: 4: Hoare triple {753#true} call #t~ret12 := main(); {753#true} is VALID [2018-11-23 10:32:46,816 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {753#true} {753#true} #87#return; {753#true} is VALID [2018-11-23 10:32:46,817 INFO L273 TraceCheckUtils]: 2: Hoare triple {753#true} assume true; {753#true} is VALID [2018-11-23 10:32:46,817 INFO L273 TraceCheckUtils]: 1: Hoare triple {753#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {753#true} is VALID [2018-11-23 10:32:46,817 INFO L256 TraceCheckUtils]: 0: Hoare triple {753#true} call ULTIMATE.init(); {753#true} is VALID [2018-11-23 10:32:46,819 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (5)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 10:32:46,823 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:46,823 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 10:32:46,824 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-11-23 10:32:46,824 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:46,824 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 10:32:46,882 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:46,882 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:32:46,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:32:46,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:32:46,883 INFO L87 Difference]: Start difference. First operand 32 states and 37 transitions. Second operand 6 states. [2018-11-23 10:32:47,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:47,570 INFO L93 Difference]: Finished difference Result 77 states and 99 transitions. [2018-11-23 10:32:47,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:32:47,571 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-11-23 10:32:47,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:47,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:32:47,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 95 transitions. [2018-11-23 10:32:47,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 10:32:47,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 95 transitions. [2018-11-23 10:32:47,578 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 95 transitions. [2018-11-23 10:32:47,789 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:47,791 INFO L225 Difference]: With dead ends: 77 [2018-11-23 10:32:47,791 INFO L226 Difference]: Without dead ends: 54 [2018-11-23 10:32:47,792 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:32:47,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-11-23 10:32:47,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-11-23 10:32:47,886 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:47,886 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:47,886 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:47,886 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:47,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:47,889 INFO L93 Difference]: Finished difference Result 54 states and 63 transitions. [2018-11-23 10:32:47,890 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 63 transitions. [2018-11-23 10:32:47,890 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:47,890 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:47,891 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:47,891 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 54 states. [2018-11-23 10:32:47,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:47,894 INFO L93 Difference]: Finished difference Result 54 states and 63 transitions. [2018-11-23 10:32:47,894 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 63 transitions. [2018-11-23 10:32:47,895 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:47,895 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:47,895 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:47,895 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:47,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-11-23 10:32:47,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 63 transitions. [2018-11-23 10:32:47,898 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 63 transitions. Word has length 25 [2018-11-23 10:32:47,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:47,899 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 63 transitions. [2018-11-23 10:32:47,899 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:32:47,899 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 63 transitions. [2018-11-23 10:32:47,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 10:32:47,901 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:47,901 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:47,901 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:47,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:47,902 INFO L82 PathProgramCache]: Analyzing trace with hash -763048002, now seen corresponding path program 1 times [2018-11-23 10:32:47,902 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:47,903 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:47,931 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:32:47,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:48,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:48,014 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:48,156 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-23 10:32:48,156 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-23 10:32:48,157 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-23 10:32:48,157 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-23 10:32:48,157 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret12 := main(); {1200#true} is VALID [2018-11-23 10:32:48,159 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,159 INFO L273 TraceCheckUtils]: 6: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,160 INFO L273 TraceCheckUtils]: 7: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,160 INFO L273 TraceCheckUtils]: 8: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,161 INFO L273 TraceCheckUtils]: 9: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,162 INFO L273 TraceCheckUtils]: 10: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,163 INFO L273 TraceCheckUtils]: 11: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,178 INFO L273 TraceCheckUtils]: 12: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,179 INFO L273 TraceCheckUtils]: 13: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,183 INFO L273 TraceCheckUtils]: 14: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:48,184 INFO L273 TraceCheckUtils]: 15: Hoare triple {1220#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,185 INFO L273 TraceCheckUtils]: 16: Hoare triple {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,186 INFO L273 TraceCheckUtils]: 17: Hoare triple {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,187 INFO L273 TraceCheckUtils]: 18: Hoare triple {1251#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,192 INFO L273 TraceCheckUtils]: 19: Hoare triple {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,193 INFO L273 TraceCheckUtils]: 20: Hoare triple {1261#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:48,193 INFO L273 TraceCheckUtils]: 21: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:48,194 INFO L273 TraceCheckUtils]: 22: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,194 INFO L273 TraceCheckUtils]: 23: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:48,194 INFO L273 TraceCheckUtils]: 24: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:48,194 INFO L273 TraceCheckUtils]: 25: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,194 INFO L273 TraceCheckUtils]: 26: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:48,195 INFO L273 TraceCheckUtils]: 27: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:48,195 INFO L273 TraceCheckUtils]: 28: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,195 INFO L273 TraceCheckUtils]: 29: Hoare triple {1201#false} ~i~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:48,195 INFO L273 TraceCheckUtils]: 30: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,195 INFO L273 TraceCheckUtils]: 31: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,196 INFO L273 TraceCheckUtils]: 32: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,196 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,196 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,196 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,196 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,197 INFO L273 TraceCheckUtils]: 37: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,197 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,197 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,197 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,198 INFO L273 TraceCheckUtils]: 41: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,198 INFO L273 TraceCheckUtils]: 42: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,198 INFO L273 TraceCheckUtils]: 43: Hoare triple {1201#false} havoc ~x~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:48,198 INFO L273 TraceCheckUtils]: 44: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1201#false} is VALID [2018-11-23 10:32:48,198 INFO L256 TraceCheckUtils]: 45: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-23 10:32:48,199 INFO L273 TraceCheckUtils]: 46: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-23 10:32:48,199 INFO L273 TraceCheckUtils]: 47: Hoare triple {1201#false} assume 0bv32 == ~cond; {1201#false} is VALID [2018-11-23 10:32:48,199 INFO L273 TraceCheckUtils]: 48: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-23 10:32:48,204 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-23 10:32:48,205 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:48,362 INFO L273 TraceCheckUtils]: 48: Hoare triple {1201#false} assume !false; {1201#false} is VALID [2018-11-23 10:32:48,362 INFO L273 TraceCheckUtils]: 47: Hoare triple {1201#false} assume 0bv32 == ~cond; {1201#false} is VALID [2018-11-23 10:32:48,363 INFO L273 TraceCheckUtils]: 46: Hoare triple {1201#false} ~cond := #in~cond; {1201#false} is VALID [2018-11-23 10:32:48,363 INFO L256 TraceCheckUtils]: 45: Hoare triple {1201#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1201#false} is VALID [2018-11-23 10:32:48,363 INFO L273 TraceCheckUtils]: 44: Hoare triple {1201#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1201#false} is VALID [2018-11-23 10:32:48,364 INFO L273 TraceCheckUtils]: 43: Hoare triple {1201#false} havoc ~x~0;~x~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:48,364 INFO L273 TraceCheckUtils]: 42: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,364 INFO L273 TraceCheckUtils]: 41: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,364 INFO L273 TraceCheckUtils]: 40: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,365 INFO L273 TraceCheckUtils]: 39: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,365 INFO L273 TraceCheckUtils]: 38: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,365 INFO L273 TraceCheckUtils]: 37: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,365 INFO L273 TraceCheckUtils]: 36: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,366 INFO L273 TraceCheckUtils]: 35: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,366 INFO L273 TraceCheckUtils]: 34: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,366 INFO L273 TraceCheckUtils]: 33: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,366 INFO L273 TraceCheckUtils]: 32: Hoare triple {1201#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1201#false} is VALID [2018-11-23 10:32:48,366 INFO L273 TraceCheckUtils]: 31: Hoare triple {1201#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1201#false} is VALID [2018-11-23 10:32:48,367 INFO L273 TraceCheckUtils]: 30: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,367 INFO L273 TraceCheckUtils]: 29: Hoare triple {1201#false} ~i~0 := 0bv32; {1201#false} is VALID [2018-11-23 10:32:48,367 INFO L273 TraceCheckUtils]: 28: Hoare triple {1201#false} assume !~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,367 INFO L273 TraceCheckUtils]: 27: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:48,367 INFO L273 TraceCheckUtils]: 26: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:48,368 INFO L273 TraceCheckUtils]: 25: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,368 INFO L273 TraceCheckUtils]: 24: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:48,368 INFO L273 TraceCheckUtils]: 23: Hoare triple {1201#false} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:48,368 INFO L273 TraceCheckUtils]: 22: Hoare triple {1201#false} assume !!~bvslt32(~i~0, 200000bv32); {1201#false} is VALID [2018-11-23 10:32:48,368 INFO L273 TraceCheckUtils]: 21: Hoare triple {1201#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1201#false} is VALID [2018-11-23 10:32:48,369 INFO L273 TraceCheckUtils]: 20: Hoare triple {1436#(not (= main_~z~0 main_~i~0))} assume !(~i~0 != ~z~0); {1201#false} is VALID [2018-11-23 10:32:48,369 INFO L273 TraceCheckUtils]: 19: Hoare triple {1436#(not (= main_~z~0 main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {1436#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:48,370 INFO L273 TraceCheckUtils]: 18: Hoare triple {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1436#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:48,370 INFO L273 TraceCheckUtils]: 17: Hoare triple {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:48,371 INFO L273 TraceCheckUtils]: 16: Hoare triple {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:48,371 INFO L273 TraceCheckUtils]: 15: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} ~i~0 := 0bv32; {1443#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:48,373 INFO L273 TraceCheckUtils]: 14: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, 200000bv32); {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,374 INFO L273 TraceCheckUtils]: 13: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,374 INFO L273 TraceCheckUtils]: 12: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,375 INFO L273 TraceCheckUtils]: 11: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,376 INFO L273 TraceCheckUtils]: 10: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,376 INFO L273 TraceCheckUtils]: 9: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,377 INFO L273 TraceCheckUtils]: 8: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,377 INFO L273 TraceCheckUtils]: 7: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,378 INFO L273 TraceCheckUtils]: 6: Hoare triple {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,379 INFO L273 TraceCheckUtils]: 5: Hoare triple {1200#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {1453#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:48,380 INFO L256 TraceCheckUtils]: 4: Hoare triple {1200#true} call #t~ret12 := main(); {1200#true} is VALID [2018-11-23 10:32:48,380 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1200#true} {1200#true} #87#return; {1200#true} is VALID [2018-11-23 10:32:48,381 INFO L273 TraceCheckUtils]: 2: Hoare triple {1200#true} assume true; {1200#true} is VALID [2018-11-23 10:32:48,381 INFO L273 TraceCheckUtils]: 1: Hoare triple {1200#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1200#true} is VALID [2018-11-23 10:32:48,382 INFO L256 TraceCheckUtils]: 0: Hoare triple {1200#true} call ULTIMATE.init(); {1200#true} is VALID [2018-11-23 10:32:48,387 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-11-23 10:32:48,394 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:48,394 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-23 10:32:48,395 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-11-23 10:32:48,395 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:48,395 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 10:32:48,487 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:48,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 10:32:48,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 10:32:48,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 10:32:48,488 INFO L87 Difference]: Start difference. First operand 54 states and 63 transitions. Second operand 8 states. [2018-11-23 10:32:49,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:49,262 INFO L93 Difference]: Finished difference Result 94 states and 114 transitions. [2018-11-23 10:32:49,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 10:32:49,263 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-11-23 10:32:49,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:49,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 10:32:49,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 94 transitions. [2018-11-23 10:32:49,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 10:32:49,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 94 transitions. [2018-11-23 10:32:49,269 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 94 transitions. [2018-11-23 10:32:49,503 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:49,505 INFO L225 Difference]: With dead ends: 94 [2018-11-23 10:32:49,505 INFO L226 Difference]: Without dead ends: 61 [2018-11-23 10:32:49,506 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=64, Unknown=0, NotChecked=0, Total=110 [2018-11-23 10:32:49,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-11-23 10:32:49,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2018-11-23 10:32:49,566 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:49,566 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand 60 states. [2018-11-23 10:32:49,567 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 60 states. [2018-11-23 10:32:49,567 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 60 states. [2018-11-23 10:32:49,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:49,571 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2018-11-23 10:32:49,571 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2018-11-23 10:32:49,572 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:49,572 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:49,572 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand 61 states. [2018-11-23 10:32:49,572 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 61 states. [2018-11-23 10:32:49,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:49,575 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2018-11-23 10:32:49,575 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2018-11-23 10:32:49,576 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:49,576 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:49,576 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:49,577 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:49,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-11-23 10:32:49,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 67 transitions. [2018-11-23 10:32:49,580 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 67 transitions. Word has length 49 [2018-11-23 10:32:49,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:49,580 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 67 transitions. [2018-11-23 10:32:49,580 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 10:32:49,580 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 67 transitions. [2018-11-23 10:32:49,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 10:32:49,582 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:49,582 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:49,582 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:49,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:49,583 INFO L82 PathProgramCache]: Analyzing trace with hash -405852676, now seen corresponding path program 2 times [2018-11-23 10:32:49,583 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:49,583 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:49,609 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:32:49,691 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:32:49,691 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:49,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:49,716 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:49,826 INFO L256 TraceCheckUtils]: 0: Hoare triple {1842#true} call ULTIMATE.init(); {1842#true} is VALID [2018-11-23 10:32:49,827 INFO L273 TraceCheckUtils]: 1: Hoare triple {1842#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1842#true} is VALID [2018-11-23 10:32:49,827 INFO L273 TraceCheckUtils]: 2: Hoare triple {1842#true} assume true; {1842#true} is VALID [2018-11-23 10:32:49,827 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1842#true} {1842#true} #87#return; {1842#true} is VALID [2018-11-23 10:32:49,827 INFO L256 TraceCheckUtils]: 4: Hoare triple {1842#true} call #t~ret12 := main(); {1842#true} is VALID [2018-11-23 10:32:49,845 INFO L273 TraceCheckUtils]: 5: Hoare triple {1842#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {1862#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:49,861 INFO L273 TraceCheckUtils]: 6: Hoare triple {1862#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1862#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:32:49,870 INFO L273 TraceCheckUtils]: 7: Hoare triple {1862#(= main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:49,883 INFO L273 TraceCheckUtils]: 8: Hoare triple {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:49,886 INFO L273 TraceCheckUtils]: 9: Hoare triple {1869#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1876#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:49,886 INFO L273 TraceCheckUtils]: 10: Hoare triple {1876#(= (_ bv2 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1876#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:32:49,887 INFO L273 TraceCheckUtils]: 11: Hoare triple {1876#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:49,888 INFO L273 TraceCheckUtils]: 12: Hoare triple {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:49,888 INFO L273 TraceCheckUtils]: 13: Hoare triple {1883#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1890#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:32:49,889 INFO L273 TraceCheckUtils]: 14: Hoare triple {1890#(= (_ bv4 32) main_~i~0)} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,889 INFO L273 TraceCheckUtils]: 15: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:49,890 INFO L273 TraceCheckUtils]: 16: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,890 INFO L273 TraceCheckUtils]: 17: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:49,891 INFO L273 TraceCheckUtils]: 18: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:49,891 INFO L273 TraceCheckUtils]: 19: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,891 INFO L273 TraceCheckUtils]: 20: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:49,892 INFO L273 TraceCheckUtils]: 21: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:49,892 INFO L273 TraceCheckUtils]: 22: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,892 INFO L273 TraceCheckUtils]: 23: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:49,893 INFO L273 TraceCheckUtils]: 24: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:49,893 INFO L273 TraceCheckUtils]: 25: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,893 INFO L273 TraceCheckUtils]: 26: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:49,893 INFO L273 TraceCheckUtils]: 27: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:49,893 INFO L273 TraceCheckUtils]: 28: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,894 INFO L273 TraceCheckUtils]: 29: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:49,894 INFO L273 TraceCheckUtils]: 30: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,894 INFO L273 TraceCheckUtils]: 31: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:49,894 INFO L273 TraceCheckUtils]: 32: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:49,894 INFO L273 TraceCheckUtils]: 33: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,895 INFO L273 TraceCheckUtils]: 34: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:49,895 INFO L273 TraceCheckUtils]: 35: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:49,895 INFO L273 TraceCheckUtils]: 36: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,895 INFO L273 TraceCheckUtils]: 37: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:49,895 INFO L273 TraceCheckUtils]: 38: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:49,896 INFO L273 TraceCheckUtils]: 39: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,896 INFO L273 TraceCheckUtils]: 40: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:49,896 INFO L273 TraceCheckUtils]: 41: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:49,896 INFO L273 TraceCheckUtils]: 42: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:49,897 INFO L273 TraceCheckUtils]: 43: Hoare triple {1843#false} havoc ~x~0;~x~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:49,897 INFO L273 TraceCheckUtils]: 44: Hoare triple {1843#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1843#false} is VALID [2018-11-23 10:32:49,897 INFO L256 TraceCheckUtils]: 45: Hoare triple {1843#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1843#false} is VALID [2018-11-23 10:32:49,897 INFO L273 TraceCheckUtils]: 46: Hoare triple {1843#false} ~cond := #in~cond; {1843#false} is VALID [2018-11-23 10:32:49,898 INFO L273 TraceCheckUtils]: 47: Hoare triple {1843#false} assume 0bv32 == ~cond; {1843#false} is VALID [2018-11-23 10:32:49,898 INFO L273 TraceCheckUtils]: 48: Hoare triple {1843#false} assume !false; {1843#false} is VALID [2018-11-23 10:32:49,901 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-23 10:32:49,901 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:50,188 INFO L273 TraceCheckUtils]: 48: Hoare triple {1843#false} assume !false; {1843#false} is VALID [2018-11-23 10:32:50,189 INFO L273 TraceCheckUtils]: 47: Hoare triple {1843#false} assume 0bv32 == ~cond; {1843#false} is VALID [2018-11-23 10:32:50,189 INFO L273 TraceCheckUtils]: 46: Hoare triple {1843#false} ~cond := #in~cond; {1843#false} is VALID [2018-11-23 10:32:50,189 INFO L256 TraceCheckUtils]: 45: Hoare triple {1843#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {1843#false} is VALID [2018-11-23 10:32:50,189 INFO L273 TraceCheckUtils]: 44: Hoare triple {1843#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1843#false} is VALID [2018-11-23 10:32:50,189 INFO L273 TraceCheckUtils]: 43: Hoare triple {1843#false} havoc ~x~0;~x~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:50,190 INFO L273 TraceCheckUtils]: 42: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,190 INFO L273 TraceCheckUtils]: 41: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:50,190 INFO L273 TraceCheckUtils]: 40: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:50,190 INFO L273 TraceCheckUtils]: 39: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,190 INFO L273 TraceCheckUtils]: 38: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:50,191 INFO L273 TraceCheckUtils]: 37: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:50,191 INFO L273 TraceCheckUtils]: 36: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,191 INFO L273 TraceCheckUtils]: 35: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:50,191 INFO L273 TraceCheckUtils]: 34: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:50,191 INFO L273 TraceCheckUtils]: 33: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,192 INFO L273 TraceCheckUtils]: 32: Hoare triple {1843#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1843#false} is VALID [2018-11-23 10:32:50,192 INFO L273 TraceCheckUtils]: 31: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {1843#false} is VALID [2018-11-23 10:32:50,192 INFO L273 TraceCheckUtils]: 30: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,192 INFO L273 TraceCheckUtils]: 29: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:50,192 INFO L273 TraceCheckUtils]: 28: Hoare triple {1843#false} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,193 INFO L273 TraceCheckUtils]: 27: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:50,193 INFO L273 TraceCheckUtils]: 26: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:50,193 INFO L273 TraceCheckUtils]: 25: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,193 INFO L273 TraceCheckUtils]: 24: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:50,193 INFO L273 TraceCheckUtils]: 23: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:50,194 INFO L273 TraceCheckUtils]: 22: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,194 INFO L273 TraceCheckUtils]: 21: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:50,194 INFO L273 TraceCheckUtils]: 20: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:50,194 INFO L273 TraceCheckUtils]: 19: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,194 INFO L273 TraceCheckUtils]: 18: Hoare triple {1843#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1843#false} is VALID [2018-11-23 10:32:50,195 INFO L273 TraceCheckUtils]: 17: Hoare triple {1843#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {1843#false} is VALID [2018-11-23 10:32:50,195 INFO L273 TraceCheckUtils]: 16: Hoare triple {1843#false} assume !!~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,195 INFO L273 TraceCheckUtils]: 15: Hoare triple {1843#false} ~i~0 := 0bv32; {1843#false} is VALID [2018-11-23 10:32:50,197 INFO L273 TraceCheckUtils]: 14: Hoare triple {2098#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {1843#false} is VALID [2018-11-23 10:32:50,197 INFO L273 TraceCheckUtils]: 13: Hoare triple {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2098#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:32:50,198 INFO L273 TraceCheckUtils]: 12: Hoare triple {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,204 INFO L273 TraceCheckUtils]: 11: Hoare triple {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2102#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,205 INFO L273 TraceCheckUtils]: 10: Hoare triple {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,209 INFO L273 TraceCheckUtils]: 9: Hoare triple {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2109#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,210 INFO L273 TraceCheckUtils]: 8: Hoare triple {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,219 INFO L273 TraceCheckUtils]: 7: Hoare triple {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2116#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,220 INFO L273 TraceCheckUtils]: 6: Hoare triple {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,221 INFO L273 TraceCheckUtils]: 5: Hoare triple {1842#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {2123#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:32:50,221 INFO L256 TraceCheckUtils]: 4: Hoare triple {1842#true} call #t~ret12 := main(); {1842#true} is VALID [2018-11-23 10:32:50,221 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1842#true} {1842#true} #87#return; {1842#true} is VALID [2018-11-23 10:32:50,221 INFO L273 TraceCheckUtils]: 2: Hoare triple {1842#true} assume true; {1842#true} is VALID [2018-11-23 10:32:50,221 INFO L273 TraceCheckUtils]: 1: Hoare triple {1842#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {1842#true} is VALID [2018-11-23 10:32:50,222 INFO L256 TraceCheckUtils]: 0: Hoare triple {1842#true} call ULTIMATE.init(); {1842#true} is VALID [2018-11-23 10:32:50,224 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-11-23 10:32:50,226 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:50,227 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 10:32:50,227 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 49 [2018-11-23 10:32:50,228 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:50,228 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 10:32:50,311 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:50,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 10:32:50,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 10:32:50,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 10:32:50,312 INFO L87 Difference]: Start difference. First operand 60 states and 67 transitions. Second operand 12 states. [2018-11-23 10:32:53,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:53,648 INFO L93 Difference]: Finished difference Result 181 states and 232 transitions. [2018-11-23 10:32:53,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 10:32:53,648 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 49 [2018-11-23 10:32:53,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:53,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:32:53,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 158 transitions. [2018-11-23 10:32:53,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:32:53,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 158 transitions. [2018-11-23 10:32:53,656 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 158 transitions. [2018-11-23 10:32:53,958 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:53,963 INFO L225 Difference]: With dead ends: 181 [2018-11-23 10:32:53,963 INFO L226 Difference]: Without dead ends: 136 [2018-11-23 10:32:53,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=94, Invalid=146, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:32:53,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-11-23 10:32:54,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-11-23 10:32:54,093 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:54,093 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:54,093 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:54,093 INFO L87 Difference]: Start difference. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:54,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:54,099 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-11-23 10:32:54,099 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:32:54,099 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:54,099 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:54,100 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:54,100 INFO L87 Difference]: Start difference. First operand 136 states. Second operand 136 states. [2018-11-23 10:32:54,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:54,105 INFO L93 Difference]: Finished difference Result 136 states and 153 transitions. [2018-11-23 10:32:54,105 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:32:54,106 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:54,106 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:54,106 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:54,106 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:54,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-23 10:32:54,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 153 transitions. [2018-11-23 10:32:54,111 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 153 transitions. Word has length 49 [2018-11-23 10:32:54,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:54,111 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 153 transitions. [2018-11-23 10:32:54,112 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 10:32:54,112 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 153 transitions. [2018-11-23 10:32:54,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-23 10:32:54,113 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:54,113 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 7, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:54,113 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:54,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:54,114 INFO L82 PathProgramCache]: Analyzing trace with hash 1927085322, now seen corresponding path program 2 times [2018-11-23 10:32:54,114 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:54,114 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:54,132 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 10:32:54,226 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:32:54,226 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:32:54,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:32:54,266 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:32:54,526 INFO L256 TraceCheckUtils]: 0: Hoare triple {2863#true} call ULTIMATE.init(); {2863#true} is VALID [2018-11-23 10:32:54,526 INFO L273 TraceCheckUtils]: 1: Hoare triple {2863#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2863#true} is VALID [2018-11-23 10:32:54,526 INFO L273 TraceCheckUtils]: 2: Hoare triple {2863#true} assume true; {2863#true} is VALID [2018-11-23 10:32:54,527 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2863#true} {2863#true} #87#return; {2863#true} is VALID [2018-11-23 10:32:54,527 INFO L256 TraceCheckUtils]: 4: Hoare triple {2863#true} call #t~ret12 := main(); {2863#true} is VALID [2018-11-23 10:32:54,529 INFO L273 TraceCheckUtils]: 5: Hoare triple {2863#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,529 INFO L273 TraceCheckUtils]: 6: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,530 INFO L273 TraceCheckUtils]: 7: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,530 INFO L273 TraceCheckUtils]: 8: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,530 INFO L273 TraceCheckUtils]: 9: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,531 INFO L273 TraceCheckUtils]: 10: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,531 INFO L273 TraceCheckUtils]: 11: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,532 INFO L273 TraceCheckUtils]: 12: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,532 INFO L273 TraceCheckUtils]: 13: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,533 INFO L273 TraceCheckUtils]: 14: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,533 INFO L273 TraceCheckUtils]: 15: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,534 INFO L273 TraceCheckUtils]: 16: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,535 INFO L273 TraceCheckUtils]: 17: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,535 INFO L273 TraceCheckUtils]: 18: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,536 INFO L273 TraceCheckUtils]: 19: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,536 INFO L273 TraceCheckUtils]: 20: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,537 INFO L273 TraceCheckUtils]: 21: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,537 INFO L273 TraceCheckUtils]: 22: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,538 INFO L273 TraceCheckUtils]: 23: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,538 INFO L273 TraceCheckUtils]: 24: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,539 INFO L273 TraceCheckUtils]: 25: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,539 INFO L273 TraceCheckUtils]: 26: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:32:54,540 INFO L273 TraceCheckUtils]: 27: Hoare triple {2883#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,541 INFO L273 TraceCheckUtils]: 28: Hoare triple {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,542 INFO L273 TraceCheckUtils]: 29: Hoare triple {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,543 INFO L273 TraceCheckUtils]: 30: Hoare triple {2950#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,543 INFO L273 TraceCheckUtils]: 31: Hoare triple {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,544 INFO L273 TraceCheckUtils]: 32: Hoare triple {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,545 INFO L273 TraceCheckUtils]: 33: Hoare triple {2960#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:54,546 INFO L273 TraceCheckUtils]: 34: Hoare triple {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:54,547 INFO L273 TraceCheckUtils]: 35: Hoare triple {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:32:54,548 INFO L273 TraceCheckUtils]: 36: Hoare triple {2970#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,548 INFO L273 TraceCheckUtils]: 37: Hoare triple {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,550 INFO L273 TraceCheckUtils]: 38: Hoare triple {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,551 INFO L273 TraceCheckUtils]: 39: Hoare triple {2980#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,551 INFO L273 TraceCheckUtils]: 40: Hoare triple {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:54,552 INFO L273 TraceCheckUtils]: 41: Hoare triple {2990#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:54,552 INFO L273 TraceCheckUtils]: 42: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,553 INFO L273 TraceCheckUtils]: 43: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,553 INFO L273 TraceCheckUtils]: 44: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:54,553 INFO L273 TraceCheckUtils]: 45: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,554 INFO L273 TraceCheckUtils]: 46: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,554 INFO L273 TraceCheckUtils]: 47: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:54,554 INFO L273 TraceCheckUtils]: 48: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,555 INFO L273 TraceCheckUtils]: 49: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,555 INFO L273 TraceCheckUtils]: 50: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:54,555 INFO L273 TraceCheckUtils]: 51: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,555 INFO L273 TraceCheckUtils]: 52: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,556 INFO L273 TraceCheckUtils]: 53: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:54,556 INFO L273 TraceCheckUtils]: 54: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,556 INFO L273 TraceCheckUtils]: 55: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,556 INFO L273 TraceCheckUtils]: 56: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:54,556 INFO L273 TraceCheckUtils]: 57: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,557 INFO L273 TraceCheckUtils]: 58: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,557 INFO L273 TraceCheckUtils]: 59: Hoare triple {2864#false} ~i~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:54,557 INFO L273 TraceCheckUtils]: 60: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,557 INFO L273 TraceCheckUtils]: 61: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,557 INFO L273 TraceCheckUtils]: 62: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,558 INFO L273 TraceCheckUtils]: 63: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,558 INFO L273 TraceCheckUtils]: 64: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,558 INFO L273 TraceCheckUtils]: 65: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,558 INFO L273 TraceCheckUtils]: 66: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,558 INFO L273 TraceCheckUtils]: 67: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,559 INFO L273 TraceCheckUtils]: 68: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,559 INFO L273 TraceCheckUtils]: 69: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,559 INFO L273 TraceCheckUtils]: 70: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,559 INFO L273 TraceCheckUtils]: 71: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,560 INFO L273 TraceCheckUtils]: 72: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,560 INFO L273 TraceCheckUtils]: 73: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,560 INFO L273 TraceCheckUtils]: 74: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,560 INFO L273 TraceCheckUtils]: 75: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,560 INFO L273 TraceCheckUtils]: 76: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,561 INFO L273 TraceCheckUtils]: 77: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,561 INFO L273 TraceCheckUtils]: 78: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,561 INFO L273 TraceCheckUtils]: 79: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,561 INFO L273 TraceCheckUtils]: 80: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,561 INFO L273 TraceCheckUtils]: 81: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,562 INFO L273 TraceCheckUtils]: 82: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,562 INFO L273 TraceCheckUtils]: 83: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,562 INFO L273 TraceCheckUtils]: 84: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,562 INFO L273 TraceCheckUtils]: 85: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,563 INFO L273 TraceCheckUtils]: 86: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,563 INFO L273 TraceCheckUtils]: 87: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,563 INFO L273 TraceCheckUtils]: 88: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,563 INFO L273 TraceCheckUtils]: 89: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,563 INFO L273 TraceCheckUtils]: 90: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,564 INFO L273 TraceCheckUtils]: 91: Hoare triple {2864#false} havoc ~x~0;~x~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:54,564 INFO L273 TraceCheckUtils]: 92: Hoare triple {2864#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2864#false} is VALID [2018-11-23 10:32:54,564 INFO L256 TraceCheckUtils]: 93: Hoare triple {2864#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {2864#false} is VALID [2018-11-23 10:32:54,564 INFO L273 TraceCheckUtils]: 94: Hoare triple {2864#false} ~cond := #in~cond; {2864#false} is VALID [2018-11-23 10:32:54,564 INFO L273 TraceCheckUtils]: 95: Hoare triple {2864#false} assume 0bv32 == ~cond; {2864#false} is VALID [2018-11-23 10:32:54,565 INFO L273 TraceCheckUtils]: 96: Hoare triple {2864#false} assume !false; {2864#false} is VALID [2018-11-23 10:32:54,575 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 79 proven. 26 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2018-11-23 10:32:54,575 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:32:54,934 INFO L273 TraceCheckUtils]: 96: Hoare triple {2864#false} assume !false; {2864#false} is VALID [2018-11-23 10:32:54,934 INFO L273 TraceCheckUtils]: 95: Hoare triple {2864#false} assume 0bv32 == ~cond; {2864#false} is VALID [2018-11-23 10:32:54,934 INFO L273 TraceCheckUtils]: 94: Hoare triple {2864#false} ~cond := #in~cond; {2864#false} is VALID [2018-11-23 10:32:54,934 INFO L256 TraceCheckUtils]: 93: Hoare triple {2864#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 92: Hoare triple {2864#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 91: Hoare triple {2864#false} havoc ~x~0;~x~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 90: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 89: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 88: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 87: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,935 INFO L273 TraceCheckUtils]: 86: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 85: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 84: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 83: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 82: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 81: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 80: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 79: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,936 INFO L273 TraceCheckUtils]: 78: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 77: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 76: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 75: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 74: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 73: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 72: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,937 INFO L273 TraceCheckUtils]: 71: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 70: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 69: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 68: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 67: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 66: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 65: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,938 INFO L273 TraceCheckUtils]: 64: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 63: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 62: Hoare triple {2864#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 61: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 60: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 59: Hoare triple {2864#false} ~i~0 := 0bv32; {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 58: Hoare triple {2864#false} assume !~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,939 INFO L273 TraceCheckUtils]: 57: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 56: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 55: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 54: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 53: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 52: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 51: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,940 INFO L273 TraceCheckUtils]: 50: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 49: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 48: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 47: Hoare triple {2864#false} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 46: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 45: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 44: Hoare triple {2864#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {2864#false} is VALID [2018-11-23 10:32:54,941 INFO L273 TraceCheckUtils]: 43: Hoare triple {2864#false} assume !!~bvslt32(~i~0, 200000bv32); {2864#false} is VALID [2018-11-23 10:32:54,942 INFO L273 TraceCheckUtils]: 42: Hoare triple {2864#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2864#false} is VALID [2018-11-23 10:32:54,942 INFO L273 TraceCheckUtils]: 41: Hoare triple {3327#(not (= main_~z~0 main_~i~0))} assume !(~i~0 != ~z~0); {2864#false} is VALID [2018-11-23 10:32:54,942 INFO L273 TraceCheckUtils]: 40: Hoare triple {3327#(not (= main_~z~0 main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3327#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:54,943 INFO L273 TraceCheckUtils]: 39: Hoare triple {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3327#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:32:54,943 INFO L273 TraceCheckUtils]: 38: Hoare triple {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:54,943 INFO L273 TraceCheckUtils]: 37: Hoare triple {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:54,967 INFO L273 TraceCheckUtils]: 36: Hoare triple {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3334#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:32:54,967 INFO L273 TraceCheckUtils]: 35: Hoare triple {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:32:54,968 INFO L273 TraceCheckUtils]: 34: Hoare triple {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:32:54,990 INFO L273 TraceCheckUtils]: 33: Hoare triple {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3344#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:32:54,990 INFO L273 TraceCheckUtils]: 32: Hoare triple {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:32:54,990 INFO L273 TraceCheckUtils]: 31: Hoare triple {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:32:55,014 INFO L273 TraceCheckUtils]: 30: Hoare triple {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {3354#(not (= (bvadd main_~z~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 10:32:55,014 INFO L273 TraceCheckUtils]: 29: Hoare triple {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:32:55,014 INFO L273 TraceCheckUtils]: 28: Hoare triple {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:32:55,015 INFO L273 TraceCheckUtils]: 27: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} ~i~0 := 0bv32; {3364#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:32:55,015 INFO L273 TraceCheckUtils]: 26: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, 200000bv32); {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,016 INFO L273 TraceCheckUtils]: 25: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,016 INFO L273 TraceCheckUtils]: 24: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,016 INFO L273 TraceCheckUtils]: 23: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,017 INFO L273 TraceCheckUtils]: 22: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,017 INFO L273 TraceCheckUtils]: 21: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,017 INFO L273 TraceCheckUtils]: 20: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,018 INFO L273 TraceCheckUtils]: 19: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,018 INFO L273 TraceCheckUtils]: 18: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,019 INFO L273 TraceCheckUtils]: 17: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,019 INFO L273 TraceCheckUtils]: 16: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,020 INFO L273 TraceCheckUtils]: 15: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,020 INFO L273 TraceCheckUtils]: 14: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,021 INFO L273 TraceCheckUtils]: 13: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,021 INFO L273 TraceCheckUtils]: 12: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,022 INFO L273 TraceCheckUtils]: 11: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,022 INFO L273 TraceCheckUtils]: 10: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,023 INFO L273 TraceCheckUtils]: 9: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,023 INFO L273 TraceCheckUtils]: 8: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,024 INFO L273 TraceCheckUtils]: 7: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,024 INFO L273 TraceCheckUtils]: 6: Hoare triple {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,026 INFO L273 TraceCheckUtils]: 5: Hoare triple {2863#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {3374#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 10:32:55,026 INFO L256 TraceCheckUtils]: 4: Hoare triple {2863#true} call #t~ret12 := main(); {2863#true} is VALID [2018-11-23 10:32:55,026 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2863#true} {2863#true} #87#return; {2863#true} is VALID [2018-11-23 10:32:55,026 INFO L273 TraceCheckUtils]: 2: Hoare triple {2863#true} assume true; {2863#true} is VALID [2018-11-23 10:32:55,027 INFO L273 TraceCheckUtils]: 1: Hoare triple {2863#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {2863#true} is VALID [2018-11-23 10:32:55,027 INFO L256 TraceCheckUtils]: 0: Hoare triple {2863#true} call ULTIMATE.init(); {2863#true} is VALID [2018-11-23 10:32:55,035 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 79 proven. 26 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2018-11-23 10:32:55,037 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:32:55,037 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 10:32:55,038 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 97 [2018-11-23 10:32:55,038 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:32:55,038 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 10:32:55,178 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:55,179 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 10:32:55,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 10:32:55,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-11-23 10:32:55,180 INFO L87 Difference]: Start difference. First operand 136 states and 153 transitions. Second operand 14 states. [2018-11-23 10:32:57,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:57,984 INFO L93 Difference]: Finished difference Result 218 states and 261 transitions. [2018-11-23 10:32:57,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 10:32:57,984 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 97 [2018-11-23 10:32:57,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:32:57,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:32:57,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 154 transitions. [2018-11-23 10:32:57,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:32:57,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 154 transitions. [2018-11-23 10:32:57,991 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 154 transitions. [2018-11-23 10:32:58,262 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:32:58,266 INFO L225 Difference]: With dead ends: 218 [2018-11-23 10:32:58,266 INFO L226 Difference]: Without dead ends: 127 [2018-11-23 10:32:58,267 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=145, Invalid=235, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:32:58,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-11-23 10:32:58,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 126. [2018-11-23 10:32:58,645 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:32:58,645 INFO L82 GeneralOperation]: Start isEquivalent. First operand 127 states. Second operand 126 states. [2018-11-23 10:32:58,645 INFO L74 IsIncluded]: Start isIncluded. First operand 127 states. Second operand 126 states. [2018-11-23 10:32:58,646 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 126 states. [2018-11-23 10:32:58,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:58,651 INFO L93 Difference]: Finished difference Result 127 states and 140 transitions. [2018-11-23 10:32:58,651 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 140 transitions. [2018-11-23 10:32:58,651 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:58,652 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:58,652 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand 127 states. [2018-11-23 10:32:58,652 INFO L87 Difference]: Start difference. First operand 126 states. Second operand 127 states. [2018-11-23 10:32:58,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:32:58,656 INFO L93 Difference]: Finished difference Result 127 states and 140 transitions. [2018-11-23 10:32:58,656 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 140 transitions. [2018-11-23 10:32:58,657 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:32:58,657 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:32:58,657 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:32:58,657 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:32:58,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-11-23 10:32:58,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 139 transitions. [2018-11-23 10:32:58,661 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 139 transitions. Word has length 97 [2018-11-23 10:32:58,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:32:58,661 INFO L480 AbstractCegarLoop]: Abstraction has 126 states and 139 transitions. [2018-11-23 10:32:58,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 10:32:58,662 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 139 transitions. [2018-11-23 10:32:58,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-23 10:32:58,663 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:32:58,663 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:32:58,663 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:32:58,663 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:32:58,663 INFO L82 PathProgramCache]: Analyzing trace with hash 121911376, now seen corresponding path program 3 times [2018-11-23 10:32:58,664 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:32:58,664 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:32:58,689 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:33:01,559 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-11-23 10:33:01,559 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:01,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:01,608 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:01,789 INFO L256 TraceCheckUtils]: 0: Hoare triple {4195#true} call ULTIMATE.init(); {4195#true} is VALID [2018-11-23 10:33:01,789 INFO L273 TraceCheckUtils]: 1: Hoare triple {4195#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4195#true} is VALID [2018-11-23 10:33:01,789 INFO L273 TraceCheckUtils]: 2: Hoare triple {4195#true} assume true; {4195#true} is VALID [2018-11-23 10:33:01,790 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4195#true} {4195#true} #87#return; {4195#true} is VALID [2018-11-23 10:33:01,790 INFO L256 TraceCheckUtils]: 4: Hoare triple {4195#true} call #t~ret12 := main(); {4195#true} is VALID [2018-11-23 10:33:01,790 INFO L273 TraceCheckUtils]: 5: Hoare triple {4195#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {4195#true} is VALID [2018-11-23 10:33:01,790 INFO L273 TraceCheckUtils]: 6: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,791 INFO L273 TraceCheckUtils]: 7: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,791 INFO L273 TraceCheckUtils]: 8: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,791 INFO L273 TraceCheckUtils]: 9: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,791 INFO L273 TraceCheckUtils]: 10: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,792 INFO L273 TraceCheckUtils]: 11: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,792 INFO L273 TraceCheckUtils]: 12: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,792 INFO L273 TraceCheckUtils]: 13: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,792 INFO L273 TraceCheckUtils]: 14: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,792 INFO L273 TraceCheckUtils]: 15: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,793 INFO L273 TraceCheckUtils]: 16: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,793 INFO L273 TraceCheckUtils]: 17: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,793 INFO L273 TraceCheckUtils]: 18: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,793 INFO L273 TraceCheckUtils]: 19: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,793 INFO L273 TraceCheckUtils]: 20: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,794 INFO L273 TraceCheckUtils]: 21: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,794 INFO L273 TraceCheckUtils]: 22: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,794 INFO L273 TraceCheckUtils]: 23: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,794 INFO L273 TraceCheckUtils]: 24: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:01,795 INFO L273 TraceCheckUtils]: 25: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:01,795 INFO L273 TraceCheckUtils]: 26: Hoare triple {4195#true} assume !~bvslt32(~i~0, 200000bv32); {4195#true} is VALID [2018-11-23 10:33:01,799 INFO L273 TraceCheckUtils]: 27: Hoare triple {4195#true} ~i~0 := 0bv32; {4281#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:01,800 INFO L273 TraceCheckUtils]: 28: Hoare triple {4281#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4281#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:01,800 INFO L273 TraceCheckUtils]: 29: Hoare triple {4281#(= main_~i~0 (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4281#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:01,803 INFO L273 TraceCheckUtils]: 30: Hoare triple {4281#(= main_~i~0 (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,805 INFO L273 TraceCheckUtils]: 31: Hoare triple {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,805 INFO L273 TraceCheckUtils]: 32: Hoare triple {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,808 INFO L273 TraceCheckUtils]: 33: Hoare triple {4291#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4301#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:01,808 INFO L273 TraceCheckUtils]: 34: Hoare triple {4301#(= (_ bv2 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4301#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:01,811 INFO L273 TraceCheckUtils]: 35: Hoare triple {4301#(= (_ bv2 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4301#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:01,811 INFO L273 TraceCheckUtils]: 36: Hoare triple {4301#(= (_ bv2 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,812 INFO L273 TraceCheckUtils]: 37: Hoare triple {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,812 INFO L273 TraceCheckUtils]: 38: Hoare triple {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,814 INFO L273 TraceCheckUtils]: 39: Hoare triple {4311#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4321#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:01,814 INFO L273 TraceCheckUtils]: 40: Hoare triple {4321#(= (_ bv4 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4321#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:01,816 INFO L273 TraceCheckUtils]: 41: Hoare triple {4321#(= (_ bv4 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4321#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:01,817 INFO L273 TraceCheckUtils]: 42: Hoare triple {4321#(= (_ bv4 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,828 INFO L273 TraceCheckUtils]: 43: Hoare triple {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,828 INFO L273 TraceCheckUtils]: 44: Hoare triple {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,833 INFO L273 TraceCheckUtils]: 45: Hoare triple {4331#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4341#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:01,833 INFO L273 TraceCheckUtils]: 46: Hoare triple {4341#(= (_ bv6 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4341#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:01,837 INFO L273 TraceCheckUtils]: 47: Hoare triple {4341#(= (_ bv6 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4341#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:01,837 INFO L273 TraceCheckUtils]: 48: Hoare triple {4341#(= (_ bv6 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,840 INFO L273 TraceCheckUtils]: 49: Hoare triple {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,840 INFO L273 TraceCheckUtils]: 50: Hoare triple {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,842 INFO L273 TraceCheckUtils]: 51: Hoare triple {4351#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4361#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:01,842 INFO L273 TraceCheckUtils]: 52: Hoare triple {4361#(= (_ bv8 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {4361#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:01,845 INFO L273 TraceCheckUtils]: 53: Hoare triple {4361#(= (_ bv8 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4361#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:01,845 INFO L273 TraceCheckUtils]: 54: Hoare triple {4361#(= (_ bv8 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,848 INFO L273 TraceCheckUtils]: 55: Hoare triple {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,848 INFO L273 TraceCheckUtils]: 56: Hoare triple {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:01,850 INFO L273 TraceCheckUtils]: 57: Hoare triple {4371#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4381#(= (_ bv10 32) main_~i~0)} is VALID [2018-11-23 10:33:01,850 INFO L273 TraceCheckUtils]: 58: Hoare triple {4381#(= (_ bv10 32) main_~i~0)} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,850 INFO L273 TraceCheckUtils]: 59: Hoare triple {4196#false} ~i~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:33:01,850 INFO L273 TraceCheckUtils]: 60: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,851 INFO L273 TraceCheckUtils]: 61: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,851 INFO L273 TraceCheckUtils]: 62: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,851 INFO L273 TraceCheckUtils]: 63: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,851 INFO L273 TraceCheckUtils]: 64: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,851 INFO L273 TraceCheckUtils]: 65: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,852 INFO L273 TraceCheckUtils]: 66: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,852 INFO L273 TraceCheckUtils]: 67: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,852 INFO L273 TraceCheckUtils]: 68: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,852 INFO L273 TraceCheckUtils]: 69: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,853 INFO L273 TraceCheckUtils]: 70: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,853 INFO L273 TraceCheckUtils]: 71: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,853 INFO L273 TraceCheckUtils]: 72: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,854 INFO L273 TraceCheckUtils]: 73: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,854 INFO L273 TraceCheckUtils]: 74: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,854 INFO L273 TraceCheckUtils]: 75: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,854 INFO L273 TraceCheckUtils]: 76: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,855 INFO L273 TraceCheckUtils]: 77: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,855 INFO L273 TraceCheckUtils]: 78: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,855 INFO L273 TraceCheckUtils]: 79: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,855 INFO L273 TraceCheckUtils]: 80: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,855 INFO L273 TraceCheckUtils]: 81: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,856 INFO L273 TraceCheckUtils]: 82: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,856 INFO L273 TraceCheckUtils]: 83: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,856 INFO L273 TraceCheckUtils]: 84: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,856 INFO L273 TraceCheckUtils]: 85: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,857 INFO L273 TraceCheckUtils]: 86: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,857 INFO L273 TraceCheckUtils]: 87: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,857 INFO L273 TraceCheckUtils]: 88: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:01,857 INFO L273 TraceCheckUtils]: 89: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:01,857 INFO L273 TraceCheckUtils]: 90: Hoare triple {4196#false} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:01,858 INFO L273 TraceCheckUtils]: 91: Hoare triple {4196#false} havoc ~x~0;~x~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:33:01,858 INFO L273 TraceCheckUtils]: 92: Hoare triple {4196#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4196#false} is VALID [2018-11-23 10:33:01,858 INFO L256 TraceCheckUtils]: 93: Hoare triple {4196#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {4196#false} is VALID [2018-11-23 10:33:01,858 INFO L273 TraceCheckUtils]: 94: Hoare triple {4196#false} ~cond := #in~cond; {4196#false} is VALID [2018-11-23 10:33:01,859 INFO L273 TraceCheckUtils]: 95: Hoare triple {4196#false} assume 0bv32 == ~cond; {4196#false} is VALID [2018-11-23 10:33:01,859 INFO L273 TraceCheckUtils]: 96: Hoare triple {4196#false} assume !false; {4196#false} is VALID [2018-11-23 10:33:01,871 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-11-23 10:33:01,871 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:02,712 INFO L273 TraceCheckUtils]: 96: Hoare triple {4196#false} assume !false; {4196#false} is VALID [2018-11-23 10:33:02,713 INFO L273 TraceCheckUtils]: 95: Hoare triple {4196#false} assume 0bv32 == ~cond; {4196#false} is VALID [2018-11-23 10:33:02,713 INFO L273 TraceCheckUtils]: 94: Hoare triple {4196#false} ~cond := #in~cond; {4196#false} is VALID [2018-11-23 10:33:02,713 INFO L256 TraceCheckUtils]: 93: Hoare triple {4196#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {4196#false} is VALID [2018-11-23 10:33:02,714 INFO L273 TraceCheckUtils]: 92: Hoare triple {4196#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4196#false} is VALID [2018-11-23 10:33:02,714 INFO L273 TraceCheckUtils]: 91: Hoare triple {4196#false} havoc ~x~0;~x~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:33:02,714 INFO L273 TraceCheckUtils]: 90: Hoare triple {4196#false} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,715 INFO L273 TraceCheckUtils]: 89: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,715 INFO L273 TraceCheckUtils]: 88: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,715 INFO L273 TraceCheckUtils]: 87: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,715 INFO L273 TraceCheckUtils]: 86: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,715 INFO L273 TraceCheckUtils]: 85: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,716 INFO L273 TraceCheckUtils]: 84: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,716 INFO L273 TraceCheckUtils]: 83: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,716 INFO L273 TraceCheckUtils]: 82: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,716 INFO L273 TraceCheckUtils]: 81: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,716 INFO L273 TraceCheckUtils]: 80: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,716 INFO L273 TraceCheckUtils]: 79: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,717 INFO L273 TraceCheckUtils]: 78: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,717 INFO L273 TraceCheckUtils]: 77: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,717 INFO L273 TraceCheckUtils]: 76: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,717 INFO L273 TraceCheckUtils]: 75: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,717 INFO L273 TraceCheckUtils]: 74: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,717 INFO L273 TraceCheckUtils]: 73: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,718 INFO L273 TraceCheckUtils]: 72: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,718 INFO L273 TraceCheckUtils]: 71: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,718 INFO L273 TraceCheckUtils]: 70: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,718 INFO L273 TraceCheckUtils]: 69: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,718 INFO L273 TraceCheckUtils]: 68: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,719 INFO L273 TraceCheckUtils]: 67: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,719 INFO L273 TraceCheckUtils]: 66: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,719 INFO L273 TraceCheckUtils]: 65: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,719 INFO L273 TraceCheckUtils]: 64: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,719 INFO L273 TraceCheckUtils]: 63: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,719 INFO L273 TraceCheckUtils]: 62: Hoare triple {4196#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4196#false} is VALID [2018-11-23 10:33:02,720 INFO L273 TraceCheckUtils]: 61: Hoare triple {4196#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {4196#false} is VALID [2018-11-23 10:33:02,720 INFO L273 TraceCheckUtils]: 60: Hoare triple {4196#false} assume !!~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,720 INFO L273 TraceCheckUtils]: 59: Hoare triple {4196#false} ~i~0 := 0bv32; {4196#false} is VALID [2018-11-23 10:33:02,720 INFO L273 TraceCheckUtils]: 58: Hoare triple {4613#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {4196#false} is VALID [2018-11-23 10:33:02,721 INFO L273 TraceCheckUtils]: 57: Hoare triple {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4613#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:33:02,721 INFO L273 TraceCheckUtils]: 56: Hoare triple {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,722 INFO L273 TraceCheckUtils]: 55: Hoare triple {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,727 INFO L273 TraceCheckUtils]: 54: Hoare triple {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4617#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,727 INFO L273 TraceCheckUtils]: 53: Hoare triple {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,742 INFO L273 TraceCheckUtils]: 52: Hoare triple {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,750 INFO L273 TraceCheckUtils]: 51: Hoare triple {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4627#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,750 INFO L273 TraceCheckUtils]: 50: Hoare triple {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,751 INFO L273 TraceCheckUtils]: 49: Hoare triple {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,757 INFO L273 TraceCheckUtils]: 48: Hoare triple {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4637#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,758 INFO L273 TraceCheckUtils]: 47: Hoare triple {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,758 INFO L273 TraceCheckUtils]: 46: Hoare triple {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,762 INFO L273 TraceCheckUtils]: 45: Hoare triple {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4647#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,763 INFO L273 TraceCheckUtils]: 44: Hoare triple {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,763 INFO L273 TraceCheckUtils]: 43: Hoare triple {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,770 INFO L273 TraceCheckUtils]: 42: Hoare triple {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4657#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,771 INFO L273 TraceCheckUtils]: 41: Hoare triple {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,771 INFO L273 TraceCheckUtils]: 40: Hoare triple {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,779 INFO L273 TraceCheckUtils]: 39: Hoare triple {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4667#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,779 INFO L273 TraceCheckUtils]: 38: Hoare triple {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,780 INFO L273 TraceCheckUtils]: 37: Hoare triple {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,786 INFO L273 TraceCheckUtils]: 36: Hoare triple {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4677#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,786 INFO L273 TraceCheckUtils]: 35: Hoare triple {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,787 INFO L273 TraceCheckUtils]: 34: Hoare triple {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,792 INFO L273 TraceCheckUtils]: 33: Hoare triple {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4687#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,792 INFO L273 TraceCheckUtils]: 32: Hoare triple {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,792 INFO L273 TraceCheckUtils]: 31: Hoare triple {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,797 INFO L273 TraceCheckUtils]: 30: Hoare triple {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4697#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,797 INFO L273 TraceCheckUtils]: 29: Hoare triple {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,816 INFO L273 TraceCheckUtils]: 28: Hoare triple {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,820 INFO L273 TraceCheckUtils]: 27: Hoare triple {4195#true} ~i~0 := 0bv32; {4707#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:02,820 INFO L273 TraceCheckUtils]: 26: Hoare triple {4195#true} assume !~bvslt32(~i~0, 200000bv32); {4195#true} is VALID [2018-11-23 10:33:02,821 INFO L273 TraceCheckUtils]: 25: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,821 INFO L273 TraceCheckUtils]: 24: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,821 INFO L273 TraceCheckUtils]: 23: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,821 INFO L273 TraceCheckUtils]: 22: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,821 INFO L273 TraceCheckUtils]: 21: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,821 INFO L273 TraceCheckUtils]: 20: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,822 INFO L273 TraceCheckUtils]: 19: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,822 INFO L273 TraceCheckUtils]: 18: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,822 INFO L273 TraceCheckUtils]: 17: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,822 INFO L273 TraceCheckUtils]: 16: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,822 INFO L273 TraceCheckUtils]: 15: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,822 INFO L273 TraceCheckUtils]: 14: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,823 INFO L273 TraceCheckUtils]: 13: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,823 INFO L273 TraceCheckUtils]: 12: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,823 INFO L273 TraceCheckUtils]: 11: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,823 INFO L273 TraceCheckUtils]: 10: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,823 INFO L273 TraceCheckUtils]: 9: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,823 INFO L273 TraceCheckUtils]: 8: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,824 INFO L273 TraceCheckUtils]: 7: Hoare triple {4195#true} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4195#true} is VALID [2018-11-23 10:33:02,824 INFO L273 TraceCheckUtils]: 6: Hoare triple {4195#true} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {4195#true} is VALID [2018-11-23 10:33:02,824 INFO L273 TraceCheckUtils]: 5: Hoare triple {4195#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {4195#true} is VALID [2018-11-23 10:33:02,824 INFO L256 TraceCheckUtils]: 4: Hoare triple {4195#true} call #t~ret12 := main(); {4195#true} is VALID [2018-11-23 10:33:02,824 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4195#true} {4195#true} #87#return; {4195#true} is VALID [2018-11-23 10:33:02,824 INFO L273 TraceCheckUtils]: 2: Hoare triple {4195#true} assume true; {4195#true} is VALID [2018-11-23 10:33:02,825 INFO L273 TraceCheckUtils]: 1: Hoare triple {4195#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {4195#true} is VALID [2018-11-23 10:33:02,825 INFO L256 TraceCheckUtils]: 0: Hoare triple {4195#true} call ULTIMATE.init(); {4195#true} is VALID [2018-11-23 10:33:02,838 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-11-23 10:33:02,842 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:02,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-11-23 10:33:02,843 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 97 [2018-11-23 10:33:02,843 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:02,843 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:33:03,023 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:03,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:33:03,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:33:03,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:33:03,025 INFO L87 Difference]: Start difference. First operand 126 states and 139 transitions. Second operand 24 states. [2018-11-23 10:33:14,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:14,806 INFO L93 Difference]: Finished difference Result 541 states and 700 transitions. [2018-11-23 10:33:14,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 10:33:14,807 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 97 [2018-11-23 10:33:14,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:14,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:33:14,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 284 transitions. [2018-11-23 10:33:14,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:33:14,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 284 transitions. [2018-11-23 10:33:14,816 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 284 transitions. [2018-11-23 10:33:15,401 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 284 edges. 284 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:15,418 INFO L225 Difference]: With dead ends: 541 [2018-11-23 10:33:15,418 INFO L226 Difference]: Without dead ends: 442 [2018-11-23 10:33:15,419 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=406, Invalid=716, Unknown=0, NotChecked=0, Total=1122 [2018-11-23 10:33:15,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2018-11-23 10:33:17,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 442. [2018-11-23 10:33:17,018 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:17,018 INFO L82 GeneralOperation]: Start isEquivalent. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:17,018 INFO L74 IsIncluded]: Start isIncluded. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:17,019 INFO L87 Difference]: Start difference. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:17,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:17,035 INFO L93 Difference]: Finished difference Result 442 states and 477 transitions. [2018-11-23 10:33:17,035 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 477 transitions. [2018-11-23 10:33:17,036 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:17,036 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:17,036 INFO L74 IsIncluded]: Start isIncluded. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:17,036 INFO L87 Difference]: Start difference. First operand 442 states. Second operand 442 states. [2018-11-23 10:33:17,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:17,053 INFO L93 Difference]: Finished difference Result 442 states and 477 transitions. [2018-11-23 10:33:17,053 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 477 transitions. [2018-11-23 10:33:17,054 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:17,054 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:17,054 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:17,054 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:17,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 442 states. [2018-11-23 10:33:17,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 477 transitions. [2018-11-23 10:33:17,073 INFO L78 Accepts]: Start accepts. Automaton has 442 states and 477 transitions. Word has length 97 [2018-11-23 10:33:17,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:17,073 INFO L480 AbstractCegarLoop]: Abstraction has 442 states and 477 transitions. [2018-11-23 10:33:17,073 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:33:17,074 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 477 transitions. [2018-11-23 10:33:17,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-23 10:33:17,077 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:17,077 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 22, 19, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:17,077 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:17,077 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:17,077 INFO L82 PathProgramCache]: Analyzing trace with hash -850233738, now seen corresponding path program 3 times [2018-11-23 10:33:17,078 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:17,078 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:17,096 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-11-23 10:33:17,297 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:33:17,297 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:17,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:17,359 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:17,618 INFO L256 TraceCheckUtils]: 0: Hoare triple {7050#true} call ULTIMATE.init(); {7050#true} is VALID [2018-11-23 10:33:17,619 INFO L273 TraceCheckUtils]: 1: Hoare triple {7050#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {7050#true} is VALID [2018-11-23 10:33:17,619 INFO L273 TraceCheckUtils]: 2: Hoare triple {7050#true} assume true; {7050#true} is VALID [2018-11-23 10:33:17,619 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7050#true} {7050#true} #87#return; {7050#true} is VALID [2018-11-23 10:33:17,619 INFO L256 TraceCheckUtils]: 4: Hoare triple {7050#true} call #t~ret12 := main(); {7050#true} is VALID [2018-11-23 10:33:17,621 INFO L273 TraceCheckUtils]: 5: Hoare triple {7050#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,621 INFO L273 TraceCheckUtils]: 6: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,621 INFO L273 TraceCheckUtils]: 7: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,622 INFO L273 TraceCheckUtils]: 8: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,622 INFO L273 TraceCheckUtils]: 9: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,623 INFO L273 TraceCheckUtils]: 10: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,623 INFO L273 TraceCheckUtils]: 11: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,624 INFO L273 TraceCheckUtils]: 12: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,624 INFO L273 TraceCheckUtils]: 13: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,625 INFO L273 TraceCheckUtils]: 14: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,626 INFO L273 TraceCheckUtils]: 15: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,626 INFO L273 TraceCheckUtils]: 16: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,627 INFO L273 TraceCheckUtils]: 17: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,627 INFO L273 TraceCheckUtils]: 18: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,628 INFO L273 TraceCheckUtils]: 19: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,629 INFO L273 TraceCheckUtils]: 20: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,629 INFO L273 TraceCheckUtils]: 21: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,630 INFO L273 TraceCheckUtils]: 22: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,630 INFO L273 TraceCheckUtils]: 23: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,631 INFO L273 TraceCheckUtils]: 24: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,632 INFO L273 TraceCheckUtils]: 25: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,632 INFO L273 TraceCheckUtils]: 26: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,633 INFO L273 TraceCheckUtils]: 27: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,633 INFO L273 TraceCheckUtils]: 28: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,634 INFO L273 TraceCheckUtils]: 29: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,635 INFO L273 TraceCheckUtils]: 30: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,635 INFO L273 TraceCheckUtils]: 31: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,636 INFO L273 TraceCheckUtils]: 32: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,636 INFO L273 TraceCheckUtils]: 33: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,637 INFO L273 TraceCheckUtils]: 34: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,638 INFO L273 TraceCheckUtils]: 35: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,638 INFO L273 TraceCheckUtils]: 36: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,639 INFO L273 TraceCheckUtils]: 37: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,639 INFO L273 TraceCheckUtils]: 38: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,640 INFO L273 TraceCheckUtils]: 39: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,641 INFO L273 TraceCheckUtils]: 40: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,641 INFO L273 TraceCheckUtils]: 41: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,642 INFO L273 TraceCheckUtils]: 42: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,642 INFO L273 TraceCheckUtils]: 43: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,643 INFO L273 TraceCheckUtils]: 44: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,644 INFO L273 TraceCheckUtils]: 45: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,644 INFO L273 TraceCheckUtils]: 46: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,662 INFO L273 TraceCheckUtils]: 47: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,669 INFO L273 TraceCheckUtils]: 48: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,669 INFO L273 TraceCheckUtils]: 49: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,670 INFO L273 TraceCheckUtils]: 50: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,670 INFO L273 TraceCheckUtils]: 51: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,670 INFO L273 TraceCheckUtils]: 52: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,671 INFO L273 TraceCheckUtils]: 53: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,671 INFO L273 TraceCheckUtils]: 54: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,671 INFO L273 TraceCheckUtils]: 55: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,672 INFO L273 TraceCheckUtils]: 56: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,673 INFO L273 TraceCheckUtils]: 57: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,673 INFO L273 TraceCheckUtils]: 58: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,674 INFO L273 TraceCheckUtils]: 59: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,674 INFO L273 TraceCheckUtils]: 60: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,675 INFO L273 TraceCheckUtils]: 61: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,676 INFO L273 TraceCheckUtils]: 62: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,676 INFO L273 TraceCheckUtils]: 63: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,677 INFO L273 TraceCheckUtils]: 64: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,677 INFO L273 TraceCheckUtils]: 65: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,678 INFO L273 TraceCheckUtils]: 66: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,679 INFO L273 TraceCheckUtils]: 67: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,679 INFO L273 TraceCheckUtils]: 68: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,680 INFO L273 TraceCheckUtils]: 69: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,680 INFO L273 TraceCheckUtils]: 70: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,681 INFO L273 TraceCheckUtils]: 71: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,682 INFO L273 TraceCheckUtils]: 72: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,682 INFO L273 TraceCheckUtils]: 73: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,683 INFO L273 TraceCheckUtils]: 74: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,683 INFO L273 TraceCheckUtils]: 75: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,684 INFO L273 TraceCheckUtils]: 76: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,685 INFO L273 TraceCheckUtils]: 77: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,685 INFO L273 TraceCheckUtils]: 78: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,686 INFO L273 TraceCheckUtils]: 79: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,686 INFO L273 TraceCheckUtils]: 80: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,687 INFO L273 TraceCheckUtils]: 81: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,688 INFO L273 TraceCheckUtils]: 82: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,688 INFO L273 TraceCheckUtils]: 83: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !(~i~0 != ~z~0); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,707 INFO L273 TraceCheckUtils]: 84: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,715 INFO L273 TraceCheckUtils]: 85: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,729 INFO L273 TraceCheckUtils]: 86: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,737 INFO L273 TraceCheckUtils]: 87: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,751 INFO L273 TraceCheckUtils]: 88: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,759 INFO L273 TraceCheckUtils]: 89: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,760 INFO L273 TraceCheckUtils]: 90: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,761 INFO L273 TraceCheckUtils]: 91: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,761 INFO L273 TraceCheckUtils]: 92: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,763 INFO L273 TraceCheckUtils]: 93: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,781 INFO L273 TraceCheckUtils]: 94: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,789 INFO L273 TraceCheckUtils]: 95: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,793 INFO L273 TraceCheckUtils]: 96: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,799 INFO L273 TraceCheckUtils]: 97: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,799 INFO L273 TraceCheckUtils]: 98: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !(~i~0 != ~z~0); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,802 INFO L273 TraceCheckUtils]: 99: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,802 INFO L273 TraceCheckUtils]: 100: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,802 INFO L273 TraceCheckUtils]: 101: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,803 INFO L273 TraceCheckUtils]: 102: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,803 INFO L273 TraceCheckUtils]: 103: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,804 INFO L273 TraceCheckUtils]: 104: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,804 INFO L273 TraceCheckUtils]: 105: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,804 INFO L273 TraceCheckUtils]: 106: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,805 INFO L273 TraceCheckUtils]: 107: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,805 INFO L273 TraceCheckUtils]: 108: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,806 INFO L273 TraceCheckUtils]: 109: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,806 INFO L273 TraceCheckUtils]: 110: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,807 INFO L273 TraceCheckUtils]: 111: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,808 INFO L273 TraceCheckUtils]: 112: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32); {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,808 INFO L273 TraceCheckUtils]: 113: Hoare triple {7070#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !(~i~0 != ~z~0); {7395#(= (bvadd main_~i~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,809 INFO L273 TraceCheckUtils]: 114: Hoare triple {7395#(= (bvadd main_~i~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7399#(= (_ bv150001 32) main_~i~0)} is VALID [2018-11-23 10:33:17,810 INFO L273 TraceCheckUtils]: 115: Hoare triple {7399#(= (_ bv150001 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32); {7399#(= (_ bv150001 32) main_~i~0)} is VALID [2018-11-23 10:33:17,810 INFO L273 TraceCheckUtils]: 116: Hoare triple {7399#(= (_ bv150001 32) main_~i~0)} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7399#(= (_ bv150001 32) main_~i~0)} is VALID [2018-11-23 10:33:17,811 INFO L273 TraceCheckUtils]: 117: Hoare triple {7399#(= (_ bv150001 32) main_~i~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7409#(= (bvadd main_~i~0 (_ bv4294817294 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:17,812 INFO L273 TraceCheckUtils]: 118: Hoare triple {7409#(= (bvadd main_~i~0 (_ bv4294817294 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,812 INFO L273 TraceCheckUtils]: 119: Hoare triple {7051#false} ~i~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:17,812 INFO L273 TraceCheckUtils]: 120: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,813 INFO L273 TraceCheckUtils]: 121: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,813 INFO L273 TraceCheckUtils]: 122: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,813 INFO L273 TraceCheckUtils]: 123: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,813 INFO L273 TraceCheckUtils]: 124: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,814 INFO L273 TraceCheckUtils]: 125: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,814 INFO L273 TraceCheckUtils]: 126: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,814 INFO L273 TraceCheckUtils]: 127: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,814 INFO L273 TraceCheckUtils]: 128: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,815 INFO L273 TraceCheckUtils]: 129: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,815 INFO L273 TraceCheckUtils]: 130: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,815 INFO L273 TraceCheckUtils]: 131: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,815 INFO L273 TraceCheckUtils]: 132: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,816 INFO L273 TraceCheckUtils]: 133: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,816 INFO L273 TraceCheckUtils]: 134: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,816 INFO L273 TraceCheckUtils]: 135: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,816 INFO L273 TraceCheckUtils]: 136: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,816 INFO L273 TraceCheckUtils]: 137: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,816 INFO L273 TraceCheckUtils]: 138: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,817 INFO L273 TraceCheckUtils]: 139: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,817 INFO L273 TraceCheckUtils]: 140: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,817 INFO L273 TraceCheckUtils]: 141: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,817 INFO L273 TraceCheckUtils]: 142: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,817 INFO L273 TraceCheckUtils]: 143: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,818 INFO L273 TraceCheckUtils]: 144: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,818 INFO L273 TraceCheckUtils]: 145: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,818 INFO L273 TraceCheckUtils]: 146: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,818 INFO L273 TraceCheckUtils]: 147: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,818 INFO L273 TraceCheckUtils]: 148: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,819 INFO L273 TraceCheckUtils]: 149: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,819 INFO L273 TraceCheckUtils]: 150: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,819 INFO L273 TraceCheckUtils]: 151: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,819 INFO L273 TraceCheckUtils]: 152: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,819 INFO L273 TraceCheckUtils]: 153: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,820 INFO L273 TraceCheckUtils]: 154: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,820 INFO L273 TraceCheckUtils]: 155: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,820 INFO L273 TraceCheckUtils]: 156: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,820 INFO L273 TraceCheckUtils]: 157: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,820 INFO L273 TraceCheckUtils]: 158: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,821 INFO L273 TraceCheckUtils]: 159: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,821 INFO L273 TraceCheckUtils]: 160: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,821 INFO L273 TraceCheckUtils]: 161: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,821 INFO L273 TraceCheckUtils]: 162: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,822 INFO L273 TraceCheckUtils]: 163: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,822 INFO L273 TraceCheckUtils]: 164: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,822 INFO L273 TraceCheckUtils]: 165: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,822 INFO L273 TraceCheckUtils]: 166: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,822 INFO L273 TraceCheckUtils]: 167: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,823 INFO L273 TraceCheckUtils]: 168: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,823 INFO L273 TraceCheckUtils]: 169: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,823 INFO L273 TraceCheckUtils]: 170: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,823 INFO L273 TraceCheckUtils]: 171: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,823 INFO L273 TraceCheckUtils]: 172: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,823 INFO L273 TraceCheckUtils]: 173: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,824 INFO L273 TraceCheckUtils]: 174: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,824 INFO L273 TraceCheckUtils]: 175: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,824 INFO L273 TraceCheckUtils]: 176: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,824 INFO L273 TraceCheckUtils]: 177: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,824 INFO L273 TraceCheckUtils]: 178: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,824 INFO L273 TraceCheckUtils]: 179: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 180: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 181: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 182: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 183: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 184: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 185: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:17,825 INFO L273 TraceCheckUtils]: 186: Hoare triple {7051#false} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:17,826 INFO L273 TraceCheckUtils]: 187: Hoare triple {7051#false} havoc ~x~0;~x~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:17,826 INFO L273 TraceCheckUtils]: 188: Hoare triple {7051#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {7051#false} is VALID [2018-11-23 10:33:17,826 INFO L256 TraceCheckUtils]: 189: Hoare triple {7051#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {7051#false} is VALID [2018-11-23 10:33:17,826 INFO L273 TraceCheckUtils]: 190: Hoare triple {7051#false} ~cond := #in~cond; {7051#false} is VALID [2018-11-23 10:33:17,826 INFO L273 TraceCheckUtils]: 191: Hoare triple {7051#false} assume 0bv32 == ~cond; {7051#false} is VALID [2018-11-23 10:33:17,826 INFO L273 TraceCheckUtils]: 192: Hoare triple {7051#false} assume !false; {7051#false} is VALID [2018-11-23 10:33:17,892 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 1809 trivial. 0 not checked. [2018-11-23 10:33:17,893 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:18,240 INFO L273 TraceCheckUtils]: 192: Hoare triple {7051#false} assume !false; {7051#false} is VALID [2018-11-23 10:33:18,240 INFO L273 TraceCheckUtils]: 191: Hoare triple {7051#false} assume 0bv32 == ~cond; {7051#false} is VALID [2018-11-23 10:33:18,241 INFO L273 TraceCheckUtils]: 190: Hoare triple {7051#false} ~cond := #in~cond; {7051#false} is VALID [2018-11-23 10:33:18,241 INFO L256 TraceCheckUtils]: 189: Hoare triple {7051#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {7051#false} is VALID [2018-11-23 10:33:18,241 INFO L273 TraceCheckUtils]: 188: Hoare triple {7051#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {7051#false} is VALID [2018-11-23 10:33:18,241 INFO L273 TraceCheckUtils]: 187: Hoare triple {7051#false} havoc ~x~0;~x~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:18,241 INFO L273 TraceCheckUtils]: 186: Hoare triple {7051#false} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,241 INFO L273 TraceCheckUtils]: 185: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,242 INFO L273 TraceCheckUtils]: 184: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,242 INFO L273 TraceCheckUtils]: 183: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,242 INFO L273 TraceCheckUtils]: 182: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,242 INFO L273 TraceCheckUtils]: 181: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,242 INFO L273 TraceCheckUtils]: 180: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,243 INFO L273 TraceCheckUtils]: 179: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,243 INFO L273 TraceCheckUtils]: 178: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,243 INFO L273 TraceCheckUtils]: 177: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,243 INFO L273 TraceCheckUtils]: 176: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,243 INFO L273 TraceCheckUtils]: 175: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,243 INFO L273 TraceCheckUtils]: 174: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 173: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 172: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 171: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 170: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 169: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 168: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 167: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,244 INFO L273 TraceCheckUtils]: 166: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 165: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 164: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 163: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 162: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 161: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 160: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 159: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,245 INFO L273 TraceCheckUtils]: 158: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 157: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 156: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 155: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 154: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 153: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 152: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 151: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 150: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,246 INFO L273 TraceCheckUtils]: 149: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 148: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 147: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 146: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 145: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 144: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 143: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 142: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,247 INFO L273 TraceCheckUtils]: 141: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 140: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 139: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 138: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 137: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 136: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 135: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 134: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 133: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,248 INFO L273 TraceCheckUtils]: 132: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 131: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 130: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 129: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 128: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 127: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 126: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 125: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,249 INFO L273 TraceCheckUtils]: 124: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,250 INFO L273 TraceCheckUtils]: 123: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,250 INFO L273 TraceCheckUtils]: 122: Hoare triple {7051#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {7051#false} is VALID [2018-11-23 10:33:18,250 INFO L273 TraceCheckUtils]: 121: Hoare triple {7051#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {7051#false} is VALID [2018-11-23 10:33:18,250 INFO L273 TraceCheckUtils]: 120: Hoare triple {7051#false} assume !!~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,250 INFO L273 TraceCheckUtils]: 119: Hoare triple {7051#false} ~i~0 := 0bv32; {7051#false} is VALID [2018-11-23 10:33:18,250 INFO L273 TraceCheckUtils]: 118: Hoare triple {7857#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {7051#false} is VALID [2018-11-23 10:33:18,251 INFO L273 TraceCheckUtils]: 117: Hoare triple {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7857#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:33:18,251 INFO L273 TraceCheckUtils]: 116: Hoare triple {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,251 INFO L273 TraceCheckUtils]: 115: Hoare triple {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,256 INFO L273 TraceCheckUtils]: 114: Hoare triple {7871#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7861#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,257 INFO L273 TraceCheckUtils]: 113: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !(~i~0 != ~z~0); {7871#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,257 INFO L273 TraceCheckUtils]: 112: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,258 INFO L273 TraceCheckUtils]: 111: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,258 INFO L273 TraceCheckUtils]: 110: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,258 INFO L273 TraceCheckUtils]: 109: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,259 INFO L273 TraceCheckUtils]: 108: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,259 INFO L273 TraceCheckUtils]: 107: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,260 INFO L273 TraceCheckUtils]: 106: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,260 INFO L273 TraceCheckUtils]: 105: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,261 INFO L273 TraceCheckUtils]: 104: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,261 INFO L273 TraceCheckUtils]: 103: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,262 INFO L273 TraceCheckUtils]: 102: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,262 INFO L273 TraceCheckUtils]: 101: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,263 INFO L273 TraceCheckUtils]: 100: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,263 INFO L273 TraceCheckUtils]: 99: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,264 INFO L273 TraceCheckUtils]: 98: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !(~i~0 != ~z~0); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,264 INFO L273 TraceCheckUtils]: 97: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,265 INFO L273 TraceCheckUtils]: 96: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,265 INFO L273 TraceCheckUtils]: 95: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,266 INFO L273 TraceCheckUtils]: 94: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,267 INFO L273 TraceCheckUtils]: 93: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,267 INFO L273 TraceCheckUtils]: 92: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,268 INFO L273 TraceCheckUtils]: 91: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,268 INFO L273 TraceCheckUtils]: 90: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,269 INFO L273 TraceCheckUtils]: 89: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,269 INFO L273 TraceCheckUtils]: 88: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,269 INFO L273 TraceCheckUtils]: 87: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,270 INFO L273 TraceCheckUtils]: 86: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,270 INFO L273 TraceCheckUtils]: 85: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,270 INFO L273 TraceCheckUtils]: 84: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,271 INFO L273 TraceCheckUtils]: 83: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !(~i~0 != ~z~0); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,271 INFO L273 TraceCheckUtils]: 82: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,272 INFO L273 TraceCheckUtils]: 81: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,272 INFO L273 TraceCheckUtils]: 80: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,273 INFO L273 TraceCheckUtils]: 79: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,273 INFO L273 TraceCheckUtils]: 78: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,274 INFO L273 TraceCheckUtils]: 77: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,274 INFO L273 TraceCheckUtils]: 76: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,275 INFO L273 TraceCheckUtils]: 75: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,275 INFO L273 TraceCheckUtils]: 74: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,276 INFO L273 TraceCheckUtils]: 73: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,276 INFO L273 TraceCheckUtils]: 72: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,277 INFO L273 TraceCheckUtils]: 71: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,277 INFO L273 TraceCheckUtils]: 70: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,278 INFO L273 TraceCheckUtils]: 69: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,278 INFO L273 TraceCheckUtils]: 68: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,279 INFO L273 TraceCheckUtils]: 67: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,279 INFO L273 TraceCheckUtils]: 66: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,280 INFO L273 TraceCheckUtils]: 65: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,280 INFO L273 TraceCheckUtils]: 64: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,280 INFO L273 TraceCheckUtils]: 63: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,281 INFO L273 TraceCheckUtils]: 62: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,281 INFO L273 TraceCheckUtils]: 61: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,282 INFO L273 TraceCheckUtils]: 60: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,282 INFO L273 TraceCheckUtils]: 59: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,283 INFO L273 TraceCheckUtils]: 58: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,283 INFO L273 TraceCheckUtils]: 57: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,284 INFO L273 TraceCheckUtils]: 56: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,284 INFO L273 TraceCheckUtils]: 55: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,285 INFO L273 TraceCheckUtils]: 54: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,285 INFO L273 TraceCheckUtils]: 53: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,286 INFO L273 TraceCheckUtils]: 52: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,286 INFO L273 TraceCheckUtils]: 51: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} ~i~0 := 0bv32; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,287 INFO L273 TraceCheckUtils]: 50: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,287 INFO L273 TraceCheckUtils]: 49: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,288 INFO L273 TraceCheckUtils]: 48: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,288 INFO L273 TraceCheckUtils]: 47: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,289 INFO L273 TraceCheckUtils]: 46: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,289 INFO L273 TraceCheckUtils]: 45: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,302 INFO L273 TraceCheckUtils]: 44: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,303 INFO L273 TraceCheckUtils]: 43: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,303 INFO L273 TraceCheckUtils]: 42: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,303 INFO L273 TraceCheckUtils]: 41: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,303 INFO L273 TraceCheckUtils]: 40: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,304 INFO L273 TraceCheckUtils]: 39: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,304 INFO L273 TraceCheckUtils]: 38: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,304 INFO L273 TraceCheckUtils]: 37: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,305 INFO L273 TraceCheckUtils]: 36: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,305 INFO L273 TraceCheckUtils]: 35: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,306 INFO L273 TraceCheckUtils]: 34: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,306 INFO L273 TraceCheckUtils]: 33: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,307 INFO L273 TraceCheckUtils]: 32: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,307 INFO L273 TraceCheckUtils]: 31: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,308 INFO L273 TraceCheckUtils]: 30: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,308 INFO L273 TraceCheckUtils]: 29: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,309 INFO L273 TraceCheckUtils]: 28: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,309 INFO L273 TraceCheckUtils]: 27: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,310 INFO L273 TraceCheckUtils]: 26: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,310 INFO L273 TraceCheckUtils]: 25: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,311 INFO L273 TraceCheckUtils]: 24: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,311 INFO L273 TraceCheckUtils]: 23: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,312 INFO L273 TraceCheckUtils]: 22: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,312 INFO L273 TraceCheckUtils]: 21: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,313 INFO L273 TraceCheckUtils]: 20: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,313 INFO L273 TraceCheckUtils]: 19: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,314 INFO L273 TraceCheckUtils]: 18: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,314 INFO L273 TraceCheckUtils]: 17: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,315 INFO L273 TraceCheckUtils]: 16: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,315 INFO L273 TraceCheckUtils]: 15: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,316 INFO L273 TraceCheckUtils]: 14: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,316 INFO L273 TraceCheckUtils]: 13: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,317 INFO L273 TraceCheckUtils]: 12: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,317 INFO L273 TraceCheckUtils]: 11: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,318 INFO L273 TraceCheckUtils]: 10: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,318 INFO L273 TraceCheckUtils]: 9: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,319 INFO L273 TraceCheckUtils]: 8: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,319 INFO L273 TraceCheckUtils]: 7: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,320 INFO L273 TraceCheckUtils]: 6: Hoare triple {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,321 INFO L273 TraceCheckUtils]: 5: Hoare triple {7050#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {7875#(bvslt (bvadd main_~z~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:18,321 INFO L256 TraceCheckUtils]: 4: Hoare triple {7050#true} call #t~ret12 := main(); {7050#true} is VALID [2018-11-23 10:33:18,321 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7050#true} {7050#true} #87#return; {7050#true} is VALID [2018-11-23 10:33:18,321 INFO L273 TraceCheckUtils]: 2: Hoare triple {7050#true} assume true; {7050#true} is VALID [2018-11-23 10:33:18,322 INFO L273 TraceCheckUtils]: 1: Hoare triple {7050#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {7050#true} is VALID [2018-11-23 10:33:18,322 INFO L256 TraceCheckUtils]: 0: Hoare triple {7050#true} call ULTIMATE.init(); {7050#true} is VALID [2018-11-23 10:33:18,354 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 1809 trivial. 0 not checked. [2018-11-23 10:33:18,356 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:18,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 10 [2018-11-23 10:33:18,357 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 193 [2018-11-23 10:33:18,358 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:18,358 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states. [2018-11-23 10:33:18,428 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:18,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 10:33:18,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 10:33:18,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-11-23 10:33:18,429 INFO L87 Difference]: Start difference. First operand 442 states and 477 transitions. Second operand 10 states. [2018-11-23 10:33:20,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:20,103 INFO L93 Difference]: Finished difference Result 675 states and 729 transitions. [2018-11-23 10:33:20,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 10:33:20,103 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 193 [2018-11-23 10:33:20,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:20,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:33:20,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 92 transitions. [2018-11-23 10:33:20,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10 states. [2018-11-23 10:33:20,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 92 transitions. [2018-11-23 10:33:20,109 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 9 states and 92 transitions. [2018-11-23 10:33:20,327 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 92 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:20,341 INFO L225 Difference]: With dead ends: 675 [2018-11-23 10:33:20,341 INFO L226 Difference]: Without dead ends: 474 [2018-11-23 10:33:20,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 391 GetRequests, 377 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=159, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:33:20,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2018-11-23 10:33:20,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 366. [2018-11-23 10:33:20,838 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:20,838 INFO L82 GeneralOperation]: Start isEquivalent. First operand 474 states. Second operand 366 states. [2018-11-23 10:33:20,838 INFO L74 IsIncluded]: Start isIncluded. First operand 474 states. Second operand 366 states. [2018-11-23 10:33:20,838 INFO L87 Difference]: Start difference. First operand 474 states. Second operand 366 states. [2018-11-23 10:33:20,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:20,856 INFO L93 Difference]: Finished difference Result 474 states and 501 transitions. [2018-11-23 10:33:20,857 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 501 transitions. [2018-11-23 10:33:20,857 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:20,858 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:20,858 INFO L74 IsIncluded]: Start isIncluded. First operand 366 states. Second operand 474 states. [2018-11-23 10:33:20,858 INFO L87 Difference]: Start difference. First operand 366 states. Second operand 474 states. [2018-11-23 10:33:20,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:20,874 INFO L93 Difference]: Finished difference Result 474 states and 501 transitions. [2018-11-23 10:33:20,874 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 501 transitions. [2018-11-23 10:33:20,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:20,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:20,875 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:20,875 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:20,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2018-11-23 10:33:20,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 393 transitions. [2018-11-23 10:33:20,887 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 393 transitions. Word has length 193 [2018-11-23 10:33:20,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:20,887 INFO L480 AbstractCegarLoop]: Abstraction has 366 states and 393 transitions. [2018-11-23 10:33:20,887 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 10:33:20,888 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 393 transitions. [2018-11-23 10:33:20,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-23 10:33:20,890 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:20,890 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 22, 20, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:20,890 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:20,890 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:20,891 INFO L82 PathProgramCache]: Analyzing trace with hash 292268728, now seen corresponding path program 4 times [2018-11-23 10:33:20,892 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:20,892 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:20,916 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:33:21,041 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:33:21,041 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:21,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:21,087 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:21,474 INFO L256 TraceCheckUtils]: 0: Hoare triple {10594#true} call ULTIMATE.init(); {10594#true} is VALID [2018-11-23 10:33:21,474 INFO L273 TraceCheckUtils]: 1: Hoare triple {10594#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10594#true} is VALID [2018-11-23 10:33:21,474 INFO L273 TraceCheckUtils]: 2: Hoare triple {10594#true} assume true; {10594#true} is VALID [2018-11-23 10:33:21,474 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10594#true} {10594#true} #87#return; {10594#true} is VALID [2018-11-23 10:33:21,475 INFO L256 TraceCheckUtils]: 4: Hoare triple {10594#true} call #t~ret12 := main(); {10594#true} is VALID [2018-11-23 10:33:21,476 INFO L273 TraceCheckUtils]: 5: Hoare triple {10594#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,476 INFO L273 TraceCheckUtils]: 6: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,477 INFO L273 TraceCheckUtils]: 7: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,477 INFO L273 TraceCheckUtils]: 8: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,477 INFO L273 TraceCheckUtils]: 9: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,478 INFO L273 TraceCheckUtils]: 10: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,478 INFO L273 TraceCheckUtils]: 11: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,478 INFO L273 TraceCheckUtils]: 12: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,479 INFO L273 TraceCheckUtils]: 13: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,479 INFO L273 TraceCheckUtils]: 14: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,480 INFO L273 TraceCheckUtils]: 15: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,480 INFO L273 TraceCheckUtils]: 16: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,480 INFO L273 TraceCheckUtils]: 17: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,481 INFO L273 TraceCheckUtils]: 18: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,481 INFO L273 TraceCheckUtils]: 19: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,482 INFO L273 TraceCheckUtils]: 20: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,482 INFO L273 TraceCheckUtils]: 21: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,483 INFO L273 TraceCheckUtils]: 22: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,483 INFO L273 TraceCheckUtils]: 23: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,484 INFO L273 TraceCheckUtils]: 24: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,484 INFO L273 TraceCheckUtils]: 25: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,485 INFO L273 TraceCheckUtils]: 26: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,485 INFO L273 TraceCheckUtils]: 27: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,486 INFO L273 TraceCheckUtils]: 28: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,486 INFO L273 TraceCheckUtils]: 29: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,487 INFO L273 TraceCheckUtils]: 30: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,487 INFO L273 TraceCheckUtils]: 31: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,488 INFO L273 TraceCheckUtils]: 32: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,488 INFO L273 TraceCheckUtils]: 33: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,489 INFO L273 TraceCheckUtils]: 34: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,489 INFO L273 TraceCheckUtils]: 35: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,490 INFO L273 TraceCheckUtils]: 36: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,490 INFO L273 TraceCheckUtils]: 37: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,491 INFO L273 TraceCheckUtils]: 38: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,491 INFO L273 TraceCheckUtils]: 39: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,492 INFO L273 TraceCheckUtils]: 40: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,492 INFO L273 TraceCheckUtils]: 41: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,493 INFO L273 TraceCheckUtils]: 42: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,493 INFO L273 TraceCheckUtils]: 43: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,494 INFO L273 TraceCheckUtils]: 44: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,494 INFO L273 TraceCheckUtils]: 45: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,495 INFO L273 TraceCheckUtils]: 46: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,495 INFO L273 TraceCheckUtils]: 47: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,496 INFO L273 TraceCheckUtils]: 48: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,496 INFO L273 TraceCheckUtils]: 49: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,497 INFO L273 TraceCheckUtils]: 50: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:21,497 INFO L273 TraceCheckUtils]: 51: Hoare triple {10614#(= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32))} ~i~0 := 0bv32; {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,498 INFO L273 TraceCheckUtils]: 52: Hoare triple {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,499 INFO L273 TraceCheckUtils]: 53: Hoare triple {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,500 INFO L273 TraceCheckUtils]: 54: Hoare triple {10753#(and (= main_~i~0 (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,500 INFO L273 TraceCheckUtils]: 55: Hoare triple {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,501 INFO L273 TraceCheckUtils]: 56: Hoare triple {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,502 INFO L273 TraceCheckUtils]: 57: Hoare triple {10763#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:21,502 INFO L273 TraceCheckUtils]: 58: Hoare triple {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:21,503 INFO L273 TraceCheckUtils]: 59: Hoare triple {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:33:21,504 INFO L273 TraceCheckUtils]: 60: Hoare triple {10773#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,505 INFO L273 TraceCheckUtils]: 61: Hoare triple {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,506 INFO L273 TraceCheckUtils]: 62: Hoare triple {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,506 INFO L273 TraceCheckUtils]: 63: Hoare triple {10783#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,507 INFO L273 TraceCheckUtils]: 64: Hoare triple {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,508 INFO L273 TraceCheckUtils]: 65: Hoare triple {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,509 INFO L273 TraceCheckUtils]: 66: Hoare triple {10793#(and (= (_ bv4 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,509 INFO L273 TraceCheckUtils]: 67: Hoare triple {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,510 INFO L273 TraceCheckUtils]: 68: Hoare triple {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,511 INFO L273 TraceCheckUtils]: 69: Hoare triple {10803#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,512 INFO L273 TraceCheckUtils]: 70: Hoare triple {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,513 INFO L273 TraceCheckUtils]: 71: Hoare triple {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,513 INFO L273 TraceCheckUtils]: 72: Hoare triple {10813#(and (= (_ bv6 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,514 INFO L273 TraceCheckUtils]: 73: Hoare triple {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,515 INFO L273 TraceCheckUtils]: 74: Hoare triple {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,516 INFO L273 TraceCheckUtils]: 75: Hoare triple {10823#(and (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,516 INFO L273 TraceCheckUtils]: 76: Hoare triple {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,517 INFO L273 TraceCheckUtils]: 77: Hoare triple {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,518 INFO L273 TraceCheckUtils]: 78: Hoare triple {10833#(and (= (_ bv8 32) main_~i~0) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,519 INFO L273 TraceCheckUtils]: 79: Hoare triple {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32); {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,519 INFO L273 TraceCheckUtils]: 80: Hoare triple {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:21,520 INFO L273 TraceCheckUtils]: 81: Hoare triple {10843#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 10:33:21,521 INFO L273 TraceCheckUtils]: 82: Hoare triple {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 10:33:21,521 INFO L273 TraceCheckUtils]: 83: Hoare triple {10853#(and (= (bvadd main_~z~0 (_ bv4294817296 32)) (_ bv0 32)) (= (_ bv10 32) main_~i~0))} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:21,522 INFO L273 TraceCheckUtils]: 84: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,522 INFO L273 TraceCheckUtils]: 85: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,522 INFO L273 TraceCheckUtils]: 86: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,522 INFO L273 TraceCheckUtils]: 87: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,522 INFO L273 TraceCheckUtils]: 88: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,522 INFO L273 TraceCheckUtils]: 89: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,523 INFO L273 TraceCheckUtils]: 90: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,523 INFO L273 TraceCheckUtils]: 91: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,523 INFO L273 TraceCheckUtils]: 92: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,523 INFO L273 TraceCheckUtils]: 93: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,523 INFO L273 TraceCheckUtils]: 94: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,524 INFO L273 TraceCheckUtils]: 95: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,524 INFO L273 TraceCheckUtils]: 96: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,524 INFO L273 TraceCheckUtils]: 97: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,524 INFO L273 TraceCheckUtils]: 98: Hoare triple {10595#false} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:21,524 INFO L273 TraceCheckUtils]: 99: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,525 INFO L273 TraceCheckUtils]: 100: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,525 INFO L273 TraceCheckUtils]: 101: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,525 INFO L273 TraceCheckUtils]: 102: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,525 INFO L273 TraceCheckUtils]: 103: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,525 INFO L273 TraceCheckUtils]: 104: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,526 INFO L273 TraceCheckUtils]: 105: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,526 INFO L273 TraceCheckUtils]: 106: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,526 INFO L273 TraceCheckUtils]: 107: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,526 INFO L273 TraceCheckUtils]: 108: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,526 INFO L273 TraceCheckUtils]: 109: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 110: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 111: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 112: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 113: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 114: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 115: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 116: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:21,527 INFO L273 TraceCheckUtils]: 117: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 118: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 119: Hoare triple {10595#false} ~i~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 120: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 121: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 122: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 123: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 124: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 125: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,528 INFO L273 TraceCheckUtils]: 126: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 127: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 128: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 129: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 130: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 131: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 132: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 133: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,529 INFO L273 TraceCheckUtils]: 134: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 135: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 136: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 137: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 138: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 139: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 140: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 141: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,530 INFO L273 TraceCheckUtils]: 142: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 143: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 144: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 145: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 146: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 147: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 148: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 149: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 150: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,531 INFO L273 TraceCheckUtils]: 151: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 152: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 153: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 154: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 155: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 156: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 157: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 158: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,532 INFO L273 TraceCheckUtils]: 159: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 160: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 161: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 162: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 163: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 164: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 165: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 166: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 167: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,533 INFO L273 TraceCheckUtils]: 168: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 169: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 170: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 171: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 172: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 173: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 174: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 175: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,534 INFO L273 TraceCheckUtils]: 176: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 177: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 178: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 179: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 180: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 181: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 182: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 183: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,535 INFO L273 TraceCheckUtils]: 184: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 185: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 186: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 187: Hoare triple {10595#false} havoc ~x~0;~x~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 188: Hoare triple {10595#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L256 TraceCheckUtils]: 189: Hoare triple {10595#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 190: Hoare triple {10595#false} ~cond := #in~cond; {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 191: Hoare triple {10595#false} assume 0bv32 == ~cond; {10595#false} is VALID [2018-11-23 10:33:21,536 INFO L273 TraceCheckUtils]: 192: Hoare triple {10595#false} assume !false; {10595#false} is VALID [2018-11-23 10:33:21,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 373 proven. 155 refuted. 0 times theorem prover too weak. 1386 trivial. 0 not checked. [2018-11-23 10:33:21,570 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:22,177 INFO L273 TraceCheckUtils]: 192: Hoare triple {10595#false} assume !false; {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L273 TraceCheckUtils]: 191: Hoare triple {10595#false} assume 0bv32 == ~cond; {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L273 TraceCheckUtils]: 190: Hoare triple {10595#false} ~cond := #in~cond; {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L256 TraceCheckUtils]: 189: Hoare triple {10595#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L273 TraceCheckUtils]: 188: Hoare triple {10595#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L273 TraceCheckUtils]: 187: Hoare triple {10595#false} havoc ~x~0;~x~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L273 TraceCheckUtils]: 186: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,178 INFO L273 TraceCheckUtils]: 185: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 184: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 183: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 182: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 181: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 180: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 179: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,179 INFO L273 TraceCheckUtils]: 178: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 177: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 176: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 175: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 174: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 173: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 172: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,180 INFO L273 TraceCheckUtils]: 171: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 170: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 169: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 168: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 167: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 166: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 165: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 164: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,181 INFO L273 TraceCheckUtils]: 163: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 162: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 161: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 160: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 159: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 158: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 157: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 156: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 155: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,182 INFO L273 TraceCheckUtils]: 154: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 153: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 152: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 151: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 150: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 149: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 148: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 147: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,183 INFO L273 TraceCheckUtils]: 146: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 145: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 144: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 143: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 142: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 141: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 140: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 139: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 138: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,184 INFO L273 TraceCheckUtils]: 137: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 136: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 135: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 134: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 133: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 132: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 131: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 130: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,185 INFO L273 TraceCheckUtils]: 129: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 128: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 127: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 126: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 125: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 124: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 123: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 122: Hoare triple {10595#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {10595#false} is VALID [2018-11-23 10:33:22,186 INFO L273 TraceCheckUtils]: 121: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {10595#false} is VALID [2018-11-23 10:33:22,187 INFO L273 TraceCheckUtils]: 120: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,187 INFO L273 TraceCheckUtils]: 119: Hoare triple {10595#false} ~i~0 := 0bv32; {10595#false} is VALID [2018-11-23 10:33:22,187 INFO L273 TraceCheckUtils]: 118: Hoare triple {10595#false} assume !~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,187 INFO L273 TraceCheckUtils]: 117: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,187 INFO L273 TraceCheckUtils]: 116: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,188 INFO L273 TraceCheckUtils]: 115: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,188 INFO L273 TraceCheckUtils]: 114: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,188 INFO L273 TraceCheckUtils]: 113: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,188 INFO L273 TraceCheckUtils]: 112: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,188 INFO L273 TraceCheckUtils]: 111: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,188 INFO L273 TraceCheckUtils]: 110: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,189 INFO L273 TraceCheckUtils]: 109: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,189 INFO L273 TraceCheckUtils]: 108: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,189 INFO L273 TraceCheckUtils]: 107: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,189 INFO L273 TraceCheckUtils]: 106: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,189 INFO L273 TraceCheckUtils]: 105: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,189 INFO L273 TraceCheckUtils]: 104: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,190 INFO L273 TraceCheckUtils]: 103: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,190 INFO L273 TraceCheckUtils]: 102: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,190 INFO L273 TraceCheckUtils]: 101: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,190 INFO L273 TraceCheckUtils]: 100: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,190 INFO L273 TraceCheckUtils]: 99: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,190 INFO L273 TraceCheckUtils]: 98: Hoare triple {10595#false} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:22,191 INFO L273 TraceCheckUtils]: 97: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,191 INFO L273 TraceCheckUtils]: 96: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,191 INFO L273 TraceCheckUtils]: 95: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,191 INFO L273 TraceCheckUtils]: 94: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,191 INFO L273 TraceCheckUtils]: 93: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,191 INFO L273 TraceCheckUtils]: 92: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 91: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 90: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 89: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 88: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 87: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 86: Hoare triple {10595#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {10595#false} is VALID [2018-11-23 10:33:22,192 INFO L273 TraceCheckUtils]: 85: Hoare triple {10595#false} assume !!~bvslt32(~i~0, 200000bv32); {10595#false} is VALID [2018-11-23 10:33:22,193 INFO L273 TraceCheckUtils]: 84: Hoare triple {10595#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {10595#false} is VALID [2018-11-23 10:33:22,205 INFO L273 TraceCheckUtils]: 83: Hoare triple {11514#(not (= main_~z~0 main_~i~0))} assume !(~i~0 != ~z~0); {10595#false} is VALID [2018-11-23 10:33:22,206 INFO L273 TraceCheckUtils]: 82: Hoare triple {11514#(not (= main_~z~0 main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11514#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:33:22,206 INFO L273 TraceCheckUtils]: 81: Hoare triple {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11514#(not (= main_~z~0 main_~i~0))} is VALID [2018-11-23 10:33:22,206 INFO L273 TraceCheckUtils]: 80: Hoare triple {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,207 INFO L273 TraceCheckUtils]: 79: Hoare triple {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,233 INFO L273 TraceCheckUtils]: 78: Hoare triple {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11521#(not (= (bvadd main_~z~0 (_ bv4294967295 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,234 INFO L273 TraceCheckUtils]: 77: Hoare triple {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,234 INFO L273 TraceCheckUtils]: 76: Hoare triple {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,257 INFO L273 TraceCheckUtils]: 75: Hoare triple {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11531#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,257 INFO L273 TraceCheckUtils]: 74: Hoare triple {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,257 INFO L273 TraceCheckUtils]: 73: Hoare triple {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,276 INFO L273 TraceCheckUtils]: 72: Hoare triple {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11541#(not (= (bvadd main_~i~0 (_ bv3 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,278 INFO L273 TraceCheckUtils]: 71: Hoare triple {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,278 INFO L273 TraceCheckUtils]: 70: Hoare triple {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,313 INFO L273 TraceCheckUtils]: 69: Hoare triple {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11551#(not (= (bvadd main_~z~0 (_ bv4294967292 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,313 INFO L273 TraceCheckUtils]: 68: Hoare triple {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,314 INFO L273 TraceCheckUtils]: 67: Hoare triple {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,335 INFO L273 TraceCheckUtils]: 66: Hoare triple {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11561#(not (= (bvadd main_~i~0 (_ bv5 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,336 INFO L273 TraceCheckUtils]: 65: Hoare triple {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,336 INFO L273 TraceCheckUtils]: 64: Hoare triple {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,354 INFO L273 TraceCheckUtils]: 63: Hoare triple {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11571#(not (= (bvadd main_~i~0 (_ bv6 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,354 INFO L273 TraceCheckUtils]: 62: Hoare triple {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,356 INFO L273 TraceCheckUtils]: 61: Hoare triple {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,379 INFO L273 TraceCheckUtils]: 60: Hoare triple {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11581#(not (= (bvadd main_~z~0 (_ bv4294967289 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,380 INFO L273 TraceCheckUtils]: 59: Hoare triple {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,382 INFO L273 TraceCheckUtils]: 58: Hoare triple {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,397 INFO L273 TraceCheckUtils]: 57: Hoare triple {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11591#(not (= (bvadd main_~i~0 (_ bv8 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,398 INFO L273 TraceCheckUtils]: 56: Hoare triple {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,398 INFO L273 TraceCheckUtils]: 55: Hoare triple {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} assume !!~bvslt32(~i~0, 200000bv32); {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,418 INFO L273 TraceCheckUtils]: 54: Hoare triple {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11601#(not (= (bvadd main_~z~0 (_ bv4294967287 32)) main_~i~0))} is VALID [2018-11-23 10:33:22,418 INFO L273 TraceCheckUtils]: 53: Hoare triple {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,420 INFO L273 TraceCheckUtils]: 52: Hoare triple {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} assume !!~bvslt32(~i~0, 200000bv32); {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,420 INFO L273 TraceCheckUtils]: 51: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} ~i~0 := 0bv32; {11611#(not (= (bvadd main_~i~0 (_ bv10 32)) main_~z~0))} is VALID [2018-11-23 10:33:22,422 INFO L273 TraceCheckUtils]: 50: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, 200000bv32); {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,424 INFO L273 TraceCheckUtils]: 49: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,424 INFO L273 TraceCheckUtils]: 48: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,426 INFO L273 TraceCheckUtils]: 47: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,426 INFO L273 TraceCheckUtils]: 46: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,428 INFO L273 TraceCheckUtils]: 45: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,428 INFO L273 TraceCheckUtils]: 44: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,430 INFO L273 TraceCheckUtils]: 43: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,430 INFO L273 TraceCheckUtils]: 42: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,432 INFO L273 TraceCheckUtils]: 41: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,432 INFO L273 TraceCheckUtils]: 40: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,434 INFO L273 TraceCheckUtils]: 39: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,434 INFO L273 TraceCheckUtils]: 38: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,436 INFO L273 TraceCheckUtils]: 37: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,436 INFO L273 TraceCheckUtils]: 36: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,438 INFO L273 TraceCheckUtils]: 35: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,438 INFO L273 TraceCheckUtils]: 34: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,440 INFO L273 TraceCheckUtils]: 33: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,440 INFO L273 TraceCheckUtils]: 32: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,442 INFO L273 TraceCheckUtils]: 31: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,442 INFO L273 TraceCheckUtils]: 30: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,444 INFO L273 TraceCheckUtils]: 29: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,444 INFO L273 TraceCheckUtils]: 28: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,446 INFO L273 TraceCheckUtils]: 27: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,446 INFO L273 TraceCheckUtils]: 26: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,448 INFO L273 TraceCheckUtils]: 25: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,448 INFO L273 TraceCheckUtils]: 24: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,450 INFO L273 TraceCheckUtils]: 23: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,450 INFO L273 TraceCheckUtils]: 22: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,453 INFO L273 TraceCheckUtils]: 21: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,453 INFO L273 TraceCheckUtils]: 20: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,455 INFO L273 TraceCheckUtils]: 19: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,455 INFO L273 TraceCheckUtils]: 18: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,457 INFO L273 TraceCheckUtils]: 17: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,457 INFO L273 TraceCheckUtils]: 16: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,459 INFO L273 TraceCheckUtils]: 15: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,459 INFO L273 TraceCheckUtils]: 14: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,461 INFO L273 TraceCheckUtils]: 13: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,461 INFO L273 TraceCheckUtils]: 12: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,463 INFO L273 TraceCheckUtils]: 11: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,465 INFO L273 TraceCheckUtils]: 10: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,465 INFO L273 TraceCheckUtils]: 9: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,465 INFO L273 TraceCheckUtils]: 8: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,467 INFO L273 TraceCheckUtils]: 7: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,467 INFO L273 TraceCheckUtils]: 6: Hoare triple {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,469 INFO L273 TraceCheckUtils]: 5: Hoare triple {10594#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {11621#(not (= (bvadd main_~z~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 10:33:22,469 INFO L256 TraceCheckUtils]: 4: Hoare triple {10594#true} call #t~ret12 := main(); {10594#true} is VALID [2018-11-23 10:33:22,469 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {10594#true} {10594#true} #87#return; {10594#true} is VALID [2018-11-23 10:33:22,469 INFO L273 TraceCheckUtils]: 2: Hoare triple {10594#true} assume true; {10594#true} is VALID [2018-11-23 10:33:22,469 INFO L273 TraceCheckUtils]: 1: Hoare triple {10594#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {10594#true} is VALID [2018-11-23 10:33:22,469 INFO L256 TraceCheckUtils]: 0: Hoare triple {10594#true} call ULTIMATE.init(); {10594#true} is VALID [2018-11-23 10:33:22,498 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 373 proven. 155 refuted. 0 times theorem prover too weak. 1386 trivial. 0 not checked. [2018-11-23 10:33:22,501 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:22,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-11-23 10:33:22,502 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 193 [2018-11-23 10:33:22,502 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:22,503 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states. [2018-11-23 10:33:22,844 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:22,845 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-23 10:33:22,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-23 10:33:22,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-11-23 10:33:22,846 INFO L87 Difference]: Start difference. First operand 366 states and 393 transitions. Second operand 26 states. [2018-11-23 10:33:33,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:33,698 INFO L93 Difference]: Finished difference Result 529 states and 599 transitions. [2018-11-23 10:33:33,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 10:33:33,698 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 193 [2018-11-23 10:33:33,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:33:33,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 10:33:33,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 264 transitions. [2018-11-23 10:33:33,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 10:33:33,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 264 transitions. [2018-11-23 10:33:33,705 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 264 transitions. [2018-11-23 10:33:34,602 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 264 edges. 264 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:34,608 INFO L225 Difference]: With dead ends: 529 [2018-11-23 10:33:34,608 INFO L226 Difference]: Without dead ends: 259 [2018-11-23 10:33:34,609 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 397 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=505, Invalid=901, Unknown=0, NotChecked=0, Total=1406 [2018-11-23 10:33:34,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-11-23 10:33:35,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 258. [2018-11-23 10:33:35,010 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:33:35,010 INFO L82 GeneralOperation]: Start isEquivalent. First operand 259 states. Second operand 258 states. [2018-11-23 10:33:35,011 INFO L74 IsIncluded]: Start isIncluded. First operand 259 states. Second operand 258 states. [2018-11-23 10:33:35,011 INFO L87 Difference]: Start difference. First operand 259 states. Second operand 258 states. [2018-11-23 10:33:35,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:35,017 INFO L93 Difference]: Finished difference Result 259 states and 274 transitions. [2018-11-23 10:33:35,018 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 274 transitions. [2018-11-23 10:33:35,018 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:35,018 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:35,018 INFO L74 IsIncluded]: Start isIncluded. First operand 258 states. Second operand 259 states. [2018-11-23 10:33:35,019 INFO L87 Difference]: Start difference. First operand 258 states. Second operand 259 states. [2018-11-23 10:33:35,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:33:35,024 INFO L93 Difference]: Finished difference Result 259 states and 274 transitions. [2018-11-23 10:33:35,025 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 274 transitions. [2018-11-23 10:33:35,025 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:33:35,025 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:33:35,026 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:33:35,026 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:33:35,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-11-23 10:33:35,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 273 transitions. [2018-11-23 10:33:35,032 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 273 transitions. Word has length 193 [2018-11-23 10:33:35,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:33:35,032 INFO L480 AbstractCegarLoop]: Abstraction has 258 states and 273 transitions. [2018-11-23 10:33:35,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-23 10:33:35,033 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 273 transitions. [2018-11-23 10:33:35,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-11-23 10:33:35,035 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:33:35,035 INFO L402 BasicCegarLoop]: trace histogram [22, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:33:35,035 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:33:35,036 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:33:35,036 INFO L82 PathProgramCache]: Analyzing trace with hash 1072234232, now seen corresponding path program 4 times [2018-11-23 10:33:35,037 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:33:35,037 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:33:35,065 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:33:35,372 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:33:35,372 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:33:35,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:33:35,475 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:33:36,025 INFO L256 TraceCheckUtils]: 0: Hoare triple {13388#true} call ULTIMATE.init(); {13388#true} is VALID [2018-11-23 10:33:36,026 INFO L273 TraceCheckUtils]: 1: Hoare triple {13388#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {13388#true} is VALID [2018-11-23 10:33:36,026 INFO L273 TraceCheckUtils]: 2: Hoare triple {13388#true} assume true; {13388#true} is VALID [2018-11-23 10:33:36,026 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {13388#true} {13388#true} #87#return; {13388#true} is VALID [2018-11-23 10:33:36,026 INFO L256 TraceCheckUtils]: 4: Hoare triple {13388#true} call #t~ret12 := main(); {13388#true} is VALID [2018-11-23 10:33:36,027 INFO L273 TraceCheckUtils]: 5: Hoare triple {13388#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {13408#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:36,027 INFO L273 TraceCheckUtils]: 6: Hoare triple {13408#(= main_~i~0 (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13408#(= main_~i~0 (_ bv0 32))} is VALID [2018-11-23 10:33:36,028 INFO L273 TraceCheckUtils]: 7: Hoare triple {13408#(= main_~i~0 (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,028 INFO L273 TraceCheckUtils]: 8: Hoare triple {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,028 INFO L273 TraceCheckUtils]: 9: Hoare triple {13415#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13422#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:36,029 INFO L273 TraceCheckUtils]: 10: Hoare triple {13422#(= (_ bv2 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13422#(= (_ bv2 32) main_~i~0)} is VALID [2018-11-23 10:33:36,029 INFO L273 TraceCheckUtils]: 11: Hoare triple {13422#(= (_ bv2 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,029 INFO L273 TraceCheckUtils]: 12: Hoare triple {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,030 INFO L273 TraceCheckUtils]: 13: Hoare triple {13429#(= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13436#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:36,030 INFO L273 TraceCheckUtils]: 14: Hoare triple {13436#(= (_ bv4 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13436#(= (_ bv4 32) main_~i~0)} is VALID [2018-11-23 10:33:36,031 INFO L273 TraceCheckUtils]: 15: Hoare triple {13436#(= (_ bv4 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,031 INFO L273 TraceCheckUtils]: 16: Hoare triple {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,032 INFO L273 TraceCheckUtils]: 17: Hoare triple {13443#(= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13450#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:36,033 INFO L273 TraceCheckUtils]: 18: Hoare triple {13450#(= (_ bv6 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13450#(= (_ bv6 32) main_~i~0)} is VALID [2018-11-23 10:33:36,033 INFO L273 TraceCheckUtils]: 19: Hoare triple {13450#(= (_ bv6 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,034 INFO L273 TraceCheckUtils]: 20: Hoare triple {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,035 INFO L273 TraceCheckUtils]: 21: Hoare triple {13457#(= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13464#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:36,035 INFO L273 TraceCheckUtils]: 22: Hoare triple {13464#(= (_ bv8 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13464#(= (_ bv8 32) main_~i~0)} is VALID [2018-11-23 10:33:36,036 INFO L273 TraceCheckUtils]: 23: Hoare triple {13464#(= (_ bv8 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,036 INFO L273 TraceCheckUtils]: 24: Hoare triple {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,037 INFO L273 TraceCheckUtils]: 25: Hoare triple {13471#(= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13478#(= (_ bv10 32) main_~i~0)} is VALID [2018-11-23 10:33:36,037 INFO L273 TraceCheckUtils]: 26: Hoare triple {13478#(= (_ bv10 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13478#(= (_ bv10 32) main_~i~0)} is VALID [2018-11-23 10:33:36,038 INFO L273 TraceCheckUtils]: 27: Hoare triple {13478#(= (_ bv10 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,038 INFO L273 TraceCheckUtils]: 28: Hoare triple {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,039 INFO L273 TraceCheckUtils]: 29: Hoare triple {13485#(= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13492#(= (_ bv12 32) main_~i~0)} is VALID [2018-11-23 10:33:36,040 INFO L273 TraceCheckUtils]: 30: Hoare triple {13492#(= (_ bv12 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13492#(= (_ bv12 32) main_~i~0)} is VALID [2018-11-23 10:33:36,040 INFO L273 TraceCheckUtils]: 31: Hoare triple {13492#(= (_ bv12 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,041 INFO L273 TraceCheckUtils]: 32: Hoare triple {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,041 INFO L273 TraceCheckUtils]: 33: Hoare triple {13499#(= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13506#(= (_ bv14 32) main_~i~0)} is VALID [2018-11-23 10:33:36,042 INFO L273 TraceCheckUtils]: 34: Hoare triple {13506#(= (_ bv14 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13506#(= (_ bv14 32) main_~i~0)} is VALID [2018-11-23 10:33:36,042 INFO L273 TraceCheckUtils]: 35: Hoare triple {13506#(= (_ bv14 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,043 INFO L273 TraceCheckUtils]: 36: Hoare triple {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,044 INFO L273 TraceCheckUtils]: 37: Hoare triple {13513#(= (bvadd main_~i~0 (_ bv4294967281 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13520#(= (_ bv16 32) main_~i~0)} is VALID [2018-11-23 10:33:36,044 INFO L273 TraceCheckUtils]: 38: Hoare triple {13520#(= (_ bv16 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13520#(= (_ bv16 32) main_~i~0)} is VALID [2018-11-23 10:33:36,045 INFO L273 TraceCheckUtils]: 39: Hoare triple {13520#(= (_ bv16 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,046 INFO L273 TraceCheckUtils]: 40: Hoare triple {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,046 INFO L273 TraceCheckUtils]: 41: Hoare triple {13527#(= (bvadd main_~i~0 (_ bv4294967279 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13534#(= (_ bv18 32) main_~i~0)} is VALID [2018-11-23 10:33:36,047 INFO L273 TraceCheckUtils]: 42: Hoare triple {13534#(= (_ bv18 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13534#(= (_ bv18 32) main_~i~0)} is VALID [2018-11-23 10:33:36,048 INFO L273 TraceCheckUtils]: 43: Hoare triple {13534#(= (_ bv18 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,049 INFO L273 TraceCheckUtils]: 44: Hoare triple {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,049 INFO L273 TraceCheckUtils]: 45: Hoare triple {13541#(= (bvadd main_~i~0 (_ bv4294967277 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13548#(= (_ bv20 32) main_~i~0)} is VALID [2018-11-23 10:33:36,050 INFO L273 TraceCheckUtils]: 46: Hoare triple {13548#(= (_ bv20 32) main_~i~0)} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13548#(= (_ bv20 32) main_~i~0)} is VALID [2018-11-23 10:33:36,051 INFO L273 TraceCheckUtils]: 47: Hoare triple {13548#(= (_ bv20 32) main_~i~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,052 INFO L273 TraceCheckUtils]: 48: Hoare triple {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,052 INFO L273 TraceCheckUtils]: 49: Hoare triple {13555#(= (bvadd main_~i~0 (_ bv4294967275 32)) (_ bv0 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {13562#(= (bvadd main_~i~0 (_ bv4294967274 32)) (_ bv0 32))} is VALID [2018-11-23 10:33:36,053 INFO L273 TraceCheckUtils]: 50: Hoare triple {13562#(= (bvadd main_~i~0 (_ bv4294967274 32)) (_ bv0 32))} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,053 INFO L273 TraceCheckUtils]: 51: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:36,054 INFO L273 TraceCheckUtils]: 52: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,054 INFO L273 TraceCheckUtils]: 53: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,054 INFO L273 TraceCheckUtils]: 54: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,054 INFO L273 TraceCheckUtils]: 55: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,055 INFO L273 TraceCheckUtils]: 56: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,055 INFO L273 TraceCheckUtils]: 57: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,055 INFO L273 TraceCheckUtils]: 58: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,055 INFO L273 TraceCheckUtils]: 59: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,056 INFO L273 TraceCheckUtils]: 60: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,056 INFO L273 TraceCheckUtils]: 61: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,056 INFO L273 TraceCheckUtils]: 62: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,056 INFO L273 TraceCheckUtils]: 63: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,057 INFO L273 TraceCheckUtils]: 64: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,057 INFO L273 TraceCheckUtils]: 65: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,057 INFO L273 TraceCheckUtils]: 66: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,057 INFO L273 TraceCheckUtils]: 67: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,057 INFO L273 TraceCheckUtils]: 68: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,058 INFO L273 TraceCheckUtils]: 69: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,058 INFO L273 TraceCheckUtils]: 70: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,058 INFO L273 TraceCheckUtils]: 71: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,058 INFO L273 TraceCheckUtils]: 72: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,059 INFO L273 TraceCheckUtils]: 73: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,059 INFO L273 TraceCheckUtils]: 74: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,059 INFO L273 TraceCheckUtils]: 75: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,059 INFO L273 TraceCheckUtils]: 76: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,059 INFO L273 TraceCheckUtils]: 77: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 78: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 79: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 80: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 81: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 82: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 83: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,060 INFO L273 TraceCheckUtils]: 84: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,061 INFO L273 TraceCheckUtils]: 85: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,061 INFO L273 TraceCheckUtils]: 86: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,061 INFO L273 TraceCheckUtils]: 87: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,061 INFO L273 TraceCheckUtils]: 88: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,061 INFO L273 TraceCheckUtils]: 89: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,061 INFO L273 TraceCheckUtils]: 90: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 91: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 92: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 93: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 94: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 95: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 96: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,062 INFO L273 TraceCheckUtils]: 97: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 98: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 99: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 100: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 101: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 102: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 103: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,063 INFO L273 TraceCheckUtils]: 104: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,064 INFO L273 TraceCheckUtils]: 105: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,064 INFO L273 TraceCheckUtils]: 106: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,064 INFO L273 TraceCheckUtils]: 107: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,064 INFO L273 TraceCheckUtils]: 108: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,064 INFO L273 TraceCheckUtils]: 109: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,064 INFO L273 TraceCheckUtils]: 110: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 111: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 112: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 113: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 114: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 115: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 116: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:36,065 INFO L273 TraceCheckUtils]: 117: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:36,066 INFO L273 TraceCheckUtils]: 118: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,066 INFO L273 TraceCheckUtils]: 119: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:36,066 INFO L273 TraceCheckUtils]: 120: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,066 INFO L273 TraceCheckUtils]: 121: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,066 INFO L273 TraceCheckUtils]: 122: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,066 INFO L273 TraceCheckUtils]: 123: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 124: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 125: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 126: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 127: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 128: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 129: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,067 INFO L273 TraceCheckUtils]: 130: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,068 INFO L273 TraceCheckUtils]: 131: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,068 INFO L273 TraceCheckUtils]: 132: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,068 INFO L273 TraceCheckUtils]: 133: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,068 INFO L273 TraceCheckUtils]: 134: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,068 INFO L273 TraceCheckUtils]: 135: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,068 INFO L273 TraceCheckUtils]: 136: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 137: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 138: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 139: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 140: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 141: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 142: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,069 INFO L273 TraceCheckUtils]: 143: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 144: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 145: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 146: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 147: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 148: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 149: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,070 INFO L273 TraceCheckUtils]: 150: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,071 INFO L273 TraceCheckUtils]: 151: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,071 INFO L273 TraceCheckUtils]: 152: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,071 INFO L273 TraceCheckUtils]: 153: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,071 INFO L273 TraceCheckUtils]: 154: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,071 INFO L273 TraceCheckUtils]: 155: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,071 INFO L273 TraceCheckUtils]: 156: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 157: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 158: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 159: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 160: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 161: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 162: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,072 INFO L273 TraceCheckUtils]: 163: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,073 INFO L273 TraceCheckUtils]: 164: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,073 INFO L273 TraceCheckUtils]: 165: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,073 INFO L273 TraceCheckUtils]: 166: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,073 INFO L273 TraceCheckUtils]: 167: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,073 INFO L273 TraceCheckUtils]: 168: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,073 INFO L273 TraceCheckUtils]: 169: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 170: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 171: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 172: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 173: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 174: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 175: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,074 INFO L273 TraceCheckUtils]: 176: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,075 INFO L273 TraceCheckUtils]: 177: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,075 INFO L273 TraceCheckUtils]: 178: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,075 INFO L273 TraceCheckUtils]: 179: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,075 INFO L273 TraceCheckUtils]: 180: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,075 INFO L273 TraceCheckUtils]: 181: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,075 INFO L273 TraceCheckUtils]: 182: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L273 TraceCheckUtils]: 183: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L273 TraceCheckUtils]: 184: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L273 TraceCheckUtils]: 185: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L273 TraceCheckUtils]: 186: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L273 TraceCheckUtils]: 187: Hoare triple {13389#false} havoc ~x~0;~x~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L273 TraceCheckUtils]: 188: Hoare triple {13389#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {13389#false} is VALID [2018-11-23 10:33:36,076 INFO L256 TraceCheckUtils]: 189: Hoare triple {13389#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {13389#false} is VALID [2018-11-23 10:33:36,077 INFO L273 TraceCheckUtils]: 190: Hoare triple {13389#false} ~cond := #in~cond; {13389#false} is VALID [2018-11-23 10:33:36,077 INFO L273 TraceCheckUtils]: 191: Hoare triple {13389#false} assume 0bv32 == ~cond; {13389#false} is VALID [2018-11-23 10:33:36,077 INFO L273 TraceCheckUtils]: 192: Hoare triple {13389#false} assume !false; {13389#false} is VALID [2018-11-23 10:33:36,113 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-11-23 10:33:36,113 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:33:38,229 INFO L273 TraceCheckUtils]: 192: Hoare triple {13389#false} assume !false; {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L273 TraceCheckUtils]: 191: Hoare triple {13389#false} assume 0bv32 == ~cond; {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L273 TraceCheckUtils]: 190: Hoare triple {13389#false} ~cond := #in~cond; {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L256 TraceCheckUtils]: 189: Hoare triple {13389#false} call __VERIFIER_assert((if #t~mem10 == #t~mem11 then 1bv32 else 0bv32)); {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L273 TraceCheckUtils]: 188: Hoare triple {13389#false} assume !!~bvslt32(~x~0, 200000bv32);call #t~mem10 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem11 := read~intINTTYPE4(~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L273 TraceCheckUtils]: 187: Hoare triple {13389#false} havoc ~x~0;~x~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L273 TraceCheckUtils]: 186: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,230 INFO L273 TraceCheckUtils]: 185: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,231 INFO L273 TraceCheckUtils]: 184: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,231 INFO L273 TraceCheckUtils]: 183: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,231 INFO L273 TraceCheckUtils]: 182: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,231 INFO L273 TraceCheckUtils]: 181: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,231 INFO L273 TraceCheckUtils]: 180: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,232 INFO L273 TraceCheckUtils]: 179: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,232 INFO L273 TraceCheckUtils]: 178: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,232 INFO L273 TraceCheckUtils]: 177: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,232 INFO L273 TraceCheckUtils]: 176: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,232 INFO L273 TraceCheckUtils]: 175: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 174: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 173: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 172: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 171: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 170: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 169: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 168: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 167: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,233 INFO L273 TraceCheckUtils]: 166: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 165: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 164: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 163: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 162: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 161: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 160: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 159: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,234 INFO L273 TraceCheckUtils]: 158: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 157: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 156: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 155: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 154: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 153: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 152: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 151: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 150: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,235 INFO L273 TraceCheckUtils]: 149: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 148: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 147: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 146: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 145: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 144: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 143: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 142: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 141: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,236 INFO L273 TraceCheckUtils]: 140: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 139: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 138: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 137: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 136: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 135: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 134: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 133: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,237 INFO L273 TraceCheckUtils]: 132: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 131: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 130: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 129: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 128: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 127: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 126: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,238 INFO L273 TraceCheckUtils]: 125: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,239 INFO L273 TraceCheckUtils]: 124: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,239 INFO L273 TraceCheckUtils]: 123: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,239 INFO L273 TraceCheckUtils]: 122: Hoare triple {13389#false} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {13389#false} is VALID [2018-11-23 10:33:38,239 INFO L273 TraceCheckUtils]: 121: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem7 := read~intINTTYPE4(~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem7, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem7; {13389#false} is VALID [2018-11-23 10:33:38,239 INFO L273 TraceCheckUtils]: 120: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,239 INFO L273 TraceCheckUtils]: 119: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:38,240 INFO L273 TraceCheckUtils]: 118: Hoare triple {13389#false} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,240 INFO L273 TraceCheckUtils]: 117: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,240 INFO L273 TraceCheckUtils]: 116: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,240 INFO L273 TraceCheckUtils]: 115: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,240 INFO L273 TraceCheckUtils]: 114: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,240 INFO L273 TraceCheckUtils]: 113: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,241 INFO L273 TraceCheckUtils]: 112: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,241 INFO L273 TraceCheckUtils]: 111: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,241 INFO L273 TraceCheckUtils]: 110: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,241 INFO L273 TraceCheckUtils]: 109: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,241 INFO L273 TraceCheckUtils]: 108: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,241 INFO L273 TraceCheckUtils]: 107: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,242 INFO L273 TraceCheckUtils]: 106: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,242 INFO L273 TraceCheckUtils]: 105: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,242 INFO L273 TraceCheckUtils]: 104: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,242 INFO L273 TraceCheckUtils]: 103: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,242 INFO L273 TraceCheckUtils]: 102: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,242 INFO L273 TraceCheckUtils]: 101: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,243 INFO L273 TraceCheckUtils]: 100: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,243 INFO L273 TraceCheckUtils]: 99: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,243 INFO L273 TraceCheckUtils]: 98: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,243 INFO L273 TraceCheckUtils]: 97: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,243 INFO L273 TraceCheckUtils]: 96: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,243 INFO L273 TraceCheckUtils]: 95: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 94: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 93: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 92: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 91: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 90: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 89: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,244 INFO L273 TraceCheckUtils]: 88: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,245 INFO L273 TraceCheckUtils]: 87: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,245 INFO L273 TraceCheckUtils]: 86: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,245 INFO L273 TraceCheckUtils]: 85: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,245 INFO L273 TraceCheckUtils]: 84: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,245 INFO L273 TraceCheckUtils]: 83: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,245 INFO L273 TraceCheckUtils]: 82: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,246 INFO L273 TraceCheckUtils]: 81: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,246 INFO L273 TraceCheckUtils]: 80: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,246 INFO L273 TraceCheckUtils]: 79: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,246 INFO L273 TraceCheckUtils]: 78: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,246 INFO L273 TraceCheckUtils]: 77: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,246 INFO L273 TraceCheckUtils]: 76: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 75: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 74: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 73: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 72: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 71: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 70: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,247 INFO L273 TraceCheckUtils]: 69: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 68: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 67: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 66: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 65: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 64: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 63: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,248 INFO L273 TraceCheckUtils]: 62: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 61: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 60: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 59: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 58: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 57: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 56: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 55: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 54: Hoare triple {13389#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {13389#false} is VALID [2018-11-23 10:33:38,249 INFO L273 TraceCheckUtils]: 53: Hoare triple {13389#false} assume ~i~0 != ~z~0;call #t~mem5 := read~intINTTYPE4(~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);call write~intINTTYPE4(#t~mem5, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~mem5; {13389#false} is VALID [2018-11-23 10:33:38,250 INFO L273 TraceCheckUtils]: 52: Hoare triple {13389#false} assume !!~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,250 INFO L273 TraceCheckUtils]: 51: Hoare triple {13389#false} ~i~0 := 0bv32; {13389#false} is VALID [2018-11-23 10:33:38,250 INFO L273 TraceCheckUtils]: 50: Hoare triple {14418#(bvslt main_~i~0 (_ bv200000 32))} assume !~bvslt32(~i~0, 200000bv32); {13389#false} is VALID [2018-11-23 10:33:38,251 INFO L273 TraceCheckUtils]: 49: Hoare triple {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14418#(bvslt main_~i~0 (_ bv200000 32))} is VALID [2018-11-23 10:33:38,251 INFO L273 TraceCheckUtils]: 48: Hoare triple {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,256 INFO L273 TraceCheckUtils]: 47: Hoare triple {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14422#(bvslt (bvadd main_~i~0 (_ bv1 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,256 INFO L273 TraceCheckUtils]: 46: Hoare triple {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,261 INFO L273 TraceCheckUtils]: 45: Hoare triple {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14429#(bvslt (bvadd main_~i~0 (_ bv2 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,261 INFO L273 TraceCheckUtils]: 44: Hoare triple {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,268 INFO L273 TraceCheckUtils]: 43: Hoare triple {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14436#(bvslt (bvadd main_~i~0 (_ bv3 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,268 INFO L273 TraceCheckUtils]: 42: Hoare triple {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,274 INFO L273 TraceCheckUtils]: 41: Hoare triple {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14443#(bvslt (bvadd main_~i~0 (_ bv4 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,274 INFO L273 TraceCheckUtils]: 40: Hoare triple {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,280 INFO L273 TraceCheckUtils]: 39: Hoare triple {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14450#(bvslt (bvadd main_~i~0 (_ bv5 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,280 INFO L273 TraceCheckUtils]: 38: Hoare triple {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,286 INFO L273 TraceCheckUtils]: 37: Hoare triple {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14457#(bvslt (bvadd main_~i~0 (_ bv6 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,287 INFO L273 TraceCheckUtils]: 36: Hoare triple {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,292 INFO L273 TraceCheckUtils]: 35: Hoare triple {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14464#(bvslt (bvadd main_~i~0 (_ bv7 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,293 INFO L273 TraceCheckUtils]: 34: Hoare triple {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,297 INFO L273 TraceCheckUtils]: 33: Hoare triple {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14471#(bvslt (bvadd main_~i~0 (_ bv8 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,297 INFO L273 TraceCheckUtils]: 32: Hoare triple {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,302 INFO L273 TraceCheckUtils]: 31: Hoare triple {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14478#(bvslt (bvadd main_~i~0 (_ bv9 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,302 INFO L273 TraceCheckUtils]: 30: Hoare triple {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,307 INFO L273 TraceCheckUtils]: 29: Hoare triple {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14485#(bvslt (bvadd main_~i~0 (_ bv10 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,307 INFO L273 TraceCheckUtils]: 28: Hoare triple {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,316 INFO L273 TraceCheckUtils]: 27: Hoare triple {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14492#(bvslt (bvadd main_~i~0 (_ bv11 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,316 INFO L273 TraceCheckUtils]: 26: Hoare triple {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,323 INFO L273 TraceCheckUtils]: 25: Hoare triple {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14499#(bvslt (bvadd main_~i~0 (_ bv12 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,323 INFO L273 TraceCheckUtils]: 24: Hoare triple {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,328 INFO L273 TraceCheckUtils]: 23: Hoare triple {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14506#(bvslt (bvadd main_~i~0 (_ bv13 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,329 INFO L273 TraceCheckUtils]: 22: Hoare triple {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,333 INFO L273 TraceCheckUtils]: 21: Hoare triple {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14513#(bvslt (bvadd main_~i~0 (_ bv14 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,333 INFO L273 TraceCheckUtils]: 20: Hoare triple {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,338 INFO L273 TraceCheckUtils]: 19: Hoare triple {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14520#(bvslt (bvadd main_~i~0 (_ bv15 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,338 INFO L273 TraceCheckUtils]: 18: Hoare triple {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,343 INFO L273 TraceCheckUtils]: 17: Hoare triple {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14527#(bvslt (bvadd main_~i~0 (_ bv16 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,343 INFO L273 TraceCheckUtils]: 16: Hoare triple {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,349 INFO L273 TraceCheckUtils]: 15: Hoare triple {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14534#(bvslt (bvadd main_~i~0 (_ bv17 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,350 INFO L273 TraceCheckUtils]: 14: Hoare triple {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,355 INFO L273 TraceCheckUtils]: 13: Hoare triple {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14541#(bvslt (bvadd main_~i~0 (_ bv18 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,355 INFO L273 TraceCheckUtils]: 12: Hoare triple {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,362 INFO L273 TraceCheckUtils]: 11: Hoare triple {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14548#(bvslt (bvadd main_~i~0 (_ bv19 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,362 INFO L273 TraceCheckUtils]: 10: Hoare triple {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,370 INFO L273 TraceCheckUtils]: 9: Hoare triple {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14555#(bvslt (bvadd main_~i~0 (_ bv20 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,370 INFO L273 TraceCheckUtils]: 8: Hoare triple {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,376 INFO L273 TraceCheckUtils]: 7: Hoare triple {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {14562#(bvslt (bvadd main_~i~0 (_ bv21 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,376 INFO L273 TraceCheckUtils]: 6: Hoare triple {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} assume !!~bvslt32(~i~0, 200000bv32);call write~intINTTYPE4(#t~nondet1, ~#a1~0.base, ~bvadd32(~#a1~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet1;call write~intINTTYPE4(#t~nondet2, ~#a2~0.base, ~bvadd32(~#a2~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet2;call write~intINTTYPE4(#t~nondet3, ~#a3~0.base, ~bvadd32(~#a3~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);havoc #t~nondet3; {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,377 INFO L273 TraceCheckUtils]: 5: Hoare triple {13388#true} call ~#a1~0.base, ~#a1~0.offset := #Ultimate.alloc(800000bv32);call ~#a2~0.base, ~#a2~0.offset := #Ultimate.alloc(800000bv32);call ~#a3~0.base, ~#a3~0.offset := #Ultimate.alloc(800000bv32);havoc ~i~0;havoc ~z~0;~z~0 := 150000bv32;~i~0 := 0bv32; {14569#(bvslt (bvadd main_~i~0 (_ bv22 32)) (_ bv200000 32))} is VALID [2018-11-23 10:33:38,377 INFO L256 TraceCheckUtils]: 4: Hoare triple {13388#true} call #t~ret12 := main(); {13388#true} is VALID [2018-11-23 10:33:38,377 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {13388#true} {13388#true} #87#return; {13388#true} is VALID [2018-11-23 10:33:38,377 INFO L273 TraceCheckUtils]: 2: Hoare triple {13388#true} assume true; {13388#true} is VALID [2018-11-23 10:33:38,378 INFO L273 TraceCheckUtils]: 1: Hoare triple {13388#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1]; {13388#true} is VALID [2018-11-23 10:33:38,378 INFO L256 TraceCheckUtils]: 0: Hoare triple {13388#true} call ULTIMATE.init(); {13388#true} is VALID [2018-11-23 10:33:38,399 INFO L134 CoverageAnalysis]: Checked inductivity of 1914 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-11-23 10:33:38,401 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:33:38,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-11-23 10:33:38,403 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 193 [2018-11-23 10:33:38,403 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:33:38,403 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states. [2018-11-23 10:33:38,717 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 113 edges. 113 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:33:38,717 INFO L459 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-11-23 10:33:38,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-11-23 10:33:38,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 10:33:38,719 INFO L87 Difference]: Start difference. First operand 258 states and 273 transitions. Second operand 48 states. [2018-11-23 10:33:54,505 WARN L180 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 7 [2018-11-23 10:33:54,966 WARN L180 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 7 [2018-11-23 10:33:55,455 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 7 [2018-11-23 10:33:55,977 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 7 [2018-11-23 10:33:56,524 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 7 [2018-11-23 10:33:57,055 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 7 [2018-11-23 10:33:57,599 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 7 [2018-11-23 10:33:58,171 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 7 [2018-11-23 10:34:28,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:28,724 INFO L93 Difference]: Finished difference Result 1747 states and 2054 transitions. [2018-11-23 10:34:28,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-11-23 10:34:28,725 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 193 [2018-11-23 10:34:28,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:34:28,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 10:34:28,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 536 transitions. [2018-11-23 10:34:28,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 10:34:28,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 536 transitions. [2018-11-23 10:34:28,735 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 48 states and 536 transitions. [2018-11-23 10:34:30,044 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 536 edges. 536 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:34:30,150 INFO L225 Difference]: With dead ends: 1747 [2018-11-23 10:34:30,150 INFO L226 Difference]: Without dead ends: 1540 [2018-11-23 10:34:30,152 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 407 GetRequests, 339 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 10.8s TimeCoverageRelationStatistics Valid=1678, Invalid=3152, Unknown=0, NotChecked=0, Total=4830 [2018-11-23 10:34:30,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2018-11-23 10:34:33,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 1460. [2018-11-23 10:34:33,437 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:34:33,437 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1540 states. Second operand 1460 states. [2018-11-23 10:34:33,437 INFO L74 IsIncluded]: Start isIncluded. First operand 1540 states. Second operand 1460 states. [2018-11-23 10:34:33,437 INFO L87 Difference]: Start difference. First operand 1540 states. Second operand 1460 states. [2018-11-23 10:34:33,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:33,559 INFO L93 Difference]: Finished difference Result 1540 states and 1601 transitions. [2018-11-23 10:34:33,559 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 1601 transitions. [2018-11-23 10:34:33,562 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:34:33,562 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:34:33,562 INFO L74 IsIncluded]: Start isIncluded. First operand 1460 states. Second operand 1540 states. [2018-11-23 10:34:33,562 INFO L87 Difference]: Start difference. First operand 1460 states. Second operand 1540 states. [2018-11-23 10:34:33,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:34:33,698 INFO L93 Difference]: Finished difference Result 1540 states and 1601 transitions. [2018-11-23 10:34:33,698 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 1601 transitions. [2018-11-23 10:34:33,701 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:34:33,701 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:34:33,702 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:34:33,702 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:34:33,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1460 states. [2018-11-23 10:34:33,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1460 states to 1460 states and 1521 transitions. [2018-11-23 10:34:33,864 INFO L78 Accepts]: Start accepts. Automaton has 1460 states and 1521 transitions. Word has length 193 [2018-11-23 10:34:33,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:34:33,864 INFO L480 AbstractCegarLoop]: Abstraction has 1460 states and 1521 transitions. [2018-11-23 10:34:33,865 INFO L481 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-11-23 10:34:33,865 INFO L276 IsEmpty]: Start isEmpty. Operand 1460 states and 1521 transitions. [2018-11-23 10:34:33,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 386 [2018-11-23 10:34:33,873 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:34:33,874 INFO L402 BasicCegarLoop]: trace histogram [46, 46, 46, 46, 46, 46, 46, 44, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:34:33,874 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:34:33,874 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:34:33,874 INFO L82 PathProgramCache]: Analyzing trace with hash -1100538744, now seen corresponding path program 5 times [2018-11-23 10:34:33,879 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:34:33,879 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:34:33,905 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1