java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/loops/eureka_01_false-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 11:21:48,557 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 11:21:48,561 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 11:21:48,578 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 11:21:48,578 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 11:21:48,580 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 11:21:48,581 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 11:21:48,583 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 11:21:48,586 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 11:21:48,588 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 11:21:48,591 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 11:21:48,591 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 11:21:48,593 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 11:21:48,596 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 11:21:48,598 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 11:21:48,598 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 11:21:48,599 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 11:21:48,601 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 11:21:48,603 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 11:21:48,605 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 11:21:48,606 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 11:21:48,607 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 11:21:48,609 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 11:21:48,610 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 11:21:48,610 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 11:21:48,614 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 11:21:48,615 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 11:21:48,616 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 11:21:48,617 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 11:21:48,618 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 11:21:48,618 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 11:21:48,619 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 11:21:48,619 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 11:21:48,619 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 11:21:48,624 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 11:21:48,625 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 11:21:48,625 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 11:21:48,650 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 11:21:48,650 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 11:21:48,651 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 11:21:48,651 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 11:21:48,652 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 11:21:48,652 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 11:21:48,652 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 11:21:48,652 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 11:21:48,652 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 11:21:48,653 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 11:21:48,653 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 11:21:48,653 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 11:21:48,653 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 11:21:48,653 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 11:21:48,654 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 11:21:48,654 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 11:21:48,654 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 11:21:48,654 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 11:21:48,654 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 11:21:48,655 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 11:21:48,655 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 11:21:48,655 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 11:21:48,655 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 11:21:48,655 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 11:21:48,656 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 11:21:48,656 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 11:21:48,656 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 11:21:48,656 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 11:21:48,656 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 11:21:48,656 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 11:21:48,657 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 11:21:48,657 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 11:21:48,657 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 11:21:48,701 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 11:21:48,718 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 11:21:48,722 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 11:21:48,724 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 11:21:48,724 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 11:21:48,725 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/eureka_01_false-unreach-call_true-termination.i [2018-11-23 11:21:48,793 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/38cabbddd/981027c0725b415db71d4c0abb685937/FLAG140a42b8a [2018-11-23 11:21:49,266 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 11:21:49,267 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/eureka_01_false-unreach-call_true-termination.i [2018-11-23 11:21:49,275 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/38cabbddd/981027c0725b415db71d4c0abb685937/FLAG140a42b8a [2018-11-23 11:21:49,635 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/38cabbddd/981027c0725b415db71d4c0abb685937 [2018-11-23 11:21:49,648 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 11:21:49,650 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 11:21:49,651 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 11:21:49,651 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 11:21:49,657 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 11:21:49,659 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 11:21:49" (1/1) ... [2018-11-23 11:21:49,662 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3300f2dd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:49, skipping insertion in model container [2018-11-23 11:21:49,662 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 11:21:49" (1/1) ... [2018-11-23 11:21:49,672 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 11:21:49,700 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 11:21:49,977 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 11:21:49,983 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 11:21:50,044 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 11:21:50,080 INFO L195 MainTranslator]: Completed translation [2018-11-23 11:21:50,080 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50 WrapperNode [2018-11-23 11:21:50,080 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 11:21:50,081 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 11:21:50,082 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 11:21:50,082 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 11:21:50,093 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,119 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,136 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 11:21:50,136 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 11:21:50,136 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 11:21:50,136 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 11:21:50,237 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,238 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,247 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,247 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,302 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,313 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,316 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... [2018-11-23 11:21:50,320 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 11:21:50,320 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 11:21:50,320 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 11:21:50,321 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 11:21:50,322 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 11:21:50,393 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 11:21:50,393 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 11:21:50,394 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 11:21:50,394 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 11:21:50,394 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 11:21:50,394 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 11:21:50,394 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2018-11-23 11:21:50,394 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 11:21:50,394 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 11:21:50,395 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 11:21:50,395 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 11:21:50,395 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 11:21:50,395 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 11:21:51,587 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 11:21:51,588 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-11-23 11:21:51,588 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 11:21:51 BoogieIcfgContainer [2018-11-23 11:21:51,588 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 11:21:51,589 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 11:21:51,590 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 11:21:51,593 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 11:21:51,594 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 11:21:49" (1/3) ... [2018-11-23 11:21:51,594 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21e68708 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 11:21:51, skipping insertion in model container [2018-11-23 11:21:51,595 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:21:50" (2/3) ... [2018-11-23 11:21:51,595 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@21e68708 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 11:21:51, skipping insertion in model container [2018-11-23 11:21:51,595 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 11:21:51" (3/3) ... [2018-11-23 11:21:51,597 INFO L112 eAbstractionObserver]: Analyzing ICFG eureka_01_false-unreach-call_true-termination.i [2018-11-23 11:21:51,607 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 11:21:51,616 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 11:21:51,634 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 11:21:51,668 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 11:21:51,668 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 11:21:51,669 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 11:21:51,669 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 11:21:51,669 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 11:21:51,669 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 11:21:51,670 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 11:21:51,670 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 11:21:51,670 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 11:21:51,689 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states. [2018-11-23 11:21:51,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-11-23 11:21:51,696 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:21:51,697 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:21:51,700 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:21:51,707 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:21:51,707 INFO L82 PathProgramCache]: Analyzing trace with hash -539958144, now seen corresponding path program 1 times [2018-11-23 11:21:51,713 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:21:51,714 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:21:51,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:21:51,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:51,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:51,892 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:21:52,220 WARN L180 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 8 DAG size of output: 6 [2018-11-23 11:21:52,301 INFO L256 TraceCheckUtils]: 0: Hoare triple {40#true} call ULTIMATE.init(); {40#true} is VALID [2018-11-23 11:21:52,305 INFO L273 TraceCheckUtils]: 1: Hoare triple {40#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {40#true} is VALID [2018-11-23 11:21:52,305 INFO L273 TraceCheckUtils]: 2: Hoare triple {40#true} assume true; {40#true} is VALID [2018-11-23 11:21:52,306 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {40#true} {40#true} #111#return; {40#true} is VALID [2018-11-23 11:21:52,306 INFO L256 TraceCheckUtils]: 4: Hoare triple {40#true} call #t~ret19 := main(); {40#true} is VALID [2018-11-23 11:21:52,307 INFO L273 TraceCheckUtils]: 5: Hoare triple {40#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {40#true} is VALID [2018-11-23 11:21:52,308 INFO L273 TraceCheckUtils]: 6: Hoare triple {40#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {63#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:21:52,328 INFO L273 TraceCheckUtils]: 7: Hoare triple {63#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {67#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:52,338 INFO L273 TraceCheckUtils]: 8: Hoare triple {67#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} is VALID [2018-11-23 11:21:52,352 INFO L273 TraceCheckUtils]: 9: Hoare triple {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} ~i~0 := 0bv32; {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} is VALID [2018-11-23 11:21:52,365 INFO L273 TraceCheckUtils]: 10: Hoare triple {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} assume !~bvslt32(~i~0, ~nodecount~0); {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} is VALID [2018-11-23 11:21:52,378 INFO L273 TraceCheckUtils]: 11: Hoare triple {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} ~i~0 := 0bv32; {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} is VALID [2018-11-23 11:21:52,392 INFO L273 TraceCheckUtils]: 12: Hoare triple {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} assume !~bvslt32(~i~0, ~edgecount~0); {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} is VALID [2018-11-23 11:21:52,405 INFO L273 TraceCheckUtils]: 13: Hoare triple {71#(and (bvsle (_ bv0 32) main_~nodecount~0) (not (bvslt (_ bv0 32) main_~nodecount~0)))} ~i~0 := 0bv32; {87#(and (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv0 32) main_~nodecount~0)))} is VALID [2018-11-23 11:21:52,408 INFO L273 TraceCheckUtils]: 14: Hoare triple {87#(and (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv0 32) main_~nodecount~0)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {41#false} is VALID [2018-11-23 11:21:52,408 INFO L256 TraceCheckUtils]: 15: Hoare triple {41#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {41#false} is VALID [2018-11-23 11:21:52,409 INFO L273 TraceCheckUtils]: 16: Hoare triple {41#false} ~cond := #in~cond; {41#false} is VALID [2018-11-23 11:21:52,409 INFO L273 TraceCheckUtils]: 17: Hoare triple {41#false} assume 0bv32 == ~cond; {41#false} is VALID [2018-11-23 11:21:52,409 INFO L273 TraceCheckUtils]: 18: Hoare triple {41#false} assume !false; {41#false} is VALID [2018-11-23 11:21:52,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:21:52,414 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:21:52,419 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:21:52,420 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 11:21:52,425 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-11-23 11:21:52,428 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:21:52,431 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 11:21:52,502 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:21:52,502 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 11:21:52,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 11:21:52,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-23 11:21:52,513 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 6 states. [2018-11-23 11:21:53,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:53,901 INFO L93 Difference]: Finished difference Result 100 states and 151 transitions. [2018-11-23 11:21:53,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 11:21:53,902 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-11-23 11:21:53,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:21:53,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 11:21:53,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 151 transitions. [2018-11-23 11:21:53,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 11:21:53,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 151 transitions. [2018-11-23 11:21:53,937 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 151 transitions. [2018-11-23 11:21:54,326 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:21:54,341 INFO L225 Difference]: With dead ends: 100 [2018-11-23 11:21:54,342 INFO L226 Difference]: Without dead ends: 48 [2018-11-23 11:21:54,347 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-23 11:21:54,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-11-23 11:21:54,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 34. [2018-11-23 11:21:54,482 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:21:54,483 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand 34 states. [2018-11-23 11:21:54,484 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 34 states. [2018-11-23 11:21:54,484 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 34 states. [2018-11-23 11:21:54,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:54,491 INFO L93 Difference]: Finished difference Result 48 states and 59 transitions. [2018-11-23 11:21:54,491 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 59 transitions. [2018-11-23 11:21:54,492 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:21:54,492 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:21:54,492 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 48 states. [2018-11-23 11:21:54,493 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 48 states. [2018-11-23 11:21:54,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:54,498 INFO L93 Difference]: Finished difference Result 48 states and 59 transitions. [2018-11-23 11:21:54,499 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 59 transitions. [2018-11-23 11:21:54,499 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:21:54,500 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:21:54,500 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:21:54,500 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:21:54,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-11-23 11:21:54,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 40 transitions. [2018-11-23 11:21:54,505 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 40 transitions. Word has length 19 [2018-11-23 11:21:54,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:21:54,506 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 40 transitions. [2018-11-23 11:21:54,506 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 11:21:54,507 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 40 transitions. [2018-11-23 11:21:54,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 11:21:54,508 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:21:54,509 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:21:54,509 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:21:54,509 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:21:54,510 INFO L82 PathProgramCache]: Analyzing trace with hash 2104518782, now seen corresponding path program 1 times [2018-11-23 11:21:54,510 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:21:54,512 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:21:54,531 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:21:54,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:54,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:54,655 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:21:54,755 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-23 11:21:54,790 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-23 11:21:54,791 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:21:54,795 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:21:54,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:21:54,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-11-23 11:21:55,001 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-23 11:21:55,022 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-23 11:21:55,028 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:21:55,030 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:21:55,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:21:55,033 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-11-23 11:21:55,044 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:21:55,044 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#distance~0.base|]. (let ((.cse0 (select (select |#memory_int| |main_~#distance~0.base|) (_ bv0 32)))) (and (= |main_#t~mem18| .cse0) (= (_ bv0 32) .cse0))) [2018-11-23 11:21:55,045 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (= |main_#t~mem18| (_ bv0 32)) [2018-11-23 11:21:55,140 INFO L256 TraceCheckUtils]: 0: Hoare triple {372#true} call ULTIMATE.init(); {372#true} is VALID [2018-11-23 11:21:55,141 INFO L273 TraceCheckUtils]: 1: Hoare triple {372#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {372#true} is VALID [2018-11-23 11:21:55,141 INFO L273 TraceCheckUtils]: 2: Hoare triple {372#true} assume true; {372#true} is VALID [2018-11-23 11:21:55,142 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {372#true} {372#true} #111#return; {372#true} is VALID [2018-11-23 11:21:55,142 INFO L256 TraceCheckUtils]: 4: Hoare triple {372#true} call #t~ret19 := main(); {372#true} is VALID [2018-11-23 11:21:55,142 INFO L273 TraceCheckUtils]: 5: Hoare triple {372#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {372#true} is VALID [2018-11-23 11:21:55,143 INFO L273 TraceCheckUtils]: 6: Hoare triple {372#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {372#true} is VALID [2018-11-23 11:21:55,161 INFO L273 TraceCheckUtils]: 7: Hoare triple {372#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {398#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:55,170 INFO L273 TraceCheckUtils]: 8: Hoare triple {398#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {398#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:55,172 INFO L273 TraceCheckUtils]: 9: Hoare triple {398#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,174 INFO L273 TraceCheckUtils]: 10: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,175 INFO L273 TraceCheckUtils]: 11: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~nodecount~0); {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,177 INFO L273 TraceCheckUtils]: 12: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,178 INFO L273 TraceCheckUtils]: 13: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,185 INFO L273 TraceCheckUtils]: 14: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~j~0, ~edgecount~0); {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,186 INFO L273 TraceCheckUtils]: 15: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,188 INFO L273 TraceCheckUtils]: 16: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~nodecount~0); {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,190 INFO L273 TraceCheckUtils]: 17: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,191 INFO L273 TraceCheckUtils]: 18: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~edgecount~0); {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:21:55,192 INFO L273 TraceCheckUtils]: 19: Hoare triple {405#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {436#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:55,197 INFO L273 TraceCheckUtils]: 20: Hoare triple {436#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {440#(= |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:21:55,198 INFO L256 TraceCheckUtils]: 21: Hoare triple {440#(= |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {444#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:21:55,199 INFO L273 TraceCheckUtils]: 22: Hoare triple {444#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {448#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:21:55,217 INFO L273 TraceCheckUtils]: 23: Hoare triple {448#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {373#false} is VALID [2018-11-23 11:21:55,217 INFO L273 TraceCheckUtils]: 24: Hoare triple {373#false} assume !false; {373#false} is VALID [2018-11-23 11:21:55,221 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:21:55,222 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:21:55,479 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-11-23 11:21:55,623 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-11-23 11:21:55,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:21:55,629 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:21:55,632 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:21:55,633 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:14, output treesize:5 [2018-11-23 11:21:55,639 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:21:55,639 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#distance~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) |main_~#distance~0.offset|) (_ bv0 32)) [2018-11-23 11:21:55,639 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32)) [2018-11-23 11:21:55,693 INFO L273 TraceCheckUtils]: 24: Hoare triple {373#false} assume !false; {373#false} is VALID [2018-11-23 11:21:55,694 INFO L273 TraceCheckUtils]: 23: Hoare triple {458#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {373#false} is VALID [2018-11-23 11:21:55,704 INFO L273 TraceCheckUtils]: 22: Hoare triple {462#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {458#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:21:55,706 INFO L256 TraceCheckUtils]: 21: Hoare triple {466#(bvsge |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {462#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:21:55,707 INFO L273 TraceCheckUtils]: 20: Hoare triple {470#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {466#(bvsge |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:21:55,708 INFO L273 TraceCheckUtils]: 19: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {470#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} is VALID [2018-11-23 11:21:55,709 INFO L273 TraceCheckUtils]: 18: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~edgecount~0); {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,714 INFO L273 TraceCheckUtils]: 17: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,715 INFO L273 TraceCheckUtils]: 16: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~nodecount~0); {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,715 INFO L273 TraceCheckUtils]: 15: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,716 INFO L273 TraceCheckUtils]: 14: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~j~0, ~edgecount~0); {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,717 INFO L273 TraceCheckUtils]: 13: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,725 INFO L273 TraceCheckUtils]: 12: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,725 INFO L273 TraceCheckUtils]: 11: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~nodecount~0); {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,726 INFO L273 TraceCheckUtils]: 10: Hoare triple {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,727 INFO L273 TraceCheckUtils]: 9: Hoare triple {505#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {474#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:21:55,730 INFO L273 TraceCheckUtils]: 8: Hoare triple {505#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0); {505#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} is VALID [2018-11-23 11:21:55,734 INFO L273 TraceCheckUtils]: 7: Hoare triple {372#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {505#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} is VALID [2018-11-23 11:21:55,734 INFO L273 TraceCheckUtils]: 6: Hoare triple {372#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {372#true} is VALID [2018-11-23 11:21:55,735 INFO L273 TraceCheckUtils]: 5: Hoare triple {372#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {372#true} is VALID [2018-11-23 11:21:55,735 INFO L256 TraceCheckUtils]: 4: Hoare triple {372#true} call #t~ret19 := main(); {372#true} is VALID [2018-11-23 11:21:55,736 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {372#true} {372#true} #111#return; {372#true} is VALID [2018-11-23 11:21:55,736 INFO L273 TraceCheckUtils]: 2: Hoare triple {372#true} assume true; {372#true} is VALID [2018-11-23 11:21:55,736 INFO L273 TraceCheckUtils]: 1: Hoare triple {372#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {372#true} is VALID [2018-11-23 11:21:55,737 INFO L256 TraceCheckUtils]: 0: Hoare triple {372#true} call ULTIMATE.init(); {372#true} is VALID [2018-11-23 11:21:55,739 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:21:55,743 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:21:55,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 11:21:55,745 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 25 [2018-11-23 11:21:55,747 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:21:55,747 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 11:21:55,860 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:21:55,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 11:21:55,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 11:21:55,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-11-23 11:21:55,861 INFO L87 Difference]: Start difference. First operand 34 states and 40 transitions. Second operand 14 states. [2018-11-23 11:21:58,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:58,211 INFO L93 Difference]: Finished difference Result 91 states and 114 transitions. [2018-11-23 11:21:58,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 11:21:58,212 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 25 [2018-11-23 11:21:58,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:21:58,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 11:21:58,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 114 transitions. [2018-11-23 11:21:58,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 11:21:58,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 114 transitions. [2018-11-23 11:21:58,224 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states and 114 transitions. [2018-11-23 11:21:58,489 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:21:58,495 INFO L225 Difference]: With dead ends: 91 [2018-11-23 11:21:58,495 INFO L226 Difference]: Without dead ends: 89 [2018-11-23 11:21:58,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2018-11-23 11:21:58,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-11-23 11:21:58,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 55. [2018-11-23 11:21:58,607 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:21:58,607 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand 55 states. [2018-11-23 11:21:58,607 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand 55 states. [2018-11-23 11:21:58,608 INFO L87 Difference]: Start difference. First operand 89 states. Second operand 55 states. [2018-11-23 11:21:58,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:58,615 INFO L93 Difference]: Finished difference Result 89 states and 112 transitions. [2018-11-23 11:21:58,616 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 112 transitions. [2018-11-23 11:21:58,617 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:21:58,617 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:21:58,617 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand 89 states. [2018-11-23 11:21:58,617 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 89 states. [2018-11-23 11:21:58,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:58,623 INFO L93 Difference]: Finished difference Result 89 states and 112 transitions. [2018-11-23 11:21:58,624 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 112 transitions. [2018-11-23 11:21:58,625 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:21:58,625 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:21:58,625 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:21:58,626 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:21:58,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-11-23 11:21:58,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 67 transitions. [2018-11-23 11:21:58,629 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 67 transitions. Word has length 25 [2018-11-23 11:21:58,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:21:58,630 INFO L480 AbstractCegarLoop]: Abstraction has 55 states and 67 transitions. [2018-11-23 11:21:58,630 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 11:21:58,630 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 67 transitions. [2018-11-23 11:21:58,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-23 11:21:58,631 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:21:58,631 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:21:58,632 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:21:58,632 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:21:58,632 INFO L82 PathProgramCache]: Analyzing trace with hash 1083450428, now seen corresponding path program 1 times [2018-11-23 11:21:58,633 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:21:58,633 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:21:58,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:21:58,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:58,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:58,720 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:21:58,797 INFO L256 TraceCheckUtils]: 0: Hoare triple {916#true} call ULTIMATE.init(); {916#true} is VALID [2018-11-23 11:21:58,798 INFO L273 TraceCheckUtils]: 1: Hoare triple {916#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {916#true} is VALID [2018-11-23 11:21:58,798 INFO L273 TraceCheckUtils]: 2: Hoare triple {916#true} assume true; {916#true} is VALID [2018-11-23 11:21:58,799 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {916#true} {916#true} #111#return; {916#true} is VALID [2018-11-23 11:21:58,799 INFO L256 TraceCheckUtils]: 4: Hoare triple {916#true} call #t~ret19 := main(); {916#true} is VALID [2018-11-23 11:21:58,799 INFO L273 TraceCheckUtils]: 5: Hoare triple {916#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {916#true} is VALID [2018-11-23 11:21:58,800 INFO L273 TraceCheckUtils]: 6: Hoare triple {916#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {916#true} is VALID [2018-11-23 11:21:58,806 INFO L273 TraceCheckUtils]: 7: Hoare triple {916#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {942#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:58,807 INFO L273 TraceCheckUtils]: 8: Hoare triple {942#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {942#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:58,807 INFO L273 TraceCheckUtils]: 9: Hoare triple {942#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {917#false} is VALID [2018-11-23 11:21:58,807 INFO L273 TraceCheckUtils]: 10: Hoare triple {917#false} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {917#false} is VALID [2018-11-23 11:21:58,808 INFO L273 TraceCheckUtils]: 11: Hoare triple {917#false} assume !~bvslt32(~i~0, ~nodecount~0); {917#false} is VALID [2018-11-23 11:21:58,808 INFO L273 TraceCheckUtils]: 12: Hoare triple {917#false} ~i~0 := 0bv32; {917#false} is VALID [2018-11-23 11:21:58,808 INFO L273 TraceCheckUtils]: 13: Hoare triple {917#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {917#false} is VALID [2018-11-23 11:21:58,808 INFO L273 TraceCheckUtils]: 14: Hoare triple {917#false} assume !~bvslt32(~j~0, ~edgecount~0); {917#false} is VALID [2018-11-23 11:21:58,809 INFO L273 TraceCheckUtils]: 15: Hoare triple {917#false} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {917#false} is VALID [2018-11-23 11:21:58,809 INFO L273 TraceCheckUtils]: 16: Hoare triple {917#false} assume !~bvslt32(~i~0, ~nodecount~0); {917#false} is VALID [2018-11-23 11:21:58,809 INFO L273 TraceCheckUtils]: 17: Hoare triple {917#false} ~i~0 := 0bv32; {917#false} is VALID [2018-11-23 11:21:58,809 INFO L273 TraceCheckUtils]: 18: Hoare triple {917#false} assume !~bvslt32(~i~0, ~edgecount~0); {917#false} is VALID [2018-11-23 11:21:58,810 INFO L273 TraceCheckUtils]: 19: Hoare triple {917#false} ~i~0 := 0bv32; {917#false} is VALID [2018-11-23 11:21:58,810 INFO L273 TraceCheckUtils]: 20: Hoare triple {917#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {917#false} is VALID [2018-11-23 11:21:58,810 INFO L256 TraceCheckUtils]: 21: Hoare triple {917#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {917#false} is VALID [2018-11-23 11:21:58,811 INFO L273 TraceCheckUtils]: 22: Hoare triple {917#false} ~cond := #in~cond; {917#false} is VALID [2018-11-23 11:21:58,811 INFO L273 TraceCheckUtils]: 23: Hoare triple {917#false} assume 0bv32 == ~cond; {917#false} is VALID [2018-11-23 11:21:58,811 INFO L273 TraceCheckUtils]: 24: Hoare triple {917#false} assume !false; {917#false} is VALID [2018-11-23 11:21:58,813 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:21:58,813 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:21:58,821 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:21:58,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 11:21:58,822 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-11-23 11:21:58,822 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:21:58,822 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 11:21:58,862 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:21:58,862 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 11:21:58,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 11:21:58,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 11:21:58,863 INFO L87 Difference]: Start difference. First operand 55 states and 67 transitions. Second operand 3 states. [2018-11-23 11:21:59,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:59,122 INFO L93 Difference]: Finished difference Result 82 states and 101 transitions. [2018-11-23 11:21:59,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 11:21:59,123 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2018-11-23 11:21:59,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:21:59,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 11:21:59,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 72 transitions. [2018-11-23 11:21:59,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 11:21:59,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 72 transitions. [2018-11-23 11:21:59,128 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 72 transitions. [2018-11-23 11:21:59,325 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:21:59,329 INFO L225 Difference]: With dead ends: 82 [2018-11-23 11:21:59,329 INFO L226 Difference]: Without dead ends: 57 [2018-11-23 11:21:59,330 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 11:21:59,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-11-23 11:21:59,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 56. [2018-11-23 11:21:59,402 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:21:59,402 INFO L82 GeneralOperation]: Start isEquivalent. First operand 57 states. Second operand 56 states. [2018-11-23 11:21:59,402 INFO L74 IsIncluded]: Start isIncluded. First operand 57 states. Second operand 56 states. [2018-11-23 11:21:59,402 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 56 states. [2018-11-23 11:21:59,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:59,405 INFO L93 Difference]: Finished difference Result 57 states and 69 transitions. [2018-11-23 11:21:59,405 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 69 transitions. [2018-11-23 11:21:59,406 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:21:59,407 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:21:59,407 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand 57 states. [2018-11-23 11:21:59,407 INFO L87 Difference]: Start difference. First operand 56 states. Second operand 57 states. [2018-11-23 11:21:59,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:21:59,411 INFO L93 Difference]: Finished difference Result 57 states and 69 transitions. [2018-11-23 11:21:59,411 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 69 transitions. [2018-11-23 11:21:59,412 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:21:59,412 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:21:59,412 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:21:59,412 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:21:59,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-11-23 11:21:59,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 68 transitions. [2018-11-23 11:21:59,416 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 68 transitions. Word has length 25 [2018-11-23 11:21:59,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:21:59,416 INFO L480 AbstractCegarLoop]: Abstraction has 56 states and 68 transitions. [2018-11-23 11:21:59,417 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 11:21:59,417 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 68 transitions. [2018-11-23 11:21:59,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 11:21:59,418 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:21:59,418 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:21:59,418 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:21:59,419 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:21:59,419 INFO L82 PathProgramCache]: Analyzing trace with hash 3338338, now seen corresponding path program 1 times [2018-11-23 11:21:59,419 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:21:59,419 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:21:59,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:21:59,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:59,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:21:59,562 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:21:59,781 INFO L256 TraceCheckUtils]: 0: Hoare triple {1295#true} call ULTIMATE.init(); {1295#true} is VALID [2018-11-23 11:21:59,782 INFO L273 TraceCheckUtils]: 1: Hoare triple {1295#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {1295#true} is VALID [2018-11-23 11:21:59,782 INFO L273 TraceCheckUtils]: 2: Hoare triple {1295#true} assume true; {1295#true} is VALID [2018-11-23 11:21:59,783 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1295#true} {1295#true} #111#return; {1295#true} is VALID [2018-11-23 11:21:59,783 INFO L256 TraceCheckUtils]: 4: Hoare triple {1295#true} call #t~ret19 := main(); {1295#true} is VALID [2018-11-23 11:21:59,784 INFO L273 TraceCheckUtils]: 5: Hoare triple {1295#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {1295#true} is VALID [2018-11-23 11:21:59,784 INFO L273 TraceCheckUtils]: 6: Hoare triple {1295#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {1295#true} is VALID [2018-11-23 11:21:59,788 INFO L273 TraceCheckUtils]: 7: Hoare triple {1295#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,788 INFO L273 TraceCheckUtils]: 8: Hoare triple {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,789 INFO L273 TraceCheckUtils]: 9: Hoare triple {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,790 INFO L273 TraceCheckUtils]: 10: Hoare triple {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,791 INFO L273 TraceCheckUtils]: 11: Hoare triple {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,799 INFO L273 TraceCheckUtils]: 12: Hoare triple {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} ~i~0 := 0bv32; {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,800 INFO L273 TraceCheckUtils]: 13: Hoare triple {1321#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {1340#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:21:59,801 INFO L273 TraceCheckUtils]: 14: Hoare triple {1340#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1344#(and (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)) (bvslt main_~j~0 main_~edgecount~0))} is VALID [2018-11-23 11:21:59,802 INFO L273 TraceCheckUtils]: 15: Hoare triple {1344#(and (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)) (bvslt main_~j~0 main_~edgecount~0))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1344#(and (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)) (bvslt main_~j~0 main_~edgecount~0))} is VALID [2018-11-23 11:21:59,803 INFO L273 TraceCheckUtils]: 16: Hoare triple {1344#(and (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)) (bvslt main_~j~0 main_~edgecount~0))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1351#(and (bvslt (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:21:59,803 INFO L273 TraceCheckUtils]: 17: Hoare triple {1351#(and (bvslt (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~j~0, ~edgecount~0); {1355#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0))} is VALID [2018-11-23 11:21:59,804 INFO L273 TraceCheckUtils]: 18: Hoare triple {1355#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1355#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0))} is VALID [2018-11-23 11:21:59,805 INFO L273 TraceCheckUtils]: 19: Hoare triple {1355#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0))} assume !~bvslt32(~i~0, ~nodecount~0); {1355#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0))} is VALID [2018-11-23 11:21:59,806 INFO L273 TraceCheckUtils]: 20: Hoare triple {1355#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0))} ~i~0 := 0bv32; {1365#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:21:59,807 INFO L273 TraceCheckUtils]: 21: Hoare triple {1365#(and (not (bvslt (_ bv1 32) main_~edgecount~0)) (bvslt (_ bv0 32) main_~edgecount~0) (= main_~i~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~edgecount~0); {1296#false} is VALID [2018-11-23 11:21:59,807 INFO L273 TraceCheckUtils]: 22: Hoare triple {1296#false} ~i~0 := 0bv32; {1296#false} is VALID [2018-11-23 11:21:59,808 INFO L273 TraceCheckUtils]: 23: Hoare triple {1296#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1296#false} is VALID [2018-11-23 11:21:59,808 INFO L256 TraceCheckUtils]: 24: Hoare triple {1296#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {1296#false} is VALID [2018-11-23 11:21:59,808 INFO L273 TraceCheckUtils]: 25: Hoare triple {1296#false} ~cond := #in~cond; {1296#false} is VALID [2018-11-23 11:21:59,809 INFO L273 TraceCheckUtils]: 26: Hoare triple {1296#false} assume 0bv32 == ~cond; {1296#false} is VALID [2018-11-23 11:21:59,809 INFO L273 TraceCheckUtils]: 27: Hoare triple {1296#false} assume !false; {1296#false} is VALID [2018-11-23 11:21:59,812 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:21:59,812 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:22:00,067 INFO L273 TraceCheckUtils]: 27: Hoare triple {1296#false} assume !false; {1296#false} is VALID [2018-11-23 11:22:00,068 INFO L273 TraceCheckUtils]: 26: Hoare triple {1296#false} assume 0bv32 == ~cond; {1296#false} is VALID [2018-11-23 11:22:00,069 INFO L273 TraceCheckUtils]: 25: Hoare triple {1296#false} ~cond := #in~cond; {1296#false} is VALID [2018-11-23 11:22:00,069 INFO L256 TraceCheckUtils]: 24: Hoare triple {1296#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {1296#false} is VALID [2018-11-23 11:22:00,069 INFO L273 TraceCheckUtils]: 23: Hoare triple {1296#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1296#false} is VALID [2018-11-23 11:22:00,070 INFO L273 TraceCheckUtils]: 22: Hoare triple {1296#false} ~i~0 := 0bv32; {1296#false} is VALID [2018-11-23 11:22:00,071 INFO L273 TraceCheckUtils]: 21: Hoare triple {1405#(bvslt main_~i~0 main_~edgecount~0)} assume !~bvslt32(~i~0, ~edgecount~0); {1296#false} is VALID [2018-11-23 11:22:00,072 INFO L273 TraceCheckUtils]: 20: Hoare triple {1409#(bvslt (_ bv0 32) main_~edgecount~0)} ~i~0 := 0bv32; {1405#(bvslt main_~i~0 main_~edgecount~0)} is VALID [2018-11-23 11:22:00,072 INFO L273 TraceCheckUtils]: 19: Hoare triple {1409#(bvslt (_ bv0 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {1409#(bvslt (_ bv0 32) main_~edgecount~0)} is VALID [2018-11-23 11:22:00,073 INFO L273 TraceCheckUtils]: 18: Hoare triple {1409#(bvslt (_ bv0 32) main_~edgecount~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {1409#(bvslt (_ bv0 32) main_~edgecount~0)} is VALID [2018-11-23 11:22:00,073 INFO L273 TraceCheckUtils]: 17: Hoare triple {1419#(or (bvslt (_ bv0 32) main_~edgecount~0) (bvslt main_~j~0 main_~edgecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {1409#(bvslt (_ bv0 32) main_~edgecount~0)} is VALID [2018-11-23 11:22:00,074 INFO L273 TraceCheckUtils]: 16: Hoare triple {1423#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv0 32) main_~edgecount~0))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1419#(or (bvslt (_ bv0 32) main_~edgecount~0) (bvslt main_~j~0 main_~edgecount~0))} is VALID [2018-11-23 11:22:00,075 INFO L273 TraceCheckUtils]: 15: Hoare triple {1423#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv0 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {1423#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv0 32) main_~edgecount~0))} is VALID [2018-11-23 11:22:00,076 INFO L273 TraceCheckUtils]: 14: Hoare triple {1430#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv0 32) main_~edgecount~0) (not (bvslt main_~j~0 main_~edgecount~0)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {1423#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv0 32) main_~edgecount~0))} is VALID [2018-11-23 11:22:00,078 INFO L273 TraceCheckUtils]: 13: Hoare triple {1295#true} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {1430#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv0 32) main_~edgecount~0) (not (bvslt main_~j~0 main_~edgecount~0)))} is VALID [2018-11-23 11:22:00,079 INFO L273 TraceCheckUtils]: 12: Hoare triple {1295#true} ~i~0 := 0bv32; {1295#true} is VALID [2018-11-23 11:22:00,079 INFO L273 TraceCheckUtils]: 11: Hoare triple {1295#true} assume !~bvslt32(~i~0, ~nodecount~0); {1295#true} is VALID [2018-11-23 11:22:00,079 INFO L273 TraceCheckUtils]: 10: Hoare triple {1295#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1295#true} is VALID [2018-11-23 11:22:00,080 INFO L273 TraceCheckUtils]: 9: Hoare triple {1295#true} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1295#true} is VALID [2018-11-23 11:22:00,080 INFO L273 TraceCheckUtils]: 8: Hoare triple {1295#true} assume !!~bvslt32(~i~0, ~nodecount~0); {1295#true} is VALID [2018-11-23 11:22:00,080 INFO L273 TraceCheckUtils]: 7: Hoare triple {1295#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {1295#true} is VALID [2018-11-23 11:22:00,081 INFO L273 TraceCheckUtils]: 6: Hoare triple {1295#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {1295#true} is VALID [2018-11-23 11:22:00,081 INFO L273 TraceCheckUtils]: 5: Hoare triple {1295#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {1295#true} is VALID [2018-11-23 11:22:00,081 INFO L256 TraceCheckUtils]: 4: Hoare triple {1295#true} call #t~ret19 := main(); {1295#true} is VALID [2018-11-23 11:22:00,081 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1295#true} {1295#true} #111#return; {1295#true} is VALID [2018-11-23 11:22:00,082 INFO L273 TraceCheckUtils]: 2: Hoare triple {1295#true} assume true; {1295#true} is VALID [2018-11-23 11:22:00,082 INFO L273 TraceCheckUtils]: 1: Hoare triple {1295#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {1295#true} is VALID [2018-11-23 11:22:00,082 INFO L256 TraceCheckUtils]: 0: Hoare triple {1295#true} call ULTIMATE.init(); {1295#true} is VALID [2018-11-23 11:22:00,084 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:22:00,086 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:22:00,086 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 13 [2018-11-23 11:22:00,086 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 28 [2018-11-23 11:22:00,087 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:22:00,087 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-23 11:22:00,162 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:22:00,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 11:22:00,163 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 11:22:00,163 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=104, Unknown=0, NotChecked=0, Total=156 [2018-11-23 11:22:00,163 INFO L87 Difference]: Start difference. First operand 56 states and 68 transitions. Second operand 13 states. [2018-11-23 11:22:03,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:22:03,017 INFO L93 Difference]: Finished difference Result 170 states and 224 transitions. [2018-11-23 11:22:03,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 11:22:03,017 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 28 [2018-11-23 11:22:03,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:22:03,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 11:22:03,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 126 transitions. [2018-11-23 11:22:03,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 11:22:03,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 126 transitions. [2018-11-23 11:22:03,026 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 126 transitions. [2018-11-23 11:22:03,281 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:22:03,284 INFO L225 Difference]: With dead ends: 170 [2018-11-23 11:22:03,285 INFO L226 Difference]: Without dead ends: 134 [2018-11-23 11:22:03,286 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=128, Invalid=252, Unknown=0, NotChecked=0, Total=380 [2018-11-23 11:22:03,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-11-23 11:22:03,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 86. [2018-11-23 11:22:03,403 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:22:03,404 INFO L82 GeneralOperation]: Start isEquivalent. First operand 134 states. Second operand 86 states. [2018-11-23 11:22:03,404 INFO L74 IsIncluded]: Start isIncluded. First operand 134 states. Second operand 86 states. [2018-11-23 11:22:03,404 INFO L87 Difference]: Start difference. First operand 134 states. Second operand 86 states. [2018-11-23 11:22:03,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:22:03,410 INFO L93 Difference]: Finished difference Result 134 states and 170 transitions. [2018-11-23 11:22:03,410 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 170 transitions. [2018-11-23 11:22:03,411 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:22:03,411 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:22:03,412 INFO L74 IsIncluded]: Start isIncluded. First operand 86 states. Second operand 134 states. [2018-11-23 11:22:03,412 INFO L87 Difference]: Start difference. First operand 86 states. Second operand 134 states. [2018-11-23 11:22:03,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:22:03,418 INFO L93 Difference]: Finished difference Result 134 states and 170 transitions. [2018-11-23 11:22:03,419 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 170 transitions. [2018-11-23 11:22:03,419 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:22:03,419 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:22:03,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:22:03,420 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:22:03,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-11-23 11:22:03,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 110 transitions. [2018-11-23 11:22:03,423 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 110 transitions. Word has length 28 [2018-11-23 11:22:03,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:22:03,424 INFO L480 AbstractCegarLoop]: Abstraction has 86 states and 110 transitions. [2018-11-23 11:22:03,424 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 11:22:03,424 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 110 transitions. [2018-11-23 11:22:03,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-11-23 11:22:03,425 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:22:03,425 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:22:03,425 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:22:03,425 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:22:03,426 INFO L82 PathProgramCache]: Analyzing trace with hash 1687190263, now seen corresponding path program 1 times [2018-11-23 11:22:03,426 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:22:03,426 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:22:03,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:22:03,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:22:03,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:22:03,545 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:22:03,759 INFO L256 TraceCheckUtils]: 0: Hoare triple {2117#true} call ULTIMATE.init(); {2117#true} is VALID [2018-11-23 11:22:03,760 INFO L273 TraceCheckUtils]: 1: Hoare triple {2117#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {2117#true} is VALID [2018-11-23 11:22:03,760 INFO L273 TraceCheckUtils]: 2: Hoare triple {2117#true} assume true; {2117#true} is VALID [2018-11-23 11:22:03,760 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2117#true} {2117#true} #111#return; {2117#true} is VALID [2018-11-23 11:22:03,760 INFO L256 TraceCheckUtils]: 4: Hoare triple {2117#true} call #t~ret19 := main(); {2117#true} is VALID [2018-11-23 11:22:03,760 INFO L273 TraceCheckUtils]: 5: Hoare triple {2117#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {2117#true} is VALID [2018-11-23 11:22:03,761 INFO L273 TraceCheckUtils]: 6: Hoare triple {2117#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {2140#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:03,764 INFO L273 TraceCheckUtils]: 7: Hoare triple {2140#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {2144#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:22:03,764 INFO L273 TraceCheckUtils]: 8: Hoare triple {2144#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {2144#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:22:03,765 INFO L273 TraceCheckUtils]: 9: Hoare triple {2144#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2144#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:22:03,766 INFO L273 TraceCheckUtils]: 10: Hoare triple {2144#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2154#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:22:03,767 INFO L273 TraceCheckUtils]: 11: Hoare triple {2154#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {2158#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvslt main_~i~0 main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:22:03,769 INFO L273 TraceCheckUtils]: 12: Hoare triple {2158#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvslt main_~i~0 main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2158#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvslt main_~i~0 main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:22:03,770 INFO L273 TraceCheckUtils]: 13: Hoare triple {2158#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvslt main_~i~0 main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2165#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:22:03,771 INFO L273 TraceCheckUtils]: 14: Hoare triple {2165#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~i~0, ~nodecount~0); {2169#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:03,772 INFO L273 TraceCheckUtils]: 15: Hoare triple {2169#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (bvslt (_ bv1 32) main_~nodecount~0))} ~i~0 := 0bv32; {2173#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (= main_~i~0 (_ bv0 32)) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:03,773 INFO L273 TraceCheckUtils]: 16: Hoare triple {2173#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (= main_~i~0 (_ bv0 32)) (bvslt (_ bv1 32) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {2173#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (= main_~i~0 (_ bv0 32)) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:03,774 INFO L273 TraceCheckUtils]: 17: Hoare triple {2173#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (= main_~i~0 (_ bv0 32)) (bvslt (_ bv1 32) main_~nodecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {2173#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (= main_~i~0 (_ bv0 32)) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:03,775 INFO L273 TraceCheckUtils]: 18: Hoare triple {2173#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (= main_~i~0 (_ bv0 32)) (bvslt (_ bv1 32) main_~nodecount~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2183#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (bvslt (_ bv1 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:22:03,777 INFO L273 TraceCheckUtils]: 19: Hoare triple {2183#(and (not (bvslt (_ bv2 32) main_~nodecount~0)) (bvslt (_ bv1 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {2118#false} is VALID [2018-11-23 11:22:03,777 INFO L273 TraceCheckUtils]: 20: Hoare triple {2118#false} ~i~0 := 0bv32; {2118#false} is VALID [2018-11-23 11:22:03,777 INFO L273 TraceCheckUtils]: 21: Hoare triple {2118#false} assume !~bvslt32(~i~0, ~edgecount~0); {2118#false} is VALID [2018-11-23 11:22:03,778 INFO L273 TraceCheckUtils]: 22: Hoare triple {2118#false} ~i~0 := 0bv32; {2118#false} is VALID [2018-11-23 11:22:03,778 INFO L273 TraceCheckUtils]: 23: Hoare triple {2118#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2118#false} is VALID [2018-11-23 11:22:03,778 INFO L256 TraceCheckUtils]: 24: Hoare triple {2118#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {2118#false} is VALID [2018-11-23 11:22:03,778 INFO L273 TraceCheckUtils]: 25: Hoare triple {2118#false} ~cond := #in~cond; {2118#false} is VALID [2018-11-23 11:22:03,779 INFO L273 TraceCheckUtils]: 26: Hoare triple {2118#false} assume 0bv32 == ~cond; {2118#false} is VALID [2018-11-23 11:22:03,779 INFO L273 TraceCheckUtils]: 27: Hoare triple {2118#false} assume !false; {2118#false} is VALID [2018-11-23 11:22:03,780 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:22:03,781 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:22:04,058 INFO L273 TraceCheckUtils]: 27: Hoare triple {2118#false} assume !false; {2118#false} is VALID [2018-11-23 11:22:04,058 INFO L273 TraceCheckUtils]: 26: Hoare triple {2118#false} assume 0bv32 == ~cond; {2118#false} is VALID [2018-11-23 11:22:04,059 INFO L273 TraceCheckUtils]: 25: Hoare triple {2118#false} ~cond := #in~cond; {2118#false} is VALID [2018-11-23 11:22:04,059 INFO L256 TraceCheckUtils]: 24: Hoare triple {2118#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {2118#false} is VALID [2018-11-23 11:22:04,059 INFO L273 TraceCheckUtils]: 23: Hoare triple {2118#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2118#false} is VALID [2018-11-23 11:22:04,059 INFO L273 TraceCheckUtils]: 22: Hoare triple {2118#false} ~i~0 := 0bv32; {2118#false} is VALID [2018-11-23 11:22:04,060 INFO L273 TraceCheckUtils]: 21: Hoare triple {2118#false} assume !~bvslt32(~i~0, ~edgecount~0); {2118#false} is VALID [2018-11-23 11:22:04,060 INFO L273 TraceCheckUtils]: 20: Hoare triple {2118#false} ~i~0 := 0bv32; {2118#false} is VALID [2018-11-23 11:22:04,062 INFO L273 TraceCheckUtils]: 19: Hoare triple {2235#(bvslt main_~i~0 main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {2118#false} is VALID [2018-11-23 11:22:04,064 INFO L273 TraceCheckUtils]: 18: Hoare triple {2239#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {2235#(bvslt main_~i~0 main_~nodecount~0)} is VALID [2018-11-23 11:22:04,064 INFO L273 TraceCheckUtils]: 17: Hoare triple {2239#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !~bvslt32(~j~0, ~edgecount~0); {2239#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:22:04,065 INFO L273 TraceCheckUtils]: 16: Hoare triple {2239#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {2239#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:22:04,065 INFO L273 TraceCheckUtils]: 15: Hoare triple {2249#(bvslt (_ bv1 32) main_~nodecount~0)} ~i~0 := 0bv32; {2239#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:22:04,066 INFO L273 TraceCheckUtils]: 14: Hoare triple {2253#(or (bvslt main_~i~0 main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} assume !~bvslt32(~i~0, ~nodecount~0); {2249#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:22:04,069 INFO L273 TraceCheckUtils]: 13: Hoare triple {2257#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2253#(or (bvslt main_~i~0 main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,070 INFO L273 TraceCheckUtils]: 12: Hoare triple {2257#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2257#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,071 INFO L273 TraceCheckUtils]: 11: Hoare triple {2264#(or (not (bvslt main_~i~0 main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2257#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,097 INFO L273 TraceCheckUtils]: 10: Hoare triple {2268#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2264#(or (not (bvslt main_~i~0 main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,098 INFO L273 TraceCheckUtils]: 9: Hoare triple {2268#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2268#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,098 INFO L273 TraceCheckUtils]: 8: Hoare triple {2268#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2268#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,105 INFO L273 TraceCheckUtils]: 7: Hoare triple {2117#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {2268#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)) (bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0) (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:22:04,105 INFO L273 TraceCheckUtils]: 6: Hoare triple {2117#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {2117#true} is VALID [2018-11-23 11:22:04,106 INFO L273 TraceCheckUtils]: 5: Hoare triple {2117#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {2117#true} is VALID [2018-11-23 11:22:04,106 INFO L256 TraceCheckUtils]: 4: Hoare triple {2117#true} call #t~ret19 := main(); {2117#true} is VALID [2018-11-23 11:22:04,107 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2117#true} {2117#true} #111#return; {2117#true} is VALID [2018-11-23 11:22:04,107 INFO L273 TraceCheckUtils]: 2: Hoare triple {2117#true} assume true; {2117#true} is VALID [2018-11-23 11:22:04,107 INFO L273 TraceCheckUtils]: 1: Hoare triple {2117#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {2117#true} is VALID [2018-11-23 11:22:04,108 INFO L256 TraceCheckUtils]: 0: Hoare triple {2117#true} call ULTIMATE.init(); {2117#true} is VALID [2018-11-23 11:22:04,110 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:22:04,114 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:22:04,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-11-23 11:22:04,114 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 28 [2018-11-23 11:22:04,115 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:22:04,115 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 11:22:04,222 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:22:04,222 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 11:22:04,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 11:22:04,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272 [2018-11-23 11:22:04,223 INFO L87 Difference]: Start difference. First operand 86 states and 110 transitions. Second operand 17 states. [2018-11-23 11:22:09,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:22:09,481 INFO L93 Difference]: Finished difference Result 480 states and 654 transitions. [2018-11-23 11:22:09,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 11:22:09,482 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 28 [2018-11-23 11:22:09,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:22:09,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 11:22:09,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 220 transitions. [2018-11-23 11:22:09,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 11:22:09,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 220 transitions. [2018-11-23 11:22:09,493 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 220 transitions. [2018-11-23 11:22:09,950 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 220 edges. 220 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:22:09,966 INFO L225 Difference]: With dead ends: 480 [2018-11-23 11:22:09,966 INFO L226 Difference]: Without dead ends: 411 [2018-11-23 11:22:09,967 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 139 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=188, Invalid=412, Unknown=0, NotChecked=0, Total=600 [2018-11-23 11:22:09,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411 states. [2018-11-23 11:22:10,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411 to 257. [2018-11-23 11:22:10,760 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:22:10,760 INFO L82 GeneralOperation]: Start isEquivalent. First operand 411 states. Second operand 257 states. [2018-11-23 11:22:10,760 INFO L74 IsIncluded]: Start isIncluded. First operand 411 states. Second operand 257 states. [2018-11-23 11:22:10,760 INFO L87 Difference]: Start difference. First operand 411 states. Second operand 257 states. [2018-11-23 11:22:10,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:22:10,783 INFO L93 Difference]: Finished difference Result 411 states and 546 transitions. [2018-11-23 11:22:10,783 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 546 transitions. [2018-11-23 11:22:10,784 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:22:10,784 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:22:10,785 INFO L74 IsIncluded]: Start isIncluded. First operand 257 states. Second operand 411 states. [2018-11-23 11:22:10,785 INFO L87 Difference]: Start difference. First operand 257 states. Second operand 411 states. [2018-11-23 11:22:10,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:22:10,809 INFO L93 Difference]: Finished difference Result 411 states and 546 transitions. [2018-11-23 11:22:10,809 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 546 transitions. [2018-11-23 11:22:10,810 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:22:10,810 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:22:10,811 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:22:10,811 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:22:10,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2018-11-23 11:22:10,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 348 transitions. [2018-11-23 11:22:10,821 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 348 transitions. Word has length 28 [2018-11-23 11:22:10,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:22:10,822 INFO L480 AbstractCegarLoop]: Abstraction has 257 states and 348 transitions. [2018-11-23 11:22:10,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 11:22:10,822 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 348 transitions. [2018-11-23 11:22:10,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 11:22:10,823 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:22:10,824 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:22:10,824 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:22:10,824 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:22:10,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1281163029, now seen corresponding path program 1 times [2018-11-23 11:22:10,825 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:22:10,825 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:22:10,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:22:11,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:22:11,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:22:11,244 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:22:11,341 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:11,342 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-23 11:22:11,363 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-23 11:22:11,397 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:11,398 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:11,399 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:11,401 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-23 11:22:11,403 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,417 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,467 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:49, output treesize:35 [2018-11-23 11:22:11,472 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:22:11,472 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#valid_33|, |main_~#Dest~0.base|]. (let ((.cse0 (store |v_#valid_33| |main_~#Source~0.base| (_ bv1 1)))) (and (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 1) (select .cse0 |main_~#Dest~0.base|)) (= main_~i~0 (_ bv0 32)) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (_ bv0 1) (select (store (store .cse0 |main_~#Dest~0.base| (_ bv1 1)) |main_~#Weight~0.base| (_ bv1 1)) |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))) [2018-11-23 11:22:11,473 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|)) [2018-11-23 11:22:11,785 INFO L303 Elim1Store]: Index analysis took 187 ms [2018-11-23 11:22:11,797 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 31 [2018-11-23 11:22:11,832 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-23 11:22:11,835 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,849 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,877 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:22:11,878 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-11-23 11:22:12,346 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:12,351 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 75 [2018-11-23 11:22:12,362 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:12,363 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:22:14,373 WARN L687 Elim1Store]: solver failed to check if following not equals relation is implied: (= (select v_arrayElimCell_6 (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select v_arrayElimCell_6 (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|))) [2018-11-23 11:22:14,376 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:16,385 WARN L687 Elim1Store]: solver failed to check if following not equals relation is implied: (= (select v_arrayElimCell_6 |main_~#distance~0.offset|) (select v_arrayElimCell_6 (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|))) [2018-11-23 11:22:16,386 INFO L303 Elim1Store]: Index analysis took 4028 ms [2018-11-23 11:22:16,387 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 95 [2018-11-23 11:22:16,403 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 11:22:16,458 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 11:22:16,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-11-23 11:22:16,504 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:77, output treesize:73 [2018-11-23 11:22:16,556 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:22:16,557 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_19|, |main_~#Source~0.base|, |main_~#Weight~0.base|, main_~x~0]. (let ((.cse3 (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (.cse1 (select |v_#memory_int_19| |main_~#distance~0.base|)) (.cse0 (select (select |v_#memory_int_19| |main_~#Source~0.base|) (_ bv0 32))) (.cse2 (select (select |v_#memory_int_19| |main_~#Weight~0.base|) (_ bv0 32)))) (and (= .cse0 (_ bv0 32)) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (select .cse1 |main_~#distance~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) .cse2) (= |#memory_int| (store |v_#memory_int_19| |main_~#distance~0.base| (store .cse1 .cse3 (_ bv4294967295 32)))) (bvsgt (select .cse1 .cse3) (bvadd (select .cse1 (bvadd (bvmul (_ bv4 32) .cse0) |main_~#distance~0.offset|)) .cse2)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) [2018-11-23 11:22:16,557 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [|main_~#Source~0.base|, |main_~#Weight~0.base|, v_arrayElimCell_7, main_~x~0]. (let ((.cse0 (select |#memory_int| |main_~#distance~0.base|)) (.cse1 (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32)))) (let ((.cse2 (select .cse0 (bvadd (bvmul (_ bv4 32) .cse1) |main_~#distance~0.offset|))) (.cse3 (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (select .cse0 (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv4294967295 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) .cse1) (= .cse2 (_ bv0 32)) (= (_ bv0 32) .cse3) (bvsgt v_arrayElimCell_7 (bvadd .cse2 .cse3)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|))))) [2018-11-23 11:22:19,149 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 65 treesize of output 63 [2018-11-23 11:22:19,168 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:22:19,169 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:19,171 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:19,172 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 50 [2018-11-23 11:22:19,176 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:19,260 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2018-11-23 11:22:19,263 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:19,313 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 17 [2018-11-23 11:22:19,316 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:19,366 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 25 [2018-11-23 11:22:19,369 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:19,410 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:19,411 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:22:19,412 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2018-11-23 11:22:19,419 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-23 11:22:19,443 INFO L267 ElimStorePlain]: Start of recursive call 2: 5 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:22:19,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 11:22:19,467 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 6 variables, input treesize:73, output treesize:7 [2018-11-23 11:22:19,477 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:22:19,477 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#distance~0.base|, |main_~#Source~0.base|, |main_~#Weight~0.base|, v_arrayElimCell_7, main_~x~0]. (let ((.cse0 (select |#memory_int| |main_~#distance~0.base|)) (.cse1 (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32)))) (let ((.cse2 (select .cse0 (bvmul (_ bv4 32) .cse1))) (.cse3 (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (and (= (_ bv0 32) (bvadd (select .cse0 (bvmul (_ bv4 32) main_~x~0)) (_ bv1 32))) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= |main_#t~mem18| (select .cse0 (_ bv0 32))) (= (_ bv0 32) .cse1) (= .cse2 (_ bv0 32)) (= (_ bv0 32) .cse3) (bvsgt v_arrayElimCell_7 (bvadd .cse2 .cse3)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|))))) [2018-11-23 11:22:19,478 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [v_arrayElimCell_7]. (and (bvsgt v_arrayElimCell_7 |main_#t~mem18|) (= |main_#t~mem18| (_ bv0 32))) [2018-11-23 11:22:19,569 INFO L256 TraceCheckUtils]: 0: Hoare triple {4193#true} call ULTIMATE.init(); {4193#true} is VALID [2018-11-23 11:22:19,569 INFO L273 TraceCheckUtils]: 1: Hoare triple {4193#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {4193#true} is VALID [2018-11-23 11:22:19,569 INFO L273 TraceCheckUtils]: 2: Hoare triple {4193#true} assume true; {4193#true} is VALID [2018-11-23 11:22:19,570 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4193#true} {4193#true} #111#return; {4193#true} is VALID [2018-11-23 11:22:19,570 INFO L256 TraceCheckUtils]: 4: Hoare triple {4193#true} call #t~ret19 := main(); {4193#true} is VALID [2018-11-23 11:22:19,570 INFO L273 TraceCheckUtils]: 5: Hoare triple {4193#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {4193#true} is VALID [2018-11-23 11:22:19,571 INFO L273 TraceCheckUtils]: 6: Hoare triple {4193#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {4193#true} is VALID [2018-11-23 11:22:19,574 INFO L273 TraceCheckUtils]: 7: Hoare triple {4193#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {4219#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,574 INFO L273 TraceCheckUtils]: 8: Hoare triple {4219#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0); {4219#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,577 INFO L273 TraceCheckUtils]: 9: Hoare triple {4219#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,578 INFO L273 TraceCheckUtils]: 10: Hoare triple {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,579 INFO L273 TraceCheckUtils]: 11: Hoare triple {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !~bvslt32(~i~0, ~nodecount~0); {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,580 INFO L273 TraceCheckUtils]: 12: Hoare triple {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} ~i~0 := 0bv32; {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,581 INFO L273 TraceCheckUtils]: 13: Hoare triple {4226#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {4239#(and (= main_~j~0 (_ bv0 32)) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:22:19,588 INFO L273 TraceCheckUtils]: 14: Hoare triple {4239#(and (= main_~j~0 (_ bv0 32)) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4243#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= |main_#t~mem10| (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|))) (exists ((|main_~#Weight~0.base| (_ BitVec 32))) (and (= |main_#t~mem9| (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((|main_~#Source~0.base| (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) |main_#t~mem8|) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))))))} is VALID [2018-11-23 11:22:19,626 INFO L273 TraceCheckUtils]: 15: Hoare triple {4243#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= |main_#t~mem10| (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|))) (exists ((|main_~#Weight~0.base| (_ BitVec 32))) (and (= |main_#t~mem9| (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((|main_~#Source~0.base| (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) |main_#t~mem8|) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))))))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,628 INFO L273 TraceCheckUtils]: 16: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,629 INFO L273 TraceCheckUtils]: 17: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} assume !~bvslt32(~j~0, ~edgecount~0); {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,630 INFO L273 TraceCheckUtils]: 18: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,632 INFO L273 TraceCheckUtils]: 19: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} assume !~bvslt32(~i~0, ~nodecount~0); {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,636 INFO L273 TraceCheckUtils]: 20: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} ~i~0 := 0bv32; {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,637 INFO L273 TraceCheckUtils]: 21: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,638 INFO L273 TraceCheckUtils]: 22: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,639 INFO L273 TraceCheckUtils]: 23: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,640 INFO L273 TraceCheckUtils]: 24: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} assume !~bvslt32(~i~0, ~edgecount~0); {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} is VALID [2018-11-23 11:22:19,641 INFO L273 TraceCheckUtils]: 25: Hoare triple {4247#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))))} ~i~0 := 0bv32; {4278#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:22:19,646 INFO L273 TraceCheckUtils]: 26: Hoare triple {4278#(and (= (_ bv0 32) |main_~#distance~0.offset|) (exists ((|main_~#Weight~0.base| (_ BitVec 32)) (|main_~#Source~0.base| (_ BitVec 32)) (v_arrayElimCell_7 (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (bvsgt v_arrayElimCell_7 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (exists ((main_~x~0 (_ BitVec 32))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32))) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4282#(= |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:22:19,647 INFO L256 TraceCheckUtils]: 27: Hoare triple {4282#(= |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {4286#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:22:19,647 INFO L273 TraceCheckUtils]: 28: Hoare triple {4286#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {4290#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:22:19,647 INFO L273 TraceCheckUtils]: 29: Hoare triple {4290#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {4194#false} is VALID [2018-11-23 11:22:19,648 INFO L273 TraceCheckUtils]: 30: Hoare triple {4194#false} assume !false; {4194#false} is VALID [2018-11-23 11:22:19,655 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:22:19,656 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:22:22,128 INFO L273 TraceCheckUtils]: 30: Hoare triple {4194#false} assume !false; {4194#false} is VALID [2018-11-23 11:22:22,129 INFO L273 TraceCheckUtils]: 29: Hoare triple {4300#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {4194#false} is VALID [2018-11-23 11:22:22,129 INFO L273 TraceCheckUtils]: 28: Hoare triple {4304#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {4300#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:22:22,130 INFO L256 TraceCheckUtils]: 27: Hoare triple {4308#(bvsge |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {4304#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:22:22,131 INFO L273 TraceCheckUtils]: 26: Hoare triple {4312#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4308#(bvsge |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:22:22,132 INFO L273 TraceCheckUtils]: 25: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {4312#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} is VALID [2018-11-23 11:22:22,133 INFO L273 TraceCheckUtils]: 24: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~edgecount~0); {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,133 INFO L273 TraceCheckUtils]: 23: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,139 INFO L273 TraceCheckUtils]: 22: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,140 INFO L273 TraceCheckUtils]: 21: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,140 INFO L273 TraceCheckUtils]: 20: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,141 INFO L273 TraceCheckUtils]: 19: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~nodecount~0); {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,141 INFO L273 TraceCheckUtils]: 18: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,143 INFO L273 TraceCheckUtils]: 17: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~j~0, ~edgecount~0); {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,144 INFO L273 TraceCheckUtils]: 16: Hoare triple {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,151 INFO L273 TraceCheckUtils]: 15: Hoare triple {4347#(or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt |main_#t~mem10| (bvadd |main_#t~mem9| |main_#t~mem8|))))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {4316#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:22:22,164 INFO L273 TraceCheckUtils]: 14: Hoare triple {4351#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#Weight~0.base|) (bvadd |main_~#Weight~0.offset| (bvmul (_ bv4 32) main_~j~0))) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (bvadd |main_~#Source~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|))))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4347#(or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt |main_#t~mem10| (bvadd |main_#t~mem9| |main_#t~mem8|))))} is VALID [2018-11-23 11:22:22,169 INFO L273 TraceCheckUtils]: 13: Hoare triple {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {4351#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#Weight~0.base|) (bvadd |main_~#Weight~0.offset| (bvmul (_ bv4 32) main_~j~0))) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (bvadd |main_~#Source~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|))))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))))} is VALID [2018-11-23 11:22:22,174 INFO L273 TraceCheckUtils]: 12: Hoare triple {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} ~i~0 := 0bv32; {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} is VALID [2018-11-23 11:22:22,175 INFO L273 TraceCheckUtils]: 11: Hoare triple {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} assume !~bvslt32(~i~0, ~nodecount~0); {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} is VALID [2018-11-23 11:22:22,176 INFO L273 TraceCheckUtils]: 10: Hoare triple {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} is VALID [2018-11-23 11:22:24,181 INFO L273 TraceCheckUtils]: 9: Hoare triple {4368#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4355#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|))))))} is UNKNOWN [2018-11-23 11:22:24,182 INFO L273 TraceCheckUtils]: 8: Hoare triple {4368#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))))} assume !!~bvslt32(~i~0, ~nodecount~0); {4368#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))))} is VALID [2018-11-23 11:22:24,193 INFO L273 TraceCheckUtils]: 7: Hoare triple {4193#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {4368#(forall ((v_main_~x~0_9 (_ BitVec 32))) (or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) v_main_~x~0_9) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))))} is VALID [2018-11-23 11:22:24,193 INFO L273 TraceCheckUtils]: 6: Hoare triple {4193#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {4193#true} is VALID [2018-11-23 11:22:24,193 INFO L273 TraceCheckUtils]: 5: Hoare triple {4193#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {4193#true} is VALID [2018-11-23 11:22:24,194 INFO L256 TraceCheckUtils]: 4: Hoare triple {4193#true} call #t~ret19 := main(); {4193#true} is VALID [2018-11-23 11:22:24,194 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4193#true} {4193#true} #111#return; {4193#true} is VALID [2018-11-23 11:22:24,194 INFO L273 TraceCheckUtils]: 2: Hoare triple {4193#true} assume true; {4193#true} is VALID [2018-11-23 11:22:24,194 INFO L273 TraceCheckUtils]: 1: Hoare triple {4193#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {4193#true} is VALID [2018-11-23 11:22:24,194 INFO L256 TraceCheckUtils]: 0: Hoare triple {4193#true} call ULTIMATE.init(); {4193#true} is VALID [2018-11-23 11:22:24,200 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:22:24,203 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:22:24,203 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-23 11:22:24,205 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 31 [2018-11-23 11:22:24,205 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:22:24,205 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 11:22:28,052 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 53 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 11:22:28,052 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 11:22:28,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 11:22:28,053 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2018-11-23 11:22:28,053 INFO L87 Difference]: Start difference. First operand 257 states and 348 transitions. Second operand 20 states. [2018-11-23 11:22:30,497 WARN L180 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 51 [2018-11-23 11:22:35,168 WARN L180 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 60 [2018-11-23 11:22:36,173 WARN L180 SmtUtils]: Spent 243.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 58 [2018-11-23 11:22:39,131 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 47 [2018-11-23 11:22:41,830 WARN L180 SmtUtils]: Spent 235.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 56 [2018-11-23 11:22:42,641 WARN L180 SmtUtils]: Spent 263.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 58 [2018-11-23 11:22:48,552 WARN L180 SmtUtils]: Spent 295.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 57 [2018-11-23 11:22:49,347 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 45 [2018-11-23 11:22:50,984 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 47 [2018-11-23 11:23:04,476 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 49 [2018-11-23 11:23:13,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:13,233 INFO L93 Difference]: Finished difference Result 437 states and 577 transitions. [2018-11-23 11:23:13,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 11:23:13,234 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 31 [2018-11-23 11:23:13,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:23:13,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 11:23:13,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 179 transitions. [2018-11-23 11:23:13,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 11:23:13,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 179 transitions. [2018-11-23 11:23:13,241 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states and 179 transitions. [2018-11-23 11:23:19,817 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 179 edges. 177 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:19,835 INFO L225 Difference]: With dead ends: 437 [2018-11-23 11:23:19,835 INFO L226 Difference]: Without dead ends: 435 [2018-11-23 11:23:19,836 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=266, Invalid=1066, Unknown=0, NotChecked=0, Total=1332 [2018-11-23 11:23:19,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 435 states. [2018-11-23 11:23:22,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 435 to 254. [2018-11-23 11:23:22,357 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:23:22,358 INFO L82 GeneralOperation]: Start isEquivalent. First operand 435 states. Second operand 254 states. [2018-11-23 11:23:22,358 INFO L74 IsIncluded]: Start isIncluded. First operand 435 states. Second operand 254 states. [2018-11-23 11:23:22,358 INFO L87 Difference]: Start difference. First operand 435 states. Second operand 254 states. [2018-11-23 11:23:22,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:22,378 INFO L93 Difference]: Finished difference Result 435 states and 575 transitions. [2018-11-23 11:23:22,378 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 575 transitions. [2018-11-23 11:23:22,379 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:23:22,380 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:23:22,380 INFO L74 IsIncluded]: Start isIncluded. First operand 254 states. Second operand 435 states. [2018-11-23 11:23:22,380 INFO L87 Difference]: Start difference. First operand 254 states. Second operand 435 states. [2018-11-23 11:23:22,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:22,400 INFO L93 Difference]: Finished difference Result 435 states and 575 transitions. [2018-11-23 11:23:22,400 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 575 transitions. [2018-11-23 11:23:22,402 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:23:22,402 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:23:22,402 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:23:22,402 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:23:22,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-11-23 11:23:22,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 344 transitions. [2018-11-23 11:23:22,413 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 344 transitions. Word has length 31 [2018-11-23 11:23:22,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:23:22,413 INFO L480 AbstractCegarLoop]: Abstraction has 254 states and 344 transitions. [2018-11-23 11:23:22,413 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 11:23:22,414 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 344 transitions. [2018-11-23 11:23:22,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 11:23:22,415 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:23:22,415 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:23:22,415 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:23:22,415 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:23:22,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1972596862, now seen corresponding path program 2 times [2018-11-23 11:23:22,416 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:23:22,416 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:23:22,448 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:23:22,748 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 11:23:22,748 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:23:22,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:23:22,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:23:22,921 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-11-23 11:23:22,928 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-23 11:23:22,935 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:23:22,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:23:22,956 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:23:22,956 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-11-23 11:23:23,066 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-11-23 11:23:23,080 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:23:23,084 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-11-23 11:23:23,087 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:23:23,097 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:23:23,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:23:23,114 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:11 [2018-11-23 11:23:23,125 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:23:23,126 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_23|, ~INFINITY~0]. (let ((.cse0 (select |v_#memory_int_23| |main_~#distance~0.base|))) (and (= (_ bv0 32) |main_~#distance~0.offset|) (= (select .cse0 |main_~#distance~0.offset|) (_ bv0 32)) (= (store |v_#memory_int_23| |main_~#distance~0.base| (store .cse0 (bvadd |main_~#distance~0.offset| (_ bv4 32)) ~INFINITY~0)) |#memory_int|))) [2018-11-23 11:23:23,126 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|)) [2018-11-23 11:23:23,194 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-23 11:23:23,198 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-23 11:23:23,199 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:23:23,201 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:23:23,202 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:23:23,202 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-11-23 11:23:23,205 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:23:23,206 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#distance~0.base|]. (let ((.cse0 (select (select |#memory_int| |main_~#distance~0.base|) (_ bv0 32)))) (and (= |main_#t~mem18| .cse0) (= (_ bv0 32) .cse0))) [2018-11-23 11:23:23,206 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (= |main_#t~mem18| (_ bv0 32)) [2018-11-23 11:23:23,241 INFO L256 TraceCheckUtils]: 0: Hoare triple {6301#true} call ULTIMATE.init(); {6301#true} is VALID [2018-11-23 11:23:23,242 INFO L273 TraceCheckUtils]: 1: Hoare triple {6301#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {6301#true} is VALID [2018-11-23 11:23:23,242 INFO L273 TraceCheckUtils]: 2: Hoare triple {6301#true} assume true; {6301#true} is VALID [2018-11-23 11:23:23,242 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6301#true} {6301#true} #111#return; {6301#true} is VALID [2018-11-23 11:23:23,242 INFO L256 TraceCheckUtils]: 4: Hoare triple {6301#true} call #t~ret19 := main(); {6301#true} is VALID [2018-11-23 11:23:23,243 INFO L273 TraceCheckUtils]: 5: Hoare triple {6301#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {6301#true} is VALID [2018-11-23 11:23:23,243 INFO L273 TraceCheckUtils]: 6: Hoare triple {6301#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {6301#true} is VALID [2018-11-23 11:23:23,246 INFO L273 TraceCheckUtils]: 7: Hoare triple {6301#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {6327#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:23,247 INFO L273 TraceCheckUtils]: 8: Hoare triple {6327#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {6327#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:23,249 INFO L273 TraceCheckUtils]: 9: Hoare triple {6327#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6334#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32)))} is VALID [2018-11-23 11:23:23,250 INFO L273 TraceCheckUtils]: 10: Hoare triple {6334#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6338#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:23:23,251 INFO L273 TraceCheckUtils]: 11: Hoare triple {6338#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {6338#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:23:23,252 INFO L273 TraceCheckUtils]: 12: Hoare triple {6338#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,252 INFO L273 TraceCheckUtils]: 13: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,253 INFO L273 TraceCheckUtils]: 14: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~nodecount~0); {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,254 INFO L273 TraceCheckUtils]: 15: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,255 INFO L273 TraceCheckUtils]: 16: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,255 INFO L273 TraceCheckUtils]: 17: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~j~0, ~edgecount~0); {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,256 INFO L273 TraceCheckUtils]: 18: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,257 INFO L273 TraceCheckUtils]: 19: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,258 INFO L273 TraceCheckUtils]: 20: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~j~0, ~edgecount~0); {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,259 INFO L273 TraceCheckUtils]: 21: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,259 INFO L273 TraceCheckUtils]: 22: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~nodecount~0); {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,260 INFO L273 TraceCheckUtils]: 23: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,261 INFO L273 TraceCheckUtils]: 24: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~edgecount~0); {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:23:23,262 INFO L273 TraceCheckUtils]: 25: Hoare triple {6345#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {6334#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32)))} is VALID [2018-11-23 11:23:23,263 INFO L273 TraceCheckUtils]: 26: Hoare triple {6334#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6388#(= |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:23:23,264 INFO L256 TraceCheckUtils]: 27: Hoare triple {6388#(= |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {6392#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:23:23,265 INFO L273 TraceCheckUtils]: 28: Hoare triple {6392#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {6396#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:23:23,266 INFO L273 TraceCheckUtils]: 29: Hoare triple {6396#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {6302#false} is VALID [2018-11-23 11:23:23,266 INFO L273 TraceCheckUtils]: 30: Hoare triple {6302#false} assume !false; {6302#false} is VALID [2018-11-23 11:23:23,269 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 11:23:23,270 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:23:23,608 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-11-23 11:23:23,613 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 24 [2018-11-23 11:23:25,662 WARN L670 Elim1Store]: solver failed to check if following equality is implied: (= (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) |main_~#distance~0.offset|) [2018-11-23 11:23:25,664 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:23:25,665 INFO L303 Elim1Store]: Index analysis took 2013 ms [2018-11-23 11:23:25,666 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-11-23 11:23:25,669 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 11:23:25,674 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 6 [2018-11-23 11:23:25,680 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 11:23:25,696 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 11:23:25,712 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-11-23 11:23:25,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-11-23 11:23:25,732 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:22, output treesize:21 [2018-11-23 11:23:25,737 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:23:25,738 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#distance~0.base|, ~INFINITY~0]. (bvsge (select (let ((.cse0 (bvmul (_ bv4 32) main_~i~0))) (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd .cse0 |main_~#distance~0.offset|) (_ bv0 32)) (bvadd .cse0 |main_~#distance~0.offset| (_ bv4 32)) ~INFINITY~0)) |main_~#distance~0.offset|) (_ bv0 32)) [2018-11-23 11:23:25,738 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (let ((.cse0 (bvmul (_ bv4 32) main_~i~0))) (let ((.cse1 (= (bvadd .cse0 |main_~#distance~0.offset|) |main_~#distance~0.offset|))) (and (or (= (_ bv4294967292 32) .cse0) .cse1) .cse1))) [2018-11-23 11:23:25,817 INFO L273 TraceCheckUtils]: 30: Hoare triple {6302#false} assume !false; {6302#false} is VALID [2018-11-23 11:23:25,820 INFO L273 TraceCheckUtils]: 29: Hoare triple {6406#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {6302#false} is VALID [2018-11-23 11:23:25,820 INFO L273 TraceCheckUtils]: 28: Hoare triple {6410#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {6406#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:23:25,821 INFO L256 TraceCheckUtils]: 27: Hoare triple {6414#(bvsge |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {6410#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:23:25,821 INFO L273 TraceCheckUtils]: 26: Hoare triple {6418#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6414#(bvsge |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:23:25,822 INFO L273 TraceCheckUtils]: 25: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {6418#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} is VALID [2018-11-23 11:23:25,822 INFO L273 TraceCheckUtils]: 24: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~edgecount~0); {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,823 INFO L273 TraceCheckUtils]: 23: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,824 INFO L273 TraceCheckUtils]: 22: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~nodecount~0); {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,824 INFO L273 TraceCheckUtils]: 21: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,825 INFO L273 TraceCheckUtils]: 20: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~j~0, ~edgecount~0); {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,825 INFO L273 TraceCheckUtils]: 19: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,826 INFO L273 TraceCheckUtils]: 18: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,826 INFO L273 TraceCheckUtils]: 17: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~j~0, ~edgecount~0); {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,827 INFO L273 TraceCheckUtils]: 16: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,828 INFO L273 TraceCheckUtils]: 15: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,828 INFO L273 TraceCheckUtils]: 14: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~nodecount~0); {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,829 INFO L273 TraceCheckUtils]: 13: Hoare triple {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,844 INFO L273 TraceCheckUtils]: 12: Hoare triple {6462#(forall ((~INFINITY~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) ~INFINITY~0) |main_~#distance~0.offset|) (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6422#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:23:25,845 INFO L273 TraceCheckUtils]: 11: Hoare triple {6462#(forall ((~INFINITY~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) ~INFINITY~0) |main_~#distance~0.offset|) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {6462#(forall ((~INFINITY~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) ~INFINITY~0) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:23:25,849 INFO L273 TraceCheckUtils]: 10: Hoare triple {6469#(forall ((~INFINITY~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset| (_ bv4 32)) ~INFINITY~0) |main_~#distance~0.offset|) (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {6462#(forall ((~INFINITY~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) ~INFINITY~0) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:23:25,850 INFO L273 TraceCheckUtils]: 9: Hoare triple {6473#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6469#(forall ((~INFINITY~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset| (_ bv4 32)) ~INFINITY~0) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:23:25,851 INFO L273 TraceCheckUtils]: 8: Hoare triple {6473#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0); {6473#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} is VALID [2018-11-23 11:23:25,855 INFO L273 TraceCheckUtils]: 7: Hoare triple {6301#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {6473#(= (bvmul (_ bv4 32) main_~i~0) (_ bv0 32))} is VALID [2018-11-23 11:23:25,855 INFO L273 TraceCheckUtils]: 6: Hoare triple {6301#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {6301#true} is VALID [2018-11-23 11:23:25,856 INFO L273 TraceCheckUtils]: 5: Hoare triple {6301#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {6301#true} is VALID [2018-11-23 11:23:25,856 INFO L256 TraceCheckUtils]: 4: Hoare triple {6301#true} call #t~ret19 := main(); {6301#true} is VALID [2018-11-23 11:23:25,856 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6301#true} {6301#true} #111#return; {6301#true} is VALID [2018-11-23 11:23:25,856 INFO L273 TraceCheckUtils]: 2: Hoare triple {6301#true} assume true; {6301#true} is VALID [2018-11-23 11:23:25,857 INFO L273 TraceCheckUtils]: 1: Hoare triple {6301#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {6301#true} is VALID [2018-11-23 11:23:25,857 INFO L256 TraceCheckUtils]: 0: Hoare triple {6301#true} call ULTIMATE.init(); {6301#true} is VALID [2018-11-23 11:23:25,859 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 11:23:25,861 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:23:25,861 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 17 [2018-11-23 11:23:25,862 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 31 [2018-11-23 11:23:25,862 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:23:25,862 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 11:23:25,953 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:25,954 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 11:23:25,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 11:23:25,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2018-11-23 11:23:25,954 INFO L87 Difference]: Start difference. First operand 254 states and 344 transitions. Second operand 17 states. [2018-11-23 11:23:33,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:33,276 INFO L93 Difference]: Finished difference Result 635 states and 853 transitions. [2018-11-23 11:23:33,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 11:23:33,276 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 31 [2018-11-23 11:23:33,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:23:33,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 11:23:33,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 190 transitions. [2018-11-23 11:23:33,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 11:23:33,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 190 transitions. [2018-11-23 11:23:33,283 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 190 transitions. [2018-11-23 11:23:33,798 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 190 edges. 190 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:33,828 INFO L225 Difference]: With dead ends: 635 [2018-11-23 11:23:33,829 INFO L226 Difference]: Without dead ends: 633 [2018-11-23 11:23:33,830 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=118, Invalid=482, Unknown=0, NotChecked=0, Total=600 [2018-11-23 11:23:33,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 633 states. [2018-11-23 11:23:36,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 633 to 326. [2018-11-23 11:23:36,033 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:23:36,033 INFO L82 GeneralOperation]: Start isEquivalent. First operand 633 states. Second operand 326 states. [2018-11-23 11:23:36,033 INFO L74 IsIncluded]: Start isIncluded. First operand 633 states. Second operand 326 states. [2018-11-23 11:23:36,033 INFO L87 Difference]: Start difference. First operand 633 states. Second operand 326 states. [2018-11-23 11:23:36,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:36,060 INFO L93 Difference]: Finished difference Result 633 states and 851 transitions. [2018-11-23 11:23:36,060 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 851 transitions. [2018-11-23 11:23:36,062 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:23:36,062 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:23:36,062 INFO L74 IsIncluded]: Start isIncluded. First operand 326 states. Second operand 633 states. [2018-11-23 11:23:36,062 INFO L87 Difference]: Start difference. First operand 326 states. Second operand 633 states. [2018-11-23 11:23:36,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:36,089 INFO L93 Difference]: Finished difference Result 633 states and 851 transitions. [2018-11-23 11:23:36,089 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 851 transitions. [2018-11-23 11:23:36,091 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:23:36,091 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:23:36,092 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:23:36,092 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:23:36,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-11-23 11:23:36,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 451 transitions. [2018-11-23 11:23:36,102 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 451 transitions. Word has length 31 [2018-11-23 11:23:36,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:23:36,103 INFO L480 AbstractCegarLoop]: Abstraction has 326 states and 451 transitions. [2018-11-23 11:23:36,103 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 11:23:36,103 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 451 transitions. [2018-11-23 11:23:36,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-11-23 11:23:36,104 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:23:36,104 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:23:36,105 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:23:36,105 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:23:36,105 INFO L82 PathProgramCache]: Analyzing trace with hash -1698114635, now seen corresponding path program 1 times [2018-11-23 11:23:36,105 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:23:36,105 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:23:36,133 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 11:23:36,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:23:36,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:23:36,278 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:23:36,766 INFO L256 TraceCheckUtils]: 0: Hoare triple {9161#true} call ULTIMATE.init(); {9161#true} is VALID [2018-11-23 11:23:36,766 INFO L273 TraceCheckUtils]: 1: Hoare triple {9161#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {9161#true} is VALID [2018-11-23 11:23:36,767 INFO L273 TraceCheckUtils]: 2: Hoare triple {9161#true} assume true; {9161#true} is VALID [2018-11-23 11:23:36,767 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9161#true} {9161#true} #111#return; {9161#true} is VALID [2018-11-23 11:23:36,767 INFO L256 TraceCheckUtils]: 4: Hoare triple {9161#true} call #t~ret19 := main(); {9161#true} is VALID [2018-11-23 11:23:36,767 INFO L273 TraceCheckUtils]: 5: Hoare triple {9161#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {9161#true} is VALID [2018-11-23 11:23:36,768 INFO L273 TraceCheckUtils]: 6: Hoare triple {9161#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {9184#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,771 INFO L273 TraceCheckUtils]: 7: Hoare triple {9184#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {9188#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,772 INFO L273 TraceCheckUtils]: 8: Hoare triple {9188#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {9188#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,773 INFO L273 TraceCheckUtils]: 9: Hoare triple {9188#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9188#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,774 INFO L273 TraceCheckUtils]: 10: Hoare triple {9188#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {9198#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:23:36,775 INFO L273 TraceCheckUtils]: 11: Hoare triple {9198#(and (bvsle main_~nodecount~0 (_ bv4 32)) (bvsle (_ bv0 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,776 INFO L273 TraceCheckUtils]: 12: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} ~i~0 := 0bv32; {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,777 INFO L273 TraceCheckUtils]: 13: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,777 INFO L273 TraceCheckUtils]: 14: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,778 INFO L273 TraceCheckUtils]: 15: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,779 INFO L273 TraceCheckUtils]: 16: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !~bvslt32(~i~0, ~nodecount~0); {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,780 INFO L273 TraceCheckUtils]: 17: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} ~i~0 := 0bv32; {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,780 INFO L273 TraceCheckUtils]: 18: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} assume !~bvslt32(~i~0, ~edgecount~0); {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,781 INFO L273 TraceCheckUtils]: 19: Hoare triple {9202#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0))} ~i~0 := 0bv32; {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,782 INFO L273 TraceCheckUtils]: 20: Hoare triple {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,782 INFO L256 TraceCheckUtils]: 21: Hoare triple {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {9161#true} is VALID [2018-11-23 11:23:36,782 INFO L273 TraceCheckUtils]: 22: Hoare triple {9161#true} ~cond := #in~cond; {9161#true} is VALID [2018-11-23 11:23:36,783 INFO L273 TraceCheckUtils]: 23: Hoare triple {9161#true} assume !(0bv32 == ~cond); {9161#true} is VALID [2018-11-23 11:23:36,783 INFO L273 TraceCheckUtils]: 24: Hoare triple {9161#true} assume true; {9161#true} is VALID [2018-11-23 11:23:36,784 INFO L268 TraceCheckUtils]: 25: Hoare quadruple {9161#true} {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #115#return; {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,785 INFO L273 TraceCheckUtils]: 26: Hoare triple {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} havoc #t~mem18; {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:23:36,785 INFO L273 TraceCheckUtils]: 27: Hoare triple {9227#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {9252#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:23:36,786 INFO L273 TraceCheckUtils]: 28: Hoare triple {9252#(and (not (bvslt (_ bv1 32) main_~nodecount~0)) (bvsle (_ bv0 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9162#false} is VALID [2018-11-23 11:23:36,787 INFO L256 TraceCheckUtils]: 29: Hoare triple {9162#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {9162#false} is VALID [2018-11-23 11:23:36,787 INFO L273 TraceCheckUtils]: 30: Hoare triple {9162#false} ~cond := #in~cond; {9162#false} is VALID [2018-11-23 11:23:36,787 INFO L273 TraceCheckUtils]: 31: Hoare triple {9162#false} assume 0bv32 == ~cond; {9162#false} is VALID [2018-11-23 11:23:36,788 INFO L273 TraceCheckUtils]: 32: Hoare triple {9162#false} assume !false; {9162#false} is VALID [2018-11-23 11:23:36,791 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:23:36,791 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:23:36,986 INFO L273 TraceCheckUtils]: 32: Hoare triple {9162#false} assume !false; {9162#false} is VALID [2018-11-23 11:23:36,986 INFO L273 TraceCheckUtils]: 31: Hoare triple {9162#false} assume 0bv32 == ~cond; {9162#false} is VALID [2018-11-23 11:23:36,986 INFO L273 TraceCheckUtils]: 30: Hoare triple {9162#false} ~cond := #in~cond; {9162#false} is VALID [2018-11-23 11:23:36,987 INFO L256 TraceCheckUtils]: 29: Hoare triple {9162#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {9162#false} is VALID [2018-11-23 11:23:36,987 INFO L273 TraceCheckUtils]: 28: Hoare triple {9280#(not (bvslt main_~i~0 main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9162#false} is VALID [2018-11-23 11:23:36,989 INFO L273 TraceCheckUtils]: 27: Hoare triple {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} #t~post17 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post17);havoc #t~post17; {9280#(not (bvslt main_~i~0 main_~nodecount~0))} is VALID [2018-11-23 11:23:36,989 INFO L273 TraceCheckUtils]: 26: Hoare triple {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} havoc #t~mem18; {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,990 INFO L268 TraceCheckUtils]: 25: Hoare quadruple {9161#true} {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} #115#return; {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,990 INFO L273 TraceCheckUtils]: 24: Hoare triple {9161#true} assume true; {9161#true} is VALID [2018-11-23 11:23:36,990 INFO L273 TraceCheckUtils]: 23: Hoare triple {9161#true} assume !(0bv32 == ~cond); {9161#true} is VALID [2018-11-23 11:23:36,990 INFO L273 TraceCheckUtils]: 22: Hoare triple {9161#true} ~cond := #in~cond; {9161#true} is VALID [2018-11-23 11:23:36,991 INFO L256 TraceCheckUtils]: 21: Hoare triple {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {9161#true} is VALID [2018-11-23 11:23:36,991 INFO L273 TraceCheckUtils]: 20: Hoare triple {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,991 INFO L273 TraceCheckUtils]: 19: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} ~i~0 := 0bv32; {9284#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,992 INFO L273 TraceCheckUtils]: 18: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} assume !~bvslt32(~i~0, ~edgecount~0); {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,993 INFO L273 TraceCheckUtils]: 17: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} ~i~0 := 0bv32; {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,993 INFO L273 TraceCheckUtils]: 16: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} assume !~bvslt32(~i~0, ~nodecount~0); {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,994 INFO L273 TraceCheckUtils]: 15: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,994 INFO L273 TraceCheckUtils]: 14: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,995 INFO L273 TraceCheckUtils]: 13: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,995 INFO L273 TraceCheckUtils]: 12: Hoare triple {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} ~i~0 := 0bv32; {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,999 INFO L273 TraceCheckUtils]: 11: Hoare triple {9334#(or (bvslt main_~i~0 main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} assume !~bvslt32(~i~0, ~nodecount~0); {9309#(not (bvslt (_ bv1 32) main_~nodecount~0))} is VALID [2018-11-23 11:23:36,999 INFO L273 TraceCheckUtils]: 10: Hoare triple {9338#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {9334#(or (bvslt main_~i~0 main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} is VALID [2018-11-23 11:23:37,000 INFO L273 TraceCheckUtils]: 9: Hoare triple {9338#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {9338#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} is VALID [2018-11-23 11:23:37,000 INFO L273 TraceCheckUtils]: 8: Hoare triple {9338#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} assume !!~bvslt32(~i~0, ~nodecount~0); {9338#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} is VALID [2018-11-23 11:23:37,007 INFO L273 TraceCheckUtils]: 7: Hoare triple {9161#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {9338#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0) (not (bvslt (_ bv1 32) main_~nodecount~0)))} is VALID [2018-11-23 11:23:37,007 INFO L273 TraceCheckUtils]: 6: Hoare triple {9161#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {9161#true} is VALID [2018-11-23 11:23:37,008 INFO L273 TraceCheckUtils]: 5: Hoare triple {9161#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {9161#true} is VALID [2018-11-23 11:23:37,008 INFO L256 TraceCheckUtils]: 4: Hoare triple {9161#true} call #t~ret19 := main(); {9161#true} is VALID [2018-11-23 11:23:37,008 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9161#true} {9161#true} #111#return; {9161#true} is VALID [2018-11-23 11:23:37,008 INFO L273 TraceCheckUtils]: 2: Hoare triple {9161#true} assume true; {9161#true} is VALID [2018-11-23 11:23:37,008 INFO L273 TraceCheckUtils]: 1: Hoare triple {9161#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {9161#true} is VALID [2018-11-23 11:23:37,008 INFO L256 TraceCheckUtils]: 0: Hoare triple {9161#true} call ULTIMATE.init(); {9161#true} is VALID [2018-11-23 11:23:37,009 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:23:37,011 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:23:37,012 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 13 [2018-11-23 11:23:37,012 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 33 [2018-11-23 11:23:37,012 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:23:37,012 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-23 11:23:37,106 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:37,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 11:23:37,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 11:23:37,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2018-11-23 11:23:37,107 INFO L87 Difference]: Start difference. First operand 326 states and 451 transitions. Second operand 13 states. [2018-11-23 11:23:42,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:42,115 INFO L93 Difference]: Finished difference Result 516 states and 697 transitions. [2018-11-23 11:23:42,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-23 11:23:42,115 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 33 [2018-11-23 11:23:42,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:23:42,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 11:23:42,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 139 transitions. [2018-11-23 11:23:42,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 11:23:42,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 139 transitions. [2018-11-23 11:23:42,120 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 11 states and 139 transitions. [2018-11-23 11:23:42,807 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 139 edges. 139 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:42,821 INFO L225 Difference]: With dead ends: 516 [2018-11-23 11:23:42,821 INFO L226 Difference]: Without dead ends: 376 [2018-11-23 11:23:42,822 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=87, Invalid=185, Unknown=0, NotChecked=0, Total=272 [2018-11-23 11:23:42,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states. [2018-11-23 11:23:44,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 324. [2018-11-23 11:23:44,729 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:23:44,729 INFO L82 GeneralOperation]: Start isEquivalent. First operand 376 states. Second operand 324 states. [2018-11-23 11:23:44,729 INFO L74 IsIncluded]: Start isIncluded. First operand 376 states. Second operand 324 states. [2018-11-23 11:23:44,729 INFO L87 Difference]: Start difference. First operand 376 states. Second operand 324 states. [2018-11-23 11:23:44,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:44,742 INFO L93 Difference]: Finished difference Result 376 states and 507 transitions. [2018-11-23 11:23:44,742 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 507 transitions. [2018-11-23 11:23:44,744 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:23:44,744 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:23:44,744 INFO L74 IsIncluded]: Start isIncluded. First operand 324 states. Second operand 376 states. [2018-11-23 11:23:44,744 INFO L87 Difference]: Start difference. First operand 324 states. Second operand 376 states. [2018-11-23 11:23:44,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:44,757 INFO L93 Difference]: Finished difference Result 376 states and 507 transitions. [2018-11-23 11:23:44,757 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 507 transitions. [2018-11-23 11:23:44,758 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:23:44,758 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:23:44,758 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:23:44,759 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:23:44,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2018-11-23 11:23:44,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 443 transitions. [2018-11-23 11:23:44,770 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 443 transitions. Word has length 33 [2018-11-23 11:23:44,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:23:44,770 INFO L480 AbstractCegarLoop]: Abstraction has 324 states and 443 transitions. [2018-11-23 11:23:44,770 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 11:23:44,770 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 443 transitions. [2018-11-23 11:23:44,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-23 11:23:44,772 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:23:44,772 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:23:44,772 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:23:44,772 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:23:44,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1142223879, now seen corresponding path program 2 times [2018-11-23 11:23:44,773 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:23:44,773 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:23:44,801 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:23:45,154 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 11:23:45,154 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:23:45,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:23:45,234 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:23:46,547 INFO L256 TraceCheckUtils]: 0: Hoare triple {11345#true} call ULTIMATE.init(); {11345#true} is VALID [2018-11-23 11:23:46,547 INFO L273 TraceCheckUtils]: 1: Hoare triple {11345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {11345#true} is VALID [2018-11-23 11:23:46,548 INFO L273 TraceCheckUtils]: 2: Hoare triple {11345#true} assume true; {11345#true} is VALID [2018-11-23 11:23:46,548 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {11345#true} {11345#true} #111#return; {11345#true} is VALID [2018-11-23 11:23:46,548 INFO L256 TraceCheckUtils]: 4: Hoare triple {11345#true} call #t~ret19 := main(); {11345#true} is VALID [2018-11-23 11:23:46,548 INFO L273 TraceCheckUtils]: 5: Hoare triple {11345#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {11345#true} is VALID [2018-11-23 11:23:46,549 INFO L273 TraceCheckUtils]: 6: Hoare triple {11345#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {11345#true} is VALID [2018-11-23 11:23:46,552 INFO L273 TraceCheckUtils]: 7: Hoare triple {11345#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,552 INFO L273 TraceCheckUtils]: 8: Hoare triple {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,553 INFO L273 TraceCheckUtils]: 9: Hoare triple {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,554 INFO L273 TraceCheckUtils]: 10: Hoare triple {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,555 INFO L273 TraceCheckUtils]: 11: Hoare triple {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,555 INFO L273 TraceCheckUtils]: 12: Hoare triple {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} ~i~0 := 0bv32; {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,556 INFO L273 TraceCheckUtils]: 13: Hoare triple {11371#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {11390#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,557 INFO L273 TraceCheckUtils]: 14: Hoare triple {11390#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {11390#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,558 INFO L273 TraceCheckUtils]: 15: Hoare triple {11390#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {11390#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} is VALID [2018-11-23 11:23:46,559 INFO L273 TraceCheckUtils]: 16: Hoare triple {11390#(and (bvsle (_ bv0 32) main_~edgecount~0) (= main_~j~0 (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {11400#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:23:46,560 INFO L273 TraceCheckUtils]: 17: Hoare triple {11400#(and (bvsle (_ bv0 32) main_~edgecount~0) (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {11404#(and (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt main_~j~0 main_~edgecount~0))} is VALID [2018-11-23 11:23:46,561 INFO L273 TraceCheckUtils]: 18: Hoare triple {11404#(and (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt main_~j~0 main_~edgecount~0))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {11404#(and (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt main_~j~0 main_~edgecount~0))} is VALID [2018-11-23 11:23:46,562 INFO L273 TraceCheckUtils]: 19: Hoare triple {11404#(and (bvsle main_~edgecount~0 (_ bv19 32)) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)) (bvslt main_~j~0 main_~edgecount~0))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {11411#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)) (bvslt (bvadd main_~j~0 (_ bv4294967295 32)) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,563 INFO L273 TraceCheckUtils]: 20: Hoare triple {11411#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (bvsle main_~edgecount~0 (_ bv19 32)) (bvslt (bvadd main_~j~0 (_ bv4294967295 32)) main_~edgecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {11415#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,564 INFO L273 TraceCheckUtils]: 21: Hoare triple {11415#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11415#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,565 INFO L273 TraceCheckUtils]: 22: Hoare triple {11415#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} assume !~bvslt32(~i~0, ~nodecount~0); {11415#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,566 INFO L273 TraceCheckUtils]: 23: Hoare triple {11415#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} ~i~0 := 0bv32; {11425#(and (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,567 INFO L273 TraceCheckUtils]: 24: Hoare triple {11425#(and (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {11425#(and (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,568 INFO L273 TraceCheckUtils]: 25: Hoare triple {11425#(and (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {11425#(and (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,568 INFO L273 TraceCheckUtils]: 26: Hoare triple {11425#(and (= main_~i~0 (_ bv0 32)) (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {11435#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:23:46,569 INFO L273 TraceCheckUtils]: 27: Hoare triple {11435#(and (not (bvslt (_ bv2 32) main_~edgecount~0)) (bvslt (_ bv1 32) main_~edgecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~edgecount~0); {11346#false} is VALID [2018-11-23 11:23:46,569 INFO L273 TraceCheckUtils]: 28: Hoare triple {11346#false} ~i~0 := 0bv32; {11346#false} is VALID [2018-11-23 11:23:46,570 INFO L273 TraceCheckUtils]: 29: Hoare triple {11346#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {11346#false} is VALID [2018-11-23 11:23:46,570 INFO L256 TraceCheckUtils]: 30: Hoare triple {11346#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {11346#false} is VALID [2018-11-23 11:23:46,570 INFO L273 TraceCheckUtils]: 31: Hoare triple {11346#false} ~cond := #in~cond; {11346#false} is VALID [2018-11-23 11:23:46,570 INFO L273 TraceCheckUtils]: 32: Hoare triple {11346#false} assume 0bv32 == ~cond; {11346#false} is VALID [2018-11-23 11:23:46,571 INFO L273 TraceCheckUtils]: 33: Hoare triple {11346#false} assume !false; {11346#false} is VALID [2018-11-23 11:23:46,573 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:23:46,574 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:23:46,841 INFO L273 TraceCheckUtils]: 33: Hoare triple {11346#false} assume !false; {11346#false} is VALID [2018-11-23 11:23:46,842 INFO L273 TraceCheckUtils]: 32: Hoare triple {11346#false} assume 0bv32 == ~cond; {11346#false} is VALID [2018-11-23 11:23:46,842 INFO L273 TraceCheckUtils]: 31: Hoare triple {11346#false} ~cond := #in~cond; {11346#false} is VALID [2018-11-23 11:23:46,842 INFO L256 TraceCheckUtils]: 30: Hoare triple {11346#false} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {11346#false} is VALID [2018-11-23 11:23:46,843 INFO L273 TraceCheckUtils]: 29: Hoare triple {11346#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {11346#false} is VALID [2018-11-23 11:23:46,843 INFO L273 TraceCheckUtils]: 28: Hoare triple {11346#false} ~i~0 := 0bv32; {11346#false} is VALID [2018-11-23 11:23:46,843 INFO L273 TraceCheckUtils]: 27: Hoare triple {11475#(bvslt main_~i~0 main_~edgecount~0)} assume !~bvslt32(~i~0, ~edgecount~0); {11346#false} is VALID [2018-11-23 11:23:46,845 INFO L273 TraceCheckUtils]: 26: Hoare triple {11479#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~edgecount~0)} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {11475#(bvslt main_~i~0 main_~edgecount~0)} is VALID [2018-11-23 11:23:46,845 INFO L273 TraceCheckUtils]: 25: Hoare triple {11479#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~edgecount~0)} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {11479#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:23:46,845 INFO L273 TraceCheckUtils]: 24: Hoare triple {11479#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {11479#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:23:46,846 INFO L273 TraceCheckUtils]: 23: Hoare triple {11489#(bvslt (_ bv1 32) main_~edgecount~0)} ~i~0 := 0bv32; {11479#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:23:46,846 INFO L273 TraceCheckUtils]: 22: Hoare triple {11489#(bvslt (_ bv1 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {11489#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:23:46,847 INFO L273 TraceCheckUtils]: 21: Hoare triple {11489#(bvslt (_ bv1 32) main_~edgecount~0)} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {11489#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:23:46,847 INFO L273 TraceCheckUtils]: 20: Hoare triple {11499#(or (bvslt main_~j~0 main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {11489#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:23:46,848 INFO L273 TraceCheckUtils]: 19: Hoare triple {11503#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {11499#(or (bvslt main_~j~0 main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,848 INFO L273 TraceCheckUtils]: 18: Hoare triple {11503#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {11503#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,849 INFO L273 TraceCheckUtils]: 17: Hoare triple {11510#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0) (not (bvslt main_~j~0 main_~edgecount~0)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {11503#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,880 INFO L273 TraceCheckUtils]: 16: Hoare triple {11514#(or (not (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)) (bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {11510#(or (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0) (not (bvslt main_~j~0 main_~edgecount~0)))} is VALID [2018-11-23 11:23:46,881 INFO L273 TraceCheckUtils]: 15: Hoare triple {11514#(or (not (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)) (bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {11514#(or (not (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)) (bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,881 INFO L273 TraceCheckUtils]: 14: Hoare triple {11514#(or (not (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)) (bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {11514#(or (not (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)) (bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,881 INFO L273 TraceCheckUtils]: 13: Hoare triple {11345#true} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {11514#(or (not (bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)) (bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0) (bvslt (_ bv1 32) main_~edgecount~0))} is VALID [2018-11-23 11:23:46,882 INFO L273 TraceCheckUtils]: 12: Hoare triple {11345#true} ~i~0 := 0bv32; {11345#true} is VALID [2018-11-23 11:23:46,882 INFO L273 TraceCheckUtils]: 11: Hoare triple {11345#true} assume !~bvslt32(~i~0, ~nodecount~0); {11345#true} is VALID [2018-11-23 11:23:46,882 INFO L273 TraceCheckUtils]: 10: Hoare triple {11345#true} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {11345#true} is VALID [2018-11-23 11:23:46,882 INFO L273 TraceCheckUtils]: 9: Hoare triple {11345#true} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {11345#true} is VALID [2018-11-23 11:23:46,882 INFO L273 TraceCheckUtils]: 8: Hoare triple {11345#true} assume !!~bvslt32(~i~0, ~nodecount~0); {11345#true} is VALID [2018-11-23 11:23:46,882 INFO L273 TraceCheckUtils]: 7: Hoare triple {11345#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {11345#true} is VALID [2018-11-23 11:23:46,883 INFO L273 TraceCheckUtils]: 6: Hoare triple {11345#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {11345#true} is VALID [2018-11-23 11:23:46,883 INFO L273 TraceCheckUtils]: 5: Hoare triple {11345#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {11345#true} is VALID [2018-11-23 11:23:46,883 INFO L256 TraceCheckUtils]: 4: Hoare triple {11345#true} call #t~ret19 := main(); {11345#true} is VALID [2018-11-23 11:23:46,883 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {11345#true} {11345#true} #111#return; {11345#true} is VALID [2018-11-23 11:23:46,884 INFO L273 TraceCheckUtils]: 2: Hoare triple {11345#true} assume true; {11345#true} is VALID [2018-11-23 11:23:46,884 INFO L273 TraceCheckUtils]: 1: Hoare triple {11345#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {11345#true} is VALID [2018-11-23 11:23:46,884 INFO L256 TraceCheckUtils]: 0: Hoare triple {11345#true} call ULTIMATE.init(); {11345#true} is VALID [2018-11-23 11:23:46,885 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:23:46,887 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:23:46,887 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-11-23 11:23:46,889 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 34 [2018-11-23 11:23:46,889 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:23:46,889 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 11:23:47,035 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:47,035 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 11:23:47,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 11:23:47,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=195, Unknown=0, NotChecked=0, Total=272 [2018-11-23 11:23:47,036 INFO L87 Difference]: Start difference. First operand 324 states and 443 transitions. Second operand 17 states. [2018-11-23 11:23:56,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:23:56,372 INFO L93 Difference]: Finished difference Result 800 states and 1090 transitions. [2018-11-23 11:23:56,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-11-23 11:23:56,373 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 34 [2018-11-23 11:23:56,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:23:56,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 11:23:56,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 171 transitions. [2018-11-23 11:23:56,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 11:23:56,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 171 transitions. [2018-11-23 11:23:56,378 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states and 171 transitions. [2018-11-23 11:23:57,378 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:23:57,411 INFO L225 Difference]: With dead ends: 800 [2018-11-23 11:23:57,411 INFO L226 Difference]: Without dead ends: 675 [2018-11-23 11:23:57,413 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=239, Invalid=691, Unknown=0, NotChecked=0, Total=930 [2018-11-23 11:23:57,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 675 states. [2018-11-23 11:24:00,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 675 to 471. [2018-11-23 11:24:00,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:24:00,800 INFO L82 GeneralOperation]: Start isEquivalent. First operand 675 states. Second operand 471 states. [2018-11-23 11:24:00,800 INFO L74 IsIncluded]: Start isIncluded. First operand 675 states. Second operand 471 states. [2018-11-23 11:24:00,800 INFO L87 Difference]: Start difference. First operand 675 states. Second operand 471 states. [2018-11-23 11:24:00,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:24:00,830 INFO L93 Difference]: Finished difference Result 675 states and 888 transitions. [2018-11-23 11:24:00,830 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 888 transitions. [2018-11-23 11:24:00,833 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:24:00,833 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:24:00,833 INFO L74 IsIncluded]: Start isIncluded. First operand 471 states. Second operand 675 states. [2018-11-23 11:24:00,833 INFO L87 Difference]: Start difference. First operand 471 states. Second operand 675 states. [2018-11-23 11:24:00,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:24:00,866 INFO L93 Difference]: Finished difference Result 675 states and 888 transitions. [2018-11-23 11:24:00,866 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 888 transitions. [2018-11-23 11:24:00,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:24:00,868 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:24:00,869 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:24:00,869 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:24:00,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 471 states. [2018-11-23 11:24:00,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 471 states to 471 states and 633 transitions. [2018-11-23 11:24:00,890 INFO L78 Accepts]: Start accepts. Automaton has 471 states and 633 transitions. Word has length 34 [2018-11-23 11:24:00,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:24:00,891 INFO L480 AbstractCegarLoop]: Abstraction has 471 states and 633 transitions. [2018-11-23 11:24:00,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 11:24:00,891 INFO L276 IsEmpty]: Start isEmpty. Operand 471 states and 633 transitions. [2018-11-23 11:24:00,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-11-23 11:24:00,893 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:24:00,893 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:24:00,893 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:24:00,893 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:24:00,893 INFO L82 PathProgramCache]: Analyzing trace with hash 1647290398, now seen corresponding path program 3 times [2018-11-23 11:24:00,894 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:24:00,894 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:24:00,925 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 11:24:02,209 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 11:24:02,210 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:24:02,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:24:02,369 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:24:02,606 WARN L180 SmtUtils]: Spent 169.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 43 [2018-11-23 11:24:02,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,634 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,635 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 32 [2018-11-23 11:24:02,657 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-11-23 11:24:02,697 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,699 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,701 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,703 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-11-23 11:24:02,706 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:02,721 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:02,738 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:02,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:02,794 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:68, output treesize:60 [2018-11-23 11:24:02,962 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,964 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,970 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:02,995 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,003 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 86 [2018-11-23 11:24:03,022 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-11-23 11:24:03,025 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:03,073 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:03,123 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:03,124 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:68, output treesize:60 [2018-11-23 11:24:03,607 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,611 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,614 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,625 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,639 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,653 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,656 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,659 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,673 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 104 treesize of output 176 [2018-11-23 11:24:03,717 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,720 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,737 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:24:03,748 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,767 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:03,826 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 108 treesize of output 216 [2018-11-23 11:24:03,883 INFO L267 ElimStorePlain]: Start of recursive call 3: 4 dim-0 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-11-23 11:24:04,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-11-23 11:24:04,505 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 10 dim-0 vars, and 3 xjuncts. [2018-11-23 11:24:04,506 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:121, output treesize:398 [2018-11-23 11:24:06,519 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:24:06,519 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_30|, |main_~#Source~0.base|, |main_~#Weight~0.base|]. (let ((.cse2 (select |v_#memory_int_30| |main_~#Dest~0.base|)) (.cse5 (bvmul (_ bv4 32) main_~j~0))) (let ((.cse1 (bvadd (bvmul (_ bv4 32) (select .cse2 (bvadd |main_~#Dest~0.offset| .cse5))) |main_~#distance~0.offset|)) (.cse0 (select |v_#memory_int_30| |main_~#distance~0.base|)) (.cse3 (select |v_#memory_int_30| |main_~#Source~0.base|)) (.cse4 (select |v_#memory_int_30| |main_~#Weight~0.base|))) (and (= main_~j~0 (_ bv0 32)) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (store |v_#memory_int_30| |main_~#distance~0.base| (store .cse0 .cse1 (_ bv4294967295 32))) |#memory_int|) (= (_ bv3 32) (select .cse2 (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (= (select .cse3 (_ bv0 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) (select .cse4 (_ bv0 32))) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (select .cse0 |main_~#distance~0.offset|) (_ bv0 32)) (= (bvadd (select .cse2 |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt (select .cse0 .cse1) (bvadd (select .cse0 (bvadd (bvmul (_ bv4 32) (select .cse3 .cse5)) |main_~#distance~0.offset|)) (select .cse4 .cse5))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|))))) [2018-11-23 11:24:06,520 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [v_prenex_5, v_prenex_4, v_arrayElimCell_18, v_prenex_3, v_prenex_7, v_prenex_6, v_arrayElimCell_19, |main_~#Source~0.base|, |main_~#Weight~0.base|, v_antiDerIndex_1]. (let ((.cse8 (select |#memory_int| |main_~#Dest~0.base|)) (.cse2 (bvmul (_ bv4 32) main_~j~0))) (let ((.cse12 (select |#memory_int| |main_~#distance~0.base|)) (.cse9 (bvadd (bvmul (_ bv4 32) (select .cse8 (bvadd |main_~#Dest~0.offset| .cse2))) |main_~#distance~0.offset|))) (let ((.cse3 (= (_ bv0 32) |main_~#distance~0.offset|)) (.cse4 (= (bvadd (select .cse8 |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32))) (.cse5 (= (select .cse12 .cse9) (_ bv4294967295 32))) (.cse6 (= main_~j~0 (_ bv0 32))) (.cse10 (= (_ bv0 32) |main_~#Dest~0.offset|)) (.cse11 (= (_ bv3 32) (select .cse8 (bvadd |main_~#Dest~0.offset| (_ bv4 32)))))) (or (let ((.cse7 (select |#memory_int| v_prenex_7))) (let ((.cse1 (select |#memory_int| v_prenex_6)) (.cse0 (select .cse12 (bvadd (bvmul (_ bv4 32) (select .cse7 .cse2)) |main_~#distance~0.offset|)))) (and (bvsgt v_arrayElimCell_19 (bvadd .cse0 (select .cse1 .cse2))) .cse3 (= (_ bv0 32) (select .cse1 (_ bv0 32))) .cse4 (not (= v_prenex_6 |main_~#distance~0.base|)) .cse5 .cse6 (not (= v_prenex_7 |main_~#distance~0.base|)) (= .cse0 (_ bv0 32)) (= (_ bv0 32) (select .cse7 (_ bv0 32))) (not (= (select .cse8 .cse9) v_arrayElimCell_19)) .cse10 .cse11))) (let ((.cse16 (select |#memory_int| |main_~#Source~0.base|))) (let ((.cse15 (select |#memory_int| |main_~#Weight~0.base|)) (.cse14 (select .cse12 (bvadd (bvmul (_ bv4 32) (select .cse16 .cse2)) |main_~#distance~0.offset|))) (.cse13 (select .cse12 v_antiDerIndex_1))) (and (bvsgt .cse13 (bvadd .cse14 (select .cse15 .cse2))) .cse3 (= (_ bv0 32) (select .cse15 (_ bv0 32))) .cse4 (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) .cse5 .cse6 (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= .cse14 (_ bv0 32)) (= (_ bv0 32) (select .cse16 (_ bv0 32))) .cse10 .cse11 (not (= (select .cse8 v_antiDerIndex_1) .cse13))))) (let ((.cse19 (select |#memory_int| v_prenex_5))) (let ((.cse18 (select |#memory_int| v_prenex_4)) (.cse17 (select .cse12 (bvadd (bvmul (_ bv4 32) (select .cse19 .cse2)) |main_~#distance~0.offset|)))) (and (bvsgt v_arrayElimCell_18 (bvadd .cse17 (select .cse18 .cse2))) (not (= (select .cse8 v_prenex_3) (select .cse12 v_prenex_3))) .cse3 (= (_ bv0 32) (select .cse18 (_ bv0 32))) .cse4 (not (= v_prenex_4 |main_~#distance~0.base|)) .cse5 .cse6 (not (= v_prenex_5 |main_~#distance~0.base|)) (= .cse17 (_ bv0 32)) (not (= .cse9 v_prenex_3)) (= (_ bv0 32) (select .cse19 (_ bv0 32))) .cse10 .cse11))))))) [2018-11-23 11:24:06,984 WARN L180 SmtUtils]: Spent 270.00 ms on a formula simplification. DAG size of input: 119 DAG size of output: 57 [2018-11-23 11:24:07,485 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,488 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,491 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,509 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,528 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,540 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,553 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,560 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 9 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 121 treesize of output 173 [2018-11-23 11:24:07,651 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,657 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,674 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,684 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:07,867 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 89 treesize of output 198 [2018-11-23 11:24:07,876 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 11:24:08,061 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:08,153 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-11-23 11:24:08,154 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:135, output treesize:131 [2018-11-23 11:24:08,262 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:24:08,262 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_31|, v_prenex_7, v_prenex_6, v_arrayElimCell_19]. (let ((.cse7 (select |v_#memory_int_31| |main_~#Dest~0.base|))) (let ((.cse5 (select .cse7 |main_~#Dest~0.offset|)) (.cse1 (select |v_#memory_int_31| |main_~#distance~0.base|)) (.cse6 (select (select |v_#memory_int_31| v_prenex_7) (_ bv0 32)))) (let ((.cse0 (select .cse7 (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (.cse3 (select .cse1 (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) .cse6)))) (.cse2 (select (select |v_#memory_int_31| v_prenex_6) (_ bv0 32))) (.cse4 (bvadd (bvmul (_ bv4 32) .cse5) |main_~#distance~0.offset|))) (and (= (_ bv3 32) .cse0) (= (store |v_#memory_int_31| |main_~#distance~0.base| (store .cse1 (bvadd (bvmul (_ bv4 32) .cse0) |main_~#distance~0.offset|) (_ bv4294967295 32))) |#memory_int|) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#distance~0.offset|) (bvsgt v_arrayElimCell_19 (bvadd .cse2 .cse3)) (= .cse3 (_ bv0 32)) (= .cse2 (_ bv0 32)) (= (select .cse1 .cse4) (_ bv4294967295 32)) (= (_ bv0 32) (bvadd .cse5 (_ bv4294967295 32))) (= (_ bv0 32) |main_~#Dest~0.offset|) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) .cse6) (not (= (select .cse7 .cse4) v_arrayElimCell_19)))))) [2018-11-23 11:24:08,263 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [v_prenex_7, v_prenex_6, v_arrayElimCell_19]. (let ((.cse1 (select |#memory_int| |main_~#Dest~0.base|))) (let ((.cse4 (select .cse1 |main_~#Dest~0.offset|)) (.cse6 (select |#memory_int| |main_~#distance~0.base|)) (.cse0 (select (select |#memory_int| v_prenex_7) (_ bv0 32)))) (let ((.cse3 (select .cse6 (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) .cse0)))) (.cse2 (bvadd (bvmul (_ bv4 32) .cse4) |main_~#distance~0.offset|)) (.cse7 (select .cse1 (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (.cse5 (select (select |#memory_int| v_prenex_6) (_ bv0 32)))) (and (= (_ bv0 32) .cse0) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#distance~0.offset|) (not (= (select .cse1 .cse2) v_arrayElimCell_19)) (= (_ bv0 32) .cse3) (= (bvadd .cse4 (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd .cse5 .cse3)) (= (select .cse6 .cse2) (_ bv4294967295 32)) (= (select .cse6 (bvadd (bvmul (_ bv4 32) .cse7) |main_~#distance~0.offset|)) (_ bv4294967295 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv3 32) .cse7) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) .cse5))))) [2018-11-23 11:24:09,558 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,562 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,563 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,568 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,574 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,580 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,602 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 110 treesize of output 118 [2018-11-23 11:24:09,639 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:24:09,676 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:09,758 INFO L478 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 5 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 7 case distinctions, treesize of input 101 treesize of output 119 [2018-11-23 11:24:10,174 INFO L267 ElimStorePlain]: Start of recursive call 3: 24 dim-0 vars, End of recursive call: 24 dim-0 vars, and 15 xjuncts. [2018-11-23 11:24:11,066 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,069 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,070 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:24:11,072 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,075 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 67 [2018-11-23 11:24:11,081 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,283 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 85 [2018-11-23 11:24:11,287 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,454 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,457 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,458 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:24:11,461 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,464 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,466 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 109 [2018-11-23 11:24:11,474 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,630 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 45 [2018-11-23 11:24:11,635 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,747 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 11:24:11,749 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 11:24:11,750 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 27 [2018-11-23 11:24:11,753 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,841 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 23 [2018-11-23 11:24:11,844 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,888 INFO L267 ElimStorePlain]: Start of recursive call 2: 7 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,929 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 11:24:11,930 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:118, output treesize:3 [2018-11-23 11:24:11,942 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 11:24:11,942 WARN L384 uantifierElimination]: Input elimination task: ∃ [|#memory_int|, |main_~#distance~0.base|, v_prenex_7, v_prenex_6, v_arrayElimCell_19, |main_~#Dest~0.base|]. (let ((.cse5 (select |#memory_int| |main_~#Dest~0.base|))) (let ((.cse3 (select |#memory_int| |main_~#distance~0.base|)) (.cse0 (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (.cse6 (select .cse5 (_ bv0 32)))) (let ((.cse4 (bvmul (_ bv4 32) .cse6)) (.cse2 (select .cse3 (bvmul (_ bv4 32) .cse0))) (.cse7 (select .cse5 (_ bv4 32))) (.cse1 (select (select |#memory_int| v_prenex_6) (_ bv0 32)))) (and (= (_ bv0 32) .cse0) (bvsgt v_arrayElimCell_19 (bvadd .cse1 .cse2)) (= (select .cse3 .cse4) (_ bv4294967295 32)) (not (= (select .cse5 .cse4) v_arrayElimCell_19)) (= (bvadd .cse6 (_ bv4294967295 32)) (_ bv0 32)) (= (select .cse3 (bvmul (_ bv4 32) .cse7)) (_ bv4294967295 32)) (not (= v_prenex_7 |main_~#distance~0.base|)) (= .cse2 (_ bv0 32)) (= |main_#t~mem18| (select .cse3 (_ bv0 32))) (= (_ bv3 32) .cse7) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) .cse1))))) [2018-11-23 11:24:11,942 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (= |main_#t~mem18| (_ bv0 32)) [2018-11-23 11:24:12,176 INFO L256 TraceCheckUtils]: 0: Hoare triple {14757#true} call ULTIMATE.init(); {14757#true} is VALID [2018-11-23 11:24:12,176 INFO L273 TraceCheckUtils]: 1: Hoare triple {14757#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {14757#true} is VALID [2018-11-23 11:24:12,177 INFO L273 TraceCheckUtils]: 2: Hoare triple {14757#true} assume true; {14757#true} is VALID [2018-11-23 11:24:12,177 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {14757#true} {14757#true} #111#return; {14757#true} is VALID [2018-11-23 11:24:12,177 INFO L256 TraceCheckUtils]: 4: Hoare triple {14757#true} call #t~ret19 := main(); {14757#true} is VALID [2018-11-23 11:24:12,177 INFO L273 TraceCheckUtils]: 5: Hoare triple {14757#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {14757#true} is VALID [2018-11-23 11:24:12,178 INFO L273 TraceCheckUtils]: 6: Hoare triple {14757#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {14757#true} is VALID [2018-11-23 11:24:12,184 INFO L273 TraceCheckUtils]: 7: Hoare triple {14757#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {14783#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Dest~0.base| |main_~#distance~0.base|)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,185 INFO L273 TraceCheckUtils]: 8: Hoare triple {14783#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Dest~0.base| |main_~#distance~0.base|)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0); {14783#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Dest~0.base| |main_~#distance~0.base|)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,188 INFO L273 TraceCheckUtils]: 9: Hoare triple {14783#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Dest~0.base| |main_~#distance~0.base|)) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,190 INFO L273 TraceCheckUtils]: 10: Hoare triple {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,193 INFO L273 TraceCheckUtils]: 11: Hoare triple {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !~bvslt32(~i~0, ~nodecount~0); {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,195 INFO L273 TraceCheckUtils]: 12: Hoare triple {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} ~i~0 := 0bv32; {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,197 INFO L273 TraceCheckUtils]: 13: Hoare triple {14790#(and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {14803#(and (= main_~j~0 (_ bv0 32)) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} is VALID [2018-11-23 11:24:12,203 INFO L273 TraceCheckUtils]: 14: Hoare triple {14803#(and (= main_~j~0 (_ bv0 32)) (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (= (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|) (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv0 32) |main_~#Weight~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) |main_~#Source~0.offset|))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {14807#(and (= main_~x~0 (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) (= main_~j~0 (_ bv0 32)) (exists ((|main_~#Weight~0.base| (_ BitVec 32))) (and (= (select (select |#memory_int| |main_~#Weight~0.base|) (bvmul (_ bv4 32) main_~j~0)) |main_#t~mem9|) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (exists ((|main_~#Source~0.base| (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (bvmul (_ bv4 32) main_~j~0))) |main_~#distance~0.offset|)) |main_#t~mem8|))) (= (_ bv0 32) |main_~#distance~0.offset|) (= |main_#t~mem10| (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|))) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))))} is VALID [2018-11-23 11:24:14,235 INFO L273 TraceCheckUtils]: 15: Hoare triple {14807#(and (= main_~x~0 (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) (= main_~j~0 (_ bv0 32)) (exists ((|main_~#Weight~0.base| (_ BitVec 32))) (and (= (select (select |#memory_int| |main_~#Weight~0.base|) (bvmul (_ bv4 32) main_~j~0)) |main_#t~mem9|) (= (_ bv0 32) (select (select |#memory_int| |main_~#Weight~0.base|) (_ bv0 32))) (not (= |main_~#Weight~0.base| |main_~#distance~0.base|)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|)) (exists ((|main_~#Source~0.base| (_ BitVec 32))) (and (not (= |main_~#Source~0.base| |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#Source~0.base|) (_ bv0 32))) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (bvmul (_ bv4 32) main_~j~0))) |main_~#distance~0.offset|)) |main_#t~mem8|))) (= (_ bv0 32) |main_~#distance~0.offset|) (= |main_#t~mem10| (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|))) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {14811#(and (= main_~j~0 (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (bvmul (_ bv4 32) main_~j~0))) |main_~#distance~0.offset|)) (select (select |#memory_int| v_prenex_6) (bvmul (_ bv4 32) main_~j~0)))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (bvmul (_ bv4 32) main_~j~0))) |main_~#distance~0.offset|)) (_ bv0 32)) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))))} is UNKNOWN [2018-11-23 11:24:14,244 INFO L273 TraceCheckUtils]: 16: Hoare triple {14811#(and (= main_~j~0 (_ bv0 32)) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (bvmul (_ bv4 32) main_~j~0))) |main_~#distance~0.offset|)) (select (select |#memory_int| v_prenex_6) (bvmul (_ bv4 32) main_~j~0)))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (bvmul (_ bv4 32) main_~j~0))) |main_~#distance~0.offset|)) (_ bv0 32)) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {14815#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|))) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|)))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|))) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:24:14,264 INFO L273 TraceCheckUtils]: 17: Hoare triple {14815#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|))) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|)))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|))) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {14819#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|))) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|)))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|))) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (= main_~x~0 (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))))} is VALID [2018-11-23 11:24:16,282 INFO L273 TraceCheckUtils]: 18: Hoare triple {14819#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|))) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) |main_~#distance~0.offset|)))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|))) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (= main_~x~0 (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} is UNKNOWN [2018-11-23 11:24:16,287 INFO L273 TraceCheckUtils]: 19: Hoare triple {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 11:24:16,292 INFO L273 TraceCheckUtils]: 20: Hoare triple {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} assume !~bvslt32(~j~0, ~edgecount~0); {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 11:24:16,296 INFO L273 TraceCheckUtils]: 21: Hoare triple {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 11:24:16,301 INFO L273 TraceCheckUtils]: 22: Hoare triple {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 11:24:16,308 INFO L273 TraceCheckUtils]: 23: Hoare triple {14823#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} ~i~0 := 0bv32; {14839#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} is VALID [2018-11-23 11:24:16,339 INFO L273 TraceCheckUtils]: 24: Hoare triple {14839#(and (= (_ bv0 32) |main_~#distance~0.offset|) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)) (= (_ bv0 32) |main_~#Dest~0.offset|) (= main_~i~0 (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|) (_ bv4294967295 32)) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (_ bv1 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,341 INFO L273 TraceCheckUtils]: 25: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,342 INFO L273 TraceCheckUtils]: 26: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,344 INFO L273 TraceCheckUtils]: 27: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,345 INFO L273 TraceCheckUtils]: 28: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,347 INFO L273 TraceCheckUtils]: 29: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,349 INFO L273 TraceCheckUtils]: 30: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} assume !~bvslt32(~i~0, ~edgecount~0); {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} is VALID [2018-11-23 11:24:16,351 INFO L273 TraceCheckUtils]: 31: Hoare triple {14843#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|))} ~i~0 := 0bv32; {14865#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:24:16,357 INFO L273 TraceCheckUtils]: 32: Hoare triple {14865#(and (exists ((v_prenex_7 (_ BitVec 32)) (v_prenex_6 (_ BitVec 32)) (|main_~#Dest~0.base| (_ BitVec 32)) (v_arrayElimCell_19 (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))) (not (= v_prenex_7 |main_~#distance~0.base|)) (= (bvadd (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32)) (_ bv4294967295 32)) (_ bv0 32)) (bvsgt v_arrayElimCell_19 (bvadd (select (select |#memory_int| v_prenex_6) (_ bv0 32)) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32))))))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) |main_~#distance~0.offset|))) (= (_ bv4294967295 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|))) (not (= (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv0 32))) |main_~#distance~0.offset|)) v_arrayElimCell_19)) (= (_ bv0 32) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd |main_~#distance~0.offset| (bvmul (_ bv4 32) (select (select |#memory_int| v_prenex_7) (_ bv0 32)))))) (= (_ bv3 32) (select (select |#memory_int| |main_~#Dest~0.base|) (_ bv4 32))) (not (= v_prenex_6 |main_~#distance~0.base|)) (= (_ bv0 32) (select (select |#memory_int| v_prenex_6) (_ bv0 32))))) (= (_ bv0 32) |main_~#distance~0.offset|) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14869#(= |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:24:16,358 INFO L256 TraceCheckUtils]: 33: Hoare triple {14869#(= |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {14873#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:24:16,359 INFO L273 TraceCheckUtils]: 34: Hoare triple {14873#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {14877#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:24:16,360 INFO L273 TraceCheckUtils]: 35: Hoare triple {14877#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {14758#false} is VALID [2018-11-23 11:24:16,360 INFO L273 TraceCheckUtils]: 36: Hoare triple {14758#false} assume !false; {14758#false} is VALID [2018-11-23 11:24:16,376 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 11:24:16,376 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:24:22,380 INFO L273 TraceCheckUtils]: 36: Hoare triple {14758#false} assume !false; {14758#false} is VALID [2018-11-23 11:24:22,381 INFO L273 TraceCheckUtils]: 35: Hoare triple {14887#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {14758#false} is VALID [2018-11-23 11:24:22,381 INFO L273 TraceCheckUtils]: 34: Hoare triple {14891#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {14887#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:24:22,382 INFO L256 TraceCheckUtils]: 33: Hoare triple {14895#(bvsge |main_#t~mem18| (_ bv0 32))} call __VERIFIER_assert((if ~bvsge32(#t~mem18, 0bv32) then 1bv32 else 0bv32)); {14891#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:24:22,382 INFO L273 TraceCheckUtils]: 32: Hoare triple {14899#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem18 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14895#(bvsge |main_#t~mem18| (_ bv0 32))} is VALID [2018-11-23 11:24:22,383 INFO L273 TraceCheckUtils]: 31: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {14899#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|)) (_ bv0 32))} is VALID [2018-11-23 11:24:22,383 INFO L273 TraceCheckUtils]: 30: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~edgecount~0); {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,383 INFO L273 TraceCheckUtils]: 29: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,384 INFO L273 TraceCheckUtils]: 28: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,385 INFO L273 TraceCheckUtils]: 27: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,385 INFO L273 TraceCheckUtils]: 26: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,401 INFO L273 TraceCheckUtils]: 25: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvsgt32(#t~mem16, ~bvadd32(#t~mem14, #t~mem15));havoc #t~mem15;havoc #t~mem14;havoc #t~mem16; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,402 INFO L273 TraceCheckUtils]: 24: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem12 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem12;havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem13;havoc #t~mem13;call #t~mem16 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem15 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,402 INFO L273 TraceCheckUtils]: 23: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} ~i~0 := 0bv32; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,403 INFO L273 TraceCheckUtils]: 22: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~i~0, ~nodecount~0); {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,403 INFO L273 TraceCheckUtils]: 21: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post4 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post4);havoc #t~post4; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,403 INFO L273 TraceCheckUtils]: 20: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} assume !~bvslt32(~j~0, ~edgecount~0); {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,404 INFO L273 TraceCheckUtils]: 19: Hoare triple {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,413 INFO L273 TraceCheckUtils]: 18: Hoare triple {14943#(bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {14903#(bvsge (select (select |#memory_int| |main_~#distance~0.base|) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:22,418 INFO L273 TraceCheckUtils]: 17: Hoare triple {14947#(bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {14943#(bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:24,428 INFO L273 TraceCheckUtils]: 16: Hoare triple {14951#(bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0) (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))} #t~post5 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {14947#(bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))} is UNKNOWN [2018-11-23 11:24:24,451 INFO L273 TraceCheckUtils]: 15: Hoare triple {14955#(or (not (bvsgt |main_#t~mem10| (bvadd |main_#t~mem9| |main_#t~mem8|))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0) (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} assume ~bvsgt32(#t~mem10, ~bvadd32(#t~mem8, #t~mem9));havoc #t~mem8;havoc #t~mem10;havoc #t~mem9;call write~intINTTYPE4(4294967295bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32); {14951#(bvsge (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0) (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32))} is VALID [2018-11-23 11:24:24,523 INFO L273 TraceCheckUtils]: 14: Hoare triple {14959#(or (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#Weight~0.base|) (bvadd |main_~#Weight~0.offset| (bvmul (_ bv4 32) main_~j~0))) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (bvadd |main_~#Source~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|))))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0) (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem6 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem6;havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem7;havoc #t~mem7;call #t~mem10 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {14955#(or (not (bvsgt |main_#t~mem10| (bvadd |main_#t~mem9| |main_#t~mem8|))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~x~0) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0) (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:24:24,525 INFO L273 TraceCheckUtils]: 13: Hoare triple {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {14959#(or (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#Weight~0.base|) (bvadd |main_~#Weight~0.offset| (bvmul (_ bv4 32) main_~j~0))) (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) (bvadd |main_~#Source~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|))))) (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0)))) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (bvmul (_ bv4 32) main_~j~0) (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:24:24,525 INFO L273 TraceCheckUtils]: 12: Hoare triple {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} ~i~0 := 0bv32; {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} is VALID [2018-11-23 11:24:24,526 INFO L273 TraceCheckUtils]: 11: Hoare triple {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} assume !~bvslt32(~i~0, ~nodecount~0); {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} is VALID [2018-11-23 11:24:24,526 INFO L273 TraceCheckUtils]: 10: Hoare triple {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} #t~post3 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} is VALID [2018-11-23 11:24:26,532 INFO L273 TraceCheckUtils]: 9: Hoare triple {14976#(or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {14963#(or (bvsge (select (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)) (not (bvsgt (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) (select (select |#memory_int| |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select |#memory_int| |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))))} is UNKNOWN [2018-11-23 11:24:26,533 INFO L273 TraceCheckUtils]: 8: Hoare triple {14976#(or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {14976#(or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:24:26,547 INFO L273 TraceCheckUtils]: 7: Hoare triple {14757#true} assume !!(~bvsle32(0bv32, ~edgecount~0) && ~bvsle32(~edgecount~0, 19bv32));~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {14976#(or (not (bvsgt (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|)) (bvadd (select (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Source~0.base|) |main_~#Source~0.offset|)) |main_~#distance~0.offset|)) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Weight~0.base|) |main_~#Weight~0.offset|)))) (bvsge (select (store (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32)) (bvadd (bvmul (_ bv4 32) (select (select (store |#memory_int| |main_~#distance~0.base| (store (select |#memory_int| |main_~#distance~0.base|) (bvadd (bvmul (_ bv4 32) main_~i~0) |main_~#distance~0.offset|) (_ bv0 32))) |main_~#Dest~0.base|) |main_~#Dest~0.offset|)) |main_~#distance~0.offset|) (_ bv4294967295 32))) |main_~#Dest~0.base|) (bvadd |main_~#Dest~0.offset| (_ bv4 32)))) |main_~#distance~0.offset|) (_ bv4294967295 32)) |main_~#distance~0.offset|) (_ bv0 32)))} is VALID [2018-11-23 11:24:26,547 INFO L273 TraceCheckUtils]: 6: Hoare triple {14757#true} assume !!(~bvsle32(0bv32, ~nodecount~0) && ~bvsle32(~nodecount~0, 4bv32)); {14757#true} is VALID [2018-11-23 11:24:26,547 INFO L273 TraceCheckUtils]: 5: Hoare triple {14757#true} ~nodecount~0 := #t~nondet1;havoc #t~nondet1;~edgecount~0 := #t~nondet2;havoc #t~nondet2; {14757#true} is VALID [2018-11-23 11:24:26,547 INFO L256 TraceCheckUtils]: 4: Hoare triple {14757#true} call #t~ret19 := main(); {14757#true} is VALID [2018-11-23 11:24:26,548 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {14757#true} {14757#true} #111#return; {14757#true} is VALID [2018-11-23 11:24:26,548 INFO L273 TraceCheckUtils]: 2: Hoare triple {14757#true} assume true; {14757#true} is VALID [2018-11-23 11:24:26,548 INFO L273 TraceCheckUtils]: 1: Hoare triple {14757#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {14757#true} is VALID [2018-11-23 11:24:26,548 INFO L256 TraceCheckUtils]: 0: Hoare triple {14757#true} call ULTIMATE.init(); {14757#true} is VALID [2018-11-23 11:24:26,553 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 11:24:26,557 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:24:26,557 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14] total 28 [2018-11-23 11:24:26,558 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 37 [2018-11-23 11:24:26,559 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:24:26,559 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 28 states. [2018-11-23 11:24:35,005 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 57 inductive. 0 not inductive. 4 times theorem prover too weak to decide inductivity. [2018-11-23 11:24:35,005 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-11-23 11:24:35,006 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-11-23 11:24:35,006 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=649, Unknown=0, NotChecked=0, Total=756 [2018-11-23 11:24:35,007 INFO L87 Difference]: Start difference. First operand 471 states and 633 transitions. Second operand 28 states. [2018-11-23 11:24:37,066 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 40 [2018-11-23 11:24:38,901 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 42 [2018-11-23 11:24:40,224 WARN L180 SmtUtils]: Spent 288.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 69 [2018-11-23 11:24:45,308 WARN L180 SmtUtils]: Spent 2.38 s on a formula simplification. DAG size of input: 105 DAG size of output: 81 [2018-11-23 11:24:45,919 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 48 [2018-11-23 11:24:47,040 WARN L180 SmtUtils]: Spent 234.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 53 [2018-11-23 11:24:47,480 WARN L180 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 55 [2018-11-23 11:24:48,491 WARN L180 SmtUtils]: Spent 184.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 49 [2018-11-23 11:25:04,952 WARN L180 SmtUtils]: Spent 309.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 75 [2018-11-23 11:25:06,798 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 46 [2018-11-23 11:25:07,212 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 46 [2018-11-23 11:25:08,665 WARN L180 SmtUtils]: Spent 267.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 73 [2018-11-23 11:25:09,717 WARN L180 SmtUtils]: Spent 127.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2018-11-23 11:25:12,298 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 59 [2018-11-23 11:25:13,536 WARN L180 SmtUtils]: Spent 282.00 ms on a formula simplification. DAG size of input: 83 DAG size of output: 73 [2018-11-23 11:25:14,562 WARN L180 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 51 [2018-11-23 11:25:14,871 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 53 [2018-11-23 11:25:19,214 WARN L180 SmtUtils]: Spent 2.32 s on a formula simplification. DAG size of input: 97 DAG size of output: 79 [2018-11-23 11:25:19,738 WARN L180 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 46