java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/loops/eureka_01_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 11:25:00,966 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 11:25:00,969 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 11:25:00,982 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 11:25:00,982 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 11:25:00,983 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 11:25:00,984 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 11:25:00,989 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 11:25:00,991 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 11:25:00,999 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 11:25:01,002 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 11:25:01,003 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 11:25:01,004 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 11:25:01,006 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 11:25:01,007 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 11:25:01,011 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 11:25:01,012 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 11:25:01,015 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 11:25:01,019 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 11:25:01,020 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 11:25:01,023 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 11:25:01,024 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 11:25:01,026 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 11:25:01,026 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 11:25:01,026 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 11:25:01,027 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 11:25:01,028 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 11:25:01,029 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 11:25:01,029 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 11:25:01,030 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 11:25:01,031 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 11:25:01,031 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 11:25:01,032 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 11:25:01,032 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 11:25:01,033 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 11:25:01,033 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 11:25:01,034 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 11:25:01,048 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 11:25:01,049 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 11:25:01,050 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 11:25:01,050 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 11:25:01,050 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 11:25:01,052 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 11:25:01,052 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 11:25:01,052 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 11:25:01,052 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 11:25:01,053 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 11:25:01,053 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 11:25:01,053 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 11:25:01,053 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 11:25:01,053 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 11:25:01,053 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 11:25:01,054 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 11:25:01,054 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 11:25:01,054 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 11:25:01,055 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 11:25:01,055 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 11:25:01,055 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 11:25:01,055 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 11:25:01,057 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 11:25:01,057 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 11:25:01,057 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 11:25:01,058 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 11:25:01,058 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 11:25:01,058 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 11:25:01,058 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 11:25:01,059 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 11:25:01,059 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 11:25:01,059 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 11:25:01,060 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 11:25:01,112 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 11:25:01,126 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 11:25:01,129 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 11:25:01,131 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 11:25:01,131 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 11:25:01,132 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/eureka_01_true-unreach-call.i [2018-11-23 11:25:01,200 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58e1d131a/359085f50084459fbaac92ef42f79432/FLAGc48fe8341 [2018-11-23 11:25:01,664 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 11:25:01,665 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/eureka_01_true-unreach-call.i [2018-11-23 11:25:01,672 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58e1d131a/359085f50084459fbaac92ef42f79432/FLAGc48fe8341 [2018-11-23 11:25:01,997 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58e1d131a/359085f50084459fbaac92ef42f79432 [2018-11-23 11:25:02,009 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 11:25:02,010 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 11:25:02,011 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 11:25:02,012 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 11:25:02,016 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 11:25:02,018 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 11:25:01" (1/1) ... [2018-11-23 11:25:02,021 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@70d2abb3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02, skipping insertion in model container [2018-11-23 11:25:02,022 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 11:25:01" (1/1) ... [2018-11-23 11:25:02,032 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 11:25:02,069 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 11:25:02,361 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 11:25:02,367 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 11:25:02,424 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 11:25:02,452 INFO L195 MainTranslator]: Completed translation [2018-11-23 11:25:02,453 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02 WrapperNode [2018-11-23 11:25:02,453 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 11:25:02,458 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 11:25:02,458 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 11:25:02,458 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 11:25:02,469 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,494 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,511 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 11:25:02,512 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 11:25:02,512 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 11:25:02,512 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 11:25:02,521 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,526 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,526 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,559 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,633 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,636 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... [2018-11-23 11:25:02,644 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 11:25:02,645 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 11:25:02,646 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 11:25:02,646 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 11:25:02,648 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 11:25:02,702 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 11:25:02,702 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 11:25:02,702 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 11:25:02,702 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 11:25:02,702 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 11:25:02,702 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 11:25:02,703 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2018-11-23 11:25:02,703 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 11:25:02,703 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 11:25:02,703 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 11:25:02,703 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 11:25:02,703 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 11:25:02,704 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 11:25:03,796 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 11:25:03,797 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-11-23 11:25:03,797 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 11:25:03 BoogieIcfgContainer [2018-11-23 11:25:03,798 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 11:25:03,799 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 11:25:03,799 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 11:25:03,802 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 11:25:03,803 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 11:25:01" (1/3) ... [2018-11-23 11:25:03,804 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a727c0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 11:25:03, skipping insertion in model container [2018-11-23 11:25:03,804 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:25:02" (2/3) ... [2018-11-23 11:25:03,804 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a727c0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 11:25:03, skipping insertion in model container [2018-11-23 11:25:03,805 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 11:25:03" (3/3) ... [2018-11-23 11:25:03,807 INFO L112 eAbstractionObserver]: Analyzing ICFG eureka_01_true-unreach-call.i [2018-11-23 11:25:03,818 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 11:25:03,828 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 11:25:03,847 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 11:25:03,879 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 11:25:03,880 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 11:25:03,880 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 11:25:03,881 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 11:25:03,881 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 11:25:03,881 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 11:25:03,881 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 11:25:03,882 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 11:25:03,882 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 11:25:03,900 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states. [2018-11-23 11:25:03,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 11:25:03,907 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:03,908 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:03,911 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:03,916 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:03,916 INFO L82 PathProgramCache]: Analyzing trace with hash 288590464, now seen corresponding path program 1 times [2018-11-23 11:25:03,921 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:03,922 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:03,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:25:04,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:04,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:04,043 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:04,088 INFO L256 TraceCheckUtils]: 0: Hoare triple {38#true} call ULTIMATE.init(); {38#true} is VALID [2018-11-23 11:25:04,091 INFO L273 TraceCheckUtils]: 1: Hoare triple {38#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {38#true} is VALID [2018-11-23 11:25:04,092 INFO L273 TraceCheckUtils]: 2: Hoare triple {38#true} assume true; {38#true} is VALID [2018-11-23 11:25:04,092 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {38#true} {38#true} #103#return; {38#true} is VALID [2018-11-23 11:25:04,093 INFO L256 TraceCheckUtils]: 4: Hoare triple {38#true} call #t~ret18 := main(); {38#true} is VALID [2018-11-23 11:25:04,093 INFO L273 TraceCheckUtils]: 5: Hoare triple {38#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {38#true} is VALID [2018-11-23 11:25:04,102 INFO L273 TraceCheckUtils]: 6: Hoare triple {38#true} assume !true; {39#false} is VALID [2018-11-23 11:25:04,103 INFO L273 TraceCheckUtils]: 7: Hoare triple {39#false} ~i~0 := 0bv32; {39#false} is VALID [2018-11-23 11:25:04,103 INFO L273 TraceCheckUtils]: 8: Hoare triple {39#false} assume !true; {39#false} is VALID [2018-11-23 11:25:04,103 INFO L273 TraceCheckUtils]: 9: Hoare triple {39#false} ~i~0 := 0bv32; {39#false} is VALID [2018-11-23 11:25:04,103 INFO L273 TraceCheckUtils]: 10: Hoare triple {39#false} assume !true; {39#false} is VALID [2018-11-23 11:25:04,104 INFO L273 TraceCheckUtils]: 11: Hoare triple {39#false} ~i~0 := 0bv32; {39#false} is VALID [2018-11-23 11:25:04,104 INFO L273 TraceCheckUtils]: 12: Hoare triple {39#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {39#false} is VALID [2018-11-23 11:25:04,104 INFO L256 TraceCheckUtils]: 13: Hoare triple {39#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {39#false} is VALID [2018-11-23 11:25:04,105 INFO L273 TraceCheckUtils]: 14: Hoare triple {39#false} ~cond := #in~cond; {39#false} is VALID [2018-11-23 11:25:04,105 INFO L273 TraceCheckUtils]: 15: Hoare triple {39#false} assume 0bv32 == ~cond; {39#false} is VALID [2018-11-23 11:25:04,105 INFO L273 TraceCheckUtils]: 16: Hoare triple {39#false} assume !false; {39#false} is VALID [2018-11-23 11:25:04,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:25:04,109 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:25:04,113 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:25:04,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 11:25:04,119 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-23 11:25:04,122 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:04,126 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 11:25:04,188 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:04,188 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 11:25:04,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 11:25:04,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 11:25:04,200 INFO L87 Difference]: Start difference. First operand 35 states. Second operand 2 states. [2018-11-23 11:25:04,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:04,556 INFO L93 Difference]: Finished difference Result 61 states and 85 transitions. [2018-11-23 11:25:04,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 11:25:04,556 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-11-23 11:25:04,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:04,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 11:25:04,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 85 transitions. [2018-11-23 11:25:04,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 11:25:04,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 85 transitions. [2018-11-23 11:25:04,578 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 85 transitions. [2018-11-23 11:25:04,938 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:04,952 INFO L225 Difference]: With dead ends: 61 [2018-11-23 11:25:04,952 INFO L226 Difference]: Without dead ends: 30 [2018-11-23 11:25:04,957 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 11:25:04,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-11-23 11:25:05,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-11-23 11:25:05,165 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:05,166 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand 30 states. [2018-11-23 11:25:05,167 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 30 states. [2018-11-23 11:25:05,167 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 30 states. [2018-11-23 11:25:05,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:05,180 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2018-11-23 11:25:05,182 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 36 transitions. [2018-11-23 11:25:05,183 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:05,183 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:05,183 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand 30 states. [2018-11-23 11:25:05,184 INFO L87 Difference]: Start difference. First operand 30 states. Second operand 30 states. [2018-11-23 11:25:05,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:05,192 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2018-11-23 11:25:05,196 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 36 transitions. [2018-11-23 11:25:05,196 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:05,197 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:05,197 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:05,197 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:05,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-11-23 11:25:05,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 36 transitions. [2018-11-23 11:25:05,205 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 36 transitions. Word has length 17 [2018-11-23 11:25:05,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:05,205 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 36 transitions. [2018-11-23 11:25:05,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 11:25:05,206 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 36 transitions. [2018-11-23 11:25:05,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 11:25:05,207 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:05,207 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:05,209 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:05,210 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:05,210 INFO L82 PathProgramCache]: Analyzing trace with hash 1211863700, now seen corresponding path program 1 times [2018-11-23 11:25:05,211 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:05,211 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:05,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:25:05,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:05,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:05,377 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:05,718 INFO L256 TraceCheckUtils]: 0: Hoare triple {269#true} call ULTIMATE.init(); {269#true} is VALID [2018-11-23 11:25:05,718 INFO L273 TraceCheckUtils]: 1: Hoare triple {269#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {269#true} is VALID [2018-11-23 11:25:05,719 INFO L273 TraceCheckUtils]: 2: Hoare triple {269#true} assume true; {269#true} is VALID [2018-11-23 11:25:05,719 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {269#true} {269#true} #103#return; {269#true} is VALID [2018-11-23 11:25:05,720 INFO L256 TraceCheckUtils]: 4: Hoare triple {269#true} call #t~ret18 := main(); {269#true} is VALID [2018-11-23 11:25:05,728 INFO L273 TraceCheckUtils]: 5: Hoare triple {269#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {289#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:05,730 INFO L273 TraceCheckUtils]: 6: Hoare triple {289#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {270#false} is VALID [2018-11-23 11:25:05,730 INFO L273 TraceCheckUtils]: 7: Hoare triple {270#false} ~i~0 := 0bv32; {270#false} is VALID [2018-11-23 11:25:05,731 INFO L273 TraceCheckUtils]: 8: Hoare triple {270#false} assume !~bvslt32(~i~0, ~nodecount~0); {270#false} is VALID [2018-11-23 11:25:05,731 INFO L273 TraceCheckUtils]: 9: Hoare triple {270#false} ~i~0 := 0bv32; {270#false} is VALID [2018-11-23 11:25:05,731 INFO L273 TraceCheckUtils]: 10: Hoare triple {270#false} assume !~bvslt32(~i~0, ~edgecount~0); {270#false} is VALID [2018-11-23 11:25:05,732 INFO L273 TraceCheckUtils]: 11: Hoare triple {270#false} ~i~0 := 0bv32; {270#false} is VALID [2018-11-23 11:25:05,732 INFO L273 TraceCheckUtils]: 12: Hoare triple {270#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {270#false} is VALID [2018-11-23 11:25:05,732 INFO L256 TraceCheckUtils]: 13: Hoare triple {270#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {270#false} is VALID [2018-11-23 11:25:05,733 INFO L273 TraceCheckUtils]: 14: Hoare triple {270#false} ~cond := #in~cond; {270#false} is VALID [2018-11-23 11:25:05,733 INFO L273 TraceCheckUtils]: 15: Hoare triple {270#false} assume 0bv32 == ~cond; {270#false} is VALID [2018-11-23 11:25:05,733 INFO L273 TraceCheckUtils]: 16: Hoare triple {270#false} assume !false; {270#false} is VALID [2018-11-23 11:25:05,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:25:05,735 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:25:05,740 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:25:05,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 11:25:05,745 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-23 11:25:05,746 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:05,746 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 11:25:05,806 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:05,806 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 11:25:05,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 11:25:05,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 11:25:05,807 INFO L87 Difference]: Start difference. First operand 30 states and 36 transitions. Second operand 3 states. [2018-11-23 11:25:06,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:06,100 INFO L93 Difference]: Finished difference Result 54 states and 66 transitions. [2018-11-23 11:25:06,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 11:25:06,100 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-11-23 11:25:06,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:06,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 11:25:06,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 66 transitions. [2018-11-23 11:25:06,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 11:25:06,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 66 transitions. [2018-11-23 11:25:06,107 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 66 transitions. [2018-11-23 11:25:06,302 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:06,304 INFO L225 Difference]: With dead ends: 54 [2018-11-23 11:25:06,304 INFO L226 Difference]: Without dead ends: 33 [2018-11-23 11:25:06,305 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 11:25:06,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-11-23 11:25:06,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 31. [2018-11-23 11:25:06,320 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:06,320 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand 31 states. [2018-11-23 11:25:06,320 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand 31 states. [2018-11-23 11:25:06,321 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 31 states. [2018-11-23 11:25:06,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:06,324 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2018-11-23 11:25:06,324 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 11:25:06,325 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:06,325 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:06,325 INFO L74 IsIncluded]: Start isIncluded. First operand 31 states. Second operand 33 states. [2018-11-23 11:25:06,325 INFO L87 Difference]: Start difference. First operand 31 states. Second operand 33 states. [2018-11-23 11:25:06,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:06,328 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2018-11-23 11:25:06,329 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2018-11-23 11:25:06,329 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:06,329 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:06,330 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:06,330 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:06,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-11-23 11:25:06,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 37 transitions. [2018-11-23 11:25:06,333 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 37 transitions. Word has length 17 [2018-11-23 11:25:06,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:06,333 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 37 transitions. [2018-11-23 11:25:06,333 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 11:25:06,333 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 37 transitions. [2018-11-23 11:25:06,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 11:25:06,334 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:06,335 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:06,335 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:06,335 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:06,335 INFO L82 PathProgramCache]: Analyzing trace with hash 151989727, now seen corresponding path program 1 times [2018-11-23 11:25:06,336 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:06,336 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:06,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:25:06,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:06,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:06,453 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:06,600 INFO L256 TraceCheckUtils]: 0: Hoare triple {503#true} call ULTIMATE.init(); {503#true} is VALID [2018-11-23 11:25:06,600 INFO L273 TraceCheckUtils]: 1: Hoare triple {503#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {503#true} is VALID [2018-11-23 11:25:06,601 INFO L273 TraceCheckUtils]: 2: Hoare triple {503#true} assume true; {503#true} is VALID [2018-11-23 11:25:06,601 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {503#true} {503#true} #103#return; {503#true} is VALID [2018-11-23 11:25:06,601 INFO L256 TraceCheckUtils]: 4: Hoare triple {503#true} call #t~ret18 := main(); {503#true} is VALID [2018-11-23 11:25:06,605 INFO L273 TraceCheckUtils]: 5: Hoare triple {503#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {523#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:06,606 INFO L273 TraceCheckUtils]: 6: Hoare triple {523#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {523#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:06,607 INFO L273 TraceCheckUtils]: 7: Hoare triple {523#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {523#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:06,608 INFO L273 TraceCheckUtils]: 8: Hoare triple {523#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {533#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:06,609 INFO L273 TraceCheckUtils]: 9: Hoare triple {533#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {504#false} is VALID [2018-11-23 11:25:06,609 INFO L273 TraceCheckUtils]: 10: Hoare triple {504#false} ~i~0 := 0bv32; {504#false} is VALID [2018-11-23 11:25:06,609 INFO L273 TraceCheckUtils]: 11: Hoare triple {504#false} assume !~bvslt32(~i~0, ~nodecount~0); {504#false} is VALID [2018-11-23 11:25:06,610 INFO L273 TraceCheckUtils]: 12: Hoare triple {504#false} ~i~0 := 0bv32; {504#false} is VALID [2018-11-23 11:25:06,610 INFO L273 TraceCheckUtils]: 13: Hoare triple {504#false} assume !~bvslt32(~i~0, ~edgecount~0); {504#false} is VALID [2018-11-23 11:25:06,611 INFO L273 TraceCheckUtils]: 14: Hoare triple {504#false} ~i~0 := 0bv32; {504#false} is VALID [2018-11-23 11:25:06,611 INFO L273 TraceCheckUtils]: 15: Hoare triple {504#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {504#false} is VALID [2018-11-23 11:25:06,612 INFO L256 TraceCheckUtils]: 16: Hoare triple {504#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {504#false} is VALID [2018-11-23 11:25:06,612 INFO L273 TraceCheckUtils]: 17: Hoare triple {504#false} ~cond := #in~cond; {504#false} is VALID [2018-11-23 11:25:06,613 INFO L273 TraceCheckUtils]: 18: Hoare triple {504#false} assume 0bv32 == ~cond; {504#false} is VALID [2018-11-23 11:25:06,613 INFO L273 TraceCheckUtils]: 19: Hoare triple {504#false} assume !false; {504#false} is VALID [2018-11-23 11:25:06,615 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:25:06,615 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:07,034 INFO L273 TraceCheckUtils]: 19: Hoare triple {504#false} assume !false; {504#false} is VALID [2018-11-23 11:25:07,035 INFO L273 TraceCheckUtils]: 18: Hoare triple {504#false} assume 0bv32 == ~cond; {504#false} is VALID [2018-11-23 11:25:07,035 INFO L273 TraceCheckUtils]: 17: Hoare triple {504#false} ~cond := #in~cond; {504#false} is VALID [2018-11-23 11:25:07,035 INFO L256 TraceCheckUtils]: 16: Hoare triple {504#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {504#false} is VALID [2018-11-23 11:25:07,036 INFO L273 TraceCheckUtils]: 15: Hoare triple {504#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {504#false} is VALID [2018-11-23 11:25:07,036 INFO L273 TraceCheckUtils]: 14: Hoare triple {504#false} ~i~0 := 0bv32; {504#false} is VALID [2018-11-23 11:25:07,036 INFO L273 TraceCheckUtils]: 13: Hoare triple {504#false} assume !~bvslt32(~i~0, ~edgecount~0); {504#false} is VALID [2018-11-23 11:25:07,036 INFO L273 TraceCheckUtils]: 12: Hoare triple {504#false} ~i~0 := 0bv32; {504#false} is VALID [2018-11-23 11:25:07,037 INFO L273 TraceCheckUtils]: 11: Hoare triple {504#false} assume !~bvslt32(~i~0, ~nodecount~0); {504#false} is VALID [2018-11-23 11:25:07,037 INFO L273 TraceCheckUtils]: 10: Hoare triple {504#false} ~i~0 := 0bv32; {504#false} is VALID [2018-11-23 11:25:07,046 INFO L273 TraceCheckUtils]: 9: Hoare triple {597#(bvslt main_~i~0 main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {504#false} is VALID [2018-11-23 11:25:07,060 INFO L273 TraceCheckUtils]: 8: Hoare triple {601#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {597#(bvslt main_~i~0 main_~nodecount~0)} is VALID [2018-11-23 11:25:07,072 INFO L273 TraceCheckUtils]: 7: Hoare triple {601#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {601#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:07,085 INFO L273 TraceCheckUtils]: 6: Hoare triple {601#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {601#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:07,101 INFO L273 TraceCheckUtils]: 5: Hoare triple {503#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {601#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:07,101 INFO L256 TraceCheckUtils]: 4: Hoare triple {503#true} call #t~ret18 := main(); {503#true} is VALID [2018-11-23 11:25:07,102 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {503#true} {503#true} #103#return; {503#true} is VALID [2018-11-23 11:25:07,102 INFO L273 TraceCheckUtils]: 2: Hoare triple {503#true} assume true; {503#true} is VALID [2018-11-23 11:25:07,102 INFO L273 TraceCheckUtils]: 1: Hoare triple {503#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {503#true} is VALID [2018-11-23 11:25:07,103 INFO L256 TraceCheckUtils]: 0: Hoare triple {503#true} call ULTIMATE.init(); {503#true} is VALID [2018-11-23 11:25:07,104 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:25:07,106 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:07,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 11:25:07,107 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-11-23 11:25:07,108 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:07,108 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 11:25:07,252 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:07,252 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 11:25:07,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 11:25:07,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 11:25:07,253 INFO L87 Difference]: Start difference. First operand 31 states and 37 transitions. Second operand 6 states. [2018-11-23 11:25:08,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:08,071 INFO L93 Difference]: Finished difference Result 61 states and 77 transitions. [2018-11-23 11:25:08,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 11:25:08,072 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2018-11-23 11:25:08,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:08,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 11:25:08,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 77 transitions. [2018-11-23 11:25:08,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 11:25:08,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 77 transitions. [2018-11-23 11:25:08,079 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 77 transitions. [2018-11-23 11:25:08,226 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:08,229 INFO L225 Difference]: With dead ends: 61 [2018-11-23 11:25:08,230 INFO L226 Difference]: Without dead ends: 40 [2018-11-23 11:25:08,230 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-11-23 11:25:08,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-23 11:25:08,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-11-23 11:25:08,273 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:08,273 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 40 states. [2018-11-23 11:25:08,273 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-23 11:25:08,273 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-23 11:25:08,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:08,276 INFO L93 Difference]: Finished difference Result 40 states and 49 transitions. [2018-11-23 11:25:08,277 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 49 transitions. [2018-11-23 11:25:08,278 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:08,278 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:08,278 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 40 states. [2018-11-23 11:25:08,278 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 40 states. [2018-11-23 11:25:08,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:08,281 INFO L93 Difference]: Finished difference Result 40 states and 49 transitions. [2018-11-23 11:25:08,282 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 49 transitions. [2018-11-23 11:25:08,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:08,282 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:08,283 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:08,283 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:08,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-23 11:25:08,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2018-11-23 11:25:08,286 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 49 transitions. Word has length 20 [2018-11-23 11:25:08,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:08,286 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 49 transitions. [2018-11-23 11:25:08,286 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 11:25:08,286 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 49 transitions. [2018-11-23 11:25:08,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 11:25:08,287 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:08,288 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:08,288 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:08,288 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:08,288 INFO L82 PathProgramCache]: Analyzing trace with hash 2070506196, now seen corresponding path program 2 times [2018-11-23 11:25:08,289 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:08,289 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:08,307 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:25:08,373 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 11:25:08,373 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:25:08,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:08,391 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:08,467 INFO L256 TraceCheckUtils]: 0: Hoare triple {847#true} call ULTIMATE.init(); {847#true} is VALID [2018-11-23 11:25:08,468 INFO L273 TraceCheckUtils]: 1: Hoare triple {847#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {847#true} is VALID [2018-11-23 11:25:08,468 INFO L273 TraceCheckUtils]: 2: Hoare triple {847#true} assume true; {847#true} is VALID [2018-11-23 11:25:08,468 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {847#true} {847#true} #103#return; {847#true} is VALID [2018-11-23 11:25:08,468 INFO L256 TraceCheckUtils]: 4: Hoare triple {847#true} call #t~ret18 := main(); {847#true} is VALID [2018-11-23 11:25:08,475 INFO L273 TraceCheckUtils]: 5: Hoare triple {847#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,476 INFO L273 TraceCheckUtils]: 6: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,477 INFO L273 TraceCheckUtils]: 7: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,477 INFO L273 TraceCheckUtils]: 8: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,479 INFO L273 TraceCheckUtils]: 9: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,479 INFO L273 TraceCheckUtils]: 10: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,480 INFO L273 TraceCheckUtils]: 11: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,480 INFO L273 TraceCheckUtils]: 12: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,482 INFO L273 TraceCheckUtils]: 13: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,483 INFO L273 TraceCheckUtils]: 14: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,488 INFO L273 TraceCheckUtils]: 15: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,488 INFO L273 TraceCheckUtils]: 16: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,489 INFO L273 TraceCheckUtils]: 17: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,489 INFO L273 TraceCheckUtils]: 18: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {867#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:08,490 INFO L273 TraceCheckUtils]: 19: Hoare triple {867#(= (_ bv5 32) main_~nodecount~0)} ~i~0 := 0bv32; {910#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:08,490 INFO L273 TraceCheckUtils]: 20: Hoare triple {910#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {848#false} is VALID [2018-11-23 11:25:08,491 INFO L273 TraceCheckUtils]: 21: Hoare triple {848#false} ~i~0 := 0bv32; {848#false} is VALID [2018-11-23 11:25:08,491 INFO L273 TraceCheckUtils]: 22: Hoare triple {848#false} assume !~bvslt32(~i~0, ~edgecount~0); {848#false} is VALID [2018-11-23 11:25:08,491 INFO L273 TraceCheckUtils]: 23: Hoare triple {848#false} ~i~0 := 0bv32; {848#false} is VALID [2018-11-23 11:25:08,491 INFO L273 TraceCheckUtils]: 24: Hoare triple {848#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {848#false} is VALID [2018-11-23 11:25:08,492 INFO L256 TraceCheckUtils]: 25: Hoare triple {848#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {848#false} is VALID [2018-11-23 11:25:08,492 INFO L273 TraceCheckUtils]: 26: Hoare triple {848#false} ~cond := #in~cond; {848#false} is VALID [2018-11-23 11:25:08,492 INFO L273 TraceCheckUtils]: 27: Hoare triple {848#false} assume 0bv32 == ~cond; {848#false} is VALID [2018-11-23 11:25:08,492 INFO L273 TraceCheckUtils]: 28: Hoare triple {848#false} assume !false; {848#false} is VALID [2018-11-23 11:25:08,494 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-11-23 11:25:08,494 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:25:08,496 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:25:08,496 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 11:25:08,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2018-11-23 11:25:08,497 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:08,497 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 11:25:08,544 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:08,544 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 11:25:08,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 11:25:08,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 11:25:08,545 INFO L87 Difference]: Start difference. First operand 40 states and 49 transitions. Second operand 4 states. [2018-11-23 11:25:08,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:08,941 INFO L93 Difference]: Finished difference Result 68 states and 83 transitions. [2018-11-23 11:25:08,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 11:25:08,942 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2018-11-23 11:25:08,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:08,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 11:25:08,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 74 transitions. [2018-11-23 11:25:08,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 11:25:08,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 74 transitions. [2018-11-23 11:25:08,950 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 74 transitions. [2018-11-23 11:25:09,123 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:09,128 INFO L225 Difference]: With dead ends: 68 [2018-11-23 11:25:09,130 INFO L226 Difference]: Without dead ends: 53 [2018-11-23 11:25:09,130 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 11:25:09,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-11-23 11:25:09,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 41. [2018-11-23 11:25:09,181 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:09,181 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand 41 states. [2018-11-23 11:25:09,182 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand 41 states. [2018-11-23 11:25:09,182 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 41 states. [2018-11-23 11:25:09,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:09,187 INFO L93 Difference]: Finished difference Result 53 states and 66 transitions. [2018-11-23 11:25:09,187 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 66 transitions. [2018-11-23 11:25:09,188 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:09,188 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:09,188 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand 53 states. [2018-11-23 11:25:09,189 INFO L87 Difference]: Start difference. First operand 41 states. Second operand 53 states. [2018-11-23 11:25:09,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:09,192 INFO L93 Difference]: Finished difference Result 53 states and 66 transitions. [2018-11-23 11:25:09,193 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 66 transitions. [2018-11-23 11:25:09,193 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:09,193 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:09,194 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:09,194 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:09,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-11-23 11:25:09,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 50 transitions. [2018-11-23 11:25:09,196 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 50 transitions. Word has length 29 [2018-11-23 11:25:09,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:09,197 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 50 transitions. [2018-11-23 11:25:09,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 11:25:09,197 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 50 transitions. [2018-11-23 11:25:09,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 11:25:09,199 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:09,199 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:09,199 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:09,199 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:09,200 INFO L82 PathProgramCache]: Analyzing trace with hash 1369282429, now seen corresponding path program 1 times [2018-11-23 11:25:09,200 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:09,200 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:09,232 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 11:25:09,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:09,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:09,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:09,386 INFO L256 TraceCheckUtils]: 0: Hoare triple {1192#true} call ULTIMATE.init(); {1192#true} is VALID [2018-11-23 11:25:09,386 INFO L273 TraceCheckUtils]: 1: Hoare triple {1192#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {1192#true} is VALID [2018-11-23 11:25:09,387 INFO L273 TraceCheckUtils]: 2: Hoare triple {1192#true} assume true; {1192#true} is VALID [2018-11-23 11:25:09,387 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1192#true} {1192#true} #103#return; {1192#true} is VALID [2018-11-23 11:25:09,387 INFO L256 TraceCheckUtils]: 4: Hoare triple {1192#true} call #t~ret18 := main(); {1192#true} is VALID [2018-11-23 11:25:09,393 INFO L273 TraceCheckUtils]: 5: Hoare triple {1192#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {1212#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:09,399 INFO L273 TraceCheckUtils]: 6: Hoare triple {1212#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {1212#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:09,400 INFO L273 TraceCheckUtils]: 7: Hoare triple {1212#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1212#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:09,400 INFO L273 TraceCheckUtils]: 8: Hoare triple {1212#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1222#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:09,401 INFO L273 TraceCheckUtils]: 9: Hoare triple {1222#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {1222#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:09,402 INFO L273 TraceCheckUtils]: 10: Hoare triple {1222#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,402 INFO L273 TraceCheckUtils]: 11: Hoare triple {1193#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1193#false} is VALID [2018-11-23 11:25:09,402 INFO L273 TraceCheckUtils]: 12: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,402 INFO L273 TraceCheckUtils]: 13: Hoare triple {1193#false} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,403 INFO L273 TraceCheckUtils]: 14: Hoare triple {1193#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1193#false} is VALID [2018-11-23 11:25:09,403 INFO L273 TraceCheckUtils]: 15: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,404 INFO L273 TraceCheckUtils]: 16: Hoare triple {1193#false} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,404 INFO L273 TraceCheckUtils]: 17: Hoare triple {1193#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1193#false} is VALID [2018-11-23 11:25:09,404 INFO L273 TraceCheckUtils]: 18: Hoare triple {1193#false} assume !~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,405 INFO L273 TraceCheckUtils]: 19: Hoare triple {1193#false} ~i~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,405 INFO L273 TraceCheckUtils]: 20: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,405 INFO L273 TraceCheckUtils]: 21: Hoare triple {1193#false} assume !~bvslt32(~j~0, ~edgecount~0); {1193#false} is VALID [2018-11-23 11:25:09,406 INFO L273 TraceCheckUtils]: 22: Hoare triple {1193#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1193#false} is VALID [2018-11-23 11:25:09,406 INFO L273 TraceCheckUtils]: 23: Hoare triple {1193#false} assume !~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,406 INFO L273 TraceCheckUtils]: 24: Hoare triple {1193#false} ~i~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,407 INFO L273 TraceCheckUtils]: 25: Hoare triple {1193#false} assume !~bvslt32(~i~0, ~edgecount~0); {1193#false} is VALID [2018-11-23 11:25:09,407 INFO L273 TraceCheckUtils]: 26: Hoare triple {1193#false} ~i~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,407 INFO L273 TraceCheckUtils]: 27: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,407 INFO L256 TraceCheckUtils]: 28: Hoare triple {1193#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {1193#false} is VALID [2018-11-23 11:25:09,408 INFO L273 TraceCheckUtils]: 29: Hoare triple {1193#false} ~cond := #in~cond; {1193#false} is VALID [2018-11-23 11:25:09,408 INFO L273 TraceCheckUtils]: 30: Hoare triple {1193#false} assume 0bv32 == ~cond; {1193#false} is VALID [2018-11-23 11:25:09,408 INFO L273 TraceCheckUtils]: 31: Hoare triple {1193#false} assume !false; {1193#false} is VALID [2018-11-23 11:25:09,411 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-23 11:25:09,411 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:09,513 INFO L273 TraceCheckUtils]: 31: Hoare triple {1193#false} assume !false; {1193#false} is VALID [2018-11-23 11:25:09,513 INFO L273 TraceCheckUtils]: 30: Hoare triple {1193#false} assume 0bv32 == ~cond; {1193#false} is VALID [2018-11-23 11:25:09,514 INFO L273 TraceCheckUtils]: 29: Hoare triple {1193#false} ~cond := #in~cond; {1193#false} is VALID [2018-11-23 11:25:09,514 INFO L256 TraceCheckUtils]: 28: Hoare triple {1193#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {1193#false} is VALID [2018-11-23 11:25:09,514 INFO L273 TraceCheckUtils]: 27: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,514 INFO L273 TraceCheckUtils]: 26: Hoare triple {1193#false} ~i~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,514 INFO L273 TraceCheckUtils]: 25: Hoare triple {1193#false} assume !~bvslt32(~i~0, ~edgecount~0); {1193#false} is VALID [2018-11-23 11:25:09,515 INFO L273 TraceCheckUtils]: 24: Hoare triple {1193#false} ~i~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,515 INFO L273 TraceCheckUtils]: 23: Hoare triple {1193#false} assume !~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,515 INFO L273 TraceCheckUtils]: 22: Hoare triple {1193#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1193#false} is VALID [2018-11-23 11:25:09,515 INFO L273 TraceCheckUtils]: 21: Hoare triple {1193#false} assume !~bvslt32(~j~0, ~edgecount~0); {1193#false} is VALID [2018-11-23 11:25:09,515 INFO L273 TraceCheckUtils]: 20: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,516 INFO L273 TraceCheckUtils]: 19: Hoare triple {1193#false} ~i~0 := 0bv32; {1193#false} is VALID [2018-11-23 11:25:09,516 INFO L273 TraceCheckUtils]: 18: Hoare triple {1193#false} assume !~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,517 INFO L273 TraceCheckUtils]: 17: Hoare triple {1193#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1193#false} is VALID [2018-11-23 11:25:09,517 INFO L273 TraceCheckUtils]: 16: Hoare triple {1193#false} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,517 INFO L273 TraceCheckUtils]: 15: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,517 INFO L273 TraceCheckUtils]: 14: Hoare triple {1193#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1193#false} is VALID [2018-11-23 11:25:09,517 INFO L273 TraceCheckUtils]: 13: Hoare triple {1193#false} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,518 INFO L273 TraceCheckUtils]: 12: Hoare triple {1193#false} assume !!~bvslt32(~i~0, ~nodecount~0); {1193#false} is VALID [2018-11-23 11:25:09,518 INFO L273 TraceCheckUtils]: 11: Hoare triple {1193#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1193#false} is VALID [2018-11-23 11:25:09,519 INFO L273 TraceCheckUtils]: 10: Hoare triple {1355#(not (= main_~source~0 main_~i~0))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1193#false} is VALID [2018-11-23 11:25:09,520 INFO L273 TraceCheckUtils]: 9: Hoare triple {1355#(not (= main_~source~0 main_~i~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {1355#(not (= main_~source~0 main_~i~0))} is VALID [2018-11-23 11:25:09,532 INFO L273 TraceCheckUtils]: 8: Hoare triple {1362#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1355#(not (= main_~source~0 main_~i~0))} is VALID [2018-11-23 11:25:09,532 INFO L273 TraceCheckUtils]: 7: Hoare triple {1362#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1362#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} is VALID [2018-11-23 11:25:09,533 INFO L273 TraceCheckUtils]: 6: Hoare triple {1362#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {1362#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} is VALID [2018-11-23 11:25:09,537 INFO L273 TraceCheckUtils]: 5: Hoare triple {1192#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {1362#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} is VALID [2018-11-23 11:25:09,537 INFO L256 TraceCheckUtils]: 4: Hoare triple {1192#true} call #t~ret18 := main(); {1192#true} is VALID [2018-11-23 11:25:09,538 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1192#true} {1192#true} #103#return; {1192#true} is VALID [2018-11-23 11:25:09,538 INFO L273 TraceCheckUtils]: 2: Hoare triple {1192#true} assume true; {1192#true} is VALID [2018-11-23 11:25:09,538 INFO L273 TraceCheckUtils]: 1: Hoare triple {1192#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {1192#true} is VALID [2018-11-23 11:25:09,539 INFO L256 TraceCheckUtils]: 0: Hoare triple {1192#true} call ULTIMATE.init(); {1192#true} is VALID [2018-11-23 11:25:09,541 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (6)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 11:25:09,543 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:09,543 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2018-11-23 11:25:09,544 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-11-23 11:25:09,544 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:09,544 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states. [2018-11-23 11:25:09,618 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:09,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 11:25:09,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 11:25:09,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 11:25:09,619 INFO L87 Difference]: Start difference. First operand 41 states and 50 transitions. Second operand 6 states. [2018-11-23 11:25:10,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:10,129 INFO L93 Difference]: Finished difference Result 78 states and 97 transitions. [2018-11-23 11:25:10,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 11:25:10,130 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-11-23 11:25:10,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:10,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 11:25:10,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 84 transitions. [2018-11-23 11:25:10,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2018-11-23 11:25:10,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 84 transitions. [2018-11-23 11:25:10,136 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 84 transitions. [2018-11-23 11:25:10,348 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:10,349 INFO L225 Difference]: With dead ends: 78 [2018-11-23 11:25:10,349 INFO L226 Difference]: Without dead ends: 45 [2018-11-23 11:25:10,350 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-23 11:25:10,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-11-23 11:25:10,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2018-11-23 11:25:10,421 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:10,421 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand 44 states. [2018-11-23 11:25:10,421 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 44 states. [2018-11-23 11:25:10,421 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 44 states. [2018-11-23 11:25:10,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:10,424 INFO L93 Difference]: Finished difference Result 45 states and 52 transitions. [2018-11-23 11:25:10,424 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2018-11-23 11:25:10,425 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:10,425 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:10,425 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 45 states. [2018-11-23 11:25:10,425 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 45 states. [2018-11-23 11:25:10,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:10,428 INFO L93 Difference]: Finished difference Result 45 states and 52 transitions. [2018-11-23 11:25:10,428 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 52 transitions. [2018-11-23 11:25:10,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:10,429 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:10,429 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:10,429 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:10,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-23 11:25:10,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 51 transitions. [2018-11-23 11:25:10,431 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 51 transitions. Word has length 32 [2018-11-23 11:25:10,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:10,432 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 51 transitions. [2018-11-23 11:25:10,432 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 11:25:10,432 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 51 transitions. [2018-11-23 11:25:10,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 11:25:10,433 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:10,433 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:10,434 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:10,434 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:10,434 INFO L82 PathProgramCache]: Analyzing trace with hash -1121874949, now seen corresponding path program 1 times [2018-11-23 11:25:10,434 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:10,435 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:10,453 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:25:10,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:10,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:10,565 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:10,715 INFO L256 TraceCheckUtils]: 0: Hoare triple {1648#true} call ULTIMATE.init(); {1648#true} is VALID [2018-11-23 11:25:10,716 INFO L273 TraceCheckUtils]: 1: Hoare triple {1648#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {1648#true} is VALID [2018-11-23 11:25:10,716 INFO L273 TraceCheckUtils]: 2: Hoare triple {1648#true} assume true; {1648#true} is VALID [2018-11-23 11:25:10,716 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1648#true} {1648#true} #103#return; {1648#true} is VALID [2018-11-23 11:25:10,717 INFO L256 TraceCheckUtils]: 4: Hoare triple {1648#true} call #t~ret18 := main(); {1648#true} is VALID [2018-11-23 11:25:10,720 INFO L273 TraceCheckUtils]: 5: Hoare triple {1648#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {1668#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:10,721 INFO L273 TraceCheckUtils]: 6: Hoare triple {1668#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {1668#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:10,722 INFO L273 TraceCheckUtils]: 7: Hoare triple {1668#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1668#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:10,723 INFO L273 TraceCheckUtils]: 8: Hoare triple {1668#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1678#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:10,724 INFO L273 TraceCheckUtils]: 9: Hoare triple {1678#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {1678#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:10,725 INFO L273 TraceCheckUtils]: 10: Hoare triple {1678#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1678#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:10,726 INFO L273 TraceCheckUtils]: 11: Hoare triple {1678#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1688#(and (= (_ bv5 32) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:25:10,727 INFO L273 TraceCheckUtils]: 12: Hoare triple {1688#(and (= (_ bv5 32) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {1688#(and (= (_ bv5 32) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:25:10,728 INFO L273 TraceCheckUtils]: 13: Hoare triple {1688#(and (= (_ bv5 32) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1688#(and (= (_ bv5 32) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:25:10,729 INFO L273 TraceCheckUtils]: 14: Hoare triple {1688#(and (= (_ bv5 32) main_~nodecount~0) (= (_ bv2 32) main_~i~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1698#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv5 32) main_~nodecount~0))} is VALID [2018-11-23 11:25:10,730 INFO L273 TraceCheckUtils]: 15: Hoare triple {1698#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv5 32) main_~nodecount~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {1698#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv5 32) main_~nodecount~0))} is VALID [2018-11-23 11:25:10,731 INFO L273 TraceCheckUtils]: 16: Hoare triple {1698#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv5 32) main_~nodecount~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1698#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv5 32) main_~nodecount~0))} is VALID [2018-11-23 11:25:10,732 INFO L273 TraceCheckUtils]: 17: Hoare triple {1698#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv5 32) main_~nodecount~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1708#(and (= (_ bv4 32) main_~i~0) (= (_ bv5 32) main_~nodecount~0))} is VALID [2018-11-23 11:25:10,733 INFO L273 TraceCheckUtils]: 18: Hoare triple {1708#(and (= (_ bv4 32) main_~i~0) (= (_ bv5 32) main_~nodecount~0))} assume !~bvslt32(~i~0, ~nodecount~0); {1649#false} is VALID [2018-11-23 11:25:10,733 INFO L273 TraceCheckUtils]: 19: Hoare triple {1649#false} ~i~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:10,733 INFO L273 TraceCheckUtils]: 20: Hoare triple {1649#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:10,734 INFO L273 TraceCheckUtils]: 21: Hoare triple {1649#false} assume !~bvslt32(~j~0, ~edgecount~0); {1649#false} is VALID [2018-11-23 11:25:10,734 INFO L273 TraceCheckUtils]: 22: Hoare triple {1649#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1649#false} is VALID [2018-11-23 11:25:10,735 INFO L273 TraceCheckUtils]: 23: Hoare triple {1649#false} assume !~bvslt32(~i~0, ~nodecount~0); {1649#false} is VALID [2018-11-23 11:25:10,735 INFO L273 TraceCheckUtils]: 24: Hoare triple {1649#false} ~i~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:10,736 INFO L273 TraceCheckUtils]: 25: Hoare triple {1649#false} assume !~bvslt32(~i~0, ~edgecount~0); {1649#false} is VALID [2018-11-23 11:25:10,736 INFO L273 TraceCheckUtils]: 26: Hoare triple {1649#false} ~i~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:10,736 INFO L273 TraceCheckUtils]: 27: Hoare triple {1649#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1649#false} is VALID [2018-11-23 11:25:10,736 INFO L256 TraceCheckUtils]: 28: Hoare triple {1649#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {1649#false} is VALID [2018-11-23 11:25:10,737 INFO L273 TraceCheckUtils]: 29: Hoare triple {1649#false} ~cond := #in~cond; {1649#false} is VALID [2018-11-23 11:25:10,737 INFO L273 TraceCheckUtils]: 30: Hoare triple {1649#false} assume 0bv32 == ~cond; {1649#false} is VALID [2018-11-23 11:25:10,737 INFO L273 TraceCheckUtils]: 31: Hoare triple {1649#false} assume !false; {1649#false} is VALID [2018-11-23 11:25:10,740 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:25:10,740 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:11,059 INFO L273 TraceCheckUtils]: 31: Hoare triple {1649#false} assume !false; {1649#false} is VALID [2018-11-23 11:25:11,060 INFO L273 TraceCheckUtils]: 30: Hoare triple {1649#false} assume 0bv32 == ~cond; {1649#false} is VALID [2018-11-23 11:25:11,060 INFO L273 TraceCheckUtils]: 29: Hoare triple {1649#false} ~cond := #in~cond; {1649#false} is VALID [2018-11-23 11:25:11,060 INFO L256 TraceCheckUtils]: 28: Hoare triple {1649#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {1649#false} is VALID [2018-11-23 11:25:11,060 INFO L273 TraceCheckUtils]: 27: Hoare triple {1649#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1649#false} is VALID [2018-11-23 11:25:11,061 INFO L273 TraceCheckUtils]: 26: Hoare triple {1649#false} ~i~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:11,061 INFO L273 TraceCheckUtils]: 25: Hoare triple {1649#false} assume !~bvslt32(~i~0, ~edgecount~0); {1649#false} is VALID [2018-11-23 11:25:11,061 INFO L273 TraceCheckUtils]: 24: Hoare triple {1649#false} ~i~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:11,062 INFO L273 TraceCheckUtils]: 23: Hoare triple {1649#false} assume !~bvslt32(~i~0, ~nodecount~0); {1649#false} is VALID [2018-11-23 11:25:11,062 INFO L273 TraceCheckUtils]: 22: Hoare triple {1649#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {1649#false} is VALID [2018-11-23 11:25:11,063 INFO L273 TraceCheckUtils]: 21: Hoare triple {1649#false} assume !~bvslt32(~j~0, ~edgecount~0); {1649#false} is VALID [2018-11-23 11:25:11,063 INFO L273 TraceCheckUtils]: 20: Hoare triple {1649#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:11,063 INFO L273 TraceCheckUtils]: 19: Hoare triple {1649#false} ~i~0 := 0bv32; {1649#false} is VALID [2018-11-23 11:25:11,071 INFO L273 TraceCheckUtils]: 18: Hoare triple {1790#(bvslt main_~i~0 main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {1649#false} is VALID [2018-11-23 11:25:11,073 INFO L273 TraceCheckUtils]: 17: Hoare triple {1794#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1790#(bvslt main_~i~0 main_~nodecount~0)} is VALID [2018-11-23 11:25:11,074 INFO L273 TraceCheckUtils]: 16: Hoare triple {1794#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1794#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,074 INFO L273 TraceCheckUtils]: 15: Hoare triple {1794#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {1794#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,102 INFO L273 TraceCheckUtils]: 14: Hoare triple {1804#(bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1794#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,103 INFO L273 TraceCheckUtils]: 13: Hoare triple {1804#(bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1804#(bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,104 INFO L273 TraceCheckUtils]: 12: Hoare triple {1804#(bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {1804#(bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,131 INFO L273 TraceCheckUtils]: 11: Hoare triple {1814#(bvslt (bvadd main_~i~0 (_ bv3 32)) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1804#(bvslt (bvadd main_~i~0 (_ bv2 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,132 INFO L273 TraceCheckUtils]: 10: Hoare triple {1814#(bvslt (bvadd main_~i~0 (_ bv3 32)) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1814#(bvslt (bvadd main_~i~0 (_ bv3 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,132 INFO L273 TraceCheckUtils]: 9: Hoare triple {1814#(bvslt (bvadd main_~i~0 (_ bv3 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {1814#(bvslt (bvadd main_~i~0 (_ bv3 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,159 INFO L273 TraceCheckUtils]: 8: Hoare triple {1824#(bvslt (bvadd main_~i~0 (_ bv4 32)) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {1814#(bvslt (bvadd main_~i~0 (_ bv3 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,160 INFO L273 TraceCheckUtils]: 7: Hoare triple {1824#(bvslt (bvadd main_~i~0 (_ bv4 32)) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {1824#(bvslt (bvadd main_~i~0 (_ bv4 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,161 INFO L273 TraceCheckUtils]: 6: Hoare triple {1824#(bvslt (bvadd main_~i~0 (_ bv4 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {1824#(bvslt (bvadd main_~i~0 (_ bv4 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,168 INFO L273 TraceCheckUtils]: 5: Hoare triple {1648#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {1824#(bvslt (bvadd main_~i~0 (_ bv4 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:11,168 INFO L256 TraceCheckUtils]: 4: Hoare triple {1648#true} call #t~ret18 := main(); {1648#true} is VALID [2018-11-23 11:25:11,169 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1648#true} {1648#true} #103#return; {1648#true} is VALID [2018-11-23 11:25:11,169 INFO L273 TraceCheckUtils]: 2: Hoare triple {1648#true} assume true; {1648#true} is VALID [2018-11-23 11:25:11,169 INFO L273 TraceCheckUtils]: 1: Hoare triple {1648#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {1648#true} is VALID [2018-11-23 11:25:11,170 INFO L256 TraceCheckUtils]: 0: Hoare triple {1648#true} call ULTIMATE.init(); {1648#true} is VALID [2018-11-23 11:25:11,173 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 11:25:11,175 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:11,177 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 11:25:11,177 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-11-23 11:25:11,178 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:11,178 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 11:25:11,405 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:11,405 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 11:25:11,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 11:25:11,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-23 11:25:11,406 INFO L87 Difference]: Start difference. First operand 44 states and 51 transitions. Second operand 12 states. [2018-11-23 11:25:12,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:12,908 INFO L93 Difference]: Finished difference Result 72 states and 85 transitions. [2018-11-23 11:25:12,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 11:25:12,908 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 32 [2018-11-23 11:25:12,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:12,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 11:25:12,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 78 transitions. [2018-11-23 11:25:12,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 11:25:12,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 78 transitions. [2018-11-23 11:25:12,913 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 78 transitions. [2018-11-23 11:25:13,253 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:13,255 INFO L225 Difference]: With dead ends: 72 [2018-11-23 11:25:13,255 INFO L226 Difference]: Without dead ends: 50 [2018-11-23 11:25:13,256 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-11-23 11:25:13,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-11-23 11:25:13,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 47. [2018-11-23 11:25:13,300 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:13,300 INFO L82 GeneralOperation]: Start isEquivalent. First operand 50 states. Second operand 47 states. [2018-11-23 11:25:13,301 INFO L74 IsIncluded]: Start isIncluded. First operand 50 states. Second operand 47 states. [2018-11-23 11:25:13,301 INFO L87 Difference]: Start difference. First operand 50 states. Second operand 47 states. [2018-11-23 11:25:13,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:13,302 INFO L93 Difference]: Finished difference Result 50 states and 58 transitions. [2018-11-23 11:25:13,303 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 58 transitions. [2018-11-23 11:25:13,303 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:13,303 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:13,303 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand 50 states. [2018-11-23 11:25:13,303 INFO L87 Difference]: Start difference. First operand 47 states. Second operand 50 states. [2018-11-23 11:25:13,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:13,306 INFO L93 Difference]: Finished difference Result 50 states and 58 transitions. [2018-11-23 11:25:13,306 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 58 transitions. [2018-11-23 11:25:13,306 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:13,306 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:13,307 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:13,307 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:13,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-11-23 11:25:13,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 54 transitions. [2018-11-23 11:25:13,309 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 54 transitions. Word has length 32 [2018-11-23 11:25:13,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:13,309 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 54 transitions. [2018-11-23 11:25:13,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 11:25:13,310 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 54 transitions. [2018-11-23 11:25:13,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-23 11:25:13,310 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:13,311 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:13,311 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:13,311 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:13,311 INFO L82 PathProgramCache]: Analyzing trace with hash -2009239660, now seen corresponding path program 2 times [2018-11-23 11:25:13,312 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:13,312 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:13,337 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:25:13,409 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-11-23 11:25:13,410 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:25:13,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:13,445 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:13,568 INFO L256 TraceCheckUtils]: 0: Hoare triple {2113#true} call ULTIMATE.init(); {2113#true} is VALID [2018-11-23 11:25:13,569 INFO L273 TraceCheckUtils]: 1: Hoare triple {2113#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {2113#true} is VALID [2018-11-23 11:25:13,569 INFO L273 TraceCheckUtils]: 2: Hoare triple {2113#true} assume true; {2113#true} is VALID [2018-11-23 11:25:13,569 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2113#true} {2113#true} #103#return; {2113#true} is VALID [2018-11-23 11:25:13,569 INFO L256 TraceCheckUtils]: 4: Hoare triple {2113#true} call #t~ret18 := main(); {2113#true} is VALID [2018-11-23 11:25:13,572 INFO L273 TraceCheckUtils]: 5: Hoare triple {2113#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,572 INFO L273 TraceCheckUtils]: 6: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,573 INFO L273 TraceCheckUtils]: 7: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,573 INFO L273 TraceCheckUtils]: 8: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,574 INFO L273 TraceCheckUtils]: 9: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,580 INFO L273 TraceCheckUtils]: 10: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,581 INFO L273 TraceCheckUtils]: 11: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,581 INFO L273 TraceCheckUtils]: 12: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,582 INFO L273 TraceCheckUtils]: 13: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,582 INFO L273 TraceCheckUtils]: 14: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,582 INFO L273 TraceCheckUtils]: 15: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,583 INFO L273 TraceCheckUtils]: 16: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,583 INFO L273 TraceCheckUtils]: 17: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,588 INFO L273 TraceCheckUtils]: 18: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,589 INFO L273 TraceCheckUtils]: 19: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,589 INFO L273 TraceCheckUtils]: 20: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,590 INFO L273 TraceCheckUtils]: 21: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,591 INFO L273 TraceCheckUtils]: 22: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} ~i~0 := 0bv32; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,593 INFO L273 TraceCheckUtils]: 23: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,597 INFO L273 TraceCheckUtils]: 24: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~j~0, ~edgecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,598 INFO L273 TraceCheckUtils]: 25: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,599 INFO L273 TraceCheckUtils]: 26: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {2133#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:13,601 INFO L273 TraceCheckUtils]: 27: Hoare triple {2133#(= (_ bv20 32) main_~edgecount~0)} ~i~0 := 0bv32; {2200#(and (= (_ bv20 32) main_~edgecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:13,603 INFO L273 TraceCheckUtils]: 28: Hoare triple {2200#(and (= (_ bv20 32) main_~edgecount~0) (= main_~i~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~edgecount~0); {2114#false} is VALID [2018-11-23 11:25:13,603 INFO L273 TraceCheckUtils]: 29: Hoare triple {2114#false} ~i~0 := 0bv32; {2114#false} is VALID [2018-11-23 11:25:13,603 INFO L273 TraceCheckUtils]: 30: Hoare triple {2114#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2114#false} is VALID [2018-11-23 11:25:13,604 INFO L256 TraceCheckUtils]: 31: Hoare triple {2114#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {2114#false} is VALID [2018-11-23 11:25:13,604 INFO L273 TraceCheckUtils]: 32: Hoare triple {2114#false} ~cond := #in~cond; {2114#false} is VALID [2018-11-23 11:25:13,604 INFO L273 TraceCheckUtils]: 33: Hoare triple {2114#false} assume 0bv32 == ~cond; {2114#false} is VALID [2018-11-23 11:25:13,604 INFO L273 TraceCheckUtils]: 34: Hoare triple {2114#false} assume !false; {2114#false} is VALID [2018-11-23 11:25:13,606 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 11:25:13,606 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:25:13,612 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:25:13,612 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 11:25:13,612 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2018-11-23 11:25:13,613 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:13,613 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 11:25:13,648 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:13,648 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 11:25:13,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 11:25:13,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 11:25:13,649 INFO L87 Difference]: Start difference. First operand 47 states and 54 transitions. Second operand 4 states. [2018-11-23 11:25:14,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:14,222 INFO L93 Difference]: Finished difference Result 69 states and 80 transitions. [2018-11-23 11:25:14,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 11:25:14,222 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2018-11-23 11:25:14,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:14,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 11:25:14,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 66 transitions. [2018-11-23 11:25:14,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 11:25:14,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 66 transitions. [2018-11-23 11:25:14,227 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 66 transitions. [2018-11-23 11:25:14,340 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:14,341 INFO L225 Difference]: With dead ends: 69 [2018-11-23 11:25:14,341 INFO L226 Difference]: Without dead ends: 58 [2018-11-23 11:25:14,342 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 11:25:14,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-11-23 11:25:14,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 48. [2018-11-23 11:25:14,441 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:14,442 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand 48 states. [2018-11-23 11:25:14,442 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand 48 states. [2018-11-23 11:25:14,442 INFO L87 Difference]: Start difference. First operand 58 states. Second operand 48 states. [2018-11-23 11:25:14,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:14,446 INFO L93 Difference]: Finished difference Result 58 states and 68 transitions. [2018-11-23 11:25:14,446 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 68 transitions. [2018-11-23 11:25:14,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:14,447 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:14,447 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 58 states. [2018-11-23 11:25:14,447 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 58 states. [2018-11-23 11:25:14,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:14,450 INFO L93 Difference]: Finished difference Result 58 states and 68 transitions. [2018-11-23 11:25:14,450 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 68 transitions. [2018-11-23 11:25:14,450 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:14,451 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:14,451 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:14,451 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:14,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 11:25:14,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 55 transitions. [2018-11-23 11:25:14,453 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 55 transitions. Word has length 35 [2018-11-23 11:25:14,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:14,454 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 55 transitions. [2018-11-23 11:25:14,454 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 11:25:14,454 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 55 transitions. [2018-11-23 11:25:14,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 11:25:14,455 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:14,455 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:14,455 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:14,455 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:14,456 INFO L82 PathProgramCache]: Analyzing trace with hash -1981498469, now seen corresponding path program 1 times [2018-11-23 11:25:14,456 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:14,456 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:14,478 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 11:25:14,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:14,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:14,547 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:14,659 INFO L256 TraceCheckUtils]: 0: Hoare triple {2498#true} call ULTIMATE.init(); {2498#true} is VALID [2018-11-23 11:25:14,659 INFO L273 TraceCheckUtils]: 1: Hoare triple {2498#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {2498#true} is VALID [2018-11-23 11:25:14,659 INFO L273 TraceCheckUtils]: 2: Hoare triple {2498#true} assume true; {2498#true} is VALID [2018-11-23 11:25:14,660 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2498#true} {2498#true} #103#return; {2498#true} is VALID [2018-11-23 11:25:14,660 INFO L256 TraceCheckUtils]: 4: Hoare triple {2498#true} call #t~ret18 := main(); {2498#true} is VALID [2018-11-23 11:25:14,664 INFO L273 TraceCheckUtils]: 5: Hoare triple {2498#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {2518#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,664 INFO L273 TraceCheckUtils]: 6: Hoare triple {2518#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {2518#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,665 INFO L273 TraceCheckUtils]: 7: Hoare triple {2518#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2518#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,666 INFO L273 TraceCheckUtils]: 8: Hoare triple {2518#(and (= main_~i~0 (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2528#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:14,666 INFO L273 TraceCheckUtils]: 9: Hoare triple {2528#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {2528#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:14,667 INFO L273 TraceCheckUtils]: 10: Hoare triple {2528#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2528#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:14,668 INFO L273 TraceCheckUtils]: 11: Hoare triple {2528#(and (= main_~source~0 (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2538#(and (= main_~source~0 (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:25:14,685 INFO L273 TraceCheckUtils]: 12: Hoare triple {2538#(and (= main_~source~0 (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2538#(and (= main_~source~0 (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:25:14,699 INFO L273 TraceCheckUtils]: 13: Hoare triple {2538#(and (= main_~source~0 (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2538#(and (= main_~source~0 (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:25:14,713 INFO L273 TraceCheckUtils]: 14: Hoare triple {2538#(and (= main_~source~0 (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2548#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,725 INFO L273 TraceCheckUtils]: 15: Hoare triple {2548#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {2548#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,726 INFO L273 TraceCheckUtils]: 16: Hoare triple {2548#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2548#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,730 INFO L273 TraceCheckUtils]: 17: Hoare triple {2548#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= main_~source~0 (_ bv0 32)))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2558#(and (= (_ bv4 32) main_~i~0) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,730 INFO L273 TraceCheckUtils]: 18: Hoare triple {2558#(and (= (_ bv4 32) main_~i~0) (= main_~source~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0); {2558#(and (= (_ bv4 32) main_~i~0) (= main_~source~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:14,731 INFO L273 TraceCheckUtils]: 19: Hoare triple {2558#(and (= (_ bv4 32) main_~i~0) (= main_~source~0 (_ bv0 32)))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2499#false} is VALID [2018-11-23 11:25:14,731 INFO L273 TraceCheckUtils]: 20: Hoare triple {2499#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2499#false} is VALID [2018-11-23 11:25:14,731 INFO L273 TraceCheckUtils]: 21: Hoare triple {2499#false} assume !~bvslt32(~i~0, ~nodecount~0); {2499#false} is VALID [2018-11-23 11:25:14,731 INFO L273 TraceCheckUtils]: 22: Hoare triple {2499#false} ~i~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,731 INFO L273 TraceCheckUtils]: 23: Hoare triple {2499#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,732 INFO L273 TraceCheckUtils]: 24: Hoare triple {2499#false} assume !~bvslt32(~j~0, ~edgecount~0); {2499#false} is VALID [2018-11-23 11:25:14,732 INFO L273 TraceCheckUtils]: 25: Hoare triple {2499#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2499#false} is VALID [2018-11-23 11:25:14,732 INFO L273 TraceCheckUtils]: 26: Hoare triple {2499#false} assume !~bvslt32(~i~0, ~nodecount~0); {2499#false} is VALID [2018-11-23 11:25:14,732 INFO L273 TraceCheckUtils]: 27: Hoare triple {2499#false} ~i~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,732 INFO L273 TraceCheckUtils]: 28: Hoare triple {2499#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2499#false} is VALID [2018-11-23 11:25:14,733 INFO L273 TraceCheckUtils]: 29: Hoare triple {2499#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {2499#false} is VALID [2018-11-23 11:25:14,733 INFO L273 TraceCheckUtils]: 30: Hoare triple {2499#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {2499#false} is VALID [2018-11-23 11:25:14,733 INFO L273 TraceCheckUtils]: 31: Hoare triple {2499#false} assume !~bvslt32(~i~0, ~edgecount~0); {2499#false} is VALID [2018-11-23 11:25:14,733 INFO L273 TraceCheckUtils]: 32: Hoare triple {2499#false} ~i~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,733 INFO L273 TraceCheckUtils]: 33: Hoare triple {2499#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2499#false} is VALID [2018-11-23 11:25:14,733 INFO L256 TraceCheckUtils]: 34: Hoare triple {2499#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {2499#false} is VALID [2018-11-23 11:25:14,734 INFO L273 TraceCheckUtils]: 35: Hoare triple {2499#false} ~cond := #in~cond; {2499#false} is VALID [2018-11-23 11:25:14,734 INFO L273 TraceCheckUtils]: 36: Hoare triple {2499#false} assume 0bv32 == ~cond; {2499#false} is VALID [2018-11-23 11:25:14,734 INFO L273 TraceCheckUtils]: 37: Hoare triple {2499#false} assume !false; {2499#false} is VALID [2018-11-23 11:25:14,736 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 9 proven. 26 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 11:25:14,736 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:14,950 INFO L273 TraceCheckUtils]: 37: Hoare triple {2499#false} assume !false; {2499#false} is VALID [2018-11-23 11:25:14,951 INFO L273 TraceCheckUtils]: 36: Hoare triple {2499#false} assume 0bv32 == ~cond; {2499#false} is VALID [2018-11-23 11:25:14,951 INFO L273 TraceCheckUtils]: 35: Hoare triple {2499#false} ~cond := #in~cond; {2499#false} is VALID [2018-11-23 11:25:14,951 INFO L256 TraceCheckUtils]: 34: Hoare triple {2499#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {2499#false} is VALID [2018-11-23 11:25:14,951 INFO L273 TraceCheckUtils]: 33: Hoare triple {2499#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2499#false} is VALID [2018-11-23 11:25:14,951 INFO L273 TraceCheckUtils]: 32: Hoare triple {2499#false} ~i~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,952 INFO L273 TraceCheckUtils]: 31: Hoare triple {2499#false} assume !~bvslt32(~i~0, ~edgecount~0); {2499#false} is VALID [2018-11-23 11:25:14,952 INFO L273 TraceCheckUtils]: 30: Hoare triple {2499#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {2499#false} is VALID [2018-11-23 11:25:14,952 INFO L273 TraceCheckUtils]: 29: Hoare triple {2499#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {2499#false} is VALID [2018-11-23 11:25:14,952 INFO L273 TraceCheckUtils]: 28: Hoare triple {2499#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2499#false} is VALID [2018-11-23 11:25:14,952 INFO L273 TraceCheckUtils]: 27: Hoare triple {2499#false} ~i~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,953 INFO L273 TraceCheckUtils]: 26: Hoare triple {2499#false} assume !~bvslt32(~i~0, ~nodecount~0); {2499#false} is VALID [2018-11-23 11:25:14,953 INFO L273 TraceCheckUtils]: 25: Hoare triple {2499#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {2499#false} is VALID [2018-11-23 11:25:14,953 INFO L273 TraceCheckUtils]: 24: Hoare triple {2499#false} assume !~bvslt32(~j~0, ~edgecount~0); {2499#false} is VALID [2018-11-23 11:25:14,953 INFO L273 TraceCheckUtils]: 23: Hoare triple {2499#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,953 INFO L273 TraceCheckUtils]: 22: Hoare triple {2499#false} ~i~0 := 0bv32; {2499#false} is VALID [2018-11-23 11:25:14,954 INFO L273 TraceCheckUtils]: 21: Hoare triple {2499#false} assume !~bvslt32(~i~0, ~nodecount~0); {2499#false} is VALID [2018-11-23 11:25:14,954 INFO L273 TraceCheckUtils]: 20: Hoare triple {2499#false} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2499#false} is VALID [2018-11-23 11:25:14,958 INFO L273 TraceCheckUtils]: 19: Hoare triple {2673#(not (= main_~source~0 main_~i~0))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2499#false} is VALID [2018-11-23 11:25:14,958 INFO L273 TraceCheckUtils]: 18: Hoare triple {2673#(not (= main_~source~0 main_~i~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2673#(not (= main_~source~0 main_~i~0))} is VALID [2018-11-23 11:25:14,971 INFO L273 TraceCheckUtils]: 17: Hoare triple {2680#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2673#(not (= main_~source~0 main_~i~0))} is VALID [2018-11-23 11:25:14,972 INFO L273 TraceCheckUtils]: 16: Hoare triple {2680#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2680#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} is VALID [2018-11-23 11:25:14,972 INFO L273 TraceCheckUtils]: 15: Hoare triple {2680#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2680#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} is VALID [2018-11-23 11:25:14,991 INFO L273 TraceCheckUtils]: 14: Hoare triple {2690#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~source~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2680#(not (= (bvadd main_~i~0 (_ bv1 32)) main_~source~0))} is VALID [2018-11-23 11:25:14,992 INFO L273 TraceCheckUtils]: 13: Hoare triple {2690#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~source~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2690#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~source~0))} is VALID [2018-11-23 11:25:14,992 INFO L273 TraceCheckUtils]: 12: Hoare triple {2690#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~source~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2690#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~source~0))} is VALID [2018-11-23 11:25:15,006 INFO L273 TraceCheckUtils]: 11: Hoare triple {2700#(not (= (bvadd main_~source~0 (_ bv4294967293 32)) main_~i~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2690#(not (= (bvadd main_~i~0 (_ bv2 32)) main_~source~0))} is VALID [2018-11-23 11:25:15,007 INFO L273 TraceCheckUtils]: 10: Hoare triple {2700#(not (= (bvadd main_~source~0 (_ bv4294967293 32)) main_~i~0))} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2700#(not (= (bvadd main_~source~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 11:25:15,007 INFO L273 TraceCheckUtils]: 9: Hoare triple {2700#(not (= (bvadd main_~source~0 (_ bv4294967293 32)) main_~i~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2700#(not (= (bvadd main_~source~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 11:25:15,036 INFO L273 TraceCheckUtils]: 8: Hoare triple {2710#(not (= (bvadd main_~i~0 (_ bv4 32)) main_~source~0))} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {2700#(not (= (bvadd main_~source~0 (_ bv4294967293 32)) main_~i~0))} is VALID [2018-11-23 11:25:15,037 INFO L273 TraceCheckUtils]: 7: Hoare triple {2710#(not (= (bvadd main_~i~0 (_ bv4 32)) main_~source~0))} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {2710#(not (= (bvadd main_~i~0 (_ bv4 32)) main_~source~0))} is VALID [2018-11-23 11:25:15,037 INFO L273 TraceCheckUtils]: 6: Hoare triple {2710#(not (= (bvadd main_~i~0 (_ bv4 32)) main_~source~0))} assume !!~bvslt32(~i~0, ~nodecount~0); {2710#(not (= (bvadd main_~i~0 (_ bv4 32)) main_~source~0))} is VALID [2018-11-23 11:25:15,054 INFO L273 TraceCheckUtils]: 5: Hoare triple {2498#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {2710#(not (= (bvadd main_~i~0 (_ bv4 32)) main_~source~0))} is VALID [2018-11-23 11:25:15,054 INFO L256 TraceCheckUtils]: 4: Hoare triple {2498#true} call #t~ret18 := main(); {2498#true} is VALID [2018-11-23 11:25:15,055 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2498#true} {2498#true} #103#return; {2498#true} is VALID [2018-11-23 11:25:15,055 INFO L273 TraceCheckUtils]: 2: Hoare triple {2498#true} assume true; {2498#true} is VALID [2018-11-23 11:25:15,055 INFO L273 TraceCheckUtils]: 1: Hoare triple {2498#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {2498#true} is VALID [2018-11-23 11:25:15,055 INFO L256 TraceCheckUtils]: 0: Hoare triple {2498#true} call ULTIMATE.init(); {2498#true} is VALID [2018-11-23 11:25:15,056 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 9 proven. 26 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 11:25:15,058 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:15,058 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 11:25:15,059 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-11-23 11:25:15,059 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:15,059 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 11:25:15,208 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:15,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 11:25:15,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 11:25:15,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-11-23 11:25:15,209 INFO L87 Difference]: Start difference. First operand 48 states and 55 transitions. Second operand 12 states. [2018-11-23 11:25:16,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:16,797 INFO L93 Difference]: Finished difference Result 98 states and 123 transitions. [2018-11-23 11:25:16,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 11:25:16,797 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2018-11-23 11:25:16,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:16,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 11:25:16,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 112 transitions. [2018-11-23 11:25:16,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 11:25:16,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 112 transitions. [2018-11-23 11:25:16,803 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 112 transitions. [2018-11-23 11:25:17,358 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:17,360 INFO L225 Difference]: With dead ends: 98 [2018-11-23 11:25:17,360 INFO L226 Difference]: Without dead ends: 69 [2018-11-23 11:25:17,361 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=101, Invalid=171, Unknown=0, NotChecked=0, Total=272 [2018-11-23 11:25:17,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-11-23 11:25:17,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 61. [2018-11-23 11:25:17,585 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:17,586 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand 61 states. [2018-11-23 11:25:17,586 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand 61 states. [2018-11-23 11:25:17,586 INFO L87 Difference]: Start difference. First operand 69 states. Second operand 61 states. [2018-11-23 11:25:17,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:17,589 INFO L93 Difference]: Finished difference Result 69 states and 81 transitions. [2018-11-23 11:25:17,589 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 81 transitions. [2018-11-23 11:25:17,590 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:17,590 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:17,590 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand 69 states. [2018-11-23 11:25:17,590 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 69 states. [2018-11-23 11:25:17,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:17,593 INFO L93 Difference]: Finished difference Result 69 states and 81 transitions. [2018-11-23 11:25:17,593 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 81 transitions. [2018-11-23 11:25:17,593 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:17,594 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:17,594 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:17,594 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:17,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-11-23 11:25:17,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 72 transitions. [2018-11-23 11:25:17,596 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 72 transitions. Word has length 38 [2018-11-23 11:25:17,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:17,596 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 72 transitions. [2018-11-23 11:25:17,596 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 11:25:17,597 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 72 transitions. [2018-11-23 11:25:17,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 11:25:17,597 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:17,597 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:17,598 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:17,598 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:17,598 INFO L82 PathProgramCache]: Analyzing trace with hash 624525085, now seen corresponding path program 2 times [2018-11-23 11:25:17,598 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:17,599 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:17,628 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:25:17,956 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 11:25:17,957 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:25:18,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:18,017 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:18,220 INFO L256 TraceCheckUtils]: 0: Hoare triple {3101#true} call ULTIMATE.init(); {3101#true} is VALID [2018-11-23 11:25:18,220 INFO L273 TraceCheckUtils]: 1: Hoare triple {3101#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {3101#true} is VALID [2018-11-23 11:25:18,221 INFO L273 TraceCheckUtils]: 2: Hoare triple {3101#true} assume true; {3101#true} is VALID [2018-11-23 11:25:18,221 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3101#true} {3101#true} #103#return; {3101#true} is VALID [2018-11-23 11:25:18,221 INFO L256 TraceCheckUtils]: 4: Hoare triple {3101#true} call #t~ret18 := main(); {3101#true} is VALID [2018-11-23 11:25:18,224 INFO L273 TraceCheckUtils]: 5: Hoare triple {3101#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,225 INFO L273 TraceCheckUtils]: 6: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,225 INFO L273 TraceCheckUtils]: 7: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,226 INFO L273 TraceCheckUtils]: 8: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,226 INFO L273 TraceCheckUtils]: 9: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,227 INFO L273 TraceCheckUtils]: 10: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,228 INFO L273 TraceCheckUtils]: 11: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,228 INFO L273 TraceCheckUtils]: 12: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,229 INFO L273 TraceCheckUtils]: 13: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,230 INFO L273 TraceCheckUtils]: 14: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,230 INFO L273 TraceCheckUtils]: 15: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,231 INFO L273 TraceCheckUtils]: 16: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,232 INFO L273 TraceCheckUtils]: 17: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,232 INFO L273 TraceCheckUtils]: 18: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,233 INFO L273 TraceCheckUtils]: 19: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,234 INFO L273 TraceCheckUtils]: 20: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,234 INFO L273 TraceCheckUtils]: 21: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,235 INFO L273 TraceCheckUtils]: 22: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} ~i~0 := 0bv32; {3121#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:18,236 INFO L273 TraceCheckUtils]: 23: Hoare triple {3121#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {3176#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:18,236 INFO L273 TraceCheckUtils]: 24: Hoare triple {3176#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !~bvslt32(~j~0, ~edgecount~0); {3102#false} is VALID [2018-11-23 11:25:18,237 INFO L273 TraceCheckUtils]: 25: Hoare triple {3102#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3102#false} is VALID [2018-11-23 11:25:18,237 INFO L273 TraceCheckUtils]: 26: Hoare triple {3102#false} assume !~bvslt32(~i~0, ~nodecount~0); {3102#false} is VALID [2018-11-23 11:25:18,237 INFO L273 TraceCheckUtils]: 27: Hoare triple {3102#false} ~i~0 := 0bv32; {3102#false} is VALID [2018-11-23 11:25:18,237 INFO L273 TraceCheckUtils]: 28: Hoare triple {3102#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3102#false} is VALID [2018-11-23 11:25:18,238 INFO L273 TraceCheckUtils]: 29: Hoare triple {3102#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {3102#false} is VALID [2018-11-23 11:25:18,238 INFO L273 TraceCheckUtils]: 30: Hoare triple {3102#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {3102#false} is VALID [2018-11-23 11:25:18,238 INFO L273 TraceCheckUtils]: 31: Hoare triple {3102#false} assume !~bvslt32(~i~0, ~edgecount~0); {3102#false} is VALID [2018-11-23 11:25:18,238 INFO L273 TraceCheckUtils]: 32: Hoare triple {3102#false} ~i~0 := 0bv32; {3102#false} is VALID [2018-11-23 11:25:18,239 INFO L273 TraceCheckUtils]: 33: Hoare triple {3102#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3102#false} is VALID [2018-11-23 11:25:18,239 INFO L256 TraceCheckUtils]: 34: Hoare triple {3102#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {3102#false} is VALID [2018-11-23 11:25:18,239 INFO L273 TraceCheckUtils]: 35: Hoare triple {3102#false} ~cond := #in~cond; {3102#false} is VALID [2018-11-23 11:25:18,239 INFO L273 TraceCheckUtils]: 36: Hoare triple {3102#false} assume 0bv32 == ~cond; {3102#false} is VALID [2018-11-23 11:25:18,240 INFO L273 TraceCheckUtils]: 37: Hoare triple {3102#false} assume !false; {3102#false} is VALID [2018-11-23 11:25:18,241 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 11:25:18,241 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:25:18,243 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:25:18,243 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 11:25:18,244 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2018-11-23 11:25:18,244 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:18,244 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 11:25:18,284 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:18,284 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 11:25:18,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 11:25:18,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 11:25:18,284 INFO L87 Difference]: Start difference. First operand 61 states and 72 transitions. Second operand 4 states. [2018-11-23 11:25:18,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:18,677 INFO L93 Difference]: Finished difference Result 85 states and 102 transitions. [2018-11-23 11:25:18,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 11:25:18,677 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 38 [2018-11-23 11:25:18,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:18,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 11:25:18,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 65 transitions. [2018-11-23 11:25:18,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 11:25:18,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 65 transitions. [2018-11-23 11:25:18,681 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 65 transitions. [2018-11-23 11:25:18,813 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:18,814 INFO L225 Difference]: With dead ends: 85 [2018-11-23 11:25:18,814 INFO L226 Difference]: Without dead ends: 64 [2018-11-23 11:25:18,814 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 11:25:18,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-11-23 11:25:18,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2018-11-23 11:25:18,908 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:18,908 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand 62 states. [2018-11-23 11:25:18,909 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand 62 states. [2018-11-23 11:25:18,909 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 62 states. [2018-11-23 11:25:18,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:18,912 INFO L93 Difference]: Finished difference Result 64 states and 76 transitions. [2018-11-23 11:25:18,912 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 76 transitions. [2018-11-23 11:25:18,913 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:18,913 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:18,913 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 64 states. [2018-11-23 11:25:18,913 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 64 states. [2018-11-23 11:25:18,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:18,922 INFO L93 Difference]: Finished difference Result 64 states and 76 transitions. [2018-11-23 11:25:18,922 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 76 transitions. [2018-11-23 11:25:18,922 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:18,922 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:18,923 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:18,923 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:18,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-11-23 11:25:18,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 73 transitions. [2018-11-23 11:25:18,928 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 73 transitions. Word has length 38 [2018-11-23 11:25:18,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:18,929 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 73 transitions. [2018-11-23 11:25:18,929 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 11:25:18,929 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 73 transitions. [2018-11-23 11:25:18,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-23 11:25:18,929 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:18,930 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:18,930 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:18,930 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:18,930 INFO L82 PathProgramCache]: Analyzing trace with hash 532811753, now seen corresponding path program 1 times [2018-11-23 11:25:18,931 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:18,931 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:18,959 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 11:25:19,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:19,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:19,095 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:19,186 INFO L256 TraceCheckUtils]: 0: Hoare triple {3548#true} call ULTIMATE.init(); {3548#true} is VALID [2018-11-23 11:25:19,186 INFO L273 TraceCheckUtils]: 1: Hoare triple {3548#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {3548#true} is VALID [2018-11-23 11:25:19,186 INFO L273 TraceCheckUtils]: 2: Hoare triple {3548#true} assume true; {3548#true} is VALID [2018-11-23 11:25:19,187 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3548#true} {3548#true} #103#return; {3548#true} is VALID [2018-11-23 11:25:19,187 INFO L256 TraceCheckUtils]: 4: Hoare triple {3548#true} call #t~ret18 := main(); {3548#true} is VALID [2018-11-23 11:25:19,191 INFO L273 TraceCheckUtils]: 5: Hoare triple {3548#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,193 INFO L273 TraceCheckUtils]: 6: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,193 INFO L273 TraceCheckUtils]: 7: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,195 INFO L273 TraceCheckUtils]: 8: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,195 INFO L273 TraceCheckUtils]: 9: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,197 INFO L273 TraceCheckUtils]: 10: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,197 INFO L273 TraceCheckUtils]: 11: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,199 INFO L273 TraceCheckUtils]: 12: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,199 INFO L273 TraceCheckUtils]: 13: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,202 INFO L273 TraceCheckUtils]: 14: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,202 INFO L273 TraceCheckUtils]: 15: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,202 INFO L273 TraceCheckUtils]: 16: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,203 INFO L273 TraceCheckUtils]: 17: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,203 INFO L273 TraceCheckUtils]: 18: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,203 INFO L273 TraceCheckUtils]: 19: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,204 INFO L273 TraceCheckUtils]: 20: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,204 INFO L273 TraceCheckUtils]: 21: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,204 INFO L273 TraceCheckUtils]: 22: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} ~i~0 := 0bv32; {3568#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,205 INFO L273 TraceCheckUtils]: 23: Hoare triple {3568#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {3623#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:19,205 INFO L273 TraceCheckUtils]: 24: Hoare triple {3623#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3623#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:19,206 INFO L273 TraceCheckUtils]: 25: Hoare triple {3623#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {3623#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:19,207 INFO L273 TraceCheckUtils]: 26: Hoare triple {3623#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3633#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:19,208 INFO L273 TraceCheckUtils]: 27: Hoare triple {3633#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~j~0, ~edgecount~0); {3549#false} is VALID [2018-11-23 11:25:19,208 INFO L273 TraceCheckUtils]: 28: Hoare triple {3549#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3549#false} is VALID [2018-11-23 11:25:19,208 INFO L273 TraceCheckUtils]: 29: Hoare triple {3549#false} assume !~bvslt32(~i~0, ~nodecount~0); {3549#false} is VALID [2018-11-23 11:25:19,209 INFO L273 TraceCheckUtils]: 30: Hoare triple {3549#false} ~i~0 := 0bv32; {3549#false} is VALID [2018-11-23 11:25:19,209 INFO L273 TraceCheckUtils]: 31: Hoare triple {3549#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3549#false} is VALID [2018-11-23 11:25:19,209 INFO L273 TraceCheckUtils]: 32: Hoare triple {3549#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {3549#false} is VALID [2018-11-23 11:25:19,209 INFO L273 TraceCheckUtils]: 33: Hoare triple {3549#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {3549#false} is VALID [2018-11-23 11:25:19,210 INFO L273 TraceCheckUtils]: 34: Hoare triple {3549#false} assume !~bvslt32(~i~0, ~edgecount~0); {3549#false} is VALID [2018-11-23 11:25:19,210 INFO L273 TraceCheckUtils]: 35: Hoare triple {3549#false} ~i~0 := 0bv32; {3549#false} is VALID [2018-11-23 11:25:19,210 INFO L273 TraceCheckUtils]: 36: Hoare triple {3549#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3549#false} is VALID [2018-11-23 11:25:19,210 INFO L256 TraceCheckUtils]: 37: Hoare triple {3549#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {3549#false} is VALID [2018-11-23 11:25:19,210 INFO L273 TraceCheckUtils]: 38: Hoare triple {3549#false} ~cond := #in~cond; {3549#false} is VALID [2018-11-23 11:25:19,211 INFO L273 TraceCheckUtils]: 39: Hoare triple {3549#false} assume 0bv32 == ~cond; {3549#false} is VALID [2018-11-23 11:25:19,211 INFO L273 TraceCheckUtils]: 40: Hoare triple {3549#false} assume !false; {3549#false} is VALID [2018-11-23 11:25:19,212 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 11:25:19,212 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:19,316 INFO L273 TraceCheckUtils]: 40: Hoare triple {3549#false} assume !false; {3549#false} is VALID [2018-11-23 11:25:19,316 INFO L273 TraceCheckUtils]: 39: Hoare triple {3549#false} assume 0bv32 == ~cond; {3549#false} is VALID [2018-11-23 11:25:19,316 INFO L273 TraceCheckUtils]: 38: Hoare triple {3549#false} ~cond := #in~cond; {3549#false} is VALID [2018-11-23 11:25:19,316 INFO L256 TraceCheckUtils]: 37: Hoare triple {3549#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {3549#false} is VALID [2018-11-23 11:25:19,316 INFO L273 TraceCheckUtils]: 36: Hoare triple {3549#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3549#false} is VALID [2018-11-23 11:25:19,317 INFO L273 TraceCheckUtils]: 35: Hoare triple {3549#false} ~i~0 := 0bv32; {3549#false} is VALID [2018-11-23 11:25:19,317 INFO L273 TraceCheckUtils]: 34: Hoare triple {3549#false} assume !~bvslt32(~i~0, ~edgecount~0); {3549#false} is VALID [2018-11-23 11:25:19,317 INFO L273 TraceCheckUtils]: 33: Hoare triple {3549#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {3549#false} is VALID [2018-11-23 11:25:19,317 INFO L273 TraceCheckUtils]: 32: Hoare triple {3549#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {3549#false} is VALID [2018-11-23 11:25:19,317 INFO L273 TraceCheckUtils]: 31: Hoare triple {3549#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3549#false} is VALID [2018-11-23 11:25:19,318 INFO L273 TraceCheckUtils]: 30: Hoare triple {3549#false} ~i~0 := 0bv32; {3549#false} is VALID [2018-11-23 11:25:19,318 INFO L273 TraceCheckUtils]: 29: Hoare triple {3549#false} assume !~bvslt32(~i~0, ~nodecount~0); {3549#false} is VALID [2018-11-23 11:25:19,318 INFO L273 TraceCheckUtils]: 28: Hoare triple {3549#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {3549#false} is VALID [2018-11-23 11:25:19,324 INFO L273 TraceCheckUtils]: 27: Hoare triple {3715#(bvslt main_~j~0 main_~edgecount~0)} assume !~bvslt32(~j~0, ~edgecount~0); {3549#false} is VALID [2018-11-23 11:25:19,325 INFO L273 TraceCheckUtils]: 26: Hoare triple {3719#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3715#(bvslt main_~j~0 main_~edgecount~0)} is VALID [2018-11-23 11:25:19,325 INFO L273 TraceCheckUtils]: 25: Hoare triple {3719#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {3719#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,326 INFO L273 TraceCheckUtils]: 24: Hoare triple {3719#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {3719#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,326 INFO L273 TraceCheckUtils]: 23: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {3719#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,326 INFO L273 TraceCheckUtils]: 22: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} ~i~0 := 0bv32; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,327 INFO L273 TraceCheckUtils]: 21: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,327 INFO L273 TraceCheckUtils]: 20: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,328 INFO L273 TraceCheckUtils]: 19: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,328 INFO L273 TraceCheckUtils]: 18: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,328 INFO L273 TraceCheckUtils]: 17: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,329 INFO L273 TraceCheckUtils]: 16: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,329 INFO L273 TraceCheckUtils]: 15: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,330 INFO L273 TraceCheckUtils]: 14: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,330 INFO L273 TraceCheckUtils]: 13: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,331 INFO L273 TraceCheckUtils]: 12: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,332 INFO L273 TraceCheckUtils]: 11: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,332 INFO L273 TraceCheckUtils]: 10: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,333 INFO L273 TraceCheckUtils]: 9: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,334 INFO L273 TraceCheckUtils]: 8: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,334 INFO L273 TraceCheckUtils]: 7: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,335 INFO L273 TraceCheckUtils]: 6: Hoare triple {3729#(bvslt (_ bv1 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,339 INFO L273 TraceCheckUtils]: 5: Hoare triple {3548#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {3729#(bvslt (_ bv1 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:19,339 INFO L256 TraceCheckUtils]: 4: Hoare triple {3548#true} call #t~ret18 := main(); {3548#true} is VALID [2018-11-23 11:25:19,340 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3548#true} {3548#true} #103#return; {3548#true} is VALID [2018-11-23 11:25:19,340 INFO L273 TraceCheckUtils]: 2: Hoare triple {3548#true} assume true; {3548#true} is VALID [2018-11-23 11:25:19,340 INFO L273 TraceCheckUtils]: 1: Hoare triple {3548#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {3548#true} is VALID [2018-11-23 11:25:19,340 INFO L256 TraceCheckUtils]: 0: Hoare triple {3548#true} call ULTIMATE.init(); {3548#true} is VALID [2018-11-23 11:25:19,342 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 11:25:19,344 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:19,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-23 11:25:19,346 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2018-11-23 11:25:19,346 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:19,346 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 11:25:19,416 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:19,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 11:25:19,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 11:25:19,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 11:25:19,416 INFO L87 Difference]: Start difference. First operand 62 states and 73 transitions. Second operand 8 states. [2018-11-23 11:25:20,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:20,027 INFO L93 Difference]: Finished difference Result 93 states and 114 transitions. [2018-11-23 11:25:20,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 11:25:20,028 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2018-11-23 11:25:20,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:20,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 11:25:20,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 76 transitions. [2018-11-23 11:25:20,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 11:25:20,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 76 transitions. [2018-11-23 11:25:20,032 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 76 transitions. [2018-11-23 11:25:20,195 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:20,197 INFO L225 Difference]: With dead ends: 93 [2018-11-23 11:25:20,197 INFO L226 Difference]: Without dead ends: 71 [2018-11-23 11:25:20,198 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-11-23 11:25:20,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-11-23 11:25:20,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-11-23 11:25:20,300 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:20,300 INFO L82 GeneralOperation]: Start isEquivalent. First operand 71 states. Second operand 71 states. [2018-11-23 11:25:20,300 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand 71 states. [2018-11-23 11:25:20,300 INFO L87 Difference]: Start difference. First operand 71 states. Second operand 71 states. [2018-11-23 11:25:20,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:20,303 INFO L93 Difference]: Finished difference Result 71 states and 85 transitions. [2018-11-23 11:25:20,303 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 85 transitions. [2018-11-23 11:25:20,303 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:20,303 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:20,303 INFO L74 IsIncluded]: Start isIncluded. First operand 71 states. Second operand 71 states. [2018-11-23 11:25:20,303 INFO L87 Difference]: Start difference. First operand 71 states. Second operand 71 states. [2018-11-23 11:25:20,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:20,305 INFO L93 Difference]: Finished difference Result 71 states and 85 transitions. [2018-11-23 11:25:20,305 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 85 transitions. [2018-11-23 11:25:20,306 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:20,306 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:20,306 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:20,306 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:20,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-11-23 11:25:20,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 85 transitions. [2018-11-23 11:25:20,308 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 85 transitions. Word has length 41 [2018-11-23 11:25:20,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:20,308 INFO L480 AbstractCegarLoop]: Abstraction has 71 states and 85 transitions. [2018-11-23 11:25:20,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 11:25:20,309 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 85 transitions. [2018-11-23 11:25:20,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-23 11:25:20,309 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:20,309 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:20,310 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:20,310 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:20,310 INFO L82 PathProgramCache]: Analyzing trace with hash -268462051, now seen corresponding path program 2 times [2018-11-23 11:25:20,310 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:20,311 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:20,337 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:25:20,614 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 11:25:20,614 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:25:20,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:20,731 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:20,961 INFO L256 TraceCheckUtils]: 0: Hoare triple {4173#true} call ULTIMATE.init(); {4173#true} is VALID [2018-11-23 11:25:20,961 INFO L273 TraceCheckUtils]: 1: Hoare triple {4173#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {4173#true} is VALID [2018-11-23 11:25:20,962 INFO L273 TraceCheckUtils]: 2: Hoare triple {4173#true} assume true; {4173#true} is VALID [2018-11-23 11:25:20,962 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4173#true} {4173#true} #103#return; {4173#true} is VALID [2018-11-23 11:25:20,962 INFO L256 TraceCheckUtils]: 4: Hoare triple {4173#true} call #t~ret18 := main(); {4173#true} is VALID [2018-11-23 11:25:20,966 INFO L273 TraceCheckUtils]: 5: Hoare triple {4173#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,966 INFO L273 TraceCheckUtils]: 6: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,967 INFO L273 TraceCheckUtils]: 7: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,967 INFO L273 TraceCheckUtils]: 8: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,968 INFO L273 TraceCheckUtils]: 9: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,969 INFO L273 TraceCheckUtils]: 10: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,969 INFO L273 TraceCheckUtils]: 11: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,970 INFO L273 TraceCheckUtils]: 12: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,971 INFO L273 TraceCheckUtils]: 13: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,971 INFO L273 TraceCheckUtils]: 14: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,972 INFO L273 TraceCheckUtils]: 15: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,973 INFO L273 TraceCheckUtils]: 16: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,973 INFO L273 TraceCheckUtils]: 17: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,974 INFO L273 TraceCheckUtils]: 18: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,975 INFO L273 TraceCheckUtils]: 19: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,975 INFO L273 TraceCheckUtils]: 20: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,976 INFO L273 TraceCheckUtils]: 21: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,976 INFO L273 TraceCheckUtils]: 22: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} ~i~0 := 0bv32; {4193#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:20,977 INFO L273 TraceCheckUtils]: 23: Hoare triple {4193#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {4248#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:20,979 INFO L273 TraceCheckUtils]: 24: Hoare triple {4248#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4248#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:20,980 INFO L273 TraceCheckUtils]: 25: Hoare triple {4248#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4248#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:20,981 INFO L273 TraceCheckUtils]: 26: Hoare triple {4248#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4258#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,982 INFO L273 TraceCheckUtils]: 27: Hoare triple {4258#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4258#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,983 INFO L273 TraceCheckUtils]: 28: Hoare triple {4258#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4258#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,984 INFO L273 TraceCheckUtils]: 29: Hoare triple {4258#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4268#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:20,985 INFO L273 TraceCheckUtils]: 30: Hoare triple {4268#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4268#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:20,987 INFO L273 TraceCheckUtils]: 31: Hoare triple {4268#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4268#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:20,988 INFO L273 TraceCheckUtils]: 32: Hoare triple {4268#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4278#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,989 INFO L273 TraceCheckUtils]: 33: Hoare triple {4278#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4278#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,991 INFO L273 TraceCheckUtils]: 34: Hoare triple {4278#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4278#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,992 INFO L273 TraceCheckUtils]: 35: Hoare triple {4278#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4288#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:20,992 INFO L273 TraceCheckUtils]: 36: Hoare triple {4288#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !~bvslt32(~j~0, ~edgecount~0); {4174#false} is VALID [2018-11-23 11:25:20,993 INFO L273 TraceCheckUtils]: 37: Hoare triple {4174#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {4174#false} is VALID [2018-11-23 11:25:20,993 INFO L273 TraceCheckUtils]: 38: Hoare triple {4174#false} assume !~bvslt32(~i~0, ~nodecount~0); {4174#false} is VALID [2018-11-23 11:25:20,993 INFO L273 TraceCheckUtils]: 39: Hoare triple {4174#false} ~i~0 := 0bv32; {4174#false} is VALID [2018-11-23 11:25:20,994 INFO L273 TraceCheckUtils]: 40: Hoare triple {4174#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4174#false} is VALID [2018-11-23 11:25:20,994 INFO L273 TraceCheckUtils]: 41: Hoare triple {4174#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {4174#false} is VALID [2018-11-23 11:25:20,994 INFO L273 TraceCheckUtils]: 42: Hoare triple {4174#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {4174#false} is VALID [2018-11-23 11:25:20,994 INFO L273 TraceCheckUtils]: 43: Hoare triple {4174#false} assume !~bvslt32(~i~0, ~edgecount~0); {4174#false} is VALID [2018-11-23 11:25:20,995 INFO L273 TraceCheckUtils]: 44: Hoare triple {4174#false} ~i~0 := 0bv32; {4174#false} is VALID [2018-11-23 11:25:20,995 INFO L273 TraceCheckUtils]: 45: Hoare triple {4174#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4174#false} is VALID [2018-11-23 11:25:20,995 INFO L256 TraceCheckUtils]: 46: Hoare triple {4174#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {4174#false} is VALID [2018-11-23 11:25:20,996 INFO L273 TraceCheckUtils]: 47: Hoare triple {4174#false} ~cond := #in~cond; {4174#false} is VALID [2018-11-23 11:25:20,996 INFO L273 TraceCheckUtils]: 48: Hoare triple {4174#false} assume 0bv32 == ~cond; {4174#false} is VALID [2018-11-23 11:25:20,996 INFO L273 TraceCheckUtils]: 49: Hoare triple {4174#false} assume !false; {4174#false} is VALID [2018-11-23 11:25:21,002 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 11:25:21,003 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:21,300 INFO L273 TraceCheckUtils]: 49: Hoare triple {4174#false} assume !false; {4174#false} is VALID [2018-11-23 11:25:21,301 INFO L273 TraceCheckUtils]: 48: Hoare triple {4174#false} assume 0bv32 == ~cond; {4174#false} is VALID [2018-11-23 11:25:21,301 INFO L273 TraceCheckUtils]: 47: Hoare triple {4174#false} ~cond := #in~cond; {4174#false} is VALID [2018-11-23 11:25:21,302 INFO L256 TraceCheckUtils]: 46: Hoare triple {4174#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {4174#false} is VALID [2018-11-23 11:25:21,302 INFO L273 TraceCheckUtils]: 45: Hoare triple {4174#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4174#false} is VALID [2018-11-23 11:25:21,303 INFO L273 TraceCheckUtils]: 44: Hoare triple {4174#false} ~i~0 := 0bv32; {4174#false} is VALID [2018-11-23 11:25:21,303 INFO L273 TraceCheckUtils]: 43: Hoare triple {4174#false} assume !~bvslt32(~i~0, ~edgecount~0); {4174#false} is VALID [2018-11-23 11:25:21,303 INFO L273 TraceCheckUtils]: 42: Hoare triple {4174#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {4174#false} is VALID [2018-11-23 11:25:21,303 INFO L273 TraceCheckUtils]: 41: Hoare triple {4174#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {4174#false} is VALID [2018-11-23 11:25:21,303 INFO L273 TraceCheckUtils]: 40: Hoare triple {4174#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4174#false} is VALID [2018-11-23 11:25:21,304 INFO L273 TraceCheckUtils]: 39: Hoare triple {4174#false} ~i~0 := 0bv32; {4174#false} is VALID [2018-11-23 11:25:21,304 INFO L273 TraceCheckUtils]: 38: Hoare triple {4174#false} assume !~bvslt32(~i~0, ~nodecount~0); {4174#false} is VALID [2018-11-23 11:25:21,304 INFO L273 TraceCheckUtils]: 37: Hoare triple {4174#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {4174#false} is VALID [2018-11-23 11:25:21,304 INFO L273 TraceCheckUtils]: 36: Hoare triple {4370#(bvslt main_~j~0 main_~edgecount~0)} assume !~bvslt32(~j~0, ~edgecount~0); {4174#false} is VALID [2018-11-23 11:25:21,305 INFO L273 TraceCheckUtils]: 35: Hoare triple {4374#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4370#(bvslt main_~j~0 main_~edgecount~0)} is VALID [2018-11-23 11:25:21,305 INFO L273 TraceCheckUtils]: 34: Hoare triple {4374#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4374#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,306 INFO L273 TraceCheckUtils]: 33: Hoare triple {4374#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4374#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,336 INFO L273 TraceCheckUtils]: 32: Hoare triple {4384#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4374#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,336 INFO L273 TraceCheckUtils]: 31: Hoare triple {4384#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4384#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,337 INFO L273 TraceCheckUtils]: 30: Hoare triple {4384#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4384#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,368 INFO L273 TraceCheckUtils]: 29: Hoare triple {4394#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4384#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,369 INFO L273 TraceCheckUtils]: 28: Hoare triple {4394#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4394#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,370 INFO L273 TraceCheckUtils]: 27: Hoare triple {4394#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4394#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,392 INFO L273 TraceCheckUtils]: 26: Hoare triple {4404#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4394#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,393 INFO L273 TraceCheckUtils]: 25: Hoare triple {4404#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {4404#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,393 INFO L273 TraceCheckUtils]: 24: Hoare triple {4404#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {4404#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,393 INFO L273 TraceCheckUtils]: 23: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {4404#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,394 INFO L273 TraceCheckUtils]: 22: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} ~i~0 := 0bv32; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,394 INFO L273 TraceCheckUtils]: 21: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,395 INFO L273 TraceCheckUtils]: 20: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,395 INFO L273 TraceCheckUtils]: 19: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,396 INFO L273 TraceCheckUtils]: 18: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,396 INFO L273 TraceCheckUtils]: 17: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,397 INFO L273 TraceCheckUtils]: 16: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,398 INFO L273 TraceCheckUtils]: 15: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,398 INFO L273 TraceCheckUtils]: 14: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,399 INFO L273 TraceCheckUtils]: 13: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,399 INFO L273 TraceCheckUtils]: 12: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,400 INFO L273 TraceCheckUtils]: 11: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,401 INFO L273 TraceCheckUtils]: 10: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,401 INFO L273 TraceCheckUtils]: 9: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,402 INFO L273 TraceCheckUtils]: 8: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,403 INFO L273 TraceCheckUtils]: 7: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,403 INFO L273 TraceCheckUtils]: 6: Hoare triple {4414#(bvslt (_ bv4 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,408 INFO L273 TraceCheckUtils]: 5: Hoare triple {4173#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {4414#(bvslt (_ bv4 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:21,408 INFO L256 TraceCheckUtils]: 4: Hoare triple {4173#true} call #t~ret18 := main(); {4173#true} is VALID [2018-11-23 11:25:21,409 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4173#true} {4173#true} #103#return; {4173#true} is VALID [2018-11-23 11:25:21,409 INFO L273 TraceCheckUtils]: 2: Hoare triple {4173#true} assume true; {4173#true} is VALID [2018-11-23 11:25:21,409 INFO L273 TraceCheckUtils]: 1: Hoare triple {4173#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {4173#true} is VALID [2018-11-23 11:25:21,409 INFO L256 TraceCheckUtils]: 0: Hoare triple {4173#true} call ULTIMATE.init(); {4173#true} is VALID [2018-11-23 11:25:21,414 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-11-23 11:25:21,416 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:21,416 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 [2018-11-23 11:25:21,417 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 50 [2018-11-23 11:25:21,417 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:21,417 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 11:25:21,631 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:21,631 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 11:25:21,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 11:25:21,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-11-23 11:25:21,632 INFO L87 Difference]: Start difference. First operand 71 states and 85 transitions. Second operand 14 states. [2018-11-23 11:25:23,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:23,806 INFO L93 Difference]: Finished difference Result 120 states and 153 transitions. [2018-11-23 11:25:23,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 11:25:23,806 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 50 [2018-11-23 11:25:23,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:23,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 11:25:23,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 103 transitions. [2018-11-23 11:25:23,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 11:25:23,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 103 transitions. [2018-11-23 11:25:23,810 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 103 transitions. [2018-11-23 11:25:24,063 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:24,065 INFO L225 Difference]: With dead ends: 120 [2018-11-23 11:25:24,065 INFO L226 Difference]: Without dead ends: 89 [2018-11-23 11:25:24,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=131, Invalid=211, Unknown=0, NotChecked=0, Total=342 [2018-11-23 11:25:24,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-11-23 11:25:24,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-11-23 11:25:24,157 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:24,157 INFO L82 GeneralOperation]: Start isEquivalent. First operand 89 states. Second operand 89 states. [2018-11-23 11:25:24,157 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand 89 states. [2018-11-23 11:25:24,157 INFO L87 Difference]: Start difference. First operand 89 states. Second operand 89 states. [2018-11-23 11:25:24,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:24,161 INFO L93 Difference]: Finished difference Result 89 states and 109 transitions. [2018-11-23 11:25:24,161 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 109 transitions. [2018-11-23 11:25:24,161 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:24,161 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:24,161 INFO L74 IsIncluded]: Start isIncluded. First operand 89 states. Second operand 89 states. [2018-11-23 11:25:24,161 INFO L87 Difference]: Start difference. First operand 89 states. Second operand 89 states. [2018-11-23 11:25:24,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:24,164 INFO L93 Difference]: Finished difference Result 89 states and 109 transitions. [2018-11-23 11:25:24,164 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 109 transitions. [2018-11-23 11:25:24,164 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:24,164 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:24,164 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:24,165 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:24,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-11-23 11:25:24,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 109 transitions. [2018-11-23 11:25:24,167 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 109 transitions. Word has length 50 [2018-11-23 11:25:24,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:24,167 INFO L480 AbstractCegarLoop]: Abstraction has 89 states and 109 transitions. [2018-11-23 11:25:24,167 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 11:25:24,167 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 109 transitions. [2018-11-23 11:25:24,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-11-23 11:25:24,168 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:24,168 INFO L402 BasicCegarLoop]: trace histogram [10, 10, 10, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:24,169 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:24,169 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:24,169 INFO L82 PathProgramCache]: Analyzing trace with hash 485322141, now seen corresponding path program 3 times [2018-11-23 11:25:24,169 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:24,170 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:24,198 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 11:25:24,530 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-11-23 11:25:24,530 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:25:24,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:24,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:24,871 INFO L256 TraceCheckUtils]: 0: Hoare triple {4960#true} call ULTIMATE.init(); {4960#true} is VALID [2018-11-23 11:25:24,872 INFO L273 TraceCheckUtils]: 1: Hoare triple {4960#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {4960#true} is VALID [2018-11-23 11:25:24,872 INFO L273 TraceCheckUtils]: 2: Hoare triple {4960#true} assume true; {4960#true} is VALID [2018-11-23 11:25:24,872 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4960#true} {4960#true} #103#return; {4960#true} is VALID [2018-11-23 11:25:24,873 INFO L256 TraceCheckUtils]: 4: Hoare triple {4960#true} call #t~ret18 := main(); {4960#true} is VALID [2018-11-23 11:25:24,876 INFO L273 TraceCheckUtils]: 5: Hoare triple {4960#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,877 INFO L273 TraceCheckUtils]: 6: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,878 INFO L273 TraceCheckUtils]: 7: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,878 INFO L273 TraceCheckUtils]: 8: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,879 INFO L273 TraceCheckUtils]: 9: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,879 INFO L273 TraceCheckUtils]: 10: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,880 INFO L273 TraceCheckUtils]: 11: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,880 INFO L273 TraceCheckUtils]: 12: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,881 INFO L273 TraceCheckUtils]: 13: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,881 INFO L273 TraceCheckUtils]: 14: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,882 INFO L273 TraceCheckUtils]: 15: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,882 INFO L273 TraceCheckUtils]: 16: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,883 INFO L273 TraceCheckUtils]: 17: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,884 INFO L273 TraceCheckUtils]: 18: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,884 INFO L273 TraceCheckUtils]: 19: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,885 INFO L273 TraceCheckUtils]: 20: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,885 INFO L273 TraceCheckUtils]: 21: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {4980#(= (_ bv5 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:24,886 INFO L273 TraceCheckUtils]: 22: Hoare triple {4980#(= (_ bv5 32) main_~nodecount~0)} ~i~0 := 0bv32; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,887 INFO L273 TraceCheckUtils]: 23: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,888 INFO L273 TraceCheckUtils]: 24: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,889 INFO L273 TraceCheckUtils]: 25: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,889 INFO L273 TraceCheckUtils]: 26: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,890 INFO L273 TraceCheckUtils]: 27: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,891 INFO L273 TraceCheckUtils]: 28: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,892 INFO L273 TraceCheckUtils]: 29: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,893 INFO L273 TraceCheckUtils]: 30: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,894 INFO L273 TraceCheckUtils]: 31: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,895 INFO L273 TraceCheckUtils]: 32: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,896 INFO L273 TraceCheckUtils]: 33: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,897 INFO L273 TraceCheckUtils]: 34: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,898 INFO L273 TraceCheckUtils]: 35: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,899 INFO L273 TraceCheckUtils]: 36: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,899 INFO L273 TraceCheckUtils]: 37: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,900 INFO L273 TraceCheckUtils]: 38: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,901 INFO L273 TraceCheckUtils]: 39: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,902 INFO L273 TraceCheckUtils]: 40: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,903 INFO L273 TraceCheckUtils]: 41: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,904 INFO L273 TraceCheckUtils]: 42: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,905 INFO L273 TraceCheckUtils]: 43: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,906 INFO L273 TraceCheckUtils]: 44: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,907 INFO L273 TraceCheckUtils]: 45: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,908 INFO L273 TraceCheckUtils]: 46: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,908 INFO L273 TraceCheckUtils]: 47: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,909 INFO L273 TraceCheckUtils]: 48: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,910 INFO L273 TraceCheckUtils]: 49: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,911 INFO L273 TraceCheckUtils]: 50: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,912 INFO L273 TraceCheckUtils]: 51: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,913 INFO L273 TraceCheckUtils]: 52: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,914 INFO L273 TraceCheckUtils]: 53: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,914 INFO L273 TraceCheckUtils]: 54: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} assume !~bvslt32(~j~0, ~edgecount~0); {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:25:24,915 INFO L273 TraceCheckUtils]: 55: Hoare triple {5032#(and (= (_ bv5 32) main_~nodecount~0) (= main_~i~0 (_ bv0 32)))} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5132#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:24,916 INFO L273 TraceCheckUtils]: 56: Hoare triple {5132#(and (= (_ bv5 32) main_~nodecount~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~nodecount~0); {4961#false} is VALID [2018-11-23 11:25:24,916 INFO L273 TraceCheckUtils]: 57: Hoare triple {4961#false} ~i~0 := 0bv32; {4961#false} is VALID [2018-11-23 11:25:24,916 INFO L273 TraceCheckUtils]: 58: Hoare triple {4961#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4961#false} is VALID [2018-11-23 11:25:24,916 INFO L273 TraceCheckUtils]: 59: Hoare triple {4961#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {4961#false} is VALID [2018-11-23 11:25:24,917 INFO L273 TraceCheckUtils]: 60: Hoare triple {4961#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {4961#false} is VALID [2018-11-23 11:25:24,917 INFO L273 TraceCheckUtils]: 61: Hoare triple {4961#false} assume !~bvslt32(~i~0, ~edgecount~0); {4961#false} is VALID [2018-11-23 11:25:24,917 INFO L273 TraceCheckUtils]: 62: Hoare triple {4961#false} ~i~0 := 0bv32; {4961#false} is VALID [2018-11-23 11:25:24,917 INFO L273 TraceCheckUtils]: 63: Hoare triple {4961#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4961#false} is VALID [2018-11-23 11:25:24,918 INFO L256 TraceCheckUtils]: 64: Hoare triple {4961#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {4961#false} is VALID [2018-11-23 11:25:24,918 INFO L273 TraceCheckUtils]: 65: Hoare triple {4961#false} ~cond := #in~cond; {4961#false} is VALID [2018-11-23 11:25:24,918 INFO L273 TraceCheckUtils]: 66: Hoare triple {4961#false} assume 0bv32 == ~cond; {4961#false} is VALID [2018-11-23 11:25:24,918 INFO L273 TraceCheckUtils]: 67: Hoare triple {4961#false} assume !false; {4961#false} is VALID [2018-11-23 11:25:24,924 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2018-11-23 11:25:24,924 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:25,037 INFO L273 TraceCheckUtils]: 67: Hoare triple {4961#false} assume !false; {4961#false} is VALID [2018-11-23 11:25:25,037 INFO L273 TraceCheckUtils]: 66: Hoare triple {4961#false} assume 0bv32 == ~cond; {4961#false} is VALID [2018-11-23 11:25:25,037 INFO L273 TraceCheckUtils]: 65: Hoare triple {4961#false} ~cond := #in~cond; {4961#false} is VALID [2018-11-23 11:25:25,037 INFO L256 TraceCheckUtils]: 64: Hoare triple {4961#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {4961#false} is VALID [2018-11-23 11:25:25,037 INFO L273 TraceCheckUtils]: 63: Hoare triple {4961#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4961#false} is VALID [2018-11-23 11:25:25,037 INFO L273 TraceCheckUtils]: 62: Hoare triple {4961#false} ~i~0 := 0bv32; {4961#false} is VALID [2018-11-23 11:25:25,038 INFO L273 TraceCheckUtils]: 61: Hoare triple {4961#false} assume !~bvslt32(~i~0, ~edgecount~0); {4961#false} is VALID [2018-11-23 11:25:25,038 INFO L273 TraceCheckUtils]: 60: Hoare triple {4961#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {4961#false} is VALID [2018-11-23 11:25:25,038 INFO L273 TraceCheckUtils]: 59: Hoare triple {4961#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {4961#false} is VALID [2018-11-23 11:25:25,038 INFO L273 TraceCheckUtils]: 58: Hoare triple {4961#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {4961#false} is VALID [2018-11-23 11:25:25,038 INFO L273 TraceCheckUtils]: 57: Hoare triple {4961#false} ~i~0 := 0bv32; {4961#false} is VALID [2018-11-23 11:25:25,038 INFO L273 TraceCheckUtils]: 56: Hoare triple {5202#(bvslt main_~i~0 main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {4961#false} is VALID [2018-11-23 11:25:25,040 INFO L273 TraceCheckUtils]: 55: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {5202#(bvslt main_~i~0 main_~nodecount~0)} is VALID [2018-11-23 11:25:25,040 INFO L273 TraceCheckUtils]: 54: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !~bvslt32(~j~0, ~edgecount~0); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,040 INFO L273 TraceCheckUtils]: 53: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,041 INFO L273 TraceCheckUtils]: 52: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,041 INFO L273 TraceCheckUtils]: 51: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,041 INFO L273 TraceCheckUtils]: 50: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,042 INFO L273 TraceCheckUtils]: 49: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,042 INFO L273 TraceCheckUtils]: 48: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,042 INFO L273 TraceCheckUtils]: 47: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,043 INFO L273 TraceCheckUtils]: 46: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,043 INFO L273 TraceCheckUtils]: 45: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,043 INFO L273 TraceCheckUtils]: 44: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,044 INFO L273 TraceCheckUtils]: 43: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,044 INFO L273 TraceCheckUtils]: 42: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,044 INFO L273 TraceCheckUtils]: 41: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,045 INFO L273 TraceCheckUtils]: 40: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,045 INFO L273 TraceCheckUtils]: 39: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,046 INFO L273 TraceCheckUtils]: 38: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,047 INFO L273 TraceCheckUtils]: 37: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,047 INFO L273 TraceCheckUtils]: 36: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,048 INFO L273 TraceCheckUtils]: 35: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,068 INFO L273 TraceCheckUtils]: 34: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,071 INFO L273 TraceCheckUtils]: 33: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,072 INFO L273 TraceCheckUtils]: 32: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,072 INFO L273 TraceCheckUtils]: 31: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,072 INFO L273 TraceCheckUtils]: 30: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,073 INFO L273 TraceCheckUtils]: 29: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,073 INFO L273 TraceCheckUtils]: 28: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,073 INFO L273 TraceCheckUtils]: 27: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,074 INFO L273 TraceCheckUtils]: 26: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,074 INFO L273 TraceCheckUtils]: 25: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,074 INFO L273 TraceCheckUtils]: 24: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,075 INFO L273 TraceCheckUtils]: 23: Hoare triple {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,075 INFO L273 TraceCheckUtils]: 22: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} ~i~0 := 0bv32; {5206#(bvslt (bvadd main_~i~0 (_ bv1 32)) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,076 INFO L273 TraceCheckUtils]: 21: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,076 INFO L273 TraceCheckUtils]: 20: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,077 INFO L273 TraceCheckUtils]: 19: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,077 INFO L273 TraceCheckUtils]: 18: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,078 INFO L273 TraceCheckUtils]: 17: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,079 INFO L273 TraceCheckUtils]: 16: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,079 INFO L273 TraceCheckUtils]: 15: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,080 INFO L273 TraceCheckUtils]: 14: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,080 INFO L273 TraceCheckUtils]: 13: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,081 INFO L273 TraceCheckUtils]: 12: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,081 INFO L273 TraceCheckUtils]: 11: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,082 INFO L273 TraceCheckUtils]: 10: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,082 INFO L273 TraceCheckUtils]: 9: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,083 INFO L273 TraceCheckUtils]: 8: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,083 INFO L273 TraceCheckUtils]: 7: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,084 INFO L273 TraceCheckUtils]: 6: Hoare triple {5306#(bvslt (_ bv1 32) main_~nodecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,088 INFO L273 TraceCheckUtils]: 5: Hoare triple {4960#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {5306#(bvslt (_ bv1 32) main_~nodecount~0)} is VALID [2018-11-23 11:25:25,089 INFO L256 TraceCheckUtils]: 4: Hoare triple {4960#true} call #t~ret18 := main(); {4960#true} is VALID [2018-11-23 11:25:25,089 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4960#true} {4960#true} #103#return; {4960#true} is VALID [2018-11-23 11:25:25,089 INFO L273 TraceCheckUtils]: 2: Hoare triple {4960#true} assume true; {4960#true} is VALID [2018-11-23 11:25:25,089 INFO L273 TraceCheckUtils]: 1: Hoare triple {4960#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {4960#true} is VALID [2018-11-23 11:25:25,090 INFO L256 TraceCheckUtils]: 0: Hoare triple {4960#true} call ULTIMATE.init(); {4960#true} is VALID [2018-11-23 11:25:25,094 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2018-11-23 11:25:25,099 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:25,099 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-23 11:25:25,099 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 68 [2018-11-23 11:25:25,100 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:25,100 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 11:25:25,187 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:25,187 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 11:25:25,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 11:25:25,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-23 11:25:25,188 INFO L87 Difference]: Start difference. First operand 89 states and 109 transitions. Second operand 8 states. [2018-11-23 11:25:26,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:26,575 INFO L93 Difference]: Finished difference Result 231 states and 294 transitions. [2018-11-23 11:25:26,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 11:25:26,575 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 68 [2018-11-23 11:25:26,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:26,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 11:25:26,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 121 transitions. [2018-11-23 11:25:26,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 11:25:26,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 121 transitions. [2018-11-23 11:25:26,581 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 121 transitions. [2018-11-23 11:25:26,816 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 121 edges. 121 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:26,823 INFO L225 Difference]: With dead ends: 231 [2018-11-23 11:25:26,823 INFO L226 Difference]: Without dead ends: 215 [2018-11-23 11:25:26,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 129 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-11-23 11:25:26,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-11-23 11:25:27,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 188. [2018-11-23 11:25:27,054 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:27,054 INFO L82 GeneralOperation]: Start isEquivalent. First operand 215 states. Second operand 188 states. [2018-11-23 11:25:27,054 INFO L74 IsIncluded]: Start isIncluded. First operand 215 states. Second operand 188 states. [2018-11-23 11:25:27,054 INFO L87 Difference]: Start difference. First operand 215 states. Second operand 188 states. [2018-11-23 11:25:27,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:27,060 INFO L93 Difference]: Finished difference Result 215 states and 274 transitions. [2018-11-23 11:25:27,060 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 274 transitions. [2018-11-23 11:25:27,061 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:27,061 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:27,062 INFO L74 IsIncluded]: Start isIncluded. First operand 188 states. Second operand 215 states. [2018-11-23 11:25:27,062 INFO L87 Difference]: Start difference. First operand 188 states. Second operand 215 states. [2018-11-23 11:25:27,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:27,068 INFO L93 Difference]: Finished difference Result 215 states and 274 transitions. [2018-11-23 11:25:27,068 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 274 transitions. [2018-11-23 11:25:27,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:27,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:27,069 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:27,069 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:27,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-11-23 11:25:27,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 241 transitions. [2018-11-23 11:25:27,074 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 241 transitions. Word has length 68 [2018-11-23 11:25:27,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:27,075 INFO L480 AbstractCegarLoop]: Abstraction has 188 states and 241 transitions. [2018-11-23 11:25:27,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 11:25:27,075 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 241 transitions. [2018-11-23 11:25:27,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-11-23 11:25:27,077 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:27,077 INFO L402 BasicCegarLoop]: trace histogram [40, 40, 40, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:27,078 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:27,078 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:27,078 INFO L82 PathProgramCache]: Analyzing trace with hash 253880176, now seen corresponding path program 4 times [2018-11-23 11:25:27,079 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:27,079 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:27,107 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 11:25:27,775 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 11:25:27,776 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:25:28,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:25:28,098 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:25:28,430 INFO L256 TraceCheckUtils]: 0: Hoare triple {6381#true} call ULTIMATE.init(); {6381#true} is VALID [2018-11-23 11:25:28,430 INFO L273 TraceCheckUtils]: 1: Hoare triple {6381#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {6381#true} is VALID [2018-11-23 11:25:28,430 INFO L273 TraceCheckUtils]: 2: Hoare triple {6381#true} assume true; {6381#true} is VALID [2018-11-23 11:25:28,431 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6381#true} {6381#true} #103#return; {6381#true} is VALID [2018-11-23 11:25:28,431 INFO L256 TraceCheckUtils]: 4: Hoare triple {6381#true} call #t~ret18 := main(); {6381#true} is VALID [2018-11-23 11:25:28,433 INFO L273 TraceCheckUtils]: 5: Hoare triple {6381#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,434 INFO L273 TraceCheckUtils]: 6: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,434 INFO L273 TraceCheckUtils]: 7: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,434 INFO L273 TraceCheckUtils]: 8: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,435 INFO L273 TraceCheckUtils]: 9: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,436 INFO L273 TraceCheckUtils]: 10: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,436 INFO L273 TraceCheckUtils]: 11: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,437 INFO L273 TraceCheckUtils]: 12: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,437 INFO L273 TraceCheckUtils]: 13: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,438 INFO L273 TraceCheckUtils]: 14: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,438 INFO L273 TraceCheckUtils]: 15: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,439 INFO L273 TraceCheckUtils]: 16: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,439 INFO L273 TraceCheckUtils]: 17: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,440 INFO L273 TraceCheckUtils]: 18: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,440 INFO L273 TraceCheckUtils]: 19: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,441 INFO L273 TraceCheckUtils]: 20: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,441 INFO L273 TraceCheckUtils]: 21: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,442 INFO L273 TraceCheckUtils]: 22: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} ~i~0 := 0bv32; {6401#(= (_ bv20 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:28,443 INFO L273 TraceCheckUtils]: 23: Hoare triple {6401#(= (_ bv20 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6456#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,444 INFO L273 TraceCheckUtils]: 24: Hoare triple {6456#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6456#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,445 INFO L273 TraceCheckUtils]: 25: Hoare triple {6456#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6456#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,446 INFO L273 TraceCheckUtils]: 26: Hoare triple {6456#(and (= main_~j~0 (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6466#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,454 INFO L273 TraceCheckUtils]: 27: Hoare triple {6466#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6466#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,455 INFO L273 TraceCheckUtils]: 28: Hoare triple {6466#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6466#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,455 INFO L273 TraceCheckUtils]: 29: Hoare triple {6466#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6476#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,456 INFO L273 TraceCheckUtils]: 30: Hoare triple {6476#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6476#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,457 INFO L273 TraceCheckUtils]: 31: Hoare triple {6476#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6476#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,457 INFO L273 TraceCheckUtils]: 32: Hoare triple {6476#(and (= (bvadd main_~j~0 (_ bv4294967294 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6486#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,458 INFO L273 TraceCheckUtils]: 33: Hoare triple {6486#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6486#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,459 INFO L273 TraceCheckUtils]: 34: Hoare triple {6486#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6486#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,460 INFO L273 TraceCheckUtils]: 35: Hoare triple {6486#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967293 32)) (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6496#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,461 INFO L273 TraceCheckUtils]: 36: Hoare triple {6496#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6496#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,462 INFO L273 TraceCheckUtils]: 37: Hoare triple {6496#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6496#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,463 INFO L273 TraceCheckUtils]: 38: Hoare triple {6496#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967292 32)) (_ bv0 32)))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6506#(and (= (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,464 INFO L273 TraceCheckUtils]: 39: Hoare triple {6506#(and (= (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6506#(and (= (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,465 INFO L273 TraceCheckUtils]: 40: Hoare triple {6506#(and (= (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6506#(and (= (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,466 INFO L273 TraceCheckUtils]: 41: Hoare triple {6506#(and (= (bvadd main_~j~0 (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6516#(and (= (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,467 INFO L273 TraceCheckUtils]: 42: Hoare triple {6516#(and (= (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6516#(and (= (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,468 INFO L273 TraceCheckUtils]: 43: Hoare triple {6516#(and (= (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6516#(and (= (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,469 INFO L273 TraceCheckUtils]: 44: Hoare triple {6516#(and (= (bvadd main_~j~0 (_ bv4294967290 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6526#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv7 32) main_~j~0))} is VALID [2018-11-23 11:25:28,470 INFO L273 TraceCheckUtils]: 45: Hoare triple {6526#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv7 32) main_~j~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6526#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv7 32) main_~j~0))} is VALID [2018-11-23 11:25:28,471 INFO L273 TraceCheckUtils]: 46: Hoare triple {6526#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv7 32) main_~j~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6526#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv7 32) main_~j~0))} is VALID [2018-11-23 11:25:28,472 INFO L273 TraceCheckUtils]: 47: Hoare triple {6526#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv7 32) main_~j~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6536#(and (= (bvadd main_~j~0 (_ bv4294967288 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,473 INFO L273 TraceCheckUtils]: 48: Hoare triple {6536#(and (= (bvadd main_~j~0 (_ bv4294967288 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6536#(and (= (bvadd main_~j~0 (_ bv4294967288 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,498 INFO L273 TraceCheckUtils]: 49: Hoare triple {6536#(and (= (bvadd main_~j~0 (_ bv4294967288 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6536#(and (= (bvadd main_~j~0 (_ bv4294967288 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} is VALID [2018-11-23 11:25:28,513 INFO L273 TraceCheckUtils]: 50: Hoare triple {6536#(and (= (bvadd main_~j~0 (_ bv4294967288 32)) (_ bv0 32)) (= (_ bv20 32) main_~edgecount~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6546#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv9 32) main_~j~0))} is VALID [2018-11-23 11:25:28,528 INFO L273 TraceCheckUtils]: 51: Hoare triple {6546#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv9 32) main_~j~0))} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6546#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv9 32) main_~j~0))} is VALID [2018-11-23 11:25:28,532 INFO L273 TraceCheckUtils]: 52: Hoare triple {6546#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv9 32) main_~j~0))} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6546#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv9 32) main_~j~0))} is VALID [2018-11-23 11:25:28,534 INFO L273 TraceCheckUtils]: 53: Hoare triple {6546#(and (= (_ bv20 32) main_~edgecount~0) (= (_ bv9 32) main_~j~0))} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6556#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967286 32)) (_ bv0 32)))} is VALID [2018-11-23 11:25:28,534 INFO L273 TraceCheckUtils]: 54: Hoare triple {6556#(and (= (_ bv20 32) main_~edgecount~0) (= (bvadd main_~j~0 (_ bv4294967286 32)) (_ bv0 32)))} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:28,534 INFO L273 TraceCheckUtils]: 55: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:28,534 INFO L273 TraceCheckUtils]: 56: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 57: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 58: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 59: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 60: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 61: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 62: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 63: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,535 INFO L273 TraceCheckUtils]: 64: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 65: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 66: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 67: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 68: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 69: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 70: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,536 INFO L273 TraceCheckUtils]: 71: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,537 INFO L273 TraceCheckUtils]: 72: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,539 INFO L273 TraceCheckUtils]: 73: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,539 INFO L273 TraceCheckUtils]: 74: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,539 INFO L273 TraceCheckUtils]: 75: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,539 INFO L273 TraceCheckUtils]: 76: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,540 INFO L273 TraceCheckUtils]: 77: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,540 INFO L273 TraceCheckUtils]: 78: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,540 INFO L273 TraceCheckUtils]: 79: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,540 INFO L273 TraceCheckUtils]: 80: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,540 INFO L273 TraceCheckUtils]: 81: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,540 INFO L273 TraceCheckUtils]: 82: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,541 INFO L273 TraceCheckUtils]: 83: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,541 INFO L273 TraceCheckUtils]: 84: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,541 INFO L273 TraceCheckUtils]: 85: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,541 INFO L273 TraceCheckUtils]: 86: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,541 INFO L273 TraceCheckUtils]: 87: Hoare triple {6382#false} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:28,542 INFO L273 TraceCheckUtils]: 88: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:28,542 INFO L273 TraceCheckUtils]: 89: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:28,542 INFO L273 TraceCheckUtils]: 90: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,542 INFO L273 TraceCheckUtils]: 91: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,542 INFO L273 TraceCheckUtils]: 92: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,543 INFO L273 TraceCheckUtils]: 93: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,543 INFO L273 TraceCheckUtils]: 94: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,543 INFO L273 TraceCheckUtils]: 95: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,543 INFO L273 TraceCheckUtils]: 96: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,543 INFO L273 TraceCheckUtils]: 97: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,543 INFO L273 TraceCheckUtils]: 98: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,544 INFO L273 TraceCheckUtils]: 99: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,544 INFO L273 TraceCheckUtils]: 100: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,544 INFO L273 TraceCheckUtils]: 101: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,544 INFO L273 TraceCheckUtils]: 102: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,544 INFO L273 TraceCheckUtils]: 103: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,545 INFO L273 TraceCheckUtils]: 104: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,545 INFO L273 TraceCheckUtils]: 105: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,545 INFO L273 TraceCheckUtils]: 106: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,545 INFO L273 TraceCheckUtils]: 107: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,545 INFO L273 TraceCheckUtils]: 108: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,545 INFO L273 TraceCheckUtils]: 109: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,546 INFO L273 TraceCheckUtils]: 110: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,546 INFO L273 TraceCheckUtils]: 111: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,546 INFO L273 TraceCheckUtils]: 112: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,546 INFO L273 TraceCheckUtils]: 113: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,546 INFO L273 TraceCheckUtils]: 114: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,547 INFO L273 TraceCheckUtils]: 115: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,547 INFO L273 TraceCheckUtils]: 116: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,547 INFO L273 TraceCheckUtils]: 117: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,547 INFO L273 TraceCheckUtils]: 118: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,547 INFO L273 TraceCheckUtils]: 119: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,548 INFO L273 TraceCheckUtils]: 120: Hoare triple {6382#false} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:28,548 INFO L273 TraceCheckUtils]: 121: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:28,548 INFO L273 TraceCheckUtils]: 122: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:28,548 INFO L273 TraceCheckUtils]: 123: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,548 INFO L273 TraceCheckUtils]: 124: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,548 INFO L273 TraceCheckUtils]: 125: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,549 INFO L273 TraceCheckUtils]: 126: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,549 INFO L273 TraceCheckUtils]: 127: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,549 INFO L273 TraceCheckUtils]: 128: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,549 INFO L273 TraceCheckUtils]: 129: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,549 INFO L273 TraceCheckUtils]: 130: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,549 INFO L273 TraceCheckUtils]: 131: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,550 INFO L273 TraceCheckUtils]: 132: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,550 INFO L273 TraceCheckUtils]: 133: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,550 INFO L273 TraceCheckUtils]: 134: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,550 INFO L273 TraceCheckUtils]: 135: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,550 INFO L273 TraceCheckUtils]: 136: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,551 INFO L273 TraceCheckUtils]: 137: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,551 INFO L273 TraceCheckUtils]: 138: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,551 INFO L273 TraceCheckUtils]: 139: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,551 INFO L273 TraceCheckUtils]: 140: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,551 INFO L273 TraceCheckUtils]: 141: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,551 INFO L273 TraceCheckUtils]: 142: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,552 INFO L273 TraceCheckUtils]: 143: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,552 INFO L273 TraceCheckUtils]: 144: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,552 INFO L273 TraceCheckUtils]: 145: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,552 INFO L273 TraceCheckUtils]: 146: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,552 INFO L273 TraceCheckUtils]: 147: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,552 INFO L273 TraceCheckUtils]: 148: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,553 INFO L273 TraceCheckUtils]: 149: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,553 INFO L273 TraceCheckUtils]: 150: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,553 INFO L273 TraceCheckUtils]: 151: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:28,553 INFO L273 TraceCheckUtils]: 152: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:28,553 INFO L273 TraceCheckUtils]: 153: Hoare triple {6382#false} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:28,553 INFO L273 TraceCheckUtils]: 154: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:28,554 INFO L273 TraceCheckUtils]: 155: Hoare triple {6382#false} assume !~bvslt32(~i~0, ~nodecount~0); {6382#false} is VALID [2018-11-23 11:25:28,554 INFO L273 TraceCheckUtils]: 156: Hoare triple {6382#false} ~i~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:28,554 INFO L273 TraceCheckUtils]: 157: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,554 INFO L273 TraceCheckUtils]: 158: Hoare triple {6382#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {6382#false} is VALID [2018-11-23 11:25:28,554 INFO L273 TraceCheckUtils]: 159: Hoare triple {6382#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {6382#false} is VALID [2018-11-23 11:25:28,555 INFO L273 TraceCheckUtils]: 160: Hoare triple {6382#false} assume !~bvslt32(~i~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:28,555 INFO L273 TraceCheckUtils]: 161: Hoare triple {6382#false} ~i~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:28,555 INFO L273 TraceCheckUtils]: 162: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:28,555 INFO L256 TraceCheckUtils]: 163: Hoare triple {6382#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {6382#false} is VALID [2018-11-23 11:25:28,555 INFO L273 TraceCheckUtils]: 164: Hoare triple {6382#false} ~cond := #in~cond; {6382#false} is VALID [2018-11-23 11:25:28,555 INFO L273 TraceCheckUtils]: 165: Hoare triple {6382#false} assume 0bv32 == ~cond; {6382#false} is VALID [2018-11-23 11:25:28,556 INFO L273 TraceCheckUtils]: 166: Hoare triple {6382#false} assume !false; {6382#false} is VALID [2018-11-23 11:25:28,583 INFO L134 CoverageAnalysis]: Checked inductivity of 2558 backedges. 967 proven. 145 refuted. 0 times theorem prover too weak. 1446 trivial. 0 not checked. [2018-11-23 11:25:28,583 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:25:29,675 INFO L273 TraceCheckUtils]: 166: Hoare triple {6382#false} assume !false; {6382#false} is VALID [2018-11-23 11:25:29,675 INFO L273 TraceCheckUtils]: 165: Hoare triple {6382#false} assume 0bv32 == ~cond; {6382#false} is VALID [2018-11-23 11:25:29,675 INFO L273 TraceCheckUtils]: 164: Hoare triple {6382#false} ~cond := #in~cond; {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L256 TraceCheckUtils]: 163: Hoare triple {6382#false} call __VERIFIER_assert((if ~bvsge32(#t~mem17, 0bv32) then 1bv32 else 0bv32)); {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 162: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);call #t~mem17 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 161: Hoare triple {6382#false} ~i~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 160: Hoare triple {6382#false} assume !~bvslt32(~i~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 159: Hoare triple {6382#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 158: Hoare triple {6382#false} assume !~bvsgt32(#t~mem15, ~bvadd32(#t~mem13, #t~mem14));havoc #t~mem15;havoc #t~mem13;havoc #t~mem14; {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 157: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~edgecount~0);call #t~mem11 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~x~0 := #t~mem11;havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);~y~0 := #t~mem12;havoc #t~mem12;call #t~mem15 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem13 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem14 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,676 INFO L273 TraceCheckUtils]: 156: Hoare triple {6382#false} ~i~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 155: Hoare triple {6382#false} assume !~bvslt32(~i~0, ~nodecount~0); {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 154: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 153: Hoare triple {6382#false} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 152: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 151: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 150: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 149: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,677 INFO L273 TraceCheckUtils]: 148: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,678 INFO L273 TraceCheckUtils]: 147: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,678 INFO L273 TraceCheckUtils]: 146: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,678 INFO L273 TraceCheckUtils]: 145: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,678 INFO L273 TraceCheckUtils]: 144: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,678 INFO L273 TraceCheckUtils]: 143: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,678 INFO L273 TraceCheckUtils]: 142: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,679 INFO L273 TraceCheckUtils]: 141: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,679 INFO L273 TraceCheckUtils]: 140: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,679 INFO L273 TraceCheckUtils]: 139: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,679 INFO L273 TraceCheckUtils]: 138: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,679 INFO L273 TraceCheckUtils]: 137: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,680 INFO L273 TraceCheckUtils]: 136: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,680 INFO L273 TraceCheckUtils]: 135: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,680 INFO L273 TraceCheckUtils]: 134: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,680 INFO L273 TraceCheckUtils]: 133: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,680 INFO L273 TraceCheckUtils]: 132: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,680 INFO L273 TraceCheckUtils]: 131: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,681 INFO L273 TraceCheckUtils]: 130: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,681 INFO L273 TraceCheckUtils]: 129: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,681 INFO L273 TraceCheckUtils]: 128: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,681 INFO L273 TraceCheckUtils]: 127: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,681 INFO L273 TraceCheckUtils]: 126: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,682 INFO L273 TraceCheckUtils]: 125: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,682 INFO L273 TraceCheckUtils]: 124: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,682 INFO L273 TraceCheckUtils]: 123: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,682 INFO L273 TraceCheckUtils]: 122: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:29,682 INFO L273 TraceCheckUtils]: 121: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:29,682 INFO L273 TraceCheckUtils]: 120: Hoare triple {6382#false} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:29,683 INFO L273 TraceCheckUtils]: 119: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,683 INFO L273 TraceCheckUtils]: 118: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,683 INFO L273 TraceCheckUtils]: 117: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,683 INFO L273 TraceCheckUtils]: 116: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,683 INFO L273 TraceCheckUtils]: 115: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,683 INFO L273 TraceCheckUtils]: 114: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,684 INFO L273 TraceCheckUtils]: 113: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,684 INFO L273 TraceCheckUtils]: 112: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,684 INFO L273 TraceCheckUtils]: 111: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,684 INFO L273 TraceCheckUtils]: 110: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,684 INFO L273 TraceCheckUtils]: 109: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,685 INFO L273 TraceCheckUtils]: 108: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,685 INFO L273 TraceCheckUtils]: 107: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,685 INFO L273 TraceCheckUtils]: 106: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,685 INFO L273 TraceCheckUtils]: 105: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,685 INFO L273 TraceCheckUtils]: 104: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,685 INFO L273 TraceCheckUtils]: 103: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,686 INFO L273 TraceCheckUtils]: 102: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,686 INFO L273 TraceCheckUtils]: 101: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,686 INFO L273 TraceCheckUtils]: 100: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,686 INFO L273 TraceCheckUtils]: 99: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,686 INFO L273 TraceCheckUtils]: 98: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,686 INFO L273 TraceCheckUtils]: 97: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,687 INFO L273 TraceCheckUtils]: 96: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,687 INFO L273 TraceCheckUtils]: 95: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,687 INFO L273 TraceCheckUtils]: 94: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,687 INFO L273 TraceCheckUtils]: 93: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,687 INFO L273 TraceCheckUtils]: 92: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,687 INFO L273 TraceCheckUtils]: 91: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,688 INFO L273 TraceCheckUtils]: 90: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,688 INFO L273 TraceCheckUtils]: 89: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:29,688 INFO L273 TraceCheckUtils]: 88: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:29,688 INFO L273 TraceCheckUtils]: 87: Hoare triple {6382#false} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:29,688 INFO L273 TraceCheckUtils]: 86: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,688 INFO L273 TraceCheckUtils]: 85: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,689 INFO L273 TraceCheckUtils]: 84: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,689 INFO L273 TraceCheckUtils]: 83: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,689 INFO L273 TraceCheckUtils]: 82: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,689 INFO L273 TraceCheckUtils]: 81: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,689 INFO L273 TraceCheckUtils]: 80: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,689 INFO L273 TraceCheckUtils]: 79: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,690 INFO L273 TraceCheckUtils]: 78: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,690 INFO L273 TraceCheckUtils]: 77: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,690 INFO L273 TraceCheckUtils]: 76: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,690 INFO L273 TraceCheckUtils]: 75: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,690 INFO L273 TraceCheckUtils]: 74: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,690 INFO L273 TraceCheckUtils]: 73: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,691 INFO L273 TraceCheckUtils]: 72: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,691 INFO L273 TraceCheckUtils]: 71: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,691 INFO L273 TraceCheckUtils]: 70: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,691 INFO L273 TraceCheckUtils]: 69: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,691 INFO L273 TraceCheckUtils]: 68: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,691 INFO L273 TraceCheckUtils]: 67: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,692 INFO L273 TraceCheckUtils]: 66: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,692 INFO L273 TraceCheckUtils]: 65: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,692 INFO L273 TraceCheckUtils]: 64: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,692 INFO L273 TraceCheckUtils]: 63: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,692 INFO L273 TraceCheckUtils]: 62: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,693 INFO L273 TraceCheckUtils]: 61: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,693 INFO L273 TraceCheckUtils]: 60: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,693 INFO L273 TraceCheckUtils]: 59: Hoare triple {6382#false} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6382#false} is VALID [2018-11-23 11:25:29,693 INFO L273 TraceCheckUtils]: 58: Hoare triple {6382#false} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {6382#false} is VALID [2018-11-23 11:25:29,693 INFO L273 TraceCheckUtils]: 57: Hoare triple {6382#false} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {6382#false} is VALID [2018-11-23 11:25:29,693 INFO L273 TraceCheckUtils]: 56: Hoare triple {6382#false} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {6382#false} is VALID [2018-11-23 11:25:29,694 INFO L273 TraceCheckUtils]: 55: Hoare triple {6382#false} #t~post1 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post1);havoc #t~post1; {6382#false} is VALID [2018-11-23 11:25:29,714 INFO L273 TraceCheckUtils]: 54: Hoare triple {7232#(bvslt main_~j~0 main_~edgecount~0)} assume !~bvslt32(~j~0, ~edgecount~0); {6382#false} is VALID [2018-11-23 11:25:29,716 INFO L273 TraceCheckUtils]: 53: Hoare triple {7236#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7232#(bvslt main_~j~0 main_~edgecount~0)} is VALID [2018-11-23 11:25:29,716 INFO L273 TraceCheckUtils]: 52: Hoare triple {7236#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7236#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,721 INFO L273 TraceCheckUtils]: 51: Hoare triple {7236#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7236#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,745 INFO L273 TraceCheckUtils]: 50: Hoare triple {7246#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7236#(bvslt (bvadd main_~j~0 (_ bv1 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,745 INFO L273 TraceCheckUtils]: 49: Hoare triple {7246#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7246#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,746 INFO L273 TraceCheckUtils]: 48: Hoare triple {7246#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7246#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,774 INFO L273 TraceCheckUtils]: 47: Hoare triple {7256#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7246#(bvslt (bvadd main_~j~0 (_ bv2 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,775 INFO L273 TraceCheckUtils]: 46: Hoare triple {7256#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7256#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,775 INFO L273 TraceCheckUtils]: 45: Hoare triple {7256#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7256#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,797 INFO L273 TraceCheckUtils]: 44: Hoare triple {7266#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7256#(bvslt (bvadd main_~j~0 (_ bv3 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,798 INFO L273 TraceCheckUtils]: 43: Hoare triple {7266#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7266#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,798 INFO L273 TraceCheckUtils]: 42: Hoare triple {7266#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7266#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,832 INFO L273 TraceCheckUtils]: 41: Hoare triple {7276#(bvslt (bvadd main_~j~0 (_ bv5 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7266#(bvslt (bvadd main_~j~0 (_ bv4 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,832 INFO L273 TraceCheckUtils]: 40: Hoare triple {7276#(bvslt (bvadd main_~j~0 (_ bv5 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7276#(bvslt (bvadd main_~j~0 (_ bv5 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,833 INFO L273 TraceCheckUtils]: 39: Hoare triple {7276#(bvslt (bvadd main_~j~0 (_ bv5 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7276#(bvslt (bvadd main_~j~0 (_ bv5 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,864 INFO L273 TraceCheckUtils]: 38: Hoare triple {7286#(bvslt (bvadd main_~j~0 (_ bv6 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7276#(bvslt (bvadd main_~j~0 (_ bv5 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,864 INFO L273 TraceCheckUtils]: 37: Hoare triple {7286#(bvslt (bvadd main_~j~0 (_ bv6 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7286#(bvslt (bvadd main_~j~0 (_ bv6 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,864 INFO L273 TraceCheckUtils]: 36: Hoare triple {7286#(bvslt (bvadd main_~j~0 (_ bv6 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7286#(bvslt (bvadd main_~j~0 (_ bv6 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,890 INFO L273 TraceCheckUtils]: 35: Hoare triple {7296#(bvslt (bvadd main_~j~0 (_ bv7 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7286#(bvslt (bvadd main_~j~0 (_ bv6 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,891 INFO L273 TraceCheckUtils]: 34: Hoare triple {7296#(bvslt (bvadd main_~j~0 (_ bv7 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7296#(bvslt (bvadd main_~j~0 (_ bv7 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,891 INFO L273 TraceCheckUtils]: 33: Hoare triple {7296#(bvslt (bvadd main_~j~0 (_ bv7 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7296#(bvslt (bvadd main_~j~0 (_ bv7 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,912 INFO L273 TraceCheckUtils]: 32: Hoare triple {7306#(bvslt (bvadd main_~j~0 (_ bv8 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7296#(bvslt (bvadd main_~j~0 (_ bv7 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,913 INFO L273 TraceCheckUtils]: 31: Hoare triple {7306#(bvslt (bvadd main_~j~0 (_ bv8 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7306#(bvslt (bvadd main_~j~0 (_ bv8 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,913 INFO L273 TraceCheckUtils]: 30: Hoare triple {7306#(bvslt (bvadd main_~j~0 (_ bv8 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7306#(bvslt (bvadd main_~j~0 (_ bv8 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,940 INFO L273 TraceCheckUtils]: 29: Hoare triple {7316#(bvslt (bvadd main_~j~0 (_ bv9 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7306#(bvslt (bvadd main_~j~0 (_ bv8 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,940 INFO L273 TraceCheckUtils]: 28: Hoare triple {7316#(bvslt (bvadd main_~j~0 (_ bv9 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7316#(bvslt (bvadd main_~j~0 (_ bv9 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,941 INFO L273 TraceCheckUtils]: 27: Hoare triple {7316#(bvslt (bvadd main_~j~0 (_ bv9 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7316#(bvslt (bvadd main_~j~0 (_ bv9 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,973 INFO L273 TraceCheckUtils]: 26: Hoare triple {7326#(bvslt (bvadd main_~j~0 (_ bv10 32)) main_~edgecount~0)} #t~post2 := ~j~0;~j~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7316#(bvslt (bvadd main_~j~0 (_ bv9 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,974 INFO L273 TraceCheckUtils]: 25: Hoare triple {7326#(bvslt (bvadd main_~j~0 (_ bv10 32)) main_~edgecount~0)} assume ~bvsgt32(#t~mem7, ~bvadd32(#t~mem5, #t~mem6));havoc #t~mem5;havoc #t~mem6;havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem9 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);call write~intINTTYPE4(~bvadd32(#t~mem8, #t~mem9), ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);havoc #t~mem9;havoc #t~mem8; {7326#(bvslt (bvadd main_~j~0 (_ bv10 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,974 INFO L273 TraceCheckUtils]: 24: Hoare triple {7326#(bvslt (bvadd main_~j~0 (_ bv10 32)) main_~edgecount~0)} assume !!~bvslt32(~j~0, ~edgecount~0);call #t~mem3 := read~intINTTYPE4(~#Dest~0.base, ~bvadd32(~#Dest~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~x~0 := #t~mem3;havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#Source~0.base, ~bvadd32(~#Source~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32);~y~0 := #t~mem4;havoc #t~mem4;call #t~mem7 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~x~0)), 4bv32);call #t~mem5 := read~intINTTYPE4(~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~y~0)), 4bv32);call #t~mem6 := read~intINTTYPE4(~#Weight~0.base, ~bvadd32(~#Weight~0.offset, ~bvmul32(4bv32, ~j~0)), 4bv32); {7326#(bvslt (bvadd main_~j~0 (_ bv10 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,975 INFO L273 TraceCheckUtils]: 23: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0);~j~0 := 0bv32; {7326#(bvslt (bvadd main_~j~0 (_ bv10 32)) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,975 INFO L273 TraceCheckUtils]: 22: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} ~i~0 := 0bv32; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,975 INFO L273 TraceCheckUtils]: 21: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !~bvslt32(~i~0, ~nodecount~0); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,976 INFO L273 TraceCheckUtils]: 20: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,977 INFO L273 TraceCheckUtils]: 19: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,977 INFO L273 TraceCheckUtils]: 18: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,978 INFO L273 TraceCheckUtils]: 17: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,978 INFO L273 TraceCheckUtils]: 16: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,979 INFO L273 TraceCheckUtils]: 15: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,979 INFO L273 TraceCheckUtils]: 14: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,980 INFO L273 TraceCheckUtils]: 13: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,980 INFO L273 TraceCheckUtils]: 12: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,981 INFO L273 TraceCheckUtils]: 11: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,981 INFO L273 TraceCheckUtils]: 10: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !(~i~0 == ~source~0);call write~intINTTYPE4(~INFINITY~0, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,982 INFO L273 TraceCheckUtils]: 9: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,982 INFO L273 TraceCheckUtils]: 8: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} #t~post0 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post0);havoc #t~post0; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,983 INFO L273 TraceCheckUtils]: 7: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume ~i~0 == ~source~0;call write~intINTTYPE4(0bv32, ~#distance~0.base, ~bvadd32(~#distance~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,983 INFO L273 TraceCheckUtils]: 6: Hoare triple {7336#(bvslt (_ bv10 32) main_~edgecount~0)} assume !!~bvslt32(~i~0, ~nodecount~0); {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,988 INFO L273 TraceCheckUtils]: 5: Hoare triple {6381#true} ~nodecount~0 := 5bv32;~edgecount~0 := 20bv32;~source~0 := 0bv32;call ~#Source~0.base, ~#Source~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~#Source~0.offset, 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(4bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(8bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(12bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(16bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(20bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(24bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(28bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(32bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Source~0.base, ~bvadd32(36bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(40bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(44bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(48bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(52bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Source~0.base, ~bvadd32(56bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(60bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Source~0.base, ~bvadd32(64bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(68bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Source~0.base, ~bvadd32(72bv32, ~#Source~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Source~0.base, ~bvadd32(76bv32, ~#Source~0.offset), 4bv32);call ~#Dest~0.base, ~#Dest~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~#Dest~0.offset, 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(4bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(8bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(12bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(16bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(20bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(24bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(28bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(32bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(36bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(40bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(44bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(48bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(52bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Dest~0.base, ~bvadd32(56bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(60bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Dest~0.base, ~bvadd32(64bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(1bv32, ~#Dest~0.base, ~bvadd32(68bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(0bv32, ~#Dest~0.base, ~bvadd32(72bv32, ~#Dest~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Dest~0.base, ~bvadd32(76bv32, ~#Dest~0.offset), 4bv32);call ~#Weight~0.base, ~#Weight~0.offset := #Ultimate.alloc(80bv32);call write~init~intINTTYPE4(0bv32, ~#Weight~0.base, ~#Weight~0.offset, 4bv32);call write~init~intINTTYPE4(1bv32, ~#Weight~0.base, ~bvadd32(4bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(2bv32, ~#Weight~0.base, ~bvadd32(8bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(3bv32, ~#Weight~0.base, ~bvadd32(12bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(4bv32, ~#Weight~0.base, ~bvadd32(16bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(5bv32, ~#Weight~0.base, ~bvadd32(20bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(6bv32, ~#Weight~0.base, ~bvadd32(24bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(7bv32, ~#Weight~0.base, ~bvadd32(28bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(8bv32, ~#Weight~0.base, ~bvadd32(32bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(9bv32, ~#Weight~0.base, ~bvadd32(36bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(10bv32, ~#Weight~0.base, ~bvadd32(40bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(11bv32, ~#Weight~0.base, ~bvadd32(44bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(12bv32, ~#Weight~0.base, ~bvadd32(48bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(13bv32, ~#Weight~0.base, ~bvadd32(52bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(14bv32, ~#Weight~0.base, ~bvadd32(56bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(15bv32, ~#Weight~0.base, ~bvadd32(60bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(16bv32, ~#Weight~0.base, ~bvadd32(64bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(17bv32, ~#Weight~0.base, ~bvadd32(68bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(18bv32, ~#Weight~0.base, ~bvadd32(72bv32, ~#Weight~0.offset), 4bv32);call write~init~intINTTYPE4(19bv32, ~#Weight~0.base, ~bvadd32(76bv32, ~#Weight~0.offset), 4bv32);call ~#distance~0.base, ~#distance~0.offset := #Ultimate.alloc(20bv32);havoc ~x~0;havoc ~y~0;havoc ~i~0;havoc ~j~0;~i~0 := 0bv32; {7336#(bvslt (_ bv10 32) main_~edgecount~0)} is VALID [2018-11-23 11:25:29,988 INFO L256 TraceCheckUtils]: 4: Hoare triple {6381#true} call #t~ret18 := main(); {6381#true} is VALID [2018-11-23 11:25:29,988 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6381#true} {6381#true} #103#return; {6381#true} is VALID [2018-11-23 11:25:29,988 INFO L273 TraceCheckUtils]: 2: Hoare triple {6381#true} assume true; {6381#true} is VALID [2018-11-23 11:25:29,989 INFO L273 TraceCheckUtils]: 1: Hoare triple {6381#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~INFINITY~0 := 899bv32; {6381#true} is VALID [2018-11-23 11:25:29,989 INFO L256 TraceCheckUtils]: 0: Hoare triple {6381#true} call ULTIMATE.init(); {6381#true} is VALID [2018-11-23 11:25:30,009 INFO L134 CoverageAnalysis]: Checked inductivity of 2558 backedges. 967 proven. 145 refuted. 0 times theorem prover too weak. 1446 trivial. 0 not checked. [2018-11-23 11:25:30,013 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:25:30,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-11-23 11:25:30,014 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 167 [2018-11-23 11:25:30,014 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:25:30,014 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 26 states. [2018-11-23 11:25:30,486 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 101 edges. 101 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:30,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-23 11:25:30,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-23 11:25:30,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2018-11-23 11:25:30,488 INFO L87 Difference]: Start difference. First operand 188 states and 241 transitions. Second operand 26 states. [2018-11-23 11:25:37,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:37,936 INFO L93 Difference]: Finished difference Result 425 states and 593 transitions. [2018-11-23 11:25:37,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 11:25:37,937 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 167 [2018-11-23 11:25:37,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:25:37,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 11:25:37,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 147 transitions. [2018-11-23 11:25:37,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-11-23 11:25:37,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 147 transitions. [2018-11-23 11:25:37,942 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 147 transitions. [2018-11-23 11:25:38,722 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 147 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:25:38,729 INFO L225 Difference]: With dead ends: 425 [2018-11-23 11:25:38,730 INFO L226 Difference]: Without dead ends: 308 [2018-11-23 11:25:38,731 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 309 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=408, Invalid=782, Unknown=0, NotChecked=0, Total=1190 [2018-11-23 11:25:38,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2018-11-23 11:25:39,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 308. [2018-11-23 11:25:39,106 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:25:39,107 INFO L82 GeneralOperation]: Start isEquivalent. First operand 308 states. Second operand 308 states. [2018-11-23 11:25:39,107 INFO L74 IsIncluded]: Start isIncluded. First operand 308 states. Second operand 308 states. [2018-11-23 11:25:39,107 INFO L87 Difference]: Start difference. First operand 308 states. Second operand 308 states. [2018-11-23 11:25:39,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:39,117 INFO L93 Difference]: Finished difference Result 308 states and 401 transitions. [2018-11-23 11:25:39,117 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 401 transitions. [2018-11-23 11:25:39,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:39,118 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:39,118 INFO L74 IsIncluded]: Start isIncluded. First operand 308 states. Second operand 308 states. [2018-11-23 11:25:39,118 INFO L87 Difference]: Start difference. First operand 308 states. Second operand 308 states. [2018-11-23 11:25:39,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:25:39,128 INFO L93 Difference]: Finished difference Result 308 states and 401 transitions. [2018-11-23 11:25:39,128 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 401 transitions. [2018-11-23 11:25:39,129 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:25:39,129 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:25:39,129 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:25:39,130 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:25:39,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-11-23 11:25:39,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 401 transitions. [2018-11-23 11:25:39,140 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 401 transitions. Word has length 167 [2018-11-23 11:25:39,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:25:39,140 INFO L480 AbstractCegarLoop]: Abstraction has 308 states and 401 transitions. [2018-11-23 11:25:39,141 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-23 11:25:39,141 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 401 transitions. [2018-11-23 11:25:39,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 288 [2018-11-23 11:25:39,146 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:25:39,146 INFO L402 BasicCegarLoop]: trace histogram [80, 80, 80, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:25:39,146 INFO L423 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:25:39,146 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:25:39,147 INFO L82 PathProgramCache]: Analyzing trace with hash -1874521872, now seen corresponding path program 5 times [2018-11-23 11:25:39,148 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:25:39,148 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:25:39,177 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1