java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 11:42:56,412 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 11:42:56,414 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 11:42:56,426 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 11:42:56,426 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 11:42:56,427 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 11:42:56,429 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 11:42:56,430 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 11:42:56,432 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 11:42:56,433 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 11:42:56,434 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 11:42:56,434 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 11:42:56,438 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 11:42:56,439 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 11:42:56,443 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 11:42:56,444 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 11:42:56,445 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 11:42:56,450 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 11:42:56,452 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 11:42:56,457 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 11:42:56,458 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 11:42:56,461 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 11:42:56,465 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 11:42:56,466 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 11:42:56,466 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 11:42:56,468 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 11:42:56,471 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 11:42:56,473 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 11:42:56,474 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 11:42:56,475 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 11:42:56,476 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 11:42:56,476 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 11:42:56,476 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 11:42:56,477 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 11:42:56,478 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 11:42:56,479 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 11:42:56,479 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 11:42:56,503 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 11:42:56,504 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 11:42:56,506 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 11:42:56,506 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 11:42:56,507 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 11:42:56,507 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 11:42:56,507 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 11:42:56,507 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 11:42:56,508 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 11:42:56,508 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 11:42:56,508 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 11:42:56,508 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 11:42:56,508 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 11:42:56,511 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 11:42:56,511 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 11:42:56,511 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 11:42:56,511 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 11:42:56,513 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 11:42:56,513 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 11:42:56,513 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 11:42:56,514 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 11:42:56,514 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 11:42:56,514 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 11:42:56,514 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 11:42:56,515 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 11:42:56,515 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 11:42:56,515 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 11:42:56,515 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 11:42:56,515 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 11:42:56,516 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 11:42:56,516 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 11:42:56,517 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 11:42:56,517 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 11:42:56,579 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 11:42:56,593 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 11:42:56,596 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 11:42:56,597 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 11:42:56,597 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 11:42:56,598 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i [2018-11-23 11:42:56,662 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/731478b90/bd847adb09ea4cf8963cc23fcd91e25d/FLAG415194431 [2018-11-23 11:42:57,051 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 11:42:57,052 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-new/half_true-unreach-call_true-termination.i [2018-11-23 11:42:57,057 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/731478b90/bd847adb09ea4cf8963cc23fcd91e25d/FLAG415194431 [2018-11-23 11:42:57,448 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/731478b90/bd847adb09ea4cf8963cc23fcd91e25d [2018-11-23 11:42:57,457 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 11:42:57,458 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 11:42:57,459 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 11:42:57,460 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 11:42:57,463 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 11:42:57,465 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,468 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47b53697 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57, skipping insertion in model container [2018-11-23 11:42:57,468 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,477 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 11:42:57,496 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 11:42:57,729 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 11:42:57,737 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 11:42:57,762 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 11:42:57,783 INFO L195 MainTranslator]: Completed translation [2018-11-23 11:42:57,784 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57 WrapperNode [2018-11-23 11:42:57,784 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 11:42:57,785 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 11:42:57,785 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 11:42:57,785 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 11:42:57,797 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,805 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,814 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 11:42:57,814 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 11:42:57,814 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 11:42:57,815 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 11:42:57,826 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,826 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,828 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,828 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,843 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,850 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,851 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... [2018-11-23 11:42:57,861 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 11:42:57,862 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 11:42:57,862 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 11:42:57,862 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 11:42:57,863 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 11:42:58,052 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 11:42:58,053 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 11:42:58,053 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 11:42:58,053 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 11:42:58,053 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 11:42:58,054 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 11:42:58,054 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 11:42:58,054 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 11:42:58,504 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 11:42:58,504 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-23 11:42:58,505 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 11:42:58 BoogieIcfgContainer [2018-11-23 11:42:58,505 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 11:42:58,506 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 11:42:58,507 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 11:42:58,510 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 11:42:58,510 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 11:42:57" (1/3) ... [2018-11-23 11:42:58,511 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ad3e584 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 11:42:58, skipping insertion in model container [2018-11-23 11:42:58,512 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 11:42:57" (2/3) ... [2018-11-23 11:42:58,512 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ad3e584 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 11:42:58, skipping insertion in model container [2018-11-23 11:42:58,512 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 11:42:58" (3/3) ... [2018-11-23 11:42:58,514 INFO L112 eAbstractionObserver]: Analyzing ICFG half_true-unreach-call_true-termination.i [2018-11-23 11:42:58,525 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 11:42:58,535 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 11:42:58,554 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 11:42:58,587 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 11:42:58,588 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 11:42:58,588 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 11:42:58,588 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 11:42:58,589 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 11:42:58,589 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 11:42:58,589 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 11:42:58,589 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 11:42:58,590 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 11:42:58,609 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-11-23 11:42:58,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-11-23 11:42:58,616 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:42:58,617 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:42:58,619 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:42:58,625 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:42:58,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1995182865, now seen corresponding path program 1 times [2018-11-23 11:42:58,629 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:42:58,630 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:42:58,651 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:42:58,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:42:58,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:42:58,703 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:42:58,757 INFO L256 TraceCheckUtils]: 0: Hoare triple {24#true} call ULTIMATE.init(); {24#true} is VALID [2018-11-23 11:42:58,761 INFO L273 TraceCheckUtils]: 1: Hoare triple {24#true} assume true; {24#true} is VALID [2018-11-23 11:42:58,761 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {24#true} {24#true} #42#return; {24#true} is VALID [2018-11-23 11:42:58,762 INFO L256 TraceCheckUtils]: 3: Hoare triple {24#true} call #t~ret4 := main(); {24#true} is VALID [2018-11-23 11:42:58,762 INFO L273 TraceCheckUtils]: 4: Hoare triple {24#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {24#true} is VALID [2018-11-23 11:42:58,762 INFO L273 TraceCheckUtils]: 5: Hoare triple {24#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {24#true} is VALID [2018-11-23 11:42:58,780 INFO L273 TraceCheckUtils]: 6: Hoare triple {24#true} assume !true; {25#false} is VALID [2018-11-23 11:42:58,780 INFO L256 TraceCheckUtils]: 7: Hoare triple {25#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {25#false} is VALID [2018-11-23 11:42:58,781 INFO L273 TraceCheckUtils]: 8: Hoare triple {25#false} ~cond := #in~cond; {25#false} is VALID [2018-11-23 11:42:58,781 INFO L273 TraceCheckUtils]: 9: Hoare triple {25#false} assume 0bv32 == ~cond; {25#false} is VALID [2018-11-23 11:42:58,782 INFO L273 TraceCheckUtils]: 10: Hoare triple {25#false} assume !false; {25#false} is VALID [2018-11-23 11:42:58,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:42:58,785 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:42:58,791 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:42:58,792 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 11:42:58,798 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-11-23 11:42:58,801 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:42:58,805 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 11:42:58,899 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:42:58,899 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 11:42:58,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 11:42:58,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 11:42:58,910 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 2 states. [2018-11-23 11:42:59,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:42:59,004 INFO L93 Difference]: Finished difference Result 33 states and 38 transitions. [2018-11-23 11:42:59,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 11:42:59,004 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 11 [2018-11-23 11:42:59,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:42:59,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 11:42:59,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 38 transitions. [2018-11-23 11:42:59,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 11:42:59,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 38 transitions. [2018-11-23 11:42:59,021 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 38 transitions. [2018-11-23 11:42:59,449 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:42:59,459 INFO L225 Difference]: With dead ends: 33 [2018-11-23 11:42:59,459 INFO L226 Difference]: Without dead ends: 14 [2018-11-23 11:42:59,463 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 11:42:59,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2018-11-23 11:42:59,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2018-11-23 11:42:59,508 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:42:59,508 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand 14 states. [2018-11-23 11:42:59,509 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand 14 states. [2018-11-23 11:42:59,509 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 14 states. [2018-11-23 11:42:59,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:42:59,512 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2018-11-23 11:42:59,513 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2018-11-23 11:42:59,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:42:59,513 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:42:59,514 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand 14 states. [2018-11-23 11:42:59,514 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 14 states. [2018-11-23 11:42:59,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:42:59,518 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2018-11-23 11:42:59,518 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2018-11-23 11:42:59,518 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:42:59,519 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:42:59,519 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:42:59,519 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:42:59,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 11:42:59,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2018-11-23 11:42:59,523 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 11 [2018-11-23 11:42:59,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:42:59,524 INFO L480 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2018-11-23 11:42:59,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 11:42:59,524 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2018-11-23 11:42:59,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-11-23 11:42:59,525 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:42:59,525 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:42:59,525 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:42:59,526 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:42:59,526 INFO L82 PathProgramCache]: Analyzing trace with hash -2005341596, now seen corresponding path program 1 times [2018-11-23 11:42:59,526 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:42:59,527 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:42:59,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:42:59,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:42:59,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:42:59,586 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:42:59,976 INFO L256 TraceCheckUtils]: 0: Hoare triple {149#true} call ULTIMATE.init(); {149#true} is VALID [2018-11-23 11:42:59,977 INFO L273 TraceCheckUtils]: 1: Hoare triple {149#true} assume true; {149#true} is VALID [2018-11-23 11:42:59,977 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {149#true} {149#true} #42#return; {149#true} is VALID [2018-11-23 11:42:59,977 INFO L256 TraceCheckUtils]: 3: Hoare triple {149#true} call #t~ret4 := main(); {149#true} is VALID [2018-11-23 11:42:59,980 INFO L273 TraceCheckUtils]: 4: Hoare triple {149#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {166#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:42:59,981 INFO L273 TraceCheckUtils]: 5: Hoare triple {166#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {170#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:42:59,982 INFO L273 TraceCheckUtils]: 6: Hoare triple {170#(and (= main_~n~0 (_ bv0 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {174#(and (= main_~n~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (not (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:42:59,990 INFO L256 TraceCheckUtils]: 7: Hoare triple {174#(and (= main_~n~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (not (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0))))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {178#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:42:59,991 INFO L273 TraceCheckUtils]: 8: Hoare triple {178#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {182#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:42:59,993 INFO L273 TraceCheckUtils]: 9: Hoare triple {182#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {150#false} is VALID [2018-11-23 11:42:59,993 INFO L273 TraceCheckUtils]: 10: Hoare triple {150#false} assume !false; {150#false} is VALID [2018-11-23 11:42:59,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:42:59,995 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 11:42:59,997 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 11:42:59,997 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 11:42:59,999 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-11-23 11:43:00,000 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:43:00,000 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states. [2018-11-23 11:43:00,027 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:00,027 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 11:43:00,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 11:43:00,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 11:43:00,028 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand 7 states. [2018-11-23 11:43:00,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:00,789 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2018-11-23 11:43:00,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 11:43:00,790 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-11-23 11:43:00,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:43:00,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 11:43:00,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2018-11-23 11:43:00,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2018-11-23 11:43:00,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 31 transitions. [2018-11-23 11:43:00,797 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 7 states and 31 transitions. [2018-11-23 11:43:00,856 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:00,858 INFO L225 Difference]: With dead ends: 27 [2018-11-23 11:43:00,858 INFO L226 Difference]: Without dead ends: 16 [2018-11-23 11:43:00,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-11-23 11:43:00,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2018-11-23 11:43:00,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2018-11-23 11:43:00,883 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:43:00,883 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand 16 states. [2018-11-23 11:43:00,883 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand 16 states. [2018-11-23 11:43:00,884 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 16 states. [2018-11-23 11:43:00,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:00,885 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2018-11-23 11:43:00,886 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-11-23 11:43:00,886 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:00,886 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:00,886 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand 16 states. [2018-11-23 11:43:00,886 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 16 states. [2018-11-23 11:43:00,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:00,888 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2018-11-23 11:43:00,888 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-11-23 11:43:00,889 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:00,889 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:00,889 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:43:00,889 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:43:00,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 11:43:00,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-11-23 11:43:00,891 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 11 [2018-11-23 11:43:00,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:43:00,891 INFO L480 AbstractCegarLoop]: Abstraction has 16 states and 17 transitions. [2018-11-23 11:43:00,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 11:43:00,891 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 17 transitions. [2018-11-23 11:43:00,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-11-23 11:43:00,892 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:43:00,892 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:43:00,893 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:43:00,893 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:43:00,893 INFO L82 PathProgramCache]: Analyzing trace with hash -763628086, now seen corresponding path program 1 times [2018-11-23 11:43:00,893 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:43:00,894 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:43:00,914 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:43:00,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:00,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:00,945 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:43:01,128 INFO L256 TraceCheckUtils]: 0: Hoare triple {288#true} call ULTIMATE.init(); {288#true} is VALID [2018-11-23 11:43:01,129 INFO L273 TraceCheckUtils]: 1: Hoare triple {288#true} assume true; {288#true} is VALID [2018-11-23 11:43:01,129 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {288#true} {288#true} #42#return; {288#true} is VALID [2018-11-23 11:43:01,129 INFO L256 TraceCheckUtils]: 3: Hoare triple {288#true} call #t~ret4 := main(); {288#true} is VALID [2018-11-23 11:43:01,130 INFO L273 TraceCheckUtils]: 4: Hoare triple {288#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {288#true} is VALID [2018-11-23 11:43:01,132 INFO L273 TraceCheckUtils]: 5: Hoare triple {288#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {308#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:01,132 INFO L273 TraceCheckUtils]: 6: Hoare triple {308#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {312#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:01,133 INFO L273 TraceCheckUtils]: 7: Hoare triple {312#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {312#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:01,138 INFO L273 TraceCheckUtils]: 8: Hoare triple {312#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {319#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:01,140 INFO L273 TraceCheckUtils]: 9: Hoare triple {319#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {289#false} is VALID [2018-11-23 11:43:01,140 INFO L256 TraceCheckUtils]: 10: Hoare triple {289#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {289#false} is VALID [2018-11-23 11:43:01,141 INFO L273 TraceCheckUtils]: 11: Hoare triple {289#false} ~cond := #in~cond; {289#false} is VALID [2018-11-23 11:43:01,141 INFO L273 TraceCheckUtils]: 12: Hoare triple {289#false} assume 0bv32 == ~cond; {289#false} is VALID [2018-11-23 11:43:01,141 INFO L273 TraceCheckUtils]: 13: Hoare triple {289#false} assume !false; {289#false} is VALID [2018-11-23 11:43:01,142 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:01,143 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:43:01,415 INFO L273 TraceCheckUtils]: 13: Hoare triple {289#false} assume !false; {289#false} is VALID [2018-11-23 11:43:01,415 INFO L273 TraceCheckUtils]: 12: Hoare triple {289#false} assume 0bv32 == ~cond; {289#false} is VALID [2018-11-23 11:43:01,415 INFO L273 TraceCheckUtils]: 11: Hoare triple {289#false} ~cond := #in~cond; {289#false} is VALID [2018-11-23 11:43:01,416 INFO L256 TraceCheckUtils]: 10: Hoare triple {289#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {289#false} is VALID [2018-11-23 11:43:01,416 INFO L273 TraceCheckUtils]: 9: Hoare triple {347#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {289#false} is VALID [2018-11-23 11:43:01,418 INFO L273 TraceCheckUtils]: 8: Hoare triple {351#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {347#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:01,418 INFO L273 TraceCheckUtils]: 7: Hoare triple {351#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {351#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:01,419 INFO L273 TraceCheckUtils]: 6: Hoare triple {358#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {351#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:01,421 INFO L273 TraceCheckUtils]: 5: Hoare triple {288#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {358#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:01,421 INFO L273 TraceCheckUtils]: 4: Hoare triple {288#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {288#true} is VALID [2018-11-23 11:43:01,422 INFO L256 TraceCheckUtils]: 3: Hoare triple {288#true} call #t~ret4 := main(); {288#true} is VALID [2018-11-23 11:43:01,422 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {288#true} {288#true} #42#return; {288#true} is VALID [2018-11-23 11:43:01,423 INFO L273 TraceCheckUtils]: 1: Hoare triple {288#true} assume true; {288#true} is VALID [2018-11-23 11:43:01,423 INFO L256 TraceCheckUtils]: 0: Hoare triple {288#true} call ULTIMATE.init(); {288#true} is VALID [2018-11-23 11:43:01,425 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:01,426 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:43:01,426 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-11-23 11:43:01,427 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 14 [2018-11-23 11:43:01,428 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:43:01,428 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states. [2018-11-23 11:43:01,461 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:01,461 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-23 11:43:01,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-23 11:43:01,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-11-23 11:43:01,462 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. Second operand 8 states. [2018-11-23 11:43:01,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:01,936 INFO L93 Difference]: Finished difference Result 32 states and 39 transitions. [2018-11-23 11:43:01,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 11:43:01,937 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 14 [2018-11-23 11:43:01,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:43:01,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 11:43:01,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 39 transitions. [2018-11-23 11:43:01,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2018-11-23 11:43:01,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 39 transitions. [2018-11-23 11:43:01,943 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 8 states and 39 transitions. [2018-11-23 11:43:02,053 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:02,055 INFO L225 Difference]: With dead ends: 32 [2018-11-23 11:43:02,055 INFO L226 Difference]: Without dead ends: 24 [2018-11-23 11:43:02,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 11:43:02,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-11-23 11:43:02,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-11-23 11:43:02,072 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:43:02,072 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand 24 states. [2018-11-23 11:43:02,072 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-23 11:43:02,073 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-23 11:43:02,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:02,075 INFO L93 Difference]: Finished difference Result 24 states and 27 transitions. [2018-11-23 11:43:02,075 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 27 transitions. [2018-11-23 11:43:02,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:02,076 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:02,076 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand 24 states. [2018-11-23 11:43:02,076 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 24 states. [2018-11-23 11:43:02,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:02,078 INFO L93 Difference]: Finished difference Result 24 states and 27 transitions. [2018-11-23 11:43:02,079 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 27 transitions. [2018-11-23 11:43:02,079 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:02,079 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:02,079 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:43:02,080 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:43:02,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 11:43:02,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2018-11-23 11:43:02,082 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 27 transitions. Word has length 14 [2018-11-23 11:43:02,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:43:02,082 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 27 transitions. [2018-11-23 11:43:02,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-23 11:43:02,082 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 27 transitions. [2018-11-23 11:43:02,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-11-23 11:43:02,083 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:43:02,083 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:43:02,084 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:43:02,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:43:02,084 INFO L82 PathProgramCache]: Analyzing trace with hash 345235238, now seen corresponding path program 1 times [2018-11-23 11:43:02,084 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:43:02,085 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:43:02,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 11:43:02,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:02,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:02,145 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:43:02,666 INFO L256 TraceCheckUtils]: 0: Hoare triple {510#true} call ULTIMATE.init(); {510#true} is VALID [2018-11-23 11:43:02,666 INFO L273 TraceCheckUtils]: 1: Hoare triple {510#true} assume true; {510#true} is VALID [2018-11-23 11:43:02,667 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {510#true} {510#true} #42#return; {510#true} is VALID [2018-11-23 11:43:02,667 INFO L256 TraceCheckUtils]: 3: Hoare triple {510#true} call #t~ret4 := main(); {510#true} is VALID [2018-11-23 11:43:02,671 INFO L273 TraceCheckUtils]: 4: Hoare triple {510#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {527#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:43:02,671 INFO L273 TraceCheckUtils]: 5: Hoare triple {527#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {531#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:02,673 INFO L273 TraceCheckUtils]: 6: Hoare triple {531#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {535#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:02,674 INFO L273 TraceCheckUtils]: 7: Hoare triple {535#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {539#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:02,675 INFO L273 TraceCheckUtils]: 8: Hoare triple {539#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {543#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:02,676 INFO L273 TraceCheckUtils]: 9: Hoare triple {543#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {543#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:02,678 INFO L273 TraceCheckUtils]: 10: Hoare triple {543#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {543#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:02,679 INFO L273 TraceCheckUtils]: 11: Hoare triple {543#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {553#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:02,681 INFO L273 TraceCheckUtils]: 12: Hoare triple {553#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {557#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0))) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:02,692 INFO L256 TraceCheckUtils]: 13: Hoare triple {557#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0))) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {561#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:43:02,693 INFO L273 TraceCheckUtils]: 14: Hoare triple {561#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {565#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:43:02,693 INFO L273 TraceCheckUtils]: 15: Hoare triple {565#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {511#false} is VALID [2018-11-23 11:43:02,694 INFO L273 TraceCheckUtils]: 16: Hoare triple {511#false} assume !false; {511#false} is VALID [2018-11-23 11:43:02,695 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:02,695 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:43:03,425 INFO L273 TraceCheckUtils]: 16: Hoare triple {511#false} assume !false; {511#false} is VALID [2018-11-23 11:43:03,426 INFO L273 TraceCheckUtils]: 15: Hoare triple {575#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {511#false} is VALID [2018-11-23 11:43:03,427 INFO L273 TraceCheckUtils]: 14: Hoare triple {579#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {575#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:43:03,430 INFO L256 TraceCheckUtils]: 13: Hoare triple {583#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {579#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:43:03,431 INFO L273 TraceCheckUtils]: 12: Hoare triple {587#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {583#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,432 INFO L273 TraceCheckUtils]: 11: Hoare triple {591#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {587#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,433 INFO L273 TraceCheckUtils]: 10: Hoare triple {591#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {591#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,433 INFO L273 TraceCheckUtils]: 9: Hoare triple {591#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {591#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,460 INFO L273 TraceCheckUtils]: 8: Hoare triple {601#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {591#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,462 INFO L273 TraceCheckUtils]: 7: Hoare triple {605#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {601#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,463 INFO L273 TraceCheckUtils]: 6: Hoare triple {609#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {605#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:03,464 INFO L273 TraceCheckUtils]: 5: Hoare triple {527#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {609#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:03,465 INFO L273 TraceCheckUtils]: 4: Hoare triple {510#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {527#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:43:03,465 INFO L256 TraceCheckUtils]: 3: Hoare triple {510#true} call #t~ret4 := main(); {510#true} is VALID [2018-11-23 11:43:03,465 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {510#true} {510#true} #42#return; {510#true} is VALID [2018-11-23 11:43:03,465 INFO L273 TraceCheckUtils]: 1: Hoare triple {510#true} assume true; {510#true} is VALID [2018-11-23 11:43:03,466 INFO L256 TraceCheckUtils]: 0: Hoare triple {510#true} call ULTIMATE.init(); {510#true} is VALID [2018-11-23 11:43:03,468 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:03,470 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:43:03,471 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-11-23 11:43:03,471 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 17 [2018-11-23 11:43:03,472 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:43:03,472 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 11:43:03,550 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:03,550 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 11:43:03,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 11:43:03,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=278, Unknown=0, NotChecked=0, Total=342 [2018-11-23 11:43:03,551 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. Second operand 19 states. [2018-11-23 11:43:04,580 WARN L180 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-23 11:43:05,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:05,112 INFO L93 Difference]: Finished difference Result 43 states and 49 transitions. [2018-11-23 11:43:05,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 11:43:05,112 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 17 [2018-11-23 11:43:05,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:43:05,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 11:43:05,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 44 transitions. [2018-11-23 11:43:05,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 11:43:05,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 44 transitions. [2018-11-23 11:43:05,118 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 44 transitions. [2018-11-23 11:43:05,261 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:05,263 INFO L225 Difference]: With dead ends: 43 [2018-11-23 11:43:05,263 INFO L226 Difference]: Without dead ends: 29 [2018-11-23 11:43:05,264 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=126, Invalid=524, Unknown=0, NotChecked=0, Total=650 [2018-11-23 11:43:05,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-11-23 11:43:05,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 27. [2018-11-23 11:43:05,283 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:43:05,283 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand 27 states. [2018-11-23 11:43:05,283 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand 27 states. [2018-11-23 11:43:05,284 INFO L87 Difference]: Start difference. First operand 29 states. Second operand 27 states. [2018-11-23 11:43:05,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:05,286 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2018-11-23 11:43:05,287 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-11-23 11:43:05,287 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:05,288 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:05,288 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand 29 states. [2018-11-23 11:43:05,288 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 29 states. [2018-11-23 11:43:05,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:05,290 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2018-11-23 11:43:05,291 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 31 transitions. [2018-11-23 11:43:05,291 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:05,291 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:05,292 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:43:05,292 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:43:05,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-11-23 11:43:05,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2018-11-23 11:43:05,294 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 29 transitions. Word has length 17 [2018-11-23 11:43:05,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:43:05,294 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 29 transitions. [2018-11-23 11:43:05,300 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 11:43:05,300 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 29 transitions. [2018-11-23 11:43:05,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 11:43:05,301 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:43:05,302 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:43:05,302 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:43:05,302 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:43:05,302 INFO L82 PathProgramCache]: Analyzing trace with hash 423463818, now seen corresponding path program 2 times [2018-11-23 11:43:05,303 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:43:05,303 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:43:05,321 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 11:43:05,370 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 11:43:05,370 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:43:05,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:05,385 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:43:05,913 INFO L256 TraceCheckUtils]: 0: Hoare triple {804#true} call ULTIMATE.init(); {804#true} is VALID [2018-11-23 11:43:05,915 INFO L273 TraceCheckUtils]: 1: Hoare triple {804#true} assume true; {804#true} is VALID [2018-11-23 11:43:05,916 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {804#true} {804#true} #42#return; {804#true} is VALID [2018-11-23 11:43:05,916 INFO L256 TraceCheckUtils]: 3: Hoare triple {804#true} call #t~ret4 := main(); {804#true} is VALID [2018-11-23 11:43:05,916 INFO L273 TraceCheckUtils]: 4: Hoare triple {804#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {804#true} is VALID [2018-11-23 11:43:05,918 INFO L273 TraceCheckUtils]: 5: Hoare triple {804#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {824#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,918 INFO L273 TraceCheckUtils]: 6: Hoare triple {824#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {828#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,919 INFO L273 TraceCheckUtils]: 7: Hoare triple {828#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {828#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,921 INFO L273 TraceCheckUtils]: 8: Hoare triple {828#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {835#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:05,922 INFO L273 TraceCheckUtils]: 9: Hoare triple {835#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {835#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:05,923 INFO L273 TraceCheckUtils]: 10: Hoare triple {835#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {835#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:05,924 INFO L273 TraceCheckUtils]: 11: Hoare triple {835#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {845#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:05,924 INFO L273 TraceCheckUtils]: 12: Hoare triple {845#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {849#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:05,925 INFO L273 TraceCheckUtils]: 13: Hoare triple {849#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {849#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:05,926 INFO L273 TraceCheckUtils]: 14: Hoare triple {849#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {856#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,927 INFO L273 TraceCheckUtils]: 15: Hoare triple {856#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {856#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,928 INFO L273 TraceCheckUtils]: 16: Hoare triple {856#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {856#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,930 INFO L273 TraceCheckUtils]: 17: Hoare triple {856#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {866#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,930 INFO L273 TraceCheckUtils]: 18: Hoare triple {866#(and (bvslt (_ bv2 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {870#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,931 INFO L273 TraceCheckUtils]: 19: Hoare triple {870#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {870#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:05,932 INFO L273 TraceCheckUtils]: 20: Hoare triple {870#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {877#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:05,939 INFO L273 TraceCheckUtils]: 21: Hoare triple {877#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {805#false} is VALID [2018-11-23 11:43:05,940 INFO L256 TraceCheckUtils]: 22: Hoare triple {805#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {805#false} is VALID [2018-11-23 11:43:05,940 INFO L273 TraceCheckUtils]: 23: Hoare triple {805#false} ~cond := #in~cond; {805#false} is VALID [2018-11-23 11:43:05,940 INFO L273 TraceCheckUtils]: 24: Hoare triple {805#false} assume 0bv32 == ~cond; {805#false} is VALID [2018-11-23 11:43:05,940 INFO L273 TraceCheckUtils]: 25: Hoare triple {805#false} assume !false; {805#false} is VALID [2018-11-23 11:43:05,945 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:05,946 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:43:06,918 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 14 [2018-11-23 11:43:07,007 INFO L273 TraceCheckUtils]: 25: Hoare triple {805#false} assume !false; {805#false} is VALID [2018-11-23 11:43:07,008 INFO L273 TraceCheckUtils]: 24: Hoare triple {805#false} assume 0bv32 == ~cond; {805#false} is VALID [2018-11-23 11:43:07,008 INFO L273 TraceCheckUtils]: 23: Hoare triple {805#false} ~cond := #in~cond; {805#false} is VALID [2018-11-23 11:43:07,009 INFO L256 TraceCheckUtils]: 22: Hoare triple {805#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {805#false} is VALID [2018-11-23 11:43:07,009 INFO L273 TraceCheckUtils]: 21: Hoare triple {905#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {805#false} is VALID [2018-11-23 11:43:07,011 INFO L273 TraceCheckUtils]: 20: Hoare triple {909#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {905#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:07,012 INFO L273 TraceCheckUtils]: 19: Hoare triple {909#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {909#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:07,013 INFO L273 TraceCheckUtils]: 18: Hoare triple {916#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {909#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:07,040 INFO L273 TraceCheckUtils]: 17: Hoare triple {920#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {916#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,041 INFO L273 TraceCheckUtils]: 16: Hoare triple {920#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {920#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:07,041 INFO L273 TraceCheckUtils]: 15: Hoare triple {920#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {920#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:07,086 INFO L273 TraceCheckUtils]: 14: Hoare triple {930#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {920#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:07,087 INFO L273 TraceCheckUtils]: 13: Hoare triple {930#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {930#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:07,096 INFO L273 TraceCheckUtils]: 12: Hoare triple {937#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {930#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:07,166 INFO L273 TraceCheckUtils]: 11: Hoare triple {941#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {937#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,168 INFO L273 TraceCheckUtils]: 10: Hoare triple {941#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {941#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,169 INFO L273 TraceCheckUtils]: 9: Hoare triple {941#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {941#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,265 INFO L273 TraceCheckUtils]: 8: Hoare triple {951#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {941#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,269 INFO L273 TraceCheckUtils]: 7: Hoare triple {951#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {951#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,271 INFO L273 TraceCheckUtils]: 6: Hoare triple {958#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {951#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,272 INFO L273 TraceCheckUtils]: 5: Hoare triple {804#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {958#(or (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:07,272 INFO L273 TraceCheckUtils]: 4: Hoare triple {804#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {804#true} is VALID [2018-11-23 11:43:07,273 INFO L256 TraceCheckUtils]: 3: Hoare triple {804#true} call #t~ret4 := main(); {804#true} is VALID [2018-11-23 11:43:07,273 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {804#true} {804#true} #42#return; {804#true} is VALID [2018-11-23 11:43:07,273 INFO L273 TraceCheckUtils]: 1: Hoare triple {804#true} assume true; {804#true} is VALID [2018-11-23 11:43:07,273 INFO L256 TraceCheckUtils]: 0: Hoare triple {804#true} call ULTIMATE.init(); {804#true} is VALID [2018-11-23 11:43:07,277 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (6)] Exception during sending of exit command (exit): Broken pipe [2018-11-23 11:43:07,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:43:07,285 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-23 11:43:07,286 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 26 [2018-11-23 11:43:07,286 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:43:07,287 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 11:43:07,602 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:07,603 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 11:43:07,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 11:43:07,604 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2018-11-23 11:43:07,604 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. Second operand 20 states. [2018-11-23 11:43:09,224 WARN L180 SmtUtils]: Spent 195.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 24 [2018-11-23 11:43:09,855 WARN L180 SmtUtils]: Spent 451.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 25 [2018-11-23 11:43:10,444 WARN L180 SmtUtils]: Spent 376.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 15 [2018-11-23 11:43:10,944 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 21 [2018-11-23 11:43:11,397 WARN L180 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 15 [2018-11-23 11:43:12,756 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 12 [2018-11-23 11:43:13,338 WARN L180 SmtUtils]: Spent 302.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 24 [2018-11-23 11:43:13,728 WARN L180 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 20 [2018-11-23 11:43:14,125 WARN L180 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 16 [2018-11-23 11:43:14,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:14,323 INFO L93 Difference]: Finished difference Result 64 states and 79 transitions. [2018-11-23 11:43:14,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 11:43:14,323 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 26 [2018-11-23 11:43:14,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:43:14,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 11:43:14,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 71 transitions. [2018-11-23 11:43:14,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 11:43:14,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 71 transitions. [2018-11-23 11:43:14,330 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 71 transitions. [2018-11-23 11:43:15,870 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:15,872 INFO L225 Difference]: With dead ends: 64 [2018-11-23 11:43:15,872 INFO L226 Difference]: Without dead ends: 51 [2018-11-23 11:43:15,874 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=237, Invalid=755, Unknown=0, NotChecked=0, Total=992 [2018-11-23 11:43:15,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-11-23 11:43:15,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 48. [2018-11-23 11:43:15,924 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:43:15,925 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand 48 states. [2018-11-23 11:43:15,925 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand 48 states. [2018-11-23 11:43:15,925 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 48 states. [2018-11-23 11:43:15,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:15,928 INFO L93 Difference]: Finished difference Result 51 states and 58 transitions. [2018-11-23 11:43:15,929 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 58 transitions. [2018-11-23 11:43:15,929 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:15,929 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:15,930 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 51 states. [2018-11-23 11:43:15,930 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 51 states. [2018-11-23 11:43:15,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:15,933 INFO L93 Difference]: Finished difference Result 51 states and 58 transitions. [2018-11-23 11:43:15,933 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 58 transitions. [2018-11-23 11:43:15,934 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:15,934 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:15,934 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:43:15,934 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:43:15,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-11-23 11:43:15,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 55 transitions. [2018-11-23 11:43:15,937 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 55 transitions. Word has length 26 [2018-11-23 11:43:15,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:43:15,937 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 55 transitions. [2018-11-23 11:43:15,937 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 11:43:15,937 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 55 transitions. [2018-11-23 11:43:15,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-23 11:43:15,938 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:43:15,939 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:43:15,939 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:43:15,939 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:43:15,939 INFO L82 PathProgramCache]: Analyzing trace with hash 45653034, now seen corresponding path program 3 times [2018-11-23 11:43:15,939 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:43:15,940 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:43:15,970 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 11:43:16,184 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-11-23 11:43:16,184 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:43:16,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:16,221 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:43:17,184 INFO L256 TraceCheckUtils]: 0: Hoare triple {1263#true} call ULTIMATE.init(); {1263#true} is VALID [2018-11-23 11:43:17,184 INFO L273 TraceCheckUtils]: 1: Hoare triple {1263#true} assume true; {1263#true} is VALID [2018-11-23 11:43:17,185 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1263#true} {1263#true} #42#return; {1263#true} is VALID [2018-11-23 11:43:17,185 INFO L256 TraceCheckUtils]: 3: Hoare triple {1263#true} call #t~ret4 := main(); {1263#true} is VALID [2018-11-23 11:43:17,185 INFO L273 TraceCheckUtils]: 4: Hoare triple {1263#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1280#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:43:17,186 INFO L273 TraceCheckUtils]: 5: Hoare triple {1280#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1284#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:17,186 INFO L273 TraceCheckUtils]: 6: Hoare triple {1284#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1288#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:17,187 INFO L273 TraceCheckUtils]: 7: Hoare triple {1288#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1292#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:17,189 INFO L273 TraceCheckUtils]: 8: Hoare triple {1292#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1296#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:17,190 INFO L273 TraceCheckUtils]: 9: Hoare triple {1296#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1296#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:17,191 INFO L273 TraceCheckUtils]: 10: Hoare triple {1296#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1296#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:17,192 INFO L273 TraceCheckUtils]: 11: Hoare triple {1296#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1306#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:17,194 INFO L273 TraceCheckUtils]: 12: Hoare triple {1306#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1306#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:17,196 INFO L273 TraceCheckUtils]: 13: Hoare triple {1306#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1313#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:17,198 INFO L273 TraceCheckUtils]: 14: Hoare triple {1313#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1317#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:17,199 INFO L273 TraceCheckUtils]: 15: Hoare triple {1317#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1321#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:17,200 INFO L273 TraceCheckUtils]: 16: Hoare triple {1321#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1321#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:17,202 INFO L273 TraceCheckUtils]: 17: Hoare triple {1321#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1328#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:17,203 INFO L273 TraceCheckUtils]: 18: Hoare triple {1328#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1328#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:17,204 INFO L273 TraceCheckUtils]: 19: Hoare triple {1328#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1335#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:17,207 INFO L273 TraceCheckUtils]: 20: Hoare triple {1335#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1339#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:17,210 INFO L273 TraceCheckUtils]: 21: Hoare triple {1339#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967294 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1343#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:17,212 INFO L273 TraceCheckUtils]: 22: Hoare triple {1343#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1343#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:17,214 INFO L273 TraceCheckUtils]: 23: Hoare triple {1343#(and (= (_ bv3 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1350#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:17,215 INFO L273 TraceCheckUtils]: 24: Hoare triple {1350#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1354#(and (bvslt (_ bv5 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:17,218 INFO L256 TraceCheckUtils]: 25: Hoare triple {1354#(and (bvslt (_ bv5 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (not (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0))))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1358#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:43:17,219 INFO L273 TraceCheckUtils]: 26: Hoare triple {1358#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {1362#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:43:17,220 INFO L273 TraceCheckUtils]: 27: Hoare triple {1362#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {1264#false} is VALID [2018-11-23 11:43:17,220 INFO L273 TraceCheckUtils]: 28: Hoare triple {1264#false} assume !false; {1264#false} is VALID [2018-11-23 11:43:17,224 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:17,224 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:43:19,995 WARN L180 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 20 [2018-11-23 11:43:20,093 INFO L273 TraceCheckUtils]: 28: Hoare triple {1264#false} assume !false; {1264#false} is VALID [2018-11-23 11:43:20,093 INFO L273 TraceCheckUtils]: 27: Hoare triple {1372#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {1264#false} is VALID [2018-11-23 11:43:20,094 INFO L273 TraceCheckUtils]: 26: Hoare triple {1376#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {1372#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:43:20,095 INFO L256 TraceCheckUtils]: 25: Hoare triple {1380#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1376#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:43:20,095 INFO L273 TraceCheckUtils]: 24: Hoare triple {1384#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1380#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,097 INFO L273 TraceCheckUtils]: 23: Hoare triple {1388#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1384#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,098 INFO L273 TraceCheckUtils]: 22: Hoare triple {1388#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1388#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,098 INFO L273 TraceCheckUtils]: 21: Hoare triple {1395#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1388#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,117 INFO L273 TraceCheckUtils]: 20: Hoare triple {1399#(or (= main_~n~0 main_~k~0) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1395#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,118 INFO L273 TraceCheckUtils]: 19: Hoare triple {1403#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1399#(or (= main_~n~0 main_~k~0) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,119 INFO L273 TraceCheckUtils]: 18: Hoare triple {1403#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1403#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,159 INFO L273 TraceCheckUtils]: 17: Hoare triple {1410#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1403#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,160 INFO L273 TraceCheckUtils]: 16: Hoare triple {1410#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1410#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,161 INFO L273 TraceCheckUtils]: 15: Hoare triple {1417#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1410#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,210 INFO L273 TraceCheckUtils]: 14: Hoare triple {1421#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1417#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,236 INFO L273 TraceCheckUtils]: 13: Hoare triple {1425#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1421#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,237 INFO L273 TraceCheckUtils]: 12: Hoare triple {1425#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1425#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,322 INFO L273 TraceCheckUtils]: 11: Hoare triple {1432#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1425#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:43:20,322 INFO L273 TraceCheckUtils]: 10: Hoare triple {1432#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1432#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,323 INFO L273 TraceCheckUtils]: 9: Hoare triple {1432#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1432#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,401 INFO L273 TraceCheckUtils]: 8: Hoare triple {1442#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1432#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,431 INFO L273 TraceCheckUtils]: 7: Hoare triple {1446#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1442#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,432 INFO L273 TraceCheckUtils]: 6: Hoare triple {1450#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1446#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,433 INFO L273 TraceCheckUtils]: 5: Hoare triple {1280#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1450#(or (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:20,434 INFO L273 TraceCheckUtils]: 4: Hoare triple {1263#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1280#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:43:20,434 INFO L256 TraceCheckUtils]: 3: Hoare triple {1263#true} call #t~ret4 := main(); {1263#true} is VALID [2018-11-23 11:43:20,434 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1263#true} {1263#true} #42#return; {1263#true} is VALID [2018-11-23 11:43:20,434 INFO L273 TraceCheckUtils]: 1: Hoare triple {1263#true} assume true; {1263#true} is VALID [2018-11-23 11:43:20,434 INFO L256 TraceCheckUtils]: 0: Hoare triple {1263#true} call ULTIMATE.init(); {1263#true} is VALID [2018-11-23 11:43:20,439 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:20,441 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:43:20,441 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 35 [2018-11-23 11:43:20,441 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 29 [2018-11-23 11:43:20,444 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:43:20,444 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 35 states. [2018-11-23 11:43:20,917 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:20,917 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-11-23 11:43:20,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-11-23 11:43:20,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=970, Unknown=0, NotChecked=0, Total=1190 [2018-11-23 11:43:20,918 INFO L87 Difference]: Start difference. First operand 48 states and 55 transitions. Second operand 35 states. [2018-11-23 11:43:21,825 WARN L180 SmtUtils]: Spent 319.00 ms on a formula simplification that was a NOOP. DAG size: 48 [2018-11-23 11:43:24,506 WARN L180 SmtUtils]: Spent 247.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-23 11:43:25,241 WARN L180 SmtUtils]: Spent 247.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-23 11:43:25,921 WARN L180 SmtUtils]: Spent 236.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-23 11:43:26,440 WARN L180 SmtUtils]: Spent 203.00 ms on a formula simplification that was a NOOP. DAG size: 40 [2018-11-23 11:43:27,333 WARN L180 SmtUtils]: Spent 553.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 45 [2018-11-23 11:43:27,684 WARN L180 SmtUtils]: Spent 164.00 ms on a formula simplification that was a NOOP. DAG size: 35 [2018-11-23 11:43:28,397 WARN L180 SmtUtils]: Spent 275.00 ms on a formula simplification that was a NOOP. DAG size: 41 [2018-11-23 11:43:28,756 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification that was a NOOP. DAG size: 35 [2018-11-23 11:43:29,615 WARN L180 SmtUtils]: Spent 515.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 39 [2018-11-23 11:43:30,560 WARN L180 SmtUtils]: Spent 459.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 40 [2018-11-23 11:43:31,050 WARN L180 SmtUtils]: Spent 224.00 ms on a formula simplification that was a NOOP. DAG size: 39 [2018-11-23 11:43:31,555 WARN L180 SmtUtils]: Spent 155.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-23 11:43:32,039 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-23 11:43:32,601 WARN L180 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-23 11:43:32,979 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-23 11:43:33,908 WARN L180 SmtUtils]: Spent 378.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 35 [2018-11-23 11:43:34,295 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification that was a NOOP. DAG size: 37 [2018-11-23 11:43:34,741 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-23 11:43:35,197 WARN L180 SmtUtils]: Spent 123.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-23 11:43:35,746 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 29 [2018-11-23 11:43:36,060 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 32 [2018-11-23 11:43:37,048 WARN L180 SmtUtils]: Spent 388.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 34 [2018-11-23 11:43:37,457 WARN L180 SmtUtils]: Spent 133.00 ms on a formula simplification that was a NOOP. DAG size: 36 [2018-11-23 11:43:38,456 WARN L180 SmtUtils]: Spent 585.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 47 [2018-11-23 11:43:38,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:38,747 INFO L93 Difference]: Finished difference Result 99 states and 121 transitions. [2018-11-23 11:43:38,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-11-23 11:43:38,747 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 29 [2018-11-23 11:43:38,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:43:38,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-23 11:43:38,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 77 transitions. [2018-11-23 11:43:38,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-11-23 11:43:38,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 77 transitions. [2018-11-23 11:43:38,758 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 43 states and 77 transitions. [2018-11-23 11:43:45,322 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:45,325 INFO L225 Difference]: With dead ends: 99 [2018-11-23 11:43:45,325 INFO L226 Difference]: Without dead ends: 73 [2018-11-23 11:43:45,327 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 14.0s TimeCoverageRelationStatistics Valid=784, Invalid=2998, Unknown=0, NotChecked=0, Total=3782 [2018-11-23 11:43:45,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-11-23 11:43:45,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 51. [2018-11-23 11:43:45,417 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:43:45,417 INFO L82 GeneralOperation]: Start isEquivalent. First operand 73 states. Second operand 51 states. [2018-11-23 11:43:45,417 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand 51 states. [2018-11-23 11:43:45,417 INFO L87 Difference]: Start difference. First operand 73 states. Second operand 51 states. [2018-11-23 11:43:45,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:45,420 INFO L93 Difference]: Finished difference Result 73 states and 85 transitions. [2018-11-23 11:43:45,420 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 85 transitions. [2018-11-23 11:43:45,421 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:45,421 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:45,421 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand 73 states. [2018-11-23 11:43:45,422 INFO L87 Difference]: Start difference. First operand 51 states. Second operand 73 states. [2018-11-23 11:43:45,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:43:45,425 INFO L93 Difference]: Finished difference Result 73 states and 85 transitions. [2018-11-23 11:43:45,425 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 85 transitions. [2018-11-23 11:43:45,426 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:43:45,426 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:43:45,426 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:43:45,426 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:43:45,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-11-23 11:43:45,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 57 transitions. [2018-11-23 11:43:45,429 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 57 transitions. Word has length 29 [2018-11-23 11:43:45,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:43:45,429 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 57 transitions. [2018-11-23 11:43:45,429 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-11-23 11:43:45,429 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2018-11-23 11:43:45,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-23 11:43:45,431 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:43:45,431 INFO L402 BasicCegarLoop]: trace histogram [13, 13, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:43:45,431 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:43:45,431 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:43:45,432 INFO L82 PathProgramCache]: Analyzing trace with hash 1789468682, now seen corresponding path program 4 times [2018-11-23 11:43:45,432 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:43:45,432 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:43:45,461 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 11:43:45,552 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 11:43:45,552 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:43:45,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:43:45,588 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:43:46,642 INFO L256 TraceCheckUtils]: 0: Hoare triple {1880#true} call ULTIMATE.init(); {1880#true} is VALID [2018-11-23 11:43:46,642 INFO L273 TraceCheckUtils]: 1: Hoare triple {1880#true} assume true; {1880#true} is VALID [2018-11-23 11:43:46,642 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1880#true} {1880#true} #42#return; {1880#true} is VALID [2018-11-23 11:43:46,643 INFO L256 TraceCheckUtils]: 3: Hoare triple {1880#true} call #t~ret4 := main(); {1880#true} is VALID [2018-11-23 11:43:46,643 INFO L273 TraceCheckUtils]: 4: Hoare triple {1880#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1880#true} is VALID [2018-11-23 11:43:46,644 INFO L273 TraceCheckUtils]: 5: Hoare triple {1880#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {1900#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,644 INFO L273 TraceCheckUtils]: 6: Hoare triple {1900#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1904#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,646 INFO L273 TraceCheckUtils]: 7: Hoare triple {1904#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1904#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,647 INFO L273 TraceCheckUtils]: 8: Hoare triple {1904#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1911#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:46,654 INFO L273 TraceCheckUtils]: 9: Hoare triple {1911#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1911#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:46,654 INFO L273 TraceCheckUtils]: 10: Hoare triple {1911#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1911#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:46,656 INFO L273 TraceCheckUtils]: 11: Hoare triple {1911#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:46,656 INFO L273 TraceCheckUtils]: 12: Hoare triple {1921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:46,657 INFO L273 TraceCheckUtils]: 13: Hoare triple {1921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:43:46,658 INFO L273 TraceCheckUtils]: 14: Hoare triple {1921#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1931#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,658 INFO L273 TraceCheckUtils]: 15: Hoare triple {1931#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1931#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,660 INFO L273 TraceCheckUtils]: 16: Hoare triple {1931#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1931#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,661 INFO L273 TraceCheckUtils]: 17: Hoare triple {1931#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1941#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,662 INFO L273 TraceCheckUtils]: 18: Hoare triple {1941#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1941#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,663 INFO L273 TraceCheckUtils]: 19: Hoare triple {1941#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1941#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,665 INFO L273 TraceCheckUtils]: 20: Hoare triple {1941#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1951#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:46,666 INFO L273 TraceCheckUtils]: 21: Hoare triple {1951#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1951#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:46,667 INFO L273 TraceCheckUtils]: 22: Hoare triple {1951#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1951#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:43:46,669 INFO L273 TraceCheckUtils]: 23: Hoare triple {1951#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1961#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,670 INFO L273 TraceCheckUtils]: 24: Hoare triple {1961#(and (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1965#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,671 INFO L273 TraceCheckUtils]: 25: Hoare triple {1965#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1965#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,672 INFO L273 TraceCheckUtils]: 26: Hoare triple {1965#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1972#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,673 INFO L273 TraceCheckUtils]: 27: Hoare triple {1972#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1972#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,674 INFO L273 TraceCheckUtils]: 28: Hoare triple {1972#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1972#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,675 INFO L273 TraceCheckUtils]: 29: Hoare triple {1972#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1982#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,677 INFO L273 TraceCheckUtils]: 30: Hoare triple {1982#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1982#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,678 INFO L273 TraceCheckUtils]: 31: Hoare triple {1982#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {1982#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,679 INFO L273 TraceCheckUtils]: 32: Hoare triple {1982#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1992#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,680 INFO L273 TraceCheckUtils]: 33: Hoare triple {1992#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1992#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,681 INFO L273 TraceCheckUtils]: 34: Hoare triple {1992#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {1992#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} is VALID [2018-11-23 11:43:46,682 INFO L273 TraceCheckUtils]: 35: Hoare triple {1992#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2002#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 11:43:46,684 INFO L273 TraceCheckUtils]: 36: Hoare triple {2002#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2006#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 11:43:46,685 INFO L273 TraceCheckUtils]: 37: Hoare triple {2006#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2006#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 11:43:46,686 INFO L273 TraceCheckUtils]: 38: Hoare triple {2006#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv10 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2013#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:46,687 INFO L273 TraceCheckUtils]: 39: Hoare triple {2013#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2013#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:46,688 INFO L273 TraceCheckUtils]: 40: Hoare triple {2013#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2013#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:46,689 INFO L273 TraceCheckUtils]: 41: Hoare triple {2013#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2023#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:46,690 INFO L273 TraceCheckUtils]: 42: Hoare triple {2023#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2027#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-23 11:43:46,691 INFO L273 TraceCheckUtils]: 43: Hoare triple {2027#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2027#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-23 11:43:46,694 INFO L273 TraceCheckUtils]: 44: Hoare triple {2027#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvsle main_~k~0 (_ bv1000000 32)) (= (_ bv12 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2034#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:46,695 INFO L273 TraceCheckUtils]: 45: Hoare triple {2034#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (bvsle main_~k~0 (_ bv1000000 32)) (bvslt (bvadd main_~i~0 (_ bv4294967295 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1881#false} is VALID [2018-11-23 11:43:46,696 INFO L256 TraceCheckUtils]: 46: Hoare triple {1881#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1881#false} is VALID [2018-11-23 11:43:46,696 INFO L273 TraceCheckUtils]: 47: Hoare triple {1881#false} ~cond := #in~cond; {1881#false} is VALID [2018-11-23 11:43:46,696 INFO L273 TraceCheckUtils]: 48: Hoare triple {1881#false} assume 0bv32 == ~cond; {1881#false} is VALID [2018-11-23 11:43:46,696 INFO L273 TraceCheckUtils]: 49: Hoare triple {1881#false} assume !false; {1881#false} is VALID [2018-11-23 11:43:46,705 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 0 proven. 247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:46,705 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:43:48,360 WARN L180 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-23 11:43:50,202 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 14 [2018-11-23 11:43:50,218 INFO L273 TraceCheckUtils]: 49: Hoare triple {1881#false} assume !false; {1881#false} is VALID [2018-11-23 11:43:50,219 INFO L273 TraceCheckUtils]: 48: Hoare triple {1881#false} assume 0bv32 == ~cond; {1881#false} is VALID [2018-11-23 11:43:50,219 INFO L273 TraceCheckUtils]: 47: Hoare triple {1881#false} ~cond := #in~cond; {1881#false} is VALID [2018-11-23 11:43:50,219 INFO L256 TraceCheckUtils]: 46: Hoare triple {1881#false} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {1881#false} is VALID [2018-11-23 11:43:50,220 INFO L273 TraceCheckUtils]: 45: Hoare triple {2062#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {1881#false} is VALID [2018-11-23 11:43:50,222 INFO L273 TraceCheckUtils]: 44: Hoare triple {2066#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2062#(bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:50,223 INFO L273 TraceCheckUtils]: 43: Hoare triple {2066#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2066#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:50,223 INFO L273 TraceCheckUtils]: 42: Hoare triple {2073#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2066#(bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))} is VALID [2018-11-23 11:43:50,240 INFO L273 TraceCheckUtils]: 41: Hoare triple {2077#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2073#(or (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,242 INFO L273 TraceCheckUtils]: 40: Hoare triple {2077#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2077#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:50,244 INFO L273 TraceCheckUtils]: 39: Hoare triple {2077#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2077#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:50,283 INFO L273 TraceCheckUtils]: 38: Hoare triple {2087#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2077#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:50,285 INFO L273 TraceCheckUtils]: 37: Hoare triple {2087#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2087#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:50,286 INFO L273 TraceCheckUtils]: 36: Hoare triple {2094#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2087#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:50,364 INFO L273 TraceCheckUtils]: 35: Hoare triple {2098#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2094#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,364 INFO L273 TraceCheckUtils]: 34: Hoare triple {2098#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2098#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,365 INFO L273 TraceCheckUtils]: 33: Hoare triple {2098#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2098#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,451 INFO L273 TraceCheckUtils]: 32: Hoare triple {2108#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2098#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,452 INFO L273 TraceCheckUtils]: 31: Hoare triple {2108#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2108#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,452 INFO L273 TraceCheckUtils]: 30: Hoare triple {2108#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2108#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,533 INFO L273 TraceCheckUtils]: 29: Hoare triple {2118#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2108#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,533 INFO L273 TraceCheckUtils]: 28: Hoare triple {2118#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2118#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,534 INFO L273 TraceCheckUtils]: 27: Hoare triple {2118#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2118#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,680 INFO L273 TraceCheckUtils]: 26: Hoare triple {2128#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2118#(or (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,681 INFO L273 TraceCheckUtils]: 25: Hoare triple {2128#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2128#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,681 INFO L273 TraceCheckUtils]: 24: Hoare triple {2135#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2128#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,740 INFO L273 TraceCheckUtils]: 23: Hoare triple {2139#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2135#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,749 INFO L273 TraceCheckUtils]: 22: Hoare triple {2139#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2139#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,749 INFO L273 TraceCheckUtils]: 21: Hoare triple {2139#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2139#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,851 INFO L273 TraceCheckUtils]: 20: Hoare triple {2149#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2139#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,852 INFO L273 TraceCheckUtils]: 19: Hoare triple {2149#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2149#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,852 INFO L273 TraceCheckUtils]: 18: Hoare triple {2149#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2149#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,921 INFO L273 TraceCheckUtils]: 17: Hoare triple {2159#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2149#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:50,922 INFO L273 TraceCheckUtils]: 16: Hoare triple {2159#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2159#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:50,922 INFO L273 TraceCheckUtils]: 15: Hoare triple {2159#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2159#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:51,038 INFO L273 TraceCheckUtils]: 14: Hoare triple {2169#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2159#(or (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:43:51,040 INFO L273 TraceCheckUtils]: 13: Hoare triple {2169#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2169#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,040 INFO L273 TraceCheckUtils]: 12: Hoare triple {2169#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2169#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,182 INFO L273 TraceCheckUtils]: 11: Hoare triple {2179#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2169#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,182 INFO L273 TraceCheckUtils]: 10: Hoare triple {2179#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2179#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,183 INFO L273 TraceCheckUtils]: 9: Hoare triple {2179#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2179#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,291 INFO L273 TraceCheckUtils]: 8: Hoare triple {2189#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2179#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,292 INFO L273 TraceCheckUtils]: 7: Hoare triple {2189#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2189#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,292 INFO L273 TraceCheckUtils]: 6: Hoare triple {2196#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2189#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,294 INFO L273 TraceCheckUtils]: 5: Hoare triple {1880#true} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {2196#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:43:51,294 INFO L273 TraceCheckUtils]: 4: Hoare triple {1880#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {1880#true} is VALID [2018-11-23 11:43:51,294 INFO L256 TraceCheckUtils]: 3: Hoare triple {1880#true} call #t~ret4 := main(); {1880#true} is VALID [2018-11-23 11:43:51,294 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {1880#true} {1880#true} #42#return; {1880#true} is VALID [2018-11-23 11:43:51,294 INFO L273 TraceCheckUtils]: 1: Hoare triple {1880#true} assume true; {1880#true} is VALID [2018-11-23 11:43:51,295 INFO L256 TraceCheckUtils]: 0: Hoare triple {1880#true} call ULTIMATE.init(); {1880#true} is VALID [2018-11-23 11:43:51,303 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 0 proven. 247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:43:51,305 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:43:51,305 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 38 [2018-11-23 11:43:51,307 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-11-23 11:43:51,308 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:43:51,308 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 38 states. [2018-11-23 11:43:52,417 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:43:52,417 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-23 11:43:52,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-23 11:43:52,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=245, Invalid=1161, Unknown=0, NotChecked=0, Total=1406 [2018-11-23 11:43:52,418 INFO L87 Difference]: Start difference. First operand 51 states and 57 transitions. Second operand 38 states. [2018-11-23 11:43:53,450 WARN L180 SmtUtils]: Spent 262.00 ms on a formula simplification that was a NOOP. DAG size: 58 [2018-11-23 11:43:59,258 WARN L180 SmtUtils]: Spent 894.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 56 [2018-11-23 11:44:01,317 WARN L180 SmtUtils]: Spent 1.31 s on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-11-23 11:44:03,307 WARN L180 SmtUtils]: Spent 1.04 s on a formula simplification. DAG size of input: 68 DAG size of output: 27 [2018-11-23 11:44:05,043 WARN L180 SmtUtils]: Spent 800.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 53 [2018-11-23 11:44:07,267 WARN L180 SmtUtils]: Spent 1.07 s on a formula simplification. DAG size of input: 63 DAG size of output: 27 [2018-11-23 11:44:09,755 WARN L180 SmtUtils]: Spent 218.00 ms on a formula simplification that was a NOOP. DAG size: 50 [2018-11-23 11:44:11,726 WARN L180 SmtUtils]: Spent 978.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 24 [2018-11-23 11:44:12,924 WARN L180 SmtUtils]: Spent 647.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 48 [2018-11-23 11:44:14,891 WARN L180 SmtUtils]: Spent 1.30 s on a formula simplification. DAG size of input: 64 DAG size of output: 59 [2018-11-23 11:44:16,833 WARN L180 SmtUtils]: Spent 904.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 32 [2018-11-23 11:44:19,349 WARN L180 SmtUtils]: Spent 1.10 s on a formula simplification. DAG size of input: 61 DAG size of output: 32 [2018-11-23 11:44:21,306 WARN L180 SmtUtils]: Spent 938.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 29 [2018-11-23 11:44:23,095 WARN L180 SmtUtils]: Spent 1.05 s on a formula simplification. DAG size of input: 64 DAG size of output: 37 [2018-11-23 11:44:25,463 WARN L180 SmtUtils]: Spent 765.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 37 [2018-11-23 11:44:27,252 WARN L180 SmtUtils]: Spent 856.00 ms on a formula simplification. DAG size of input: 54 DAG size of output: 34 [2018-11-23 11:44:28,971 WARN L180 SmtUtils]: Spent 962.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 42 [2018-11-23 11:44:31,493 WARN L180 SmtUtils]: Spent 721.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 42 [2018-11-23 11:44:32,867 WARN L180 SmtUtils]: Spent 596.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 39 [2018-11-23 11:44:34,330 WARN L180 SmtUtils]: Spent 708.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 47 [2018-11-23 11:44:36,518 WARN L180 SmtUtils]: Spent 642.00 ms on a formula simplification. DAG size of input: 55 DAG size of output: 47 [2018-11-23 11:44:37,995 WARN L180 SmtUtils]: Spent 809.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 44 [2018-11-23 11:44:39,645 WARN L180 SmtUtils]: Spent 948.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 52 [2018-11-23 11:44:42,586 WARN L180 SmtUtils]: Spent 995.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 48 [2018-11-23 11:44:42,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:44:42,980 INFO L93 Difference]: Finished difference Result 139 states and 176 transitions. [2018-11-23 11:44:42,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-11-23 11:44:42,980 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-11-23 11:44:42,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 11:44:42,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-11-23 11:44:42,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 132 transitions. [2018-11-23 11:44:42,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-11-23 11:44:42,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 132 transitions. [2018-11-23 11:44:42,997 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 47 states and 132 transitions. [2018-11-23 11:45:09,021 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 132 edges. 126 inductive. 0 not inductive. 6 times theorem prover too weak to decide inductivity. [2018-11-23 11:45:09,026 INFO L225 Difference]: With dead ends: 139 [2018-11-23 11:45:09,026 INFO L226 Difference]: Without dead ends: 114 [2018-11-23 11:45:09,030 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 784 ImplicationChecksByTransitivity, 41.5s TimeCoverageRelationStatistics Valid=853, Invalid=3703, Unknown=0, NotChecked=0, Total=4556 [2018-11-23 11:45:09,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-11-23 11:45:09,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 96. [2018-11-23 11:45:09,158 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 11:45:09,158 INFO L82 GeneralOperation]: Start isEquivalent. First operand 114 states. Second operand 96 states. [2018-11-23 11:45:09,158 INFO L74 IsIncluded]: Start isIncluded. First operand 114 states. Second operand 96 states. [2018-11-23 11:45:09,158 INFO L87 Difference]: Start difference. First operand 114 states. Second operand 96 states. [2018-11-23 11:45:09,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:45:09,163 INFO L93 Difference]: Finished difference Result 114 states and 134 transitions. [2018-11-23 11:45:09,163 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 134 transitions. [2018-11-23 11:45:09,164 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:45:09,164 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:45:09,164 INFO L74 IsIncluded]: Start isIncluded. First operand 96 states. Second operand 114 states. [2018-11-23 11:45:09,164 INFO L87 Difference]: Start difference. First operand 96 states. Second operand 114 states. [2018-11-23 11:45:09,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 11:45:09,169 INFO L93 Difference]: Finished difference Result 114 states and 134 transitions. [2018-11-23 11:45:09,169 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 134 transitions. [2018-11-23 11:45:09,169 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 11:45:09,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 11:45:09,170 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 11:45:09,170 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 11:45:09,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-23 11:45:09,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 111 transitions. [2018-11-23 11:45:09,173 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 111 transitions. Word has length 50 [2018-11-23 11:45:09,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 11:45:09,174 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 111 transitions. [2018-11-23 11:45:09,174 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-11-23 11:45:09,174 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 111 transitions. [2018-11-23 11:45:09,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 11:45:09,175 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 11:45:09,175 INFO L402 BasicCegarLoop]: trace histogram [14, 14, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 11:45:09,175 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 11:45:09,176 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 11:45:09,176 INFO L82 PathProgramCache]: Analyzing trace with hash -864754638, now seen corresponding path program 5 times [2018-11-23 11:45:09,176 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 11:45:09,176 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 11:45:09,206 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2018-11-23 11:45:10,522 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2018-11-23 11:45:10,522 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 11:45:10,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 11:45:10,621 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 11:45:12,257 INFO L256 TraceCheckUtils]: 0: Hoare triple {2827#true} call ULTIMATE.init(); {2827#true} is VALID [2018-11-23 11:45:12,257 INFO L273 TraceCheckUtils]: 1: Hoare triple {2827#true} assume true; {2827#true} is VALID [2018-11-23 11:45:12,257 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2827#true} {2827#true} #42#return; {2827#true} is VALID [2018-11-23 11:45:12,257 INFO L256 TraceCheckUtils]: 3: Hoare triple {2827#true} call #t~ret4 := main(); {2827#true} is VALID [2018-11-23 11:45:12,259 INFO L273 TraceCheckUtils]: 4: Hoare triple {2827#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {2844#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:45:12,260 INFO L273 TraceCheckUtils]: 5: Hoare triple {2844#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {2848#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:12,260 INFO L273 TraceCheckUtils]: 6: Hoare triple {2848#(and (= main_~n~0 (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2852#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:12,261 INFO L273 TraceCheckUtils]: 7: Hoare triple {2852#(and (= main_~n~0 (_ bv0 32)) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2856#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:12,261 INFO L273 TraceCheckUtils]: 8: Hoare triple {2856#(and (= (_ bv1 32) main_~n~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= main_~i~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2860#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:45:12,262 INFO L273 TraceCheckUtils]: 9: Hoare triple {2860#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2860#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:45:12,263 INFO L273 TraceCheckUtils]: 10: Hoare triple {2860#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2860#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 11:45:12,264 INFO L273 TraceCheckUtils]: 11: Hoare triple {2860#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2870#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:45:12,265 INFO L273 TraceCheckUtils]: 12: Hoare triple {2870#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2870#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:45:12,268 INFO L273 TraceCheckUtils]: 13: Hoare triple {2870#(and (= (_ bv1 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2877#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 11:45:12,269 INFO L273 TraceCheckUtils]: 14: Hoare triple {2877#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv2 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2881#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,270 INFO L273 TraceCheckUtils]: 15: Hoare triple {2881#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2881#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,271 INFO L273 TraceCheckUtils]: 16: Hoare triple {2881#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2881#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,271 INFO L273 TraceCheckUtils]: 17: Hoare triple {2881#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2891#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,272 INFO L273 TraceCheckUtils]: 18: Hoare triple {2891#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2891#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,272 INFO L273 TraceCheckUtils]: 19: Hoare triple {2891#(and (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv2 32) main_~n~0) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2898#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,273 INFO L273 TraceCheckUtils]: 20: Hoare triple {2898#(and (= (_ bv3 32) main_~n~0) (= (_ bv4 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2902#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:45:12,273 INFO L273 TraceCheckUtils]: 21: Hoare triple {2902#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2902#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:45:12,274 INFO L273 TraceCheckUtils]: 22: Hoare triple {2902#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2902#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} is VALID [2018-11-23 11:45:12,275 INFO L273 TraceCheckUtils]: 23: Hoare triple {2902#(and (= (_ bv3 32) main_~n~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967291 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2912#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,276 INFO L273 TraceCheckUtils]: 24: Hoare triple {2912#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv0 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2916#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)))} is VALID [2018-11-23 11:45:12,277 INFO L273 TraceCheckUtils]: 25: Hoare triple {2916#(and (= (_ bv3 32) main_~n~0) (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2920#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv4 32) main_~n~0))} is VALID [2018-11-23 11:45:12,278 INFO L273 TraceCheckUtils]: 26: Hoare triple {2920#(and (= (_ bv6 32) main_~i~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv4 32) main_~n~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2924#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv4 32) main_~n~0))} is VALID [2018-11-23 11:45:12,279 INFO L273 TraceCheckUtils]: 27: Hoare triple {2924#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv4 32) main_~n~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2924#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv4 32) main_~n~0))} is VALID [2018-11-23 11:45:12,280 INFO L273 TraceCheckUtils]: 28: Hoare triple {2924#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv4 32) main_~n~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2924#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv4 32) main_~n~0))} is VALID [2018-11-23 11:45:12,281 INFO L273 TraceCheckUtils]: 29: Hoare triple {2924#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv4 32) main_~n~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2934#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (= (_ bv4 32) main_~n~0))} is VALID [2018-11-23 11:45:12,282 INFO L273 TraceCheckUtils]: 30: Hoare triple {2934#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (= (_ bv4 32) main_~n~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2934#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (= (_ bv4 32) main_~n~0))} is VALID [2018-11-23 11:45:12,283 INFO L273 TraceCheckUtils]: 31: Hoare triple {2934#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (= (_ bv4 32) main_~n~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2941#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (= (_ bv5 32) main_~n~0))} is VALID [2018-11-23 11:45:12,284 INFO L273 TraceCheckUtils]: 32: Hoare triple {2941#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv8 32) main_~i~0) (= (_ bv5 32) main_~n~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2945#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0))} is VALID [2018-11-23 11:45:12,285 INFO L273 TraceCheckUtils]: 33: Hoare triple {2945#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2945#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0))} is VALID [2018-11-23 11:45:12,286 INFO L273 TraceCheckUtils]: 34: Hoare triple {2945#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2945#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0))} is VALID [2018-11-23 11:45:12,287 INFO L273 TraceCheckUtils]: 35: Hoare triple {2945#(and (= (bvadd main_~i~0 (_ bv4294967287 32)) (_ bv0 32)) (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2955#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 11:45:12,289 INFO L273 TraceCheckUtils]: 36: Hoare triple {2955#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv6 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv5 32) main_~n~0) (= (_ bv10 32) main_~i~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2959#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv5 32) main_~n~0) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 11:45:12,290 INFO L273 TraceCheckUtils]: 37: Hoare triple {2959#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv5 32) main_~n~0) (= (_ bv10 32) main_~i~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2963#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv6 32) main_~n~0) (= (_ bv10 32) main_~i~0))} is VALID [2018-11-23 11:45:12,292 INFO L273 TraceCheckUtils]: 38: Hoare triple {2963#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv6 32) main_~n~0) (= (_ bv10 32) main_~i~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2967#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (= (_ bv6 32) main_~n~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,293 INFO L273 TraceCheckUtils]: 39: Hoare triple {2967#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (= (_ bv6 32) main_~n~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2967#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (= (_ bv6 32) main_~n~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,294 INFO L273 TraceCheckUtils]: 40: Hoare triple {2967#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (= (_ bv6 32) main_~n~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2967#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (= (_ bv6 32) main_~n~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,295 INFO L273 TraceCheckUtils]: 41: Hoare triple {2967#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (bvadd main_~i~0 (_ bv4294967285 32)) (_ bv0 32)) (= (_ bv6 32) main_~n~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2977#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv6 32) main_~n~0) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:12,296 INFO L273 TraceCheckUtils]: 42: Hoare triple {2977#(and (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv6 32) main_~n~0) (= (_ bv12 32) main_~i~0) (bvslt (_ bv10 32) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2981#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv6 32) main_~n~0) (= (_ bv12 32) main_~i~0))} is VALID [2018-11-23 11:45:12,297 INFO L273 TraceCheckUtils]: 43: Hoare triple {2981#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv6 32) main_~n~0) (= (_ bv12 32) main_~i~0))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {2985#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv12 32) main_~i~0) (= (_ bv7 32) main_~n~0))} is VALID [2018-11-23 11:45:12,298 INFO L273 TraceCheckUtils]: 44: Hoare triple {2985#(and (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvsge main_~k~0 (_ bv4293967296 32)) (= (_ bv12 32) main_~i~0) (= (_ bv7 32) main_~n~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (= (_ bv7 32) main_~n~0))} is VALID [2018-11-23 11:45:12,299 INFO L273 TraceCheckUtils]: 45: Hoare triple {2989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (= (_ bv7 32) main_~n~0))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {2989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (= (_ bv7 32) main_~n~0))} is VALID [2018-11-23 11:45:12,300 INFO L273 TraceCheckUtils]: 46: Hoare triple {2989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (= (_ bv7 32) main_~n~0))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {2989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (= (_ bv7 32) main_~n~0))} is VALID [2018-11-23 11:45:12,301 INFO L273 TraceCheckUtils]: 47: Hoare triple {2989#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~i~0 (_ bv4294967283 32)) (_ bv0 32)) (= (_ bv7 32) main_~n~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2999#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv14 32) main_~i~0) (= (_ bv7 32) main_~n~0))} is VALID [2018-11-23 11:45:12,301 INFO L273 TraceCheckUtils]: 48: Hoare triple {2999#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (= (_ bv14 32) main_~i~0) (= (_ bv7 32) main_~n~0))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3003#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (_ bv14 32) (bvmul (_ bv2 32) main_~k~0))) (= (_ bv7 32) main_~n~0))} is VALID [2018-11-23 11:45:12,303 INFO L256 TraceCheckUtils]: 49: Hoare triple {3003#(and (bvsge main_~k~0 (_ bv4293967296 32)) (bvslt (_ bv12 32) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (_ bv14 32) (bvmul (_ bv2 32) main_~k~0))) (= (_ bv7 32) main_~n~0))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {3007#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:45:12,304 INFO L273 TraceCheckUtils]: 50: Hoare triple {3007#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {3011#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 11:45:12,305 INFO L273 TraceCheckUtils]: 51: Hoare triple {3011#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {2828#false} is VALID [2018-11-23 11:45:12,305 INFO L273 TraceCheckUtils]: 52: Hoare triple {2828#false} assume !false; {2828#false} is VALID [2018-11-23 11:45:12,314 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 0 proven. 287 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:45:12,315 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 11:45:16,372 WARN L180 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 20 [2018-11-23 11:45:20,544 WARN L180 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 20 [2018-11-23 11:45:20,648 INFO L273 TraceCheckUtils]: 52: Hoare triple {2828#false} assume !false; {2828#false} is VALID [2018-11-23 11:45:20,648 INFO L273 TraceCheckUtils]: 51: Hoare triple {3021#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {2828#false} is VALID [2018-11-23 11:45:20,649 INFO L273 TraceCheckUtils]: 50: Hoare triple {3025#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {3021#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 11:45:20,650 INFO L256 TraceCheckUtils]: 49: Hoare triple {3029#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} call __VERIFIER_assert((if ~bvslt32(~k~0, 0bv32) || ~n~0 == ~k~0 then 1bv32 else 0bv32)); {3025#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 11:45:20,650 INFO L273 TraceCheckUtils]: 48: Hoare triple {3033#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3029#(or (= main_~n~0 main_~k~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,653 INFO L273 TraceCheckUtils]: 47: Hoare triple {3037#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3033#(or (= main_~n~0 main_~k~0) (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,653 INFO L273 TraceCheckUtils]: 46: Hoare triple {3037#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3037#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,654 INFO L273 TraceCheckUtils]: 45: Hoare triple {3037#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3037#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,674 INFO L273 TraceCheckUtils]: 44: Hoare triple {3047#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3037#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,676 INFO L273 TraceCheckUtils]: 43: Hoare triple {3051#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3047#(or (= main_~n~0 main_~k~0) (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,677 INFO L273 TraceCheckUtils]: 42: Hoare triple {3055#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3051#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,716 INFO L273 TraceCheckUtils]: 41: Hoare triple {3059#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3055#(or (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:20,716 INFO L273 TraceCheckUtils]: 40: Hoare triple {3059#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3059#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,717 INFO L273 TraceCheckUtils]: 39: Hoare triple {3059#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3059#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,780 INFO L273 TraceCheckUtils]: 38: Hoare triple {3069#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3059#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,807 INFO L273 TraceCheckUtils]: 37: Hoare triple {3073#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3069#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967295 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,808 INFO L273 TraceCheckUtils]: 36: Hoare triple {3077#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3073#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,877 INFO L273 TraceCheckUtils]: 35: Hoare triple {3081#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3077#(or (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:20,877 INFO L273 TraceCheckUtils]: 34: Hoare triple {3081#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3081#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:20,878 INFO L273 TraceCheckUtils]: 33: Hoare triple {3081#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3081#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,051 INFO L273 TraceCheckUtils]: 32: Hoare triple {3091#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3081#(or (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0)) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,087 INFO L273 TraceCheckUtils]: 31: Hoare triple {3095#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3091#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967294 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,088 INFO L273 TraceCheckUtils]: 30: Hoare triple {3095#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3095#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,259 INFO L273 TraceCheckUtils]: 29: Hoare triple {3102#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3095#(or (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,260 INFO L273 TraceCheckUtils]: 28: Hoare triple {3102#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3102#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,260 INFO L273 TraceCheckUtils]: 27: Hoare triple {3102#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3102#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,398 INFO L273 TraceCheckUtils]: 26: Hoare triple {3112#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3102#(or (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,444 INFO L273 TraceCheckUtils]: 25: Hoare triple {3116#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3112#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~n~0 (_ bv3 32)) main_~k~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,445 INFO L273 TraceCheckUtils]: 24: Hoare triple {3120#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3116#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,519 INFO L273 TraceCheckUtils]: 23: Hoare triple {3124#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3120#(or (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,521 INFO L273 TraceCheckUtils]: 22: Hoare triple {3124#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3124#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,539 INFO L273 TraceCheckUtils]: 21: Hoare triple {3124#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3124#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,675 INFO L273 TraceCheckUtils]: 20: Hoare triple {3134#(or (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3124#(or (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv1 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv7 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,698 INFO L273 TraceCheckUtils]: 19: Hoare triple {3138#(or (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3134#(or (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967292 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:21,699 INFO L273 TraceCheckUtils]: 18: Hoare triple {3138#(or (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3138#(or (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:21,804 INFO L273 TraceCheckUtils]: 17: Hoare triple {3145#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3138#(or (not (bvslt (bvadd main_~i~0 (_ bv8 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv2 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0)))} is VALID [2018-11-23 11:45:21,805 INFO L273 TraceCheckUtils]: 16: Hoare triple {3145#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3145#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,807 INFO L273 TraceCheckUtils]: 15: Hoare triple {3145#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3145#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,937 INFO L273 TraceCheckUtils]: 14: Hoare triple {3155#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3145#(or (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv9 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv3 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:21,976 INFO L273 TraceCheckUtils]: 13: Hoare triple {3159#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3155#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967291 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:21,977 INFO L273 TraceCheckUtils]: 12: Hoare triple {3159#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3159#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:22,091 INFO L273 TraceCheckUtils]: 11: Hoare triple {3166#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3159#(or (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0)) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv10 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv4 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:22,092 INFO L273 TraceCheckUtils]: 10: Hoare triple {3166#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !(0bv32 == ~bvsrem32(~i~0, 2bv32)); {3166#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:22,092 INFO L273 TraceCheckUtils]: 9: Hoare triple {3166#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3166#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:22,188 INFO L273 TraceCheckUtils]: 8: Hoare triple {3176#(or (bvslt (bvadd main_~i~0 (_ bv14 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3166#(or (bvslt (bvadd main_~i~0 (_ bv13 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv11 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt (bvadd main_~i~0 (_ bv5 32)) (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:22,216 INFO L273 TraceCheckUtils]: 7: Hoare triple {3180#(or (= (bvadd main_~n~0 (_ bv7 32)) main_~k~0) (bvslt (bvadd main_~i~0 (_ bv14 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} assume 0bv32 == ~bvsrem32(~i~0, 2bv32);#t~post3 := ~n~0;~n~0 := ~bvadd32(1bv32, #t~post3);havoc #t~post3; {3176#(or (bvslt (bvadd main_~i~0 (_ bv14 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (= (bvadd main_~k~0 (_ bv4294967290 32)) main_~n~0) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:22,217 INFO L273 TraceCheckUtils]: 6: Hoare triple {3184#(or (= (bvadd main_~n~0 (_ bv7 32)) main_~k~0) (bvslt (bvadd main_~i~0 (_ bv14 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} assume !!~bvslt32(~i~0, ~bvmul32(2bv32, ~k~0)); {3180#(or (= (bvadd main_~n~0 (_ bv7 32)) main_~k~0) (bvslt (bvadd main_~i~0 (_ bv14 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv6 32)) (bvmul (_ bv2 32) main_~k~0))) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)))} is VALID [2018-11-23 11:45:22,218 INFO L273 TraceCheckUtils]: 5: Hoare triple {2844#(= main_~n~0 (_ bv0 32))} assume !!(~bvsle32(~k~0, 1000000bv32) && ~bvsge32(~k~0, 4293967296bv32));~i~0 := 0bv32; {3184#(or (= (bvadd main_~n~0 (_ bv7 32)) main_~k~0) (bvslt (bvadd main_~i~0 (_ bv14 32)) (bvmul (_ bv2 32) main_~k~0)) (not (bvslt (bvadd main_~i~0 (_ bv12 32)) (bvmul (_ bv2 32) main_~k~0))) (bvslt main_~k~0 (_ bv0 32)) (not (bvslt main_~i~0 (bvmul (_ bv2 32) main_~k~0))))} is VALID [2018-11-23 11:45:22,219 INFO L273 TraceCheckUtils]: 4: Hoare triple {2827#true} ~i~0 := 0bv32;~n~0 := 0bv32;~k~0 := #t~nondet1;havoc #t~nondet1; {2844#(= main_~n~0 (_ bv0 32))} is VALID [2018-11-23 11:45:22,219 INFO L256 TraceCheckUtils]: 3: Hoare triple {2827#true} call #t~ret4 := main(); {2827#true} is VALID [2018-11-23 11:45:22,219 INFO L268 TraceCheckUtils]: 2: Hoare quadruple {2827#true} {2827#true} #42#return; {2827#true} is VALID [2018-11-23 11:45:22,220 INFO L273 TraceCheckUtils]: 1: Hoare triple {2827#true} assume true; {2827#true} is VALID [2018-11-23 11:45:22,220 INFO L256 TraceCheckUtils]: 0: Hoare triple {2827#true} call ULTIMATE.init(); {2827#true} is VALID [2018-11-23 11:45:22,234 INFO L134 CoverageAnalysis]: Checked inductivity of 287 backedges. 0 proven. 287 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 11:45:22,236 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 11:45:22,237 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 61 [2018-11-23 11:45:22,237 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 53 [2018-11-23 11:45:22,239 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 11:45:22,240 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 61 states. [2018-11-23 11:45:23,837 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 100 edges. 100 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 11:45:23,838 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-11-23 11:45:23,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-11-23 11:45:23,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=500, Invalid=3160, Unknown=0, NotChecked=0, Total=3660 [2018-11-23 11:45:23,839 INFO L87 Difference]: Start difference. First operand 96 states and 111 transitions. Second operand 61 states. [2018-11-23 11:45:29,169 WARN L180 SmtUtils]: Spent 4.16 s on a formula simplification that was a NOOP. DAG size: 96 [2018-11-23 11:45:32,853 WARN L180 SmtUtils]: Spent 413.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 16 [2018-11-23 11:45:40,992 WARN L180 SmtUtils]: Spent 989.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 62 [2018-11-23 11:45:42,281 WARN L180 SmtUtils]: Spent 422.00 ms on a formula simplification that was a NOOP. DAG size: 62 [2018-11-23 11:45:46,379 WARN L180 SmtUtils]: Spent 168.00 ms on a formula simplification that was a NOOP. DAG size: 41 [2018-11-23 11:45:50,650 WARN L180 SmtUtils]: Spent 2.33 s on a formula simplification. DAG size of input: 95 DAG size of output: 94 [2018-11-23 11:45:51,998 WARN L180 SmtUtils]: Spent 602.00 ms on a formula simplification that was a NOOP. DAG size: 42 [2018-11-23 11:45:54,425 WARN L180 SmtUtils]: Spent 1.02 s on a formula simplification that was a NOOP. DAG size: 91 [2018-11-23 11:45:55,205 WARN L180 SmtUtils]: Spent 188.00 ms on a formula simplification that was a NOOP. DAG size: 45 [2018-11-23 11:45:59,801 WARN L180 SmtUtils]: Spent 3.86 s on a formula simplification. DAG size of input: 90 DAG size of output: 89 [2018-11-23 11:46:03,561 WARN L180 SmtUtils]: Spent 2.67 s on a formula simplification. DAG size of input: 100 DAG size of output: 60 [2018-11-23 11:46:06,966 WARN L180 SmtUtils]: Spent 457.00 ms on a formula simplification that was a NOOP. DAG size: 69 [2018-11-23 11:46:07,910 WARN L180 SmtUtils]: Spent 287.00 ms on a formula simplification that was a NOOP. DAG size: 52 [2018-11-23 11:46:12,141 WARN L180 SmtUtils]: Spent 2.58 s on a formula simplification. DAG size of input: 101 DAG size of output: 41 [2018-11-23 11:46:13,482 WARN L180 SmtUtils]: Spent 402.00 ms on a formula simplification that was a NOOP. DAG size: 64 [2018-11-23 11:46:14,431 WARN L180 SmtUtils]: Spent 247.00 ms on a formula simplification that was a NOOP. DAG size: 52 [2018-11-23 11:46:20,384 WARN L180 SmtUtils]: Spent 2.47 s on a formula simplification. DAG size of input: 95 DAG size of output: 41 [2018-11-23 11:46:22,072 WARN L180 SmtUtils]: Spent 447.00 ms on a formula simplification that was a NOOP. DAG size: 66 [2018-11-23 11:46:23,052 WARN L180 SmtUtils]: Spent 272.00 ms on a formula simplification that was a NOOP. DAG size: 54 [2018-11-23 11:46:24,455 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification that was a NOOP. DAG size: 37 [2018-11-23 11:46:25,084 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification that was a NOOP. DAG size: 38 [2018-11-23 11:46:27,854 WARN L180 SmtUtils]: Spent 1.68 s on a formula simplification. DAG size of input: 73 DAG size of output: 47 [2018-11-23 11:46:29,551 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-23 11:46:32,607 WARN L180 SmtUtils]: Spent 1.97 s on a formula simplification. DAG size of input: 82 DAG size of output: 81 [2018-11-23 11:46:35,841 WARN L180 SmtUtils]: Spent 1.31 s on a formula simplification. DAG size of input: 84 DAG size of output: 34 [2018-11-23 11:46:36,961 WARN L180 SmtUtils]: Spent 167.00 ms on a formula simplification that was a NOOP. DAG size: 33 [2018-11-23 11:46:37,813 WARN L180 SmtUtils]: Spent 175.00 ms on a formula simplification that was a NOOP. DAG size: 38