java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/mbpr3_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:25:33,663 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:25:33,665 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:25:33,677 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:25:33,678 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:25:33,679 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:25:33,680 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:25:33,682 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:25:33,684 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:25:33,684 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:25:33,685 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:25:33,686 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:25:33,687 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:25:33,688 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:25:33,689 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:25:33,690 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:25:33,691 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:25:33,693 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:25:33,695 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:25:33,697 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:25:33,698 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:25:33,699 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:25:33,702 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:25:33,702 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:25:33,702 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:25:33,703 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:25:33,704 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:25:33,705 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:25:33,706 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:25:33,707 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:25:33,708 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:25:33,708 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:25:33,709 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:25:33,709 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:25:33,710 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:25:33,711 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:25:33,711 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:25:33,727 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:25:33,728 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:25:33,728 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:25:33,729 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:25:33,730 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:25:33,730 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:25:33,731 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:25:33,731 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:25:33,731 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:25:33,731 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:25:33,731 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:25:33,732 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:25:33,732 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:25:33,732 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:25:33,732 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:25:33,732 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:25:33,733 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:25:33,734 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:25:33,734 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:25:33,734 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:25:33,734 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:25:33,734 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:25:33,735 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:25:33,735 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:25:33,735 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:25:33,735 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:25:33,735 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:25:33,736 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:25:33,736 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:25:33,737 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:25:33,737 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:25:33,737 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:25:33,737 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:25:33,793 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:25:33,809 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:25:33,813 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:25:33,815 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:25:33,815 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:25:33,816 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/mbpr3_true-unreach-call.i [2018-11-23 10:25:33,877 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a86a833d6/08a03894286741f58613b3be330d0284/FLAGc625b5203 [2018-11-23 10:25:34,308 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:25:34,309 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/mbpr3_true-unreach-call.i [2018-11-23 10:25:34,316 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a86a833d6/08a03894286741f58613b3be330d0284/FLAGc625b5203 [2018-11-23 10:25:34,681 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a86a833d6/08a03894286741f58613b3be330d0284 [2018-11-23 10:25:34,689 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:25:34,691 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:25:34,692 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:25:34,692 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:25:34,700 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:25:34,702 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:25:34" (1/1) ... [2018-11-23 10:25:34,705 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5af38099 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:34, skipping insertion in model container [2018-11-23 10:25:34,705 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:25:34" (1/1) ... [2018-11-23 10:25:34,716 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:25:34,744 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:25:35,024 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:25:35,031 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:25:35,086 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:25:35,116 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:25:35,117 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35 WrapperNode [2018-11-23 10:25:35,117 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:25:35,118 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:25:35,118 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:25:35,118 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:25:35,128 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,141 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,150 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:25:35,150 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:25:35,150 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:25:35,150 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:25:35,162 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,162 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,166 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,167 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,194 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,203 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,205 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... [2018-11-23 10:25:35,209 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:25:35,209 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:25:35,209 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:25:35,210 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:25:35,210 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:25:35,329 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:25:35,329 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:25:35,329 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:25:35,330 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:25:35,330 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:25:35,330 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:25:35,330 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:25:35,330 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:25:35,330 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:25:35,331 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:25:35,331 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:25:35,331 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:25:36,402 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:25:36,404 INFO L280 CfgBuilder]: Removed 4 assue(true) statements. [2018-11-23 10:25:36,404 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:25:36 BoogieIcfgContainer [2018-11-23 10:25:36,404 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:25:36,405 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:25:36,405 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:25:36,409 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:25:36,409 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:25:34" (1/3) ... [2018-11-23 10:25:36,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ad85139 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:25:36, skipping insertion in model container [2018-11-23 10:25:36,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:35" (2/3) ... [2018-11-23 10:25:36,412 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ad85139 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:25:36, skipping insertion in model container [2018-11-23 10:25:36,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:25:36" (3/3) ... [2018-11-23 10:25:36,414 INFO L112 eAbstractionObserver]: Analyzing ICFG mbpr3_true-unreach-call.i [2018-11-23 10:25:36,425 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:25:36,437 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:25:36,457 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:25:36,493 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:25:36,494 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:25:36,494 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:25:36,494 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:25:36,495 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:25:36,495 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:25:36,495 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:25:36,495 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:25:36,495 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:25:36,513 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-11-23 10:25:36,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 10:25:36,520 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:25:36,521 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:25:36,523 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:25:36,528 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:25:36,529 INFO L82 PathProgramCache]: Analyzing trace with hash -1164915713, now seen corresponding path program 1 times [2018-11-23 10:25:36,533 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:25:36,534 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:25:36,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:25:36,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:36,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:36,628 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:25:36,700 INFO L256 TraceCheckUtils]: 0: Hoare triple {43#true} call ULTIMATE.init(); {43#true} is VALID [2018-11-23 10:25:36,704 INFO L273 TraceCheckUtils]: 1: Hoare triple {43#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {43#true} is VALID [2018-11-23 10:25:36,706 INFO L273 TraceCheckUtils]: 2: Hoare triple {43#true} assume true; {43#true} is VALID [2018-11-23 10:25:36,706 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {43#true} {43#true} #115#return; {43#true} is VALID [2018-11-23 10:25:36,706 INFO L256 TraceCheckUtils]: 4: Hoare triple {43#true} call #t~ret15 := main(); {43#true} is VALID [2018-11-23 10:25:36,707 INFO L273 TraceCheckUtils]: 5: Hoare triple {43#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {43#true} is VALID [2018-11-23 10:25:36,707 INFO L273 TraceCheckUtils]: 6: Hoare triple {43#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {43#true} is VALID [2018-11-23 10:25:36,707 INFO L273 TraceCheckUtils]: 7: Hoare triple {43#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {43#true} is VALID [2018-11-23 10:25:36,708 INFO L273 TraceCheckUtils]: 8: Hoare triple {43#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {43#true} is VALID [2018-11-23 10:25:36,708 INFO L273 TraceCheckUtils]: 9: Hoare triple {43#true} ~i~0 := 1bv32; {43#true} is VALID [2018-11-23 10:25:36,710 INFO L273 TraceCheckUtils]: 10: Hoare triple {43#true} assume !true; {44#false} is VALID [2018-11-23 10:25:36,710 INFO L273 TraceCheckUtils]: 11: Hoare triple {44#false} ~i~0 := 1bv32; {44#false} is VALID [2018-11-23 10:25:36,711 INFO L273 TraceCheckUtils]: 12: Hoare triple {44#false} assume !true; {44#false} is VALID [2018-11-23 10:25:36,711 INFO L273 TraceCheckUtils]: 13: Hoare triple {44#false} ~i~0 := 0bv32; {44#false} is VALID [2018-11-23 10:25:36,712 INFO L273 TraceCheckUtils]: 14: Hoare triple {44#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {44#false} is VALID [2018-11-23 10:25:36,712 INFO L273 TraceCheckUtils]: 15: Hoare triple {44#false} assume #t~short14; {44#false} is VALID [2018-11-23 10:25:36,712 INFO L256 TraceCheckUtils]: 16: Hoare triple {44#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {44#false} is VALID [2018-11-23 10:25:36,713 INFO L273 TraceCheckUtils]: 17: Hoare triple {44#false} ~cond := #in~cond; {44#false} is VALID [2018-11-23 10:25:36,713 INFO L273 TraceCheckUtils]: 18: Hoare triple {44#false} assume 0bv32 == ~cond; {44#false} is VALID [2018-11-23 10:25:36,714 INFO L273 TraceCheckUtils]: 19: Hoare triple {44#false} assume !false; {44#false} is VALID [2018-11-23 10:25:36,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:25:36,718 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:25:36,729 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:25:36,729 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:25:36,734 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 20 [2018-11-23 10:25:36,739 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:25:36,743 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:25:36,866 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:36,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:25:36,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:25:36,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:25:36,877 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 2 states. [2018-11-23 10:25:37,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:37,247 INFO L93 Difference]: Finished difference Result 68 states and 92 transitions. [2018-11-23 10:25:37,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:25:37,247 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 20 [2018-11-23 10:25:37,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:25:37,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:25:37,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 92 transitions. [2018-11-23 10:25:37,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:25:37,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 92 transitions. [2018-11-23 10:25:37,268 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 92 transitions. [2018-11-23 10:25:37,833 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 92 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:37,848 INFO L225 Difference]: With dead ends: 68 [2018-11-23 10:25:37,856 INFO L226 Difference]: Without dead ends: 34 [2018-11-23 10:25:37,862 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:25:37,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-11-23 10:25:38,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-11-23 10:25:38,039 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:25:38,040 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand 34 states. [2018-11-23 10:25:38,041 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 34 states. [2018-11-23 10:25:38,042 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 34 states. [2018-11-23 10:25:38,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:38,050 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2018-11-23 10:25:38,050 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2018-11-23 10:25:38,053 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:25:38,053 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:25:38,054 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand 34 states. [2018-11-23 10:25:38,054 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 34 states. [2018-11-23 10:25:38,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:38,062 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2018-11-23 10:25:38,062 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2018-11-23 10:25:38,063 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:25:38,063 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:25:38,063 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:25:38,064 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:25:38,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-11-23 10:25:38,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 41 transitions. [2018-11-23 10:25:38,080 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 41 transitions. Word has length 20 [2018-11-23 10:25:38,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:25:38,081 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 41 transitions. [2018-11-23 10:25:38,081 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:25:38,081 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2018-11-23 10:25:38,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 10:25:38,084 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:25:38,084 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:25:38,085 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:25:38,085 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:25:38,085 INFO L82 PathProgramCache]: Analyzing trace with hash 208061977, now seen corresponding path program 1 times [2018-11-23 10:25:38,086 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:25:38,086 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:25:38,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:25:38,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:38,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:38,179 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:25:38,719 INFO L256 TraceCheckUtils]: 0: Hoare triple {299#true} call ULTIMATE.init(); {299#true} is VALID [2018-11-23 10:25:38,720 INFO L273 TraceCheckUtils]: 1: Hoare triple {299#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {299#true} is VALID [2018-11-23 10:25:38,720 INFO L273 TraceCheckUtils]: 2: Hoare triple {299#true} assume true; {299#true} is VALID [2018-11-23 10:25:38,720 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {299#true} {299#true} #115#return; {299#true} is VALID [2018-11-23 10:25:38,721 INFO L256 TraceCheckUtils]: 4: Hoare triple {299#true} call #t~ret15 := main(); {299#true} is VALID [2018-11-23 10:25:38,721 INFO L273 TraceCheckUtils]: 5: Hoare triple {299#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {299#true} is VALID [2018-11-23 10:25:38,722 INFO L273 TraceCheckUtils]: 6: Hoare triple {299#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {299#true} is VALID [2018-11-23 10:25:38,722 INFO L273 TraceCheckUtils]: 7: Hoare triple {299#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {299#true} is VALID [2018-11-23 10:25:38,722 INFO L273 TraceCheckUtils]: 8: Hoare triple {299#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {299#true} is VALID [2018-11-23 10:25:38,723 INFO L273 TraceCheckUtils]: 9: Hoare triple {299#true} ~i~0 := 1bv32; {299#true} is VALID [2018-11-23 10:25:38,723 INFO L273 TraceCheckUtils]: 10: Hoare triple {299#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {299#true} is VALID [2018-11-23 10:25:38,723 INFO L273 TraceCheckUtils]: 11: Hoare triple {299#true} ~i~0 := 1bv32; {299#true} is VALID [2018-11-23 10:25:38,724 INFO L273 TraceCheckUtils]: 12: Hoare triple {299#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {299#true} is VALID [2018-11-23 10:25:38,724 INFO L273 TraceCheckUtils]: 13: Hoare triple {299#true} ~i~0 := 0bv32; {299#true} is VALID [2018-11-23 10:25:38,724 INFO L273 TraceCheckUtils]: 14: Hoare triple {299#true} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {299#true} is VALID [2018-11-23 10:25:38,736 INFO L273 TraceCheckUtils]: 15: Hoare triple {299#true} assume #t~short14; {349#|main_#t~short14|} is VALID [2018-11-23 10:25:38,749 INFO L256 TraceCheckUtils]: 16: Hoare triple {349#|main_#t~short14|} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {353#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:25:38,756 INFO L273 TraceCheckUtils]: 17: Hoare triple {353#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {357#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:25:38,757 INFO L273 TraceCheckUtils]: 18: Hoare triple {357#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {300#false} is VALID [2018-11-23 10:25:38,757 INFO L273 TraceCheckUtils]: 19: Hoare triple {300#false} assume !false; {300#false} is VALID [2018-11-23 10:25:38,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:25:38,759 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:25:38,761 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:25:38,761 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:25:38,763 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-11-23 10:25:38,763 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:25:38,763 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:25:38,993 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:38,994 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:25:38,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:25:38,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:25:38,995 INFO L87 Difference]: Start difference. First operand 34 states and 41 transitions. Second operand 5 states. [2018-11-23 10:25:40,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:40,136 INFO L93 Difference]: Finished difference Result 42 states and 49 transitions. [2018-11-23 10:25:40,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:25:40,136 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-11-23 10:25:40,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:25:40,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:25:40,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 49 transitions. [2018-11-23 10:25:40,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:25:40,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 49 transitions. [2018-11-23 10:25:40,142 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 49 transitions. [2018-11-23 10:25:40,358 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:40,361 INFO L225 Difference]: With dead ends: 42 [2018-11-23 10:25:40,362 INFO L226 Difference]: Without dead ends: 40 [2018-11-23 10:25:40,363 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:25:40,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-11-23 10:25:40,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2018-11-23 10:25:40,391 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:25:40,391 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand 39 states. [2018-11-23 10:25:40,391 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 39 states. [2018-11-23 10:25:40,391 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 39 states. [2018-11-23 10:25:40,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:40,394 INFO L93 Difference]: Finished difference Result 40 states and 47 transitions. [2018-11-23 10:25:40,395 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 47 transitions. [2018-11-23 10:25:40,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:25:40,395 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:25:40,396 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 40 states. [2018-11-23 10:25:40,396 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 40 states. [2018-11-23 10:25:40,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:40,399 INFO L93 Difference]: Finished difference Result 40 states and 47 transitions. [2018-11-23 10:25:40,400 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 47 transitions. [2018-11-23 10:25:40,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:25:40,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:25:40,401 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:25:40,401 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:25:40,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-11-23 10:25:40,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 46 transitions. [2018-11-23 10:25:40,404 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 46 transitions. Word has length 20 [2018-11-23 10:25:40,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:25:40,404 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 46 transitions. [2018-11-23 10:25:40,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:25:40,405 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 46 transitions. [2018-11-23 10:25:40,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-11-23 10:25:40,406 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:25:40,406 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:25:40,406 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:25:40,407 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:25:40,407 INFO L82 PathProgramCache]: Analyzing trace with hash 209909019, now seen corresponding path program 1 times [2018-11-23 10:25:40,407 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:25:40,408 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:25:40,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:25:40,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:40,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:40,647 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:25:40,922 WARN L180 SmtUtils]: Spent 119.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-23 10:25:40,960 INFO L256 TraceCheckUtils]: 0: Hoare triple {550#true} call ULTIMATE.init(); {550#true} is VALID [2018-11-23 10:25:40,961 INFO L273 TraceCheckUtils]: 1: Hoare triple {550#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {550#true} is VALID [2018-11-23 10:25:40,962 INFO L273 TraceCheckUtils]: 2: Hoare triple {550#true} assume true; {550#true} is VALID [2018-11-23 10:25:40,962 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {550#true} {550#true} #115#return; {550#true} is VALID [2018-11-23 10:25:40,963 INFO L256 TraceCheckUtils]: 4: Hoare triple {550#true} call #t~ret15 := main(); {550#true} is VALID [2018-11-23 10:25:40,963 INFO L273 TraceCheckUtils]: 5: Hoare triple {550#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {550#true} is VALID [2018-11-23 10:25:40,971 INFO L273 TraceCheckUtils]: 6: Hoare triple {550#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {573#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:25:40,972 INFO L273 TraceCheckUtils]: 7: Hoare triple {573#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {577#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:25:40,991 INFO L273 TraceCheckUtils]: 8: Hoare triple {577#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {551#false} is VALID [2018-11-23 10:25:40,992 INFO L273 TraceCheckUtils]: 9: Hoare triple {551#false} ~i~0 := 1bv32; {551#false} is VALID [2018-11-23 10:25:40,992 INFO L273 TraceCheckUtils]: 10: Hoare triple {551#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {551#false} is VALID [2018-11-23 10:25:40,992 INFO L273 TraceCheckUtils]: 11: Hoare triple {551#false} ~i~0 := 1bv32; {551#false} is VALID [2018-11-23 10:25:40,993 INFO L273 TraceCheckUtils]: 12: Hoare triple {551#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {551#false} is VALID [2018-11-23 10:25:40,993 INFO L273 TraceCheckUtils]: 13: Hoare triple {551#false} ~i~0 := 0bv32; {551#false} is VALID [2018-11-23 10:25:40,993 INFO L273 TraceCheckUtils]: 14: Hoare triple {551#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {551#false} is VALID [2018-11-23 10:25:40,994 INFO L273 TraceCheckUtils]: 15: Hoare triple {551#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {551#false} is VALID [2018-11-23 10:25:40,994 INFO L256 TraceCheckUtils]: 16: Hoare triple {551#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {551#false} is VALID [2018-11-23 10:25:40,994 INFO L273 TraceCheckUtils]: 17: Hoare triple {551#false} ~cond := #in~cond; {551#false} is VALID [2018-11-23 10:25:40,995 INFO L273 TraceCheckUtils]: 18: Hoare triple {551#false} assume 0bv32 == ~cond; {551#false} is VALID [2018-11-23 10:25:40,995 INFO L273 TraceCheckUtils]: 19: Hoare triple {551#false} assume !false; {551#false} is VALID [2018-11-23 10:25:40,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:25:40,996 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:25:40,999 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:25:40,999 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:25:40,999 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-11-23 10:25:41,000 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:25:41,000 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:25:41,079 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:41,079 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:25:41,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:25:41,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:25:41,080 INFO L87 Difference]: Start difference. First operand 39 states and 46 transitions. Second operand 4 states. [2018-11-23 10:25:43,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:43,075 INFO L93 Difference]: Finished difference Result 70 states and 84 transitions. [2018-11-23 10:25:43,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:25:43,075 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-11-23 10:25:43,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:25:43,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:25:43,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 74 transitions. [2018-11-23 10:25:43,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:25:43,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 74 transitions. [2018-11-23 10:25:43,083 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 74 transitions. [2018-11-23 10:25:43,431 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:43,433 INFO L225 Difference]: With dead ends: 70 [2018-11-23 10:25:43,434 INFO L226 Difference]: Without dead ends: 43 [2018-11-23 10:25:43,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:25:43,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-11-23 10:25:43,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 40. [2018-11-23 10:25:43,462 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:25:43,462 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43 states. Second operand 40 states. [2018-11-23 10:25:43,463 INFO L74 IsIncluded]: Start isIncluded. First operand 43 states. Second operand 40 states. [2018-11-23 10:25:43,463 INFO L87 Difference]: Start difference. First operand 43 states. Second operand 40 states. [2018-11-23 10:25:43,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:43,467 INFO L93 Difference]: Finished difference Result 43 states and 51 transitions. [2018-11-23 10:25:43,467 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 51 transitions. [2018-11-23 10:25:43,468 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:25:43,468 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:25:43,468 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand 43 states. [2018-11-23 10:25:43,468 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 43 states. [2018-11-23 10:25:43,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:25:43,472 INFO L93 Difference]: Finished difference Result 43 states and 51 transitions. [2018-11-23 10:25:43,472 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 51 transitions. [2018-11-23 10:25:43,472 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:25:43,473 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:25:43,473 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:25:43,473 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:25:43,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-11-23 10:25:43,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 47 transitions. [2018-11-23 10:25:43,476 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 47 transitions. Word has length 20 [2018-11-23 10:25:43,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:25:43,476 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 47 transitions. [2018-11-23 10:25:43,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:25:43,477 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 47 transitions. [2018-11-23 10:25:43,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-11-23 10:25:43,478 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:25:43,478 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:25:43,478 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:25:43,479 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:25:43,479 INFO L82 PathProgramCache]: Analyzing trace with hash 2624448, now seen corresponding path program 1 times [2018-11-23 10:25:43,479 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:25:43,480 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:25:43,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:25:43,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:43,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:25:43,643 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:25:44,439 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:25:44,452 INFO L256 TraceCheckUtils]: 0: Hoare triple {842#true} call ULTIMATE.init(); {842#true} is VALID [2018-11-23 10:25:44,453 INFO L273 TraceCheckUtils]: 1: Hoare triple {842#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {842#true} is VALID [2018-11-23 10:25:44,453 INFO L273 TraceCheckUtils]: 2: Hoare triple {842#true} assume true; {842#true} is VALID [2018-11-23 10:25:44,454 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {842#true} {842#true} #115#return; {842#true} is VALID [2018-11-23 10:25:44,454 INFO L256 TraceCheckUtils]: 4: Hoare triple {842#true} call #t~ret15 := main(); {842#true} is VALID [2018-11-23 10:25:44,455 INFO L273 TraceCheckUtils]: 5: Hoare triple {842#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {842#true} is VALID [2018-11-23 10:25:44,455 INFO L273 TraceCheckUtils]: 6: Hoare triple {842#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {842#true} is VALID [2018-11-23 10:25:44,456 INFO L273 TraceCheckUtils]: 7: Hoare triple {842#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {868#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:25:44,457 INFO L273 TraceCheckUtils]: 8: Hoare triple {868#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {872#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:25:44,458 INFO L273 TraceCheckUtils]: 9: Hoare triple {872#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {872#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:25:44,458 INFO L273 TraceCheckUtils]: 10: Hoare triple {872#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {872#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:25:44,475 INFO L273 TraceCheckUtils]: 11: Hoare triple {872#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {882#(and (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:25:44,489 INFO L273 TraceCheckUtils]: 12: Hoare triple {882#(and (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (_ bv2 32) main_~i~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {886#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:25:44,491 INFO L273 TraceCheckUtils]: 13: Hoare triple {886#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} ~i~0 := 1bv32; {890#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:25:44,491 INFO L273 TraceCheckUtils]: 14: Hoare triple {890#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {843#false} is VALID [2018-11-23 10:25:44,492 INFO L273 TraceCheckUtils]: 15: Hoare triple {843#false} ~i~0 := 1bv32; {843#false} is VALID [2018-11-23 10:25:44,492 INFO L273 TraceCheckUtils]: 16: Hoare triple {843#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {843#false} is VALID [2018-11-23 10:25:44,492 INFO L273 TraceCheckUtils]: 17: Hoare triple {843#false} ~i~0 := 0bv32; {843#false} is VALID [2018-11-23 10:25:44,492 INFO L273 TraceCheckUtils]: 18: Hoare triple {843#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {843#false} is VALID [2018-11-23 10:25:44,492 INFO L273 TraceCheckUtils]: 19: Hoare triple {843#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {843#false} is VALID [2018-11-23 10:25:44,493 INFO L256 TraceCheckUtils]: 20: Hoare triple {843#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {843#false} is VALID [2018-11-23 10:25:44,493 INFO L273 TraceCheckUtils]: 21: Hoare triple {843#false} ~cond := #in~cond; {843#false} is VALID [2018-11-23 10:25:44,493 INFO L273 TraceCheckUtils]: 22: Hoare triple {843#false} assume 0bv32 == ~cond; {843#false} is VALID [2018-11-23 10:25:44,494 INFO L273 TraceCheckUtils]: 23: Hoare triple {843#false} assume !false; {843#false} is VALID [2018-11-23 10:25:44,497 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:25:44,498 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:25:45,540 WARN L180 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 9 [2018-11-23 10:25:46,013 INFO L273 TraceCheckUtils]: 23: Hoare triple {843#false} assume !false; {843#false} is VALID [2018-11-23 10:25:46,013 INFO L273 TraceCheckUtils]: 22: Hoare triple {843#false} assume 0bv32 == ~cond; {843#false} is VALID [2018-11-23 10:25:46,013 INFO L273 TraceCheckUtils]: 21: Hoare triple {843#false} ~cond := #in~cond; {843#false} is VALID [2018-11-23 10:25:46,013 INFO L256 TraceCheckUtils]: 20: Hoare triple {843#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {843#false} is VALID [2018-11-23 10:25:46,014 INFO L273 TraceCheckUtils]: 19: Hoare triple {843#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {843#false} is VALID [2018-11-23 10:25:46,014 INFO L273 TraceCheckUtils]: 18: Hoare triple {843#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {843#false} is VALID [2018-11-23 10:25:46,014 INFO L273 TraceCheckUtils]: 17: Hoare triple {843#false} ~i~0 := 0bv32; {843#false} is VALID [2018-11-23 10:25:46,014 INFO L273 TraceCheckUtils]: 16: Hoare triple {843#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {843#false} is VALID [2018-11-23 10:25:46,015 INFO L273 TraceCheckUtils]: 15: Hoare triple {843#false} ~i~0 := 1bv32; {843#false} is VALID [2018-11-23 10:25:46,015 INFO L273 TraceCheckUtils]: 14: Hoare triple {948#(bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {843#false} is VALID [2018-11-23 10:25:46,016 INFO L273 TraceCheckUtils]: 13: Hoare triple {952#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))} ~i~0 := 1bv32; {948#(bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))} is VALID [2018-11-23 10:25:46,016 INFO L273 TraceCheckUtils]: 12: Hoare triple {956#(or (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {952#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))} is VALID [2018-11-23 10:25:46,017 INFO L273 TraceCheckUtils]: 11: Hoare triple {960#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {956#(or (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:25:46,018 INFO L273 TraceCheckUtils]: 10: Hoare triple {960#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {960#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:25:46,018 INFO L273 TraceCheckUtils]: 9: Hoare triple {960#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {960#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:25:46,035 INFO L273 TraceCheckUtils]: 8: Hoare triple {970#(forall ((~CELLCOUNT~0 (_ BitVec 32))) (or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {960#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:25:46,037 INFO L273 TraceCheckUtils]: 7: Hoare triple {842#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {970#(forall ((~CELLCOUNT~0 (_ BitVec 32))) (or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:25:46,037 INFO L273 TraceCheckUtils]: 6: Hoare triple {842#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {842#true} is VALID [2018-11-23 10:25:46,037 INFO L273 TraceCheckUtils]: 5: Hoare triple {842#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {842#true} is VALID [2018-11-23 10:25:46,038 INFO L256 TraceCheckUtils]: 4: Hoare triple {842#true} call #t~ret15 := main(); {842#true} is VALID [2018-11-23 10:25:46,038 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {842#true} {842#true} #115#return; {842#true} is VALID [2018-11-23 10:25:46,038 INFO L273 TraceCheckUtils]: 2: Hoare triple {842#true} assume true; {842#true} is VALID [2018-11-23 10:25:46,038 INFO L273 TraceCheckUtils]: 1: Hoare triple {842#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {842#true} is VALID [2018-11-23 10:25:46,039 INFO L256 TraceCheckUtils]: 0: Hoare triple {842#true} call ULTIMATE.init(); {842#true} is VALID [2018-11-23 10:25:46,041 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:25:46,046 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:25:46,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 10:25:46,047 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-11-23 10:25:46,047 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:25:46,048 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 10:25:46,329 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:25:46,329 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 10:25:46,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 10:25:46,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 10:25:46,330 INFO L87 Difference]: Start difference. First operand 40 states and 47 transitions. Second operand 12 states. [2018-11-23 10:25:48,402 WARN L180 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 11 [2018-11-23 10:25:48,806 WARN L180 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 8 [2018-11-23 10:25:50,430 WARN L180 SmtUtils]: Spent 216.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:25:51,913 WARN L180 SmtUtils]: Spent 878.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:26:14,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:14,490 INFO L93 Difference]: Finished difference Result 142 states and 184 transitions. [2018-11-23 10:26:14,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 10:26:14,490 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-11-23 10:26:14,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:14,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:26:14,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 165 transitions. [2018-11-23 10:26:14,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:26:14,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 165 transitions. [2018-11-23 10:26:14,504 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 165 transitions. [2018-11-23 10:26:17,271 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:17,276 INFO L225 Difference]: With dead ends: 142 [2018-11-23 10:26:17,276 INFO L226 Difference]: Without dead ends: 116 [2018-11-23 10:26:17,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=103, Invalid=203, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:26:17,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-11-23 10:26:17,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 62. [2018-11-23 10:26:17,421 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:17,422 INFO L82 GeneralOperation]: Start isEquivalent. First operand 116 states. Second operand 62 states. [2018-11-23 10:26:17,422 INFO L74 IsIncluded]: Start isIncluded. First operand 116 states. Second operand 62 states. [2018-11-23 10:26:17,422 INFO L87 Difference]: Start difference. First operand 116 states. Second operand 62 states. [2018-11-23 10:26:17,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:17,431 INFO L93 Difference]: Finished difference Result 116 states and 147 transitions. [2018-11-23 10:26:17,431 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 147 transitions. [2018-11-23 10:26:17,433 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:17,433 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:17,433 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 116 states. [2018-11-23 10:26:17,433 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 116 states. [2018-11-23 10:26:17,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:17,440 INFO L93 Difference]: Finished difference Result 116 states and 147 transitions. [2018-11-23 10:26:17,441 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 147 transitions. [2018-11-23 10:26:17,442 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:17,442 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:17,442 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:17,443 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:17,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-11-23 10:26:17,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 75 transitions. [2018-11-23 10:26:17,446 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 75 transitions. Word has length 24 [2018-11-23 10:26:17,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:17,446 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 75 transitions. [2018-11-23 10:26:17,446 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 10:26:17,446 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 75 transitions. [2018-11-23 10:26:17,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:26:17,448 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:17,448 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:17,448 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:17,448 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:17,449 INFO L82 PathProgramCache]: Analyzing trace with hash -342662518, now seen corresponding path program 1 times [2018-11-23 10:26:17,449 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:17,449 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:17,473 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:17,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:17,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:17,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:17,745 INFO L256 TraceCheckUtils]: 0: Hoare triple {1509#true} call ULTIMATE.init(); {1509#true} is VALID [2018-11-23 10:26:17,745 INFO L273 TraceCheckUtils]: 1: Hoare triple {1509#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1509#true} is VALID [2018-11-23 10:26:17,746 INFO L273 TraceCheckUtils]: 2: Hoare triple {1509#true} assume true; {1509#true} is VALID [2018-11-23 10:26:17,746 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1509#true} {1509#true} #115#return; {1509#true} is VALID [2018-11-23 10:26:17,746 INFO L256 TraceCheckUtils]: 4: Hoare triple {1509#true} call #t~ret15 := main(); {1509#true} is VALID [2018-11-23 10:26:17,746 INFO L273 TraceCheckUtils]: 5: Hoare triple {1509#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1509#true} is VALID [2018-11-23 10:26:17,748 INFO L273 TraceCheckUtils]: 6: Hoare triple {1509#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,749 INFO L273 TraceCheckUtils]: 7: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,755 INFO L273 TraceCheckUtils]: 8: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,758 INFO L273 TraceCheckUtils]: 9: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,759 INFO L273 TraceCheckUtils]: 10: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,761 INFO L273 TraceCheckUtils]: 11: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,763 INFO L273 TraceCheckUtils]: 12: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,772 INFO L273 TraceCheckUtils]: 13: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,778 INFO L273 TraceCheckUtils]: 14: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,780 INFO L273 TraceCheckUtils]: 15: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,780 INFO L273 TraceCheckUtils]: 16: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,782 INFO L273 TraceCheckUtils]: 17: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,783 INFO L273 TraceCheckUtils]: 18: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,784 INFO L273 TraceCheckUtils]: 19: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,787 INFO L273 TraceCheckUtils]: 20: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:17,788 INFO L273 TraceCheckUtils]: 21: Hoare triple {1532#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {1510#false} is VALID [2018-11-23 10:26:17,788 INFO L273 TraceCheckUtils]: 22: Hoare triple {1510#false} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {1510#false} is VALID [2018-11-23 10:26:17,789 INFO L273 TraceCheckUtils]: 23: Hoare triple {1510#false} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {1510#false} is VALID [2018-11-23 10:26:17,789 INFO L273 TraceCheckUtils]: 24: Hoare triple {1510#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1510#false} is VALID [2018-11-23 10:26:17,789 INFO L273 TraceCheckUtils]: 25: Hoare triple {1510#false} ~i~0 := 0bv32; {1510#false} is VALID [2018-11-23 10:26:17,789 INFO L273 TraceCheckUtils]: 26: Hoare triple {1510#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {1510#false} is VALID [2018-11-23 10:26:17,790 INFO L273 TraceCheckUtils]: 27: Hoare triple {1510#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {1510#false} is VALID [2018-11-23 10:26:17,790 INFO L256 TraceCheckUtils]: 28: Hoare triple {1510#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {1510#false} is VALID [2018-11-23 10:26:17,790 INFO L273 TraceCheckUtils]: 29: Hoare triple {1510#false} ~cond := #in~cond; {1510#false} is VALID [2018-11-23 10:26:17,791 INFO L273 TraceCheckUtils]: 30: Hoare triple {1510#false} assume 0bv32 == ~cond; {1510#false} is VALID [2018-11-23 10:26:17,791 INFO L273 TraceCheckUtils]: 31: Hoare triple {1510#false} assume !false; {1510#false} is VALID [2018-11-23 10:26:17,794 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:26:17,795 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:26:17,804 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:26:17,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:26:17,805 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-11-23 10:26:17,805 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:17,805 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:26:18,002 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:18,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:26:18,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:26:18,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:26:18,003 INFO L87 Difference]: Start difference. First operand 62 states and 75 transitions. Second operand 3 states. [2018-11-23 10:26:18,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:18,474 INFO L93 Difference]: Finished difference Result 86 states and 102 transitions. [2018-11-23 10:26:18,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:26:18,475 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-11-23 10:26:18,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:18,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:26:18,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2018-11-23 10:26:18,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:26:18,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2018-11-23 10:26:18,480 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 60 transitions. [2018-11-23 10:26:18,784 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:18,786 INFO L225 Difference]: With dead ends: 86 [2018-11-23 10:26:18,787 INFO L226 Difference]: Without dead ends: 62 [2018-11-23 10:26:18,787 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:26:18,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-11-23 10:26:18,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-11-23 10:26:18,909 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:18,909 INFO L82 GeneralOperation]: Start isEquivalent. First operand 62 states. Second operand 62 states. [2018-11-23 10:26:18,909 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 62 states. [2018-11-23 10:26:18,909 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 62 states. [2018-11-23 10:26:18,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:18,913 INFO L93 Difference]: Finished difference Result 62 states and 73 transitions. [2018-11-23 10:26:18,913 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 73 transitions. [2018-11-23 10:26:18,914 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:18,914 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:18,914 INFO L74 IsIncluded]: Start isIncluded. First operand 62 states. Second operand 62 states. [2018-11-23 10:26:18,914 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 62 states. [2018-11-23 10:26:18,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:18,917 INFO L93 Difference]: Finished difference Result 62 states and 73 transitions. [2018-11-23 10:26:18,917 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 73 transitions. [2018-11-23 10:26:18,918 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:18,918 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:18,919 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:18,919 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:18,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-11-23 10:26:18,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 73 transitions. [2018-11-23 10:26:18,922 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 73 transitions. Word has length 32 [2018-11-23 10:26:18,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:18,923 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 73 transitions. [2018-11-23 10:26:18,923 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:26:18,923 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 73 transitions. [2018-11-23 10:26:18,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-23 10:26:18,924 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:18,924 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:18,925 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:18,925 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:18,925 INFO L82 PathProgramCache]: Analyzing trace with hash 358402060, now seen corresponding path program 1 times [2018-11-23 10:26:18,925 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:18,926 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:18,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:19,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:19,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:19,225 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:19,335 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:26:19,350 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:26:19,354 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,381 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-23 10:26:19,492 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:19,494 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 70 [2018-11-23 10:26:19,661 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 19 DAG size of output: 18 [2018-11-23 10:26:19,670 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:19,671 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:19,672 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:19,704 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 47 [2018-11-23 10:26:19,714 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:19,720 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-23 10:26:19,730 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,738 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,742 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,854 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:19,854 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:57, output treesize:14 [2018-11-23 10:26:20,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:26:20,027 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,031 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:26:20,034 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,046 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,072 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:26 [2018-11-23 10:26:20,087 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:20,087 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_30|, main_~CCCELVOL2~0]. (let ((.cse0 (select |v_#memory_int_30| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv12 32) main_~i~0))) (and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv0 32) (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32))) (_ bv4294967289 32))) (= (store |v_#memory_int_30| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0)) |#memory_int|) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:26:20,087 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= (_ bv0 32) (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:26:20,144 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:20,145 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 54 [2018-11-23 10:26:20,178 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,184 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-11-23 10:26:20,192 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,197 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-23 10:26:20,216 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,258 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,280 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,290 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,290 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:49, output treesize:14 [2018-11-23 10:26:20,382 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:26:20,390 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,393 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,395 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 54 [2018-11-23 10:26:20,397 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,409 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,434 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-11-23 10:26:20,667 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:20,668 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 67 [2018-11-23 10:26:20,722 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,723 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,724 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,768 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:20,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 60 [2018-11-23 10:26:20,809 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-11-23 10:26:20,832 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,853 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,861 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,879 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:20,879 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:60, output treesize:23 [2018-11-23 10:26:21,087 INFO L256 TraceCheckUtils]: 0: Hoare triple {1928#true} call ULTIMATE.init(); {1928#true} is VALID [2018-11-23 10:26:21,088 INFO L273 TraceCheckUtils]: 1: Hoare triple {1928#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1928#true} is VALID [2018-11-23 10:26:21,088 INFO L273 TraceCheckUtils]: 2: Hoare triple {1928#true} assume true; {1928#true} is VALID [2018-11-23 10:26:21,089 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1928#true} {1928#true} #115#return; {1928#true} is VALID [2018-11-23 10:26:21,089 INFO L256 TraceCheckUtils]: 4: Hoare triple {1928#true} call #t~ret15 := main(); {1928#true} is VALID [2018-11-23 10:26:21,090 INFO L273 TraceCheckUtils]: 5: Hoare triple {1928#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1928#true} is VALID [2018-11-23 10:26:21,091 INFO L273 TraceCheckUtils]: 6: Hoare triple {1928#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1951#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,091 INFO L273 TraceCheckUtils]: 7: Hoare triple {1951#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1955#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,092 INFO L273 TraceCheckUtils]: 8: Hoare triple {1955#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1955#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,094 INFO L273 TraceCheckUtils]: 9: Hoare triple {1955#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,096 INFO L273 TraceCheckUtils]: 10: Hoare triple {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,097 INFO L273 TraceCheckUtils]: 11: Hoare triple {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,098 INFO L273 TraceCheckUtils]: 12: Hoare triple {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,099 INFO L273 TraceCheckUtils]: 13: Hoare triple {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,100 INFO L273 TraceCheckUtils]: 14: Hoare triple {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,105 INFO L273 TraceCheckUtils]: 15: Hoare triple {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,106 INFO L273 TraceCheckUtils]: 16: Hoare triple {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,107 INFO L273 TraceCheckUtils]: 17: Hoare triple {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,108 INFO L273 TraceCheckUtils]: 18: Hoare triple {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,109 INFO L273 TraceCheckUtils]: 19: Hoare triple {1966#(and (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,110 INFO L273 TraceCheckUtils]: 20: Hoare triple {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,113 INFO L273 TraceCheckUtils]: 21: Hoare triple {1962#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {2000#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:21,115 INFO L273 TraceCheckUtils]: 22: Hoare triple {2000#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {2004#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,116 INFO L273 TraceCheckUtils]: 23: Hoare triple {2004#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {2004#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,134 INFO L273 TraceCheckUtils]: 24: Hoare triple {2004#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2004#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,135 INFO L273 TraceCheckUtils]: 25: Hoare triple {2004#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {2014#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,136 INFO L273 TraceCheckUtils]: 26: Hoare triple {2014#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {2018#|main_#t~short14|} is VALID [2018-11-23 10:26:21,137 INFO L273 TraceCheckUtils]: 27: Hoare triple {2018#|main_#t~short14|} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {1929#false} is VALID [2018-11-23 10:26:21,137 INFO L256 TraceCheckUtils]: 28: Hoare triple {1929#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {1929#false} is VALID [2018-11-23 10:26:21,137 INFO L273 TraceCheckUtils]: 29: Hoare triple {1929#false} ~cond := #in~cond; {1929#false} is VALID [2018-11-23 10:26:21,138 INFO L273 TraceCheckUtils]: 30: Hoare triple {1929#false} assume 0bv32 == ~cond; {1929#false} is VALID [2018-11-23 10:26:21,138 INFO L273 TraceCheckUtils]: 31: Hoare triple {1929#false} assume !false; {1929#false} is VALID [2018-11-23 10:26:21,142 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:21,143 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:26:21,493 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-11-23 10:26:21,577 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-11-23 10:26:21,579 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:26:21,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:21,646 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:21,646 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:27 [2018-11-23 10:26:21,684 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:21,684 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) |main_~#volArray~0.offset|) main_~MINVAL~0) [2018-11-23 10:26:21,685 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_12, v_prenex_1]. (let ((.cse0 (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (.cse1 (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0)))) (and (or (bvsge v_arrayElimCell_12 main_~MINVAL~0) .cse0) (or .cse1 (bvsge v_prenex_1 main_~MINVAL~0)) (or .cse0 (not .cse1)))) [2018-11-23 10:26:21,851 INFO L273 TraceCheckUtils]: 31: Hoare triple {1929#false} assume !false; {1929#false} is VALID [2018-11-23 10:26:21,851 INFO L273 TraceCheckUtils]: 30: Hoare triple {1929#false} assume 0bv32 == ~cond; {1929#false} is VALID [2018-11-23 10:26:21,851 INFO L273 TraceCheckUtils]: 29: Hoare triple {1929#false} ~cond := #in~cond; {1929#false} is VALID [2018-11-23 10:26:21,851 INFO L256 TraceCheckUtils]: 28: Hoare triple {1929#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {1929#false} is VALID [2018-11-23 10:26:21,852 INFO L273 TraceCheckUtils]: 27: Hoare triple {2018#|main_#t~short14|} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {1929#false} is VALID [2018-11-23 10:26:21,854 INFO L273 TraceCheckUtils]: 26: Hoare triple {2049#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {2018#|main_#t~short14|} is VALID [2018-11-23 10:26:21,855 INFO L273 TraceCheckUtils]: 25: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 0bv32; {2049#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,856 INFO L273 TraceCheckUtils]: 24: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,856 INFO L273 TraceCheckUtils]: 23: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,857 INFO L273 TraceCheckUtils]: 22: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,896 INFO L273 TraceCheckUtils]: 21: Hoare triple {2066#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,897 INFO L273 TraceCheckUtils]: 20: Hoare triple {2066#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2066#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,898 INFO L273 TraceCheckUtils]: 19: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 1bv32; {2066#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,898 INFO L273 TraceCheckUtils]: 18: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,898 INFO L273 TraceCheckUtils]: 17: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,899 INFO L273 TraceCheckUtils]: 16: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,932 INFO L273 TraceCheckUtils]: 15: Hoare triple {2085#(forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,933 INFO L273 TraceCheckUtils]: 14: Hoare triple {2085#(forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2085#(forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,933 INFO L273 TraceCheckUtils]: 13: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 1bv32; {2085#(forall ((main_~CCCELVOL2~0 (_ BitVec 32))) (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) |main_~#volArray~0.offset|) main_~MINVAL~0))} is VALID [2018-11-23 10:26:21,934 INFO L273 TraceCheckUtils]: 12: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,935 INFO L273 TraceCheckUtils]: 11: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,935 INFO L273 TraceCheckUtils]: 10: Hoare triple {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,953 INFO L273 TraceCheckUtils]: 9: Hoare triple {2104#(and (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) (or (forall ((v_prenex_1 (_ BitVec 32))) (bvsge v_prenex_1 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {2053#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,954 INFO L273 TraceCheckUtils]: 8: Hoare triple {2104#(and (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) (or (forall ((v_prenex_1 (_ BitVec 32))) (bvsge v_prenex_1 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2104#(and (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) (or (forall ((v_prenex_1 (_ BitVec 32))) (bvsge v_prenex_1 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))))} is VALID [2018-11-23 10:26:21,955 INFO L273 TraceCheckUtils]: 7: Hoare triple {2111#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2104#(and (bvsge main_~CCCELVOL3~0 main_~MINVAL~0) (or (forall ((v_prenex_1 (_ BitVec 32))) (bvsge v_prenex_1 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))))} is VALID [2018-11-23 10:26:21,956 INFO L273 TraceCheckUtils]: 6: Hoare triple {1928#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2111#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:21,956 INFO L273 TraceCheckUtils]: 5: Hoare triple {1928#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1928#true} is VALID [2018-11-23 10:26:21,956 INFO L256 TraceCheckUtils]: 4: Hoare triple {1928#true} call #t~ret15 := main(); {1928#true} is VALID [2018-11-23 10:26:21,956 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1928#true} {1928#true} #115#return; {1928#true} is VALID [2018-11-23 10:26:21,956 INFO L273 TraceCheckUtils]: 2: Hoare triple {1928#true} assume true; {1928#true} is VALID [2018-11-23 10:26:21,956 INFO L273 TraceCheckUtils]: 1: Hoare triple {1928#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1928#true} is VALID [2018-11-23 10:26:21,957 INFO L256 TraceCheckUtils]: 0: Hoare triple {1928#true} call ULTIMATE.init(); {1928#true} is VALID [2018-11-23 10:26:21,959 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:21,964 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:26:21,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 [2018-11-23 10:26:21,965 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-11-23 10:26:21,965 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:21,965 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:26:22,351 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:22,351 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:26:22,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:26:22,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:26:22,352 INFO L87 Difference]: Start difference. First operand 62 states and 73 transitions. Second operand 16 states. [2018-11-23 10:26:31,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:31,856 INFO L93 Difference]: Finished difference Result 198 states and 245 transitions. [2018-11-23 10:26:31,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-23 10:26:31,856 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-11-23 10:26:31,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:31,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:26:31,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 199 transitions. [2018-11-23 10:26:31,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:26:31,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 199 transitions. [2018-11-23 10:26:31,874 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 23 states and 199 transitions. [2018-11-23 10:26:34,978 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 198 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:34,983 INFO L225 Difference]: With dead ends: 198 [2018-11-23 10:26:34,983 INFO L226 Difference]: Without dead ends: 146 [2018-11-23 10:26:34,986 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 41 SyntacticMatches, 8 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=314, Invalid=876, Unknown=0, NotChecked=0, Total=1190 [2018-11-23 10:26:34,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-11-23 10:26:35,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 80. [2018-11-23 10:26:35,296 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:35,296 INFO L82 GeneralOperation]: Start isEquivalent. First operand 146 states. Second operand 80 states. [2018-11-23 10:26:35,297 INFO L74 IsIncluded]: Start isIncluded. First operand 146 states. Second operand 80 states. [2018-11-23 10:26:35,297 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 80 states. [2018-11-23 10:26:35,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:35,305 INFO L93 Difference]: Finished difference Result 146 states and 178 transitions. [2018-11-23 10:26:35,305 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 178 transitions. [2018-11-23 10:26:35,306 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:35,306 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:35,306 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand 146 states. [2018-11-23 10:26:35,307 INFO L87 Difference]: Start difference. First operand 80 states. Second operand 146 states. [2018-11-23 10:26:35,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:35,314 INFO L93 Difference]: Finished difference Result 146 states and 178 transitions. [2018-11-23 10:26:35,314 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 178 transitions. [2018-11-23 10:26:35,315 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:35,315 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:35,315 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:35,315 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:35,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-11-23 10:26:35,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 94 transitions. [2018-11-23 10:26:35,319 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 94 transitions. Word has length 32 [2018-11-23 10:26:35,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:35,319 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 94 transitions. [2018-11-23 10:26:35,319 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:26:35,319 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 94 transitions. [2018-11-23 10:26:35,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-23 10:26:35,320 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:35,321 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:35,321 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:35,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:35,321 INFO L82 PathProgramCache]: Analyzing trace with hash -1823458169, now seen corresponding path program 1 times [2018-11-23 10:26:35,322 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:35,322 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:35,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:35,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:35,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:35,648 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:35,746 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:26:35,752 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:26:35,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:35,758 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:35,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:35,780 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-23 10:26:35,864 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:35,865 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 54 [2018-11-23 10:26:36,020 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,022 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,023 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,035 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 49 [2018-11-23 10:26:36,043 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,048 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 29 [2018-11-23 10:26:36,054 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,063 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,068 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,080 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:49, output treesize:18 [2018-11-23 10:26:36,311 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:26:36,324 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,326 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,328 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 52 [2018-11-23 10:26:36,330 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,344 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,368 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-11-23 10:26:36,440 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:36,442 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 69 [2018-11-23 10:26:36,495 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,496 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,497 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,501 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,507 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 53 [2018-11-23 10:26:36,528 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,529 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:36,538 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 56 [2018-11-23 10:26:36,542 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,559 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,569 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:36,587 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:62, output treesize:25 [2018-11-23 10:26:36,977 INFO L256 TraceCheckUtils]: 0: Hoare triple {2830#true} call ULTIMATE.init(); {2830#true} is VALID [2018-11-23 10:26:36,977 INFO L273 TraceCheckUtils]: 1: Hoare triple {2830#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2830#true} is VALID [2018-11-23 10:26:36,977 INFO L273 TraceCheckUtils]: 2: Hoare triple {2830#true} assume true; {2830#true} is VALID [2018-11-23 10:26:36,977 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2830#true} {2830#true} #115#return; {2830#true} is VALID [2018-11-23 10:26:36,978 INFO L256 TraceCheckUtils]: 4: Hoare triple {2830#true} call #t~ret15 := main(); {2830#true} is VALID [2018-11-23 10:26:36,978 INFO L273 TraceCheckUtils]: 5: Hoare triple {2830#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2830#true} is VALID [2018-11-23 10:26:36,978 INFO L273 TraceCheckUtils]: 6: Hoare triple {2830#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,979 INFO L273 TraceCheckUtils]: 7: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,980 INFO L273 TraceCheckUtils]: 8: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,980 INFO L273 TraceCheckUtils]: 9: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,987 INFO L273 TraceCheckUtils]: 10: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,988 INFO L273 TraceCheckUtils]: 11: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,989 INFO L273 TraceCheckUtils]: 12: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,991 INFO L273 TraceCheckUtils]: 13: Hoare triple {2853#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {2875#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:36,992 INFO L273 TraceCheckUtils]: 14: Hoare triple {2875#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2875#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:36,993 INFO L273 TraceCheckUtils]: 15: Hoare triple {2875#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {2882#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:36,994 INFO L273 TraceCheckUtils]: 16: Hoare triple {2882#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {2886#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,995 INFO L273 TraceCheckUtils]: 17: Hoare triple {2886#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {2886#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,995 INFO L273 TraceCheckUtils]: 18: Hoare triple {2886#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2886#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:36,996 INFO L273 TraceCheckUtils]: 19: Hoare triple {2886#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {2882#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:37,014 INFO L273 TraceCheckUtils]: 20: Hoare triple {2882#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2882#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:37,016 INFO L273 TraceCheckUtils]: 21: Hoare triple {2882#(and (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {2902#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:37,017 INFO L273 TraceCheckUtils]: 22: Hoare triple {2902#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {2906#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,019 INFO L273 TraceCheckUtils]: 23: Hoare triple {2906#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {2906#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,037 INFO L273 TraceCheckUtils]: 24: Hoare triple {2906#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {2906#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,038 INFO L273 TraceCheckUtils]: 25: Hoare triple {2906#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,039 INFO L273 TraceCheckUtils]: 26: Hoare triple {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,040 INFO L273 TraceCheckUtils]: 27: Hoare triple {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume #t~short14; {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,042 INFO L256 TraceCheckUtils]: 28: Hoare triple {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:26:37,043 INFO L273 TraceCheckUtils]: 29: Hoare triple {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} ~cond := #in~cond; {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:26:37,043 INFO L273 TraceCheckUtils]: 30: Hoare triple {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} assume !(0bv32 == ~cond); {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:26:37,043 INFO L273 TraceCheckUtils]: 31: Hoare triple {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} assume true; {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} is VALID [2018-11-23 10:26:37,046 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {2926#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv8 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)) (_ bv4294967293 32)) (_ bv0 32))))} {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #119#return; {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,051 INFO L273 TraceCheckUtils]: 33: Hoare triple {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,052 INFO L273 TraceCheckUtils]: 34: Hoare triple {2916#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2902#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:37,054 INFO L273 TraceCheckUtils]: 35: Hoare triple {2902#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {2948#|main_#t~short14|} is VALID [2018-11-23 10:26:37,054 INFO L273 TraceCheckUtils]: 36: Hoare triple {2948#|main_#t~short14|} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {2831#false} is VALID [2018-11-23 10:26:37,054 INFO L256 TraceCheckUtils]: 37: Hoare triple {2831#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {2831#false} is VALID [2018-11-23 10:26:37,055 INFO L273 TraceCheckUtils]: 38: Hoare triple {2831#false} ~cond := #in~cond; {2831#false} is VALID [2018-11-23 10:26:37,055 INFO L273 TraceCheckUtils]: 39: Hoare triple {2831#false} assume 0bv32 == ~cond; {2831#false} is VALID [2018-11-23 10:26:37,055 INFO L273 TraceCheckUtils]: 40: Hoare triple {2831#false} assume !false; {2831#false} is VALID [2018-11-23 10:26:37,063 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:26:37,063 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:26:37,530 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:26:37,596 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:26:37,598 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:26:37,622 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:37,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:37,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:27 [2018-11-23 10:26:37,692 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:37,692 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) [2018-11-23 10:26:37,692 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_21, v_prenex_2]. (let ((.cse0 (bvsge main_~CCCELVOL2~0 main_~MINVAL~0)) (.cse1 (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0)))) (and (or (bvsge v_arrayElimCell_21 main_~MINVAL~0) .cse0) (or (bvsge v_prenex_2 main_~MINVAL~0) .cse1) (or .cse0 (not .cse1)))) [2018-11-23 10:26:37,926 INFO L273 TraceCheckUtils]: 40: Hoare triple {2831#false} assume !false; {2831#false} is VALID [2018-11-23 10:26:37,926 INFO L273 TraceCheckUtils]: 39: Hoare triple {2831#false} assume 0bv32 == ~cond; {2831#false} is VALID [2018-11-23 10:26:37,926 INFO L273 TraceCheckUtils]: 38: Hoare triple {2831#false} ~cond := #in~cond; {2831#false} is VALID [2018-11-23 10:26:37,927 INFO L256 TraceCheckUtils]: 37: Hoare triple {2831#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {2831#false} is VALID [2018-11-23 10:26:37,928 INFO L273 TraceCheckUtils]: 36: Hoare triple {2948#|main_#t~short14|} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {2831#false} is VALID [2018-11-23 10:26:37,931 INFO L273 TraceCheckUtils]: 35: Hoare triple {2979#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {2948#|main_#t~short14|} is VALID [2018-11-23 10:26:39,948 INFO L273 TraceCheckUtils]: 34: Hoare triple {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {2979#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:26:39,949 INFO L273 TraceCheckUtils]: 33: Hoare triple {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,950 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {2830#true} {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #119#return; {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,951 INFO L273 TraceCheckUtils]: 31: Hoare triple {2830#true} assume true; {2830#true} is VALID [2018-11-23 10:26:39,951 INFO L273 TraceCheckUtils]: 30: Hoare triple {2830#true} assume !(0bv32 == ~cond); {2830#true} is VALID [2018-11-23 10:26:39,951 INFO L273 TraceCheckUtils]: 29: Hoare triple {2830#true} ~cond := #in~cond; {2830#true} is VALID [2018-11-23 10:26:39,951 INFO L256 TraceCheckUtils]: 28: Hoare triple {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {2830#true} is VALID [2018-11-23 10:26:39,953 INFO L273 TraceCheckUtils]: 27: Hoare triple {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short14; {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,954 INFO L273 TraceCheckUtils]: 26: Hoare triple {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,954 INFO L273 TraceCheckUtils]: 25: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {2983#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,955 INFO L273 TraceCheckUtils]: 24: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,955 INFO L273 TraceCheckUtils]: 23: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:39,957 INFO L273 TraceCheckUtils]: 22: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,006 INFO L273 TraceCheckUtils]: 21: Hoare triple {3024#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,007 INFO L273 TraceCheckUtils]: 20: Hoare triple {3024#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3024#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,008 INFO L273 TraceCheckUtils]: 19: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 1bv32; {3024#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,008 INFO L273 TraceCheckUtils]: 18: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,009 INFO L273 TraceCheckUtils]: 17: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,010 INFO L273 TraceCheckUtils]: 16: Hoare triple {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,039 INFO L273 TraceCheckUtils]: 15: Hoare triple {3043#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {3011#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,039 INFO L273 TraceCheckUtils]: 14: Hoare triple {3043#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3043#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} is VALID [2018-11-23 10:26:40,040 INFO L273 TraceCheckUtils]: 13: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} ~i~0 := 1bv32; {3043#(and (or (forall ((v_prenex_2 (_ BitVec 32))) (bvsge v_prenex_2 main_~MINVAL~0)) (= (_ bv12 32) (bvmul (_ bv12 32) main_~i~0))) (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))} is VALID [2018-11-23 10:26:40,040 INFO L273 TraceCheckUtils]: 12: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,041 INFO L273 TraceCheckUtils]: 11: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,041 INFO L273 TraceCheckUtils]: 10: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,041 INFO L273 TraceCheckUtils]: 9: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,042 INFO L273 TraceCheckUtils]: 8: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,042 INFO L273 TraceCheckUtils]: 7: Hoare triple {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,043 INFO L273 TraceCheckUtils]: 6: Hoare triple {2830#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3050#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:40,043 INFO L273 TraceCheckUtils]: 5: Hoare triple {2830#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2830#true} is VALID [2018-11-23 10:26:40,043 INFO L256 TraceCheckUtils]: 4: Hoare triple {2830#true} call #t~ret15 := main(); {2830#true} is VALID [2018-11-23 10:26:40,043 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2830#true} {2830#true} #115#return; {2830#true} is VALID [2018-11-23 10:26:40,044 INFO L273 TraceCheckUtils]: 2: Hoare triple {2830#true} assume true; {2830#true} is VALID [2018-11-23 10:26:40,044 INFO L273 TraceCheckUtils]: 1: Hoare triple {2830#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2830#true} is VALID [2018-11-23 10:26:40,044 INFO L256 TraceCheckUtils]: 0: Hoare triple {2830#true} call ULTIMATE.init(); {2830#true} is VALID [2018-11-23 10:26:40,047 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-23 10:26:40,050 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:26:40,050 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 17 [2018-11-23 10:26:40,052 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 41 [2018-11-23 10:26:40,053 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:40,053 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 10:26:42,508 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 70 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:42,509 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 10:26:42,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 10:26:42,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:26:42,509 INFO L87 Difference]: Start difference. First operand 80 states and 94 transitions. Second operand 17 states. [2018-11-23 10:26:50,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:50,305 INFO L93 Difference]: Finished difference Result 168 states and 197 transitions. [2018-11-23 10:26:50,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 10:26:50,306 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 41 [2018-11-23 10:26:50,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:50,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:26:50,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 135 transitions. [2018-11-23 10:26:50,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:26:50,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 135 transitions. [2018-11-23 10:26:50,313 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states and 135 transitions. [2018-11-23 10:26:50,911 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 135 edges. 135 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:50,914 INFO L225 Difference]: With dead ends: 168 [2018-11-23 10:26:50,914 INFO L226 Difference]: Without dead ends: 111 [2018-11-23 10:26:50,915 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 60 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=216, Invalid=596, Unknown=0, NotChecked=0, Total=812 [2018-11-23 10:26:50,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-11-23 10:26:51,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 92. [2018-11-23 10:26:51,103 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:51,103 INFO L82 GeneralOperation]: Start isEquivalent. First operand 111 states. Second operand 92 states. [2018-11-23 10:26:51,103 INFO L74 IsIncluded]: Start isIncluded. First operand 111 states. Second operand 92 states. [2018-11-23 10:26:51,104 INFO L87 Difference]: Start difference. First operand 111 states. Second operand 92 states. [2018-11-23 10:26:51,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:51,108 INFO L93 Difference]: Finished difference Result 111 states and 125 transitions. [2018-11-23 10:26:51,108 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 125 transitions. [2018-11-23 10:26:51,108 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:51,108 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:51,109 INFO L74 IsIncluded]: Start isIncluded. First operand 92 states. Second operand 111 states. [2018-11-23 10:26:51,109 INFO L87 Difference]: Start difference. First operand 92 states. Second operand 111 states. [2018-11-23 10:26:51,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:51,112 INFO L93 Difference]: Finished difference Result 111 states and 125 transitions. [2018-11-23 10:26:51,113 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 125 transitions. [2018-11-23 10:26:51,113 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:51,113 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:51,113 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:51,113 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:51,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-11-23 10:26:51,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 103 transitions. [2018-11-23 10:26:51,116 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 103 transitions. Word has length 41 [2018-11-23 10:26:51,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:51,116 INFO L480 AbstractCegarLoop]: Abstraction has 92 states and 103 transitions. [2018-11-23 10:26:51,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 10:26:51,116 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 103 transitions. [2018-11-23 10:26:51,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-23 10:26:51,118 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:51,118 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:51,118 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:51,118 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:51,118 INFO L82 PathProgramCache]: Analyzing trace with hash -1119313300, now seen corresponding path program 2 times [2018-11-23 10:26:51,119 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:51,119 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:51,137 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:26:51,423 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:26:51,424 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:26:51,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:51,472 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:51,543 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:26:51,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:26:51,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,555 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,569 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-11-23 10:26:51,660 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:51,661 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 62 [2018-11-23 10:26:51,751 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,753 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,754 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,766 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 45 [2018-11-23 10:26:51,775 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,780 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 23 [2018-11-23 10:26:51,783 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,791 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,794 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,802 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,803 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:50, output treesize:13 [2018-11-23 10:26:52,075 INFO L256 TraceCheckUtils]: 0: Hoare triple {3681#true} call ULTIMATE.init(); {3681#true} is VALID [2018-11-23 10:26:52,076 INFO L273 TraceCheckUtils]: 1: Hoare triple {3681#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3681#true} is VALID [2018-11-23 10:26:52,076 INFO L273 TraceCheckUtils]: 2: Hoare triple {3681#true} assume true; {3681#true} is VALID [2018-11-23 10:26:52,076 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3681#true} {3681#true} #115#return; {3681#true} is VALID [2018-11-23 10:26:52,077 INFO L256 TraceCheckUtils]: 4: Hoare triple {3681#true} call #t~ret15 := main(); {3681#true} is VALID [2018-11-23 10:26:52,077 INFO L273 TraceCheckUtils]: 5: Hoare triple {3681#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3681#true} is VALID [2018-11-23 10:26:52,077 INFO L273 TraceCheckUtils]: 6: Hoare triple {3681#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,078 INFO L273 TraceCheckUtils]: 7: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,078 INFO L273 TraceCheckUtils]: 8: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,079 INFO L273 TraceCheckUtils]: 9: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,079 INFO L273 TraceCheckUtils]: 10: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,080 INFO L273 TraceCheckUtils]: 11: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,080 INFO L273 TraceCheckUtils]: 12: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,080 INFO L273 TraceCheckUtils]: 13: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} ~i~0 := 1bv32; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,081 INFO L273 TraceCheckUtils]: 14: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,081 INFO L273 TraceCheckUtils]: 15: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,082 INFO L273 TraceCheckUtils]: 16: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,084 INFO L273 TraceCheckUtils]: 17: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,085 INFO L273 TraceCheckUtils]: 18: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:26:52,086 INFO L273 TraceCheckUtils]: 19: Hoare triple {3704#(= |main_~#volArray~0.offset| (_ bv0 32))} ~i~0 := 1bv32; {3744#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,087 INFO L273 TraceCheckUtils]: 20: Hoare triple {3744#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3744#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,088 INFO L273 TraceCheckUtils]: 21: Hoare triple {3744#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,089 INFO L273 TraceCheckUtils]: 22: Hoare triple {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {3755#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,091 INFO L273 TraceCheckUtils]: 23: Hoare triple {3755#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {3755#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,092 INFO L273 TraceCheckUtils]: 24: Hoare triple {3755#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3755#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,093 INFO L273 TraceCheckUtils]: 25: Hoare triple {3755#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,094 INFO L273 TraceCheckUtils]: 26: Hoare triple {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,094 INFO L273 TraceCheckUtils]: 27: Hoare triple {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume #t~short14; {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,096 INFO L256 TraceCheckUtils]: 28: Hoare triple {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,096 INFO L273 TraceCheckUtils]: 29: Hoare triple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} ~cond := #in~cond; {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,096 INFO L273 TraceCheckUtils]: 30: Hoare triple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} assume !(0bv32 == ~cond); {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,097 INFO L273 TraceCheckUtils]: 31: Hoare triple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} assume true; {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,098 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #119#return; {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,099 INFO L273 TraceCheckUtils]: 33: Hoare triple {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,100 INFO L273 TraceCheckUtils]: 34: Hoare triple {3765#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,101 INFO L273 TraceCheckUtils]: 35: Hoare triple {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,102 INFO L273 TraceCheckUtils]: 36: Hoare triple {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short14; {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,104 INFO L256 TraceCheckUtils]: 37: Hoare triple {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,105 INFO L273 TraceCheckUtils]: 38: Hoare triple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} ~cond := #in~cond; {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,106 INFO L273 TraceCheckUtils]: 39: Hoare triple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} assume !(0bv32 == ~cond); {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,106 INFO L273 TraceCheckUtils]: 40: Hoare triple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} assume true; {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} is VALID [2018-11-23 10:26:52,107 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {3775#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32))))} {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #119#return; {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,108 INFO L273 TraceCheckUtils]: 42: Hoare triple {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,109 INFO L273 TraceCheckUtils]: 43: Hoare triple {3751#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3821#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:26:52,111 INFO L273 TraceCheckUtils]: 44: Hoare triple {3821#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {3821#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:26:52,112 INFO L273 TraceCheckUtils]: 45: Hoare triple {3821#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {3828#|main_#t~short14|} is VALID [2018-11-23 10:26:52,113 INFO L256 TraceCheckUtils]: 46: Hoare triple {3828#|main_#t~short14|} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {3832#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:52,114 INFO L273 TraceCheckUtils]: 47: Hoare triple {3832#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {3836#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:52,114 INFO L273 TraceCheckUtils]: 48: Hoare triple {3836#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {3682#false} is VALID [2018-11-23 10:26:52,115 INFO L273 TraceCheckUtils]: 49: Hoare triple {3682#false} assume !false; {3682#false} is VALID [2018-11-23 10:26:52,122 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 10:26:52,122 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:26:52,463 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:26:52,504 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:26:52,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:52,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:52,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:52,511 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:7 [2018-11-23 10:26:52,517 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:52,517 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (= (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) (_ bv0 32)) [2018-11-23 10:26:52,517 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32)) [2018-11-23 10:26:52,619 INFO L273 TraceCheckUtils]: 49: Hoare triple {3682#false} assume !false; {3682#false} is VALID [2018-11-23 10:26:52,620 INFO L273 TraceCheckUtils]: 48: Hoare triple {3846#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {3682#false} is VALID [2018-11-23 10:26:52,620 INFO L273 TraceCheckUtils]: 47: Hoare triple {3850#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {3846#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:26:52,621 INFO L256 TraceCheckUtils]: 46: Hoare triple {3828#|main_#t~short14|} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {3850#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:26:52,622 INFO L273 TraceCheckUtils]: 45: Hoare triple {3857#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {3828#|main_#t~short14|} is VALID [2018-11-23 10:26:52,622 INFO L273 TraceCheckUtils]: 44: Hoare triple {3857#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {3857#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:26:52,841 INFO L273 TraceCheckUtils]: 43: Hoare triple {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3857#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:26:52,842 INFO L273 TraceCheckUtils]: 42: Hoare triple {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:26:52,843 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {3681#true} {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #119#return; {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:26:52,843 INFO L273 TraceCheckUtils]: 40: Hoare triple {3681#true} assume true; {3681#true} is VALID [2018-11-23 10:26:52,843 INFO L273 TraceCheckUtils]: 39: Hoare triple {3681#true} assume !(0bv32 == ~cond); {3681#true} is VALID [2018-11-23 10:26:52,843 INFO L273 TraceCheckUtils]: 38: Hoare triple {3681#true} ~cond := #in~cond; {3681#true} is VALID [2018-11-23 10:26:52,844 INFO L256 TraceCheckUtils]: 37: Hoare triple {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {3681#true} is VALID [2018-11-23 10:26:52,844 INFO L273 TraceCheckUtils]: 36: Hoare triple {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume #t~short14; {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:26:52,845 INFO L273 TraceCheckUtils]: 35: Hoare triple {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:26:53,112 INFO L273 TraceCheckUtils]: 34: Hoare triple {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {3864#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:26:53,113 INFO L273 TraceCheckUtils]: 33: Hoare triple {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:26:53,114 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {3681#true} {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #119#return; {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:26:53,114 INFO L273 TraceCheckUtils]: 31: Hoare triple {3681#true} assume true; {3681#true} is VALID [2018-11-23 10:26:53,114 INFO L273 TraceCheckUtils]: 30: Hoare triple {3681#true} assume !(0bv32 == ~cond); {3681#true} is VALID [2018-11-23 10:26:53,114 INFO L273 TraceCheckUtils]: 29: Hoare triple {3681#true} ~cond := #in~cond; {3681#true} is VALID [2018-11-23 10:26:53,114 INFO L256 TraceCheckUtils]: 28: Hoare triple {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {3681#true} is VALID [2018-11-23 10:26:53,115 INFO L273 TraceCheckUtils]: 27: Hoare triple {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume #t~short14; {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:26:53,115 INFO L273 TraceCheckUtils]: 26: Hoare triple {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:26:53,116 INFO L273 TraceCheckUtils]: 25: Hoare triple {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} ~i~0 := 0bv32; {3892#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:26:53,116 INFO L273 TraceCheckUtils]: 24: Hoare triple {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:26:53,117 INFO L273 TraceCheckUtils]: 23: Hoare triple {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:26:53,118 INFO L273 TraceCheckUtils]: 22: Hoare triple {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:26:53,121 INFO L273 TraceCheckUtils]: 21: Hoare triple {3933#(= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {3920#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))))} is VALID [2018-11-23 10:26:53,122 INFO L273 TraceCheckUtils]: 20: Hoare triple {3933#(= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3933#(= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:53,122 INFO L273 TraceCheckUtils]: 19: Hoare triple {3681#true} ~i~0 := 1bv32; {3933#(= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:53,123 INFO L273 TraceCheckUtils]: 18: Hoare triple {3681#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3681#true} is VALID [2018-11-23 10:26:53,123 INFO L273 TraceCheckUtils]: 17: Hoare triple {3681#true} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {3681#true} is VALID [2018-11-23 10:26:53,123 INFO L273 TraceCheckUtils]: 16: Hoare triple {3681#true} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {3681#true} is VALID [2018-11-23 10:26:53,123 INFO L273 TraceCheckUtils]: 15: Hoare triple {3681#true} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 14: Hoare triple {3681#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 13: Hoare triple {3681#true} ~i~0 := 1bv32; {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 12: Hoare triple {3681#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 11: Hoare triple {3681#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 10: Hoare triple {3681#true} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 9: Hoare triple {3681#true} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {3681#true} is VALID [2018-11-23 10:26:53,124 INFO L273 TraceCheckUtils]: 8: Hoare triple {3681#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {3681#true} is VALID [2018-11-23 10:26:53,125 INFO L273 TraceCheckUtils]: 7: Hoare triple {3681#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3681#true} is VALID [2018-11-23 10:26:53,125 INFO L273 TraceCheckUtils]: 6: Hoare triple {3681#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3681#true} is VALID [2018-11-23 10:26:53,125 INFO L273 TraceCheckUtils]: 5: Hoare triple {3681#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3681#true} is VALID [2018-11-23 10:26:53,125 INFO L256 TraceCheckUtils]: 4: Hoare triple {3681#true} call #t~ret15 := main(); {3681#true} is VALID [2018-11-23 10:26:53,125 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3681#true} {3681#true} #115#return; {3681#true} is VALID [2018-11-23 10:26:53,126 INFO L273 TraceCheckUtils]: 2: Hoare triple {3681#true} assume true; {3681#true} is VALID [2018-11-23 10:26:53,128 INFO L273 TraceCheckUtils]: 1: Hoare triple {3681#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3681#true} is VALID [2018-11-23 10:26:53,128 INFO L256 TraceCheckUtils]: 0: Hoare triple {3681#true} call ULTIMATE.init(); {3681#true} is VALID [2018-11-23 10:26:53,132 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 10:26:53,136 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:26:53,136 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 19 [2018-11-23 10:26:53,137 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 50 [2018-11-23 10:26:53,137 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:53,138 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 10:26:53,964 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:53,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 10:26:53,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 10:26:53,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:26:53,965 INFO L87 Difference]: Start difference. First operand 92 states and 103 transitions. Second operand 19 states. [2018-11-23 10:27:04,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:04,315 INFO L93 Difference]: Finished difference Result 134 states and 157 transitions. [2018-11-23 10:27:04,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 10:27:04,315 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 50 [2018-11-23 10:27:04,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:27:04,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:27:04,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 91 transitions. [2018-11-23 10:27:04,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:27:04,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 91 transitions. [2018-11-23 10:27:04,320 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states and 91 transitions. [2018-11-23 10:27:04,737 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:04,741 INFO L225 Difference]: With dead ends: 134 [2018-11-23 10:27:04,741 INFO L226 Difference]: Without dead ends: 132 [2018-11-23 10:27:04,742 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 78 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=116, Invalid=534, Unknown=0, NotChecked=0, Total=650 [2018-11-23 10:27:04,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-23 10:27:05,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 121. [2018-11-23 10:27:05,636 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:27:05,637 INFO L82 GeneralOperation]: Start isEquivalent. First operand 132 states. Second operand 121 states. [2018-11-23 10:27:05,637 INFO L74 IsIncluded]: Start isIncluded. First operand 132 states. Second operand 121 states. [2018-11-23 10:27:05,637 INFO L87 Difference]: Start difference. First operand 132 states. Second operand 121 states. [2018-11-23 10:27:05,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:05,644 INFO L93 Difference]: Finished difference Result 132 states and 154 transitions. [2018-11-23 10:27:05,645 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 154 transitions. [2018-11-23 10:27:05,645 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:05,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:05,645 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand 132 states. [2018-11-23 10:27:05,645 INFO L87 Difference]: Start difference. First operand 121 states. Second operand 132 states. [2018-11-23 10:27:05,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:05,651 INFO L93 Difference]: Finished difference Result 132 states and 154 transitions. [2018-11-23 10:27:05,651 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 154 transitions. [2018-11-23 10:27:05,652 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:05,652 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:05,652 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:27:05,652 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:27:05,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-11-23 10:27:05,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 141 transitions. [2018-11-23 10:27:05,657 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 141 transitions. Word has length 50 [2018-11-23 10:27:05,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:27:05,657 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 141 transitions. [2018-11-23 10:27:05,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 10:27:05,658 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 141 transitions. [2018-11-23 10:27:05,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 10:27:05,659 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:27:05,659 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:27:05,659 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:27:05,659 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:27:05,659 INFO L82 PathProgramCache]: Analyzing trace with hash 1410579620, now seen corresponding path program 2 times [2018-11-23 10:27:05,660 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:27:05,660 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:27:05,690 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-11-23 10:27:05,976 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:27:05,976 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:27:06,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:27:06,013 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:27:06,680 WARN L180 SmtUtils]: Spent 209.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 8 [2018-11-23 10:27:08,098 INFO L256 TraceCheckUtils]: 0: Hoare triple {4623#true} call ULTIMATE.init(); {4623#true} is VALID [2018-11-23 10:27:08,099 INFO L273 TraceCheckUtils]: 1: Hoare triple {4623#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4623#true} is VALID [2018-11-23 10:27:08,099 INFO L273 TraceCheckUtils]: 2: Hoare triple {4623#true} assume true; {4623#true} is VALID [2018-11-23 10:27:08,099 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4623#true} {4623#true} #115#return; {4623#true} is VALID [2018-11-23 10:27:08,099 INFO L256 TraceCheckUtils]: 4: Hoare triple {4623#true} call #t~ret15 := main(); {4623#true} is VALID [2018-11-23 10:27:08,100 INFO L273 TraceCheckUtils]: 5: Hoare triple {4623#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4623#true} is VALID [2018-11-23 10:27:08,100 INFO L273 TraceCheckUtils]: 6: Hoare triple {4623#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4623#true} is VALID [2018-11-23 10:27:08,100 INFO L273 TraceCheckUtils]: 7: Hoare triple {4623#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4649#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:27:08,101 INFO L273 TraceCheckUtils]: 8: Hoare triple {4649#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4653#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,101 INFO L273 TraceCheckUtils]: 9: Hoare triple {4653#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {4653#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,102 INFO L273 TraceCheckUtils]: 10: Hoare triple {4653#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {4653#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,118 INFO L273 TraceCheckUtils]: 11: Hoare triple {4653#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4663#(and (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:27:08,134 INFO L273 TraceCheckUtils]: 12: Hoare triple {4663#(and (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4667#(and (= (_ bv2 32) main_~i~0) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:08,149 INFO L273 TraceCheckUtils]: 13: Hoare triple {4667#(and (= (_ bv2 32) main_~i~0) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {4667#(and (= (_ bv2 32) main_~i~0) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:08,163 INFO L273 TraceCheckUtils]: 14: Hoare triple {4667#(and (= (_ bv2 32) main_~i~0) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {4667#(and (= (_ bv2 32) main_~i~0) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:08,180 INFO L273 TraceCheckUtils]: 15: Hoare triple {4667#(and (= (_ bv2 32) main_~i~0) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4677#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:08,181 INFO L273 TraceCheckUtils]: 16: Hoare triple {4677#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,181 INFO L273 TraceCheckUtils]: 17: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} ~i~0 := 1bv32; {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,181 INFO L273 TraceCheckUtils]: 18: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,182 INFO L273 TraceCheckUtils]: 19: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,183 INFO L273 TraceCheckUtils]: 20: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,183 INFO L273 TraceCheckUtils]: 21: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,183 INFO L273 TraceCheckUtils]: 22: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,184 INFO L273 TraceCheckUtils]: 23: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,184 INFO L273 TraceCheckUtils]: 24: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,185 INFO L273 TraceCheckUtils]: 25: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,186 INFO L273 TraceCheckUtils]: 26: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,187 INFO L273 TraceCheckUtils]: 27: Hoare triple {4681#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} ~i~0 := 1bv32; {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,187 INFO L273 TraceCheckUtils]: 28: Hoare triple {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,188 INFO L273 TraceCheckUtils]: 29: Hoare triple {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,189 INFO L273 TraceCheckUtils]: 30: Hoare triple {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:08,190 INFO L273 TraceCheckUtils]: 31: Hoare triple {4715#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:27:08,191 INFO L273 TraceCheckUtils]: 32: Hoare triple {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:27:08,192 INFO L273 TraceCheckUtils]: 33: Hoare triple {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:27:08,193 INFO L273 TraceCheckUtils]: 34: Hoare triple {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:27:08,211 INFO L273 TraceCheckUtils]: 35: Hoare triple {4728#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (_ bv2 32) main_~i~0))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {4741#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:08,211 INFO L273 TraceCheckUtils]: 36: Hoare triple {4741#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 37: Hoare triple {4624#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 38: Hoare triple {4624#false} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 39: Hoare triple {4624#false} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 40: Hoare triple {4624#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 41: Hoare triple {4624#false} ~i~0 := 0bv32; {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 42: Hoare triple {4624#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {4624#false} is VALID [2018-11-23 10:27:08,212 INFO L273 TraceCheckUtils]: 43: Hoare triple {4624#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {4624#false} is VALID [2018-11-23 10:27:08,213 INFO L256 TraceCheckUtils]: 44: Hoare triple {4624#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {4624#false} is VALID [2018-11-23 10:27:08,213 INFO L273 TraceCheckUtils]: 45: Hoare triple {4624#false} ~cond := #in~cond; {4624#false} is VALID [2018-11-23 10:27:08,213 INFO L273 TraceCheckUtils]: 46: Hoare triple {4624#false} assume 0bv32 == ~cond; {4624#false} is VALID [2018-11-23 10:27:08,213 INFO L273 TraceCheckUtils]: 47: Hoare triple {4624#false} assume !false; {4624#false} is VALID [2018-11-23 10:27:08,217 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 9 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 10:27:08,217 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:27:11,344 WARN L180 SmtUtils]: Spent 131.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:27:14,099 INFO L273 TraceCheckUtils]: 47: Hoare triple {4624#false} assume !false; {4624#false} is VALID [2018-11-23 10:27:14,099 INFO L273 TraceCheckUtils]: 46: Hoare triple {4624#false} assume 0bv32 == ~cond; {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L273 TraceCheckUtils]: 45: Hoare triple {4624#false} ~cond := #in~cond; {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L256 TraceCheckUtils]: 44: Hoare triple {4624#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L273 TraceCheckUtils]: 43: Hoare triple {4624#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L273 TraceCheckUtils]: 42: Hoare triple {4624#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L273 TraceCheckUtils]: 41: Hoare triple {4624#false} ~i~0 := 0bv32; {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L273 TraceCheckUtils]: 40: Hoare triple {4624#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4624#false} is VALID [2018-11-23 10:27:14,100 INFO L273 TraceCheckUtils]: 39: Hoare triple {4624#false} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {4624#false} is VALID [2018-11-23 10:27:14,101 INFO L273 TraceCheckUtils]: 38: Hoare triple {4624#false} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {4624#false} is VALID [2018-11-23 10:27:14,101 INFO L273 TraceCheckUtils]: 37: Hoare triple {4624#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {4624#false} is VALID [2018-11-23 10:27:14,101 INFO L273 TraceCheckUtils]: 36: Hoare triple {4811#(not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4624#false} is VALID [2018-11-23 10:27:14,101 INFO L273 TraceCheckUtils]: 35: Hoare triple {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {4811#(not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,102 INFO L273 TraceCheckUtils]: 34: Hoare triple {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,104 INFO L273 TraceCheckUtils]: 33: Hoare triple {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,109 INFO L273 TraceCheckUtils]: 32: Hoare triple {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,146 INFO L273 TraceCheckUtils]: 31: Hoare triple {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {4815#(not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,147 INFO L273 TraceCheckUtils]: 30: Hoare triple {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,147 INFO L273 TraceCheckUtils]: 29: Hoare triple {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,148 INFO L273 TraceCheckUtils]: 28: Hoare triple {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,148 INFO L273 TraceCheckUtils]: 27: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} ~i~0 := 1bv32; {4828#(not (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,149 INFO L273 TraceCheckUtils]: 26: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,149 INFO L273 TraceCheckUtils]: 25: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,149 INFO L273 TraceCheckUtils]: 24: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,150 INFO L273 TraceCheckUtils]: 23: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,150 INFO L273 TraceCheckUtils]: 22: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,150 INFO L273 TraceCheckUtils]: 21: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,151 INFO L273 TraceCheckUtils]: 20: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,151 INFO L273 TraceCheckUtils]: 19: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,151 INFO L273 TraceCheckUtils]: 18: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,152 INFO L273 TraceCheckUtils]: 17: Hoare triple {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} ~i~0 := 1bv32; {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,153 INFO L273 TraceCheckUtils]: 16: Hoare triple {4875#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4841#(not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,153 INFO L273 TraceCheckUtils]: 15: Hoare triple {4879#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4875#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,154 INFO L273 TraceCheckUtils]: 14: Hoare triple {4879#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {4879#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:14,155 INFO L273 TraceCheckUtils]: 13: Hoare triple {4879#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {4879#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:14,155 INFO L273 TraceCheckUtils]: 12: Hoare triple {4889#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4879#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:14,206 INFO L273 TraceCheckUtils]: 11: Hoare triple {4893#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4889#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:14,207 INFO L273 TraceCheckUtils]: 10: Hoare triple {4893#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {4893#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,208 INFO L273 TraceCheckUtils]: 9: Hoare triple {4893#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {4893#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,223 INFO L273 TraceCheckUtils]: 8: Hoare triple {4903#(forall ((~CELLCOUNT~0 (_ BitVec 32))) (or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {4893#(or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:27:14,224 INFO L273 TraceCheckUtils]: 7: Hoare triple {4623#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4903#(forall ((~CELLCOUNT~0 (_ BitVec 32))) (or (not (bvsle (_ bv3 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsle (bvadd main_~i~0 (_ bv2 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:27:14,224 INFO L273 TraceCheckUtils]: 6: Hoare triple {4623#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4623#true} is VALID [2018-11-23 10:27:14,224 INFO L273 TraceCheckUtils]: 5: Hoare triple {4623#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4623#true} is VALID [2018-11-23 10:27:14,224 INFO L256 TraceCheckUtils]: 4: Hoare triple {4623#true} call #t~ret15 := main(); {4623#true} is VALID [2018-11-23 10:27:14,224 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4623#true} {4623#true} #115#return; {4623#true} is VALID [2018-11-23 10:27:14,225 INFO L273 TraceCheckUtils]: 2: Hoare triple {4623#true} assume true; {4623#true} is VALID [2018-11-23 10:27:14,225 INFO L273 TraceCheckUtils]: 1: Hoare triple {4623#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4623#true} is VALID [2018-11-23 10:27:14,225 INFO L256 TraceCheckUtils]: 0: Hoare triple {4623#true} call ULTIMATE.init(); {4623#true} is VALID [2018-11-23 10:27:14,228 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 9 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 10:27:14,236 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:27:14,236 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-23 10:27:14,237 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-11-23 10:27:14,237 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:27:14,237 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 10:27:15,183 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:15,184 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 10:27:15,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 10:27:15,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=279, Unknown=1, NotChecked=0, Total=380 [2018-11-23 10:27:15,184 INFO L87 Difference]: Start difference. First operand 121 states and 141 transitions. Second operand 20 states. [2018-11-23 10:27:20,572 WARN L180 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 21 DAG size of output: 12 [2018-11-23 10:27:21,586 WARN L180 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 20 DAG size of output: 14 [2018-11-23 10:27:32,493 WARN L180 SmtUtils]: Spent 1.03 s on a formula simplification that was a NOOP. DAG size: 19 [2018-11-23 10:27:44,749 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-11-23 10:27:49,274 WARN L180 SmtUtils]: Spent 2.42 s on a formula simplification that was a NOOP. DAG size: 19 [2018-11-23 10:28:11,827 WARN L180 SmtUtils]: Spent 8.85 s on a formula simplification that was a NOOP. DAG size: 20 [2018-11-23 10:28:18,670 WARN L180 SmtUtils]: Spent 226.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:28:20,701 WARN L180 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:28:21,919 WARN L180 SmtUtils]: Spent 363.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 13 [2018-11-23 10:28:27,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:27,615 INFO L93 Difference]: Finished difference Result 289 states and 336 transitions. [2018-11-23 10:28:27,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-11-23 10:28:27,616 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-11-23 10:28:27,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:28:27,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:28:27,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 205 transitions. [2018-11-23 10:28:27,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-11-23 10:28:27,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 205 transitions. [2018-11-23 10:28:27,625 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states and 205 transitions. [2018-11-23 10:28:31,309 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 205 edges. 205 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:31,315 INFO L225 Difference]: With dead ends: 289 [2018-11-23 10:28:31,315 INFO L226 Difference]: Without dead ends: 197 [2018-11-23 10:28:31,317 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 24.4s TimeCoverageRelationStatistics Valid=233, Invalid=636, Unknown=1, NotChecked=0, Total=870 [2018-11-23 10:28:31,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-11-23 10:28:31,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 144. [2018-11-23 10:28:31,730 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:28:31,730 INFO L82 GeneralOperation]: Start isEquivalent. First operand 197 states. Second operand 144 states. [2018-11-23 10:28:31,730 INFO L74 IsIncluded]: Start isIncluded. First operand 197 states. Second operand 144 states. [2018-11-23 10:28:31,730 INFO L87 Difference]: Start difference. First operand 197 states. Second operand 144 states. [2018-11-23 10:28:31,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:31,736 INFO L93 Difference]: Finished difference Result 197 states and 223 transitions. [2018-11-23 10:28:31,736 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 223 transitions. [2018-11-23 10:28:31,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:28:31,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:28:31,737 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand 197 states. [2018-11-23 10:28:31,738 INFO L87 Difference]: Start difference. First operand 144 states. Second operand 197 states. [2018-11-23 10:28:31,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:31,743 INFO L93 Difference]: Finished difference Result 197 states and 223 transitions. [2018-11-23 10:28:31,744 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 223 transitions. [2018-11-23 10:28:31,744 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:28:31,745 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:28:31,745 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:28:31,745 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:28:31,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-11-23 10:28:31,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 166 transitions. [2018-11-23 10:28:31,749 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 166 transitions. Word has length 48 [2018-11-23 10:28:31,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:28:31,749 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 166 transitions. [2018-11-23 10:28:31,749 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 10:28:31,749 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 166 transitions. [2018-11-23 10:28:31,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 10:28:31,750 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:28:31,750 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:28:31,751 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:28:31,751 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:28:31,751 INFO L82 PathProgramCache]: Analyzing trace with hash -911995353, now seen corresponding path program 3 times [2018-11-23 10:28:31,751 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:28:31,751 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:28:31,799 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:28:32,620 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-11-23 10:28:32,621 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:28:32,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:28:32,696 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:28:32,775 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:28:32,779 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:28:32,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,785 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,799 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,799 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-23 10:28:32,842 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:32,843 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 62 [2018-11-23 10:28:32,876 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:32,877 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:32,877 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:32,889 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 45 [2018-11-23 10:28:32,897 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:32,902 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 23 [2018-11-23 10:28:32,908 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,915 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,918 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:32,930 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:53, output treesize:16 [2018-11-23 10:28:33,166 INFO L256 TraceCheckUtils]: 0: Hoare triple {5925#true} call ULTIMATE.init(); {5925#true} is VALID [2018-11-23 10:28:33,166 INFO L273 TraceCheckUtils]: 1: Hoare triple {5925#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5925#true} is VALID [2018-11-23 10:28:33,166 INFO L273 TraceCheckUtils]: 2: Hoare triple {5925#true} assume true; {5925#true} is VALID [2018-11-23 10:28:33,166 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5925#true} {5925#true} #115#return; {5925#true} is VALID [2018-11-23 10:28:33,167 INFO L256 TraceCheckUtils]: 4: Hoare triple {5925#true} call #t~ret15 := main(); {5925#true} is VALID [2018-11-23 10:28:33,167 INFO L273 TraceCheckUtils]: 5: Hoare triple {5925#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5925#true} is VALID [2018-11-23 10:28:33,167 INFO L273 TraceCheckUtils]: 6: Hoare triple {5925#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,168 INFO L273 TraceCheckUtils]: 7: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,168 INFO L273 TraceCheckUtils]: 8: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,169 INFO L273 TraceCheckUtils]: 9: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,169 INFO L273 TraceCheckUtils]: 10: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,170 INFO L273 TraceCheckUtils]: 11: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,170 INFO L273 TraceCheckUtils]: 12: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,170 INFO L273 TraceCheckUtils]: 13: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,171 INFO L273 TraceCheckUtils]: 14: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,172 INFO L273 TraceCheckUtils]: 15: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,173 INFO L273 TraceCheckUtils]: 16: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,174 INFO L273 TraceCheckUtils]: 17: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,174 INFO L273 TraceCheckUtils]: 18: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,175 INFO L273 TraceCheckUtils]: 19: Hoare triple {5948#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {5988#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,176 INFO L273 TraceCheckUtils]: 20: Hoare triple {5988#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {5988#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,178 INFO L273 TraceCheckUtils]: 21: Hoare triple {5988#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,180 INFO L273 TraceCheckUtils]: 22: Hoare triple {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {5999#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,180 INFO L273 TraceCheckUtils]: 23: Hoare triple {5999#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {5999#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,181 INFO L273 TraceCheckUtils]: 24: Hoare triple {5999#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {5999#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,181 INFO L273 TraceCheckUtils]: 25: Hoare triple {5999#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,182 INFO L273 TraceCheckUtils]: 26: Hoare triple {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,182 INFO L273 TraceCheckUtils]: 27: Hoare triple {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume #t~short14; {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,184 INFO L256 TraceCheckUtils]: 28: Hoare triple {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,185 INFO L273 TraceCheckUtils]: 29: Hoare triple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} ~cond := #in~cond; {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,201 INFO L273 TraceCheckUtils]: 30: Hoare triple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} assume !(0bv32 == ~cond); {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,201 INFO L273 TraceCheckUtils]: 31: Hoare triple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} assume true; {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,202 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #119#return; {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,203 INFO L273 TraceCheckUtils]: 33: Hoare triple {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,204 INFO L273 TraceCheckUtils]: 34: Hoare triple {6009#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,204 INFO L273 TraceCheckUtils]: 35: Hoare triple {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,205 INFO L273 TraceCheckUtils]: 36: Hoare triple {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short14; {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,206 INFO L256 TraceCheckUtils]: 37: Hoare triple {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,207 INFO L273 TraceCheckUtils]: 38: Hoare triple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} ~cond := #in~cond; {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,208 INFO L273 TraceCheckUtils]: 39: Hoare triple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} assume !(0bv32 == ~cond); {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,208 INFO L273 TraceCheckUtils]: 40: Hoare triple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} assume true; {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} is VALID [2018-11-23 10:28:33,209 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {6019#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv8 32))))} {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #119#return; {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,210 INFO L273 TraceCheckUtils]: 42: Hoare triple {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:33,211 INFO L273 TraceCheckUtils]: 43: Hoare triple {5995#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {6065#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:33,213 INFO L273 TraceCheckUtils]: 44: Hoare triple {6065#(and (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967280 32))) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {6069#(not |main_#t~short14|)} is VALID [2018-11-23 10:28:33,214 INFO L273 TraceCheckUtils]: 45: Hoare triple {6069#(not |main_#t~short14|)} assume #t~short14; {5926#false} is VALID [2018-11-23 10:28:33,214 INFO L256 TraceCheckUtils]: 46: Hoare triple {5926#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {5926#false} is VALID [2018-11-23 10:28:33,214 INFO L273 TraceCheckUtils]: 47: Hoare triple {5926#false} ~cond := #in~cond; {5926#false} is VALID [2018-11-23 10:28:33,214 INFO L273 TraceCheckUtils]: 48: Hoare triple {5926#false} assume !(0bv32 == ~cond); {5926#false} is VALID [2018-11-23 10:28:33,215 INFO L273 TraceCheckUtils]: 49: Hoare triple {5926#false} assume true; {5926#false} is VALID [2018-11-23 10:28:33,215 INFO L268 TraceCheckUtils]: 50: Hoare quadruple {5926#false} {5926#false} #119#return; {5926#false} is VALID [2018-11-23 10:28:33,215 INFO L273 TraceCheckUtils]: 51: Hoare triple {5926#false} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {5926#false} is VALID [2018-11-23 10:28:33,215 INFO L273 TraceCheckUtils]: 52: Hoare triple {5926#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5926#false} is VALID [2018-11-23 10:28:33,216 INFO L273 TraceCheckUtils]: 53: Hoare triple {5926#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {5926#false} is VALID [2018-11-23 10:28:33,216 INFO L273 TraceCheckUtils]: 54: Hoare triple {5926#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {5926#false} is VALID [2018-11-23 10:28:33,216 INFO L256 TraceCheckUtils]: 55: Hoare triple {5926#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {5926#false} is VALID [2018-11-23 10:28:33,216 INFO L273 TraceCheckUtils]: 56: Hoare triple {5926#false} ~cond := #in~cond; {5926#false} is VALID [2018-11-23 10:28:33,216 INFO L273 TraceCheckUtils]: 57: Hoare triple {5926#false} assume 0bv32 == ~cond; {5926#false} is VALID [2018-11-23 10:28:33,217 INFO L273 TraceCheckUtils]: 58: Hoare triple {5926#false} assume !false; {5926#false} is VALID [2018-11-23 10:28:33,224 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 26 proven. 10 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:28:33,225 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:28:33,534 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2018-11-23 10:28:33,589 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-11-23 10:28:33,595 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:28:33,619 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:28:33,641 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:28:33,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:26 [2018-11-23 10:28:33,649 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:28:33,649 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (not (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv12 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)) [2018-11-23 10:28:33,649 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_33]. (let ((.cse0 (= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32)))) (and (or .cse0 (not (bvsge v_arrayElimCell_33 main_~MINVAL~0))) (or (not .cse0) (not (bvsge (_ bv0 32) main_~MINVAL~0))))) [2018-11-23 10:28:33,778 INFO L273 TraceCheckUtils]: 58: Hoare triple {5926#false} assume !false; {5926#false} is VALID [2018-11-23 10:28:33,778 INFO L273 TraceCheckUtils]: 57: Hoare triple {5926#false} assume 0bv32 == ~cond; {5926#false} is VALID [2018-11-23 10:28:33,778 INFO L273 TraceCheckUtils]: 56: Hoare triple {5926#false} ~cond := #in~cond; {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L256 TraceCheckUtils]: 55: Hoare triple {5926#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L273 TraceCheckUtils]: 54: Hoare triple {5926#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L273 TraceCheckUtils]: 53: Hoare triple {5926#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L273 TraceCheckUtils]: 52: Hoare triple {5926#false} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L273 TraceCheckUtils]: 51: Hoare triple {5926#false} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L268 TraceCheckUtils]: 50: Hoare quadruple {5925#true} {5926#false} #119#return; {5926#false} is VALID [2018-11-23 10:28:33,779 INFO L273 TraceCheckUtils]: 49: Hoare triple {5925#true} assume true; {5925#true} is VALID [2018-11-23 10:28:33,779 INFO L273 TraceCheckUtils]: 48: Hoare triple {5925#true} assume !(0bv32 == ~cond); {5925#true} is VALID [2018-11-23 10:28:33,780 INFO L273 TraceCheckUtils]: 47: Hoare triple {5925#true} ~cond := #in~cond; {5925#true} is VALID [2018-11-23 10:28:33,780 INFO L256 TraceCheckUtils]: 46: Hoare triple {5926#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {5925#true} is VALID [2018-11-23 10:28:33,780 INFO L273 TraceCheckUtils]: 45: Hoare triple {6069#(not |main_#t~short14|)} assume #t~short14; {5926#false} is VALID [2018-11-23 10:28:33,782 INFO L273 TraceCheckUtils]: 44: Hoare triple {6154#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {6069#(not |main_#t~short14|)} is VALID [2018-11-23 10:28:35,800 INFO L273 TraceCheckUtils]: 43: Hoare triple {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {6154#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0))} is UNKNOWN [2018-11-23 10:28:35,802 INFO L273 TraceCheckUtils]: 42: Hoare triple {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:35,804 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {5925#true} {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} #119#return; {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:35,804 INFO L273 TraceCheckUtils]: 40: Hoare triple {5925#true} assume true; {5925#true} is VALID [2018-11-23 10:28:35,804 INFO L273 TraceCheckUtils]: 39: Hoare triple {5925#true} assume !(0bv32 == ~cond); {5925#true} is VALID [2018-11-23 10:28:35,804 INFO L273 TraceCheckUtils]: 38: Hoare triple {5925#true} ~cond := #in~cond; {5925#true} is VALID [2018-11-23 10:28:35,805 INFO L256 TraceCheckUtils]: 37: Hoare triple {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {5925#true} is VALID [2018-11-23 10:28:35,805 INFO L273 TraceCheckUtils]: 36: Hoare triple {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} assume #t~short14; {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:35,807 INFO L273 TraceCheckUtils]: 35: Hoare triple {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,831 INFO L273 TraceCheckUtils]: 34: Hoare triple {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {6158#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0))} is UNKNOWN [2018-11-23 10:28:37,832 INFO L273 TraceCheckUtils]: 33: Hoare triple {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,833 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {5925#true} {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} #119#return; {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,833 INFO L273 TraceCheckUtils]: 31: Hoare triple {5925#true} assume true; {5925#true} is VALID [2018-11-23 10:28:37,833 INFO L273 TraceCheckUtils]: 30: Hoare triple {5925#true} assume !(0bv32 == ~cond); {5925#true} is VALID [2018-11-23 10:28:37,833 INFO L273 TraceCheckUtils]: 29: Hoare triple {5925#true} ~cond := #in~cond; {5925#true} is VALID [2018-11-23 10:28:37,833 INFO L256 TraceCheckUtils]: 28: Hoare triple {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {5925#true} is VALID [2018-11-23 10:28:37,833 INFO L273 TraceCheckUtils]: 27: Hoare triple {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} assume #t~short14; {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,834 INFO L273 TraceCheckUtils]: 26: Hoare triple {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,841 INFO L273 TraceCheckUtils]: 25: Hoare triple {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} ~i~0 := 0bv32; {6186#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,842 INFO L273 TraceCheckUtils]: 24: Hoare triple {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,842 INFO L273 TraceCheckUtils]: 23: Hoare triple {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,843 INFO L273 TraceCheckUtils]: 22: Hoare triple {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,846 INFO L273 TraceCheckUtils]: 21: Hoare triple {6227#(and (= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32)) (not (bvsge (_ bv0 32) main_~MINVAL~0)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {6214#(not (bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,847 INFO L273 TraceCheckUtils]: 20: Hoare triple {6227#(and (= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32)) (not (bvsge (_ bv0 32) main_~MINVAL~0)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {6227#(and (= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32)) (not (bvsge (_ bv0 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:28:37,848 INFO L273 TraceCheckUtils]: 19: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} ~i~0 := 1bv32; {6227#(and (= (bvadd (bvmul (_ bv12 32) main_~i~0) (_ bv4294967284 32)) (_ bv0 32)) (not (bvsge (_ bv0 32) main_~MINVAL~0)))} is VALID [2018-11-23 10:28:37,848 INFO L273 TraceCheckUtils]: 18: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,848 INFO L273 TraceCheckUtils]: 17: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,849 INFO L273 TraceCheckUtils]: 16: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,849 INFO L273 TraceCheckUtils]: 15: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,850 INFO L273 TraceCheckUtils]: 14: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,850 INFO L273 TraceCheckUtils]: 13: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} ~i~0 := 1bv32; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,851 INFO L273 TraceCheckUtils]: 12: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,852 INFO L273 TraceCheckUtils]: 11: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,852 INFO L273 TraceCheckUtils]: 10: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,853 INFO L273 TraceCheckUtils]: 9: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,853 INFO L273 TraceCheckUtils]: 8: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,854 INFO L273 TraceCheckUtils]: 7: Hoare triple {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,855 INFO L273 TraceCheckUtils]: 6: Hoare triple {5925#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {6234#(not (bvsge (_ bv0 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:37,855 INFO L273 TraceCheckUtils]: 5: Hoare triple {5925#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5925#true} is VALID [2018-11-23 10:28:37,855 INFO L256 TraceCheckUtils]: 4: Hoare triple {5925#true} call #t~ret15 := main(); {5925#true} is VALID [2018-11-23 10:28:37,855 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5925#true} {5925#true} #115#return; {5925#true} is VALID [2018-11-23 10:28:37,856 INFO L273 TraceCheckUtils]: 2: Hoare triple {5925#true} assume true; {5925#true} is VALID [2018-11-23 10:28:37,856 INFO L273 TraceCheckUtils]: 1: Hoare triple {5925#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5925#true} is VALID [2018-11-23 10:28:37,856 INFO L256 TraceCheckUtils]: 0: Hoare triple {5925#true} call ULTIMATE.init(); {5925#true} is VALID [2018-11-23 10:28:37,861 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 10:28:37,864 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:28:37,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 [2018-11-23 10:28:37,865 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 59 [2018-11-23 10:28:37,865 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:28:37,865 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 16 states. [2018-11-23 10:28:42,303 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 92 edges. 90 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:42,303 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 10:28:42,303 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 10:28:42,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:28:42,304 INFO L87 Difference]: Start difference. First operand 144 states and 166 transitions. Second operand 16 states. [2018-11-23 10:29:00,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:00,113 INFO L93 Difference]: Finished difference Result 184 states and 209 transitions. [2018-11-23 10:29:00,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 10:29:00,114 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 59 [2018-11-23 10:29:00,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:00,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:29:00,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 89 transitions. [2018-11-23 10:29:00,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16 states. [2018-11-23 10:29:00,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 89 transitions. [2018-11-23 10:29:00,117 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 10 states and 89 transitions. [2018-11-23 10:29:00,550 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:00,554 INFO L225 Difference]: With dead ends: 184 [2018-11-23 10:29:00,554 INFO L226 Difference]: Without dead ends: 154 [2018-11-23 10:29:00,554 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 98 SyntacticMatches, 5 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=68, Invalid=204, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:29:00,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-11-23 10:29:00,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 144. [2018-11-23 10:29:00,935 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:00,936 INFO L82 GeneralOperation]: Start isEquivalent. First operand 154 states. Second operand 144 states. [2018-11-23 10:29:00,936 INFO L74 IsIncluded]: Start isIncluded. First operand 154 states. Second operand 144 states. [2018-11-23 10:29:00,936 INFO L87 Difference]: Start difference. First operand 154 states. Second operand 144 states. [2018-11-23 10:29:00,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:00,940 INFO L93 Difference]: Finished difference Result 154 states and 174 transitions. [2018-11-23 10:29:00,941 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 174 transitions. [2018-11-23 10:29:00,941 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:00,942 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:00,942 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand 154 states. [2018-11-23 10:29:00,942 INFO L87 Difference]: Start difference. First operand 144 states. Second operand 154 states. [2018-11-23 10:29:00,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:00,947 INFO L93 Difference]: Finished difference Result 154 states and 174 transitions. [2018-11-23 10:29:00,947 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 174 transitions. [2018-11-23 10:29:00,947 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:00,948 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:00,948 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:00,948 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:00,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-11-23 10:29:00,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 164 transitions. [2018-11-23 10:29:00,952 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 164 transitions. Word has length 59 [2018-11-23 10:29:00,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:00,952 INFO L480 AbstractCegarLoop]: Abstraction has 144 states and 164 transitions. [2018-11-23 10:29:00,952 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 10:29:00,953 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 164 transitions. [2018-11-23 10:29:00,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 10:29:00,953 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:00,954 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:00,954 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:00,954 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:00,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1923112603, now seen corresponding path program 4 times [2018-11-23 10:29:00,955 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:00,955 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:00,983 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:29:01,349 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:29:01,349 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:29:01,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:01,452 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:01,913 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-23 10:29:02,319 WARN L180 SmtUtils]: Spent 148.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-11-23 10:29:02,672 WARN L180 SmtUtils]: Spent 146.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-23 10:29:03,094 WARN L180 SmtUtils]: Spent 165.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:03,537 WARN L180 SmtUtils]: Spent 164.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-11-23 10:29:04,155 WARN L180 SmtUtils]: Spent 159.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:04,680 WARN L180 SmtUtils]: Spent 151.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-11-23 10:29:04,713 INFO L256 TraceCheckUtils]: 0: Hoare triple {7044#true} call ULTIMATE.init(); {7044#true} is VALID [2018-11-23 10:29:04,713 INFO L273 TraceCheckUtils]: 1: Hoare triple {7044#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {7044#true} is VALID [2018-11-23 10:29:04,713 INFO L273 TraceCheckUtils]: 2: Hoare triple {7044#true} assume true; {7044#true} is VALID [2018-11-23 10:29:04,714 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7044#true} {7044#true} #115#return; {7044#true} is VALID [2018-11-23 10:29:04,714 INFO L256 TraceCheckUtils]: 4: Hoare triple {7044#true} call #t~ret15 := main(); {7044#true} is VALID [2018-11-23 10:29:04,714 INFO L273 TraceCheckUtils]: 5: Hoare triple {7044#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {7044#true} is VALID [2018-11-23 10:29:04,714 INFO L273 TraceCheckUtils]: 6: Hoare triple {7044#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {7067#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:29:04,715 INFO L273 TraceCheckUtils]: 7: Hoare triple {7067#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,715 INFO L273 TraceCheckUtils]: 8: Hoare triple {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,716 INFO L273 TraceCheckUtils]: 9: Hoare triple {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,716 INFO L273 TraceCheckUtils]: 10: Hoare triple {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,717 INFO L273 TraceCheckUtils]: 11: Hoare triple {7071#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7084#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:04,718 INFO L273 TraceCheckUtils]: 12: Hoare triple {7084#(and (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,718 INFO L273 TraceCheckUtils]: 13: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} ~i~0 := 1bv32; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,719 INFO L273 TraceCheckUtils]: 14: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,720 INFO L273 TraceCheckUtils]: 15: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,721 INFO L273 TraceCheckUtils]: 16: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,722 INFO L273 TraceCheckUtils]: 17: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,723 INFO L273 TraceCheckUtils]: 18: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,724 INFO L273 TraceCheckUtils]: 19: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} ~i~0 := 1bv32; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,724 INFO L273 TraceCheckUtils]: 20: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,725 INFO L273 TraceCheckUtils]: 21: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,726 INFO L273 TraceCheckUtils]: 22: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,727 INFO L273 TraceCheckUtils]: 23: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,728 INFO L273 TraceCheckUtils]: 24: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,729 INFO L273 TraceCheckUtils]: 25: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} ~i~0 := 0bv32; {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:29:04,730 INFO L273 TraceCheckUtils]: 26: Hoare triple {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:29:04,731 INFO L273 TraceCheckUtils]: 27: Hoare triple {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} assume #t~short14; {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:29:04,732 INFO L256 TraceCheckUtils]: 28: Hoare triple {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,733 INFO L273 TraceCheckUtils]: 29: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} ~cond := #in~cond; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,733 INFO L273 TraceCheckUtils]: 30: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,734 INFO L273 TraceCheckUtils]: 31: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume true; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,735 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #119#return; {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:29:04,736 INFO L273 TraceCheckUtils]: 33: Hoare triple {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} is VALID [2018-11-23 10:29:04,737 INFO L273 TraceCheckUtils]: 34: Hoare triple {7128#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= main_~i~0 (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,738 INFO L273 TraceCheckUtils]: 35: Hoare triple {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,739 INFO L273 TraceCheckUtils]: 36: Hoare triple {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short14; {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,740 INFO L256 TraceCheckUtils]: 37: Hoare triple {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,741 INFO L273 TraceCheckUtils]: 38: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} ~cond := #in~cond; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,741 INFO L273 TraceCheckUtils]: 39: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,742 INFO L273 TraceCheckUtils]: 40: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume true; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,756 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #119#return; {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,756 INFO L273 TraceCheckUtils]: 42: Hoare triple {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,757 INFO L273 TraceCheckUtils]: 43: Hoare triple {7156#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:04,758 INFO L273 TraceCheckUtils]: 44: Hoare triple {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:04,758 INFO L273 TraceCheckUtils]: 45: Hoare triple {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:04,759 INFO L256 TraceCheckUtils]: 46: Hoare triple {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,759 INFO L273 TraceCheckUtils]: 47: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} ~cond := #in~cond; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,760 INFO L273 TraceCheckUtils]: 48: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !(0bv32 == ~cond); {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,761 INFO L273 TraceCheckUtils]: 49: Hoare triple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume true; {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,761 INFO L268 TraceCheckUtils]: 50: Hoare quadruple {7088#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #119#return; {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:04,762 INFO L273 TraceCheckUtils]: 51: Hoare triple {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:04,786 INFO L273 TraceCheckUtils]: 52: Hoare triple {7184#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)) (= (_ bv2 32) main_~i~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {7212#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:04,813 INFO L273 TraceCheckUtils]: 53: Hoare triple {7212#(and (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvsrem ~CELLCOUNT~0 (_ bv3 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7045#false} is VALID [2018-11-23 10:29:04,813 INFO L273 TraceCheckUtils]: 54: Hoare triple {7045#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {7045#false} is VALID [2018-11-23 10:29:04,813 INFO L256 TraceCheckUtils]: 55: Hoare triple {7045#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7045#false} is VALID [2018-11-23 10:29:04,813 INFO L273 TraceCheckUtils]: 56: Hoare triple {7045#false} ~cond := #in~cond; {7045#false} is VALID [2018-11-23 10:29:04,813 INFO L273 TraceCheckUtils]: 57: Hoare triple {7045#false} assume 0bv32 == ~cond; {7045#false} is VALID [2018-11-23 10:29:04,813 INFO L273 TraceCheckUtils]: 58: Hoare triple {7045#false} assume !false; {7045#false} is VALID [2018-11-23 10:29:04,823 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-23 10:29:04,823 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:06,262 WARN L180 SmtUtils]: Spent 113.00 ms on a formula simplification that was a NOOP. DAG size: 8 [2018-11-23 10:29:06,808 WARN L180 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-11-23 10:29:07,392 WARN L180 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-23 10:29:07,524 INFO L273 TraceCheckUtils]: 58: Hoare triple {7045#false} assume !false; {7045#false} is VALID [2018-11-23 10:29:07,525 INFO L273 TraceCheckUtils]: 57: Hoare triple {7045#false} assume 0bv32 == ~cond; {7045#false} is VALID [2018-11-23 10:29:07,525 INFO L273 TraceCheckUtils]: 56: Hoare triple {7045#false} ~cond := #in~cond; {7045#false} is VALID [2018-11-23 10:29:07,525 INFO L256 TraceCheckUtils]: 55: Hoare triple {7045#false} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7045#false} is VALID [2018-11-23 10:29:07,526 INFO L273 TraceCheckUtils]: 54: Hoare triple {7045#false} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {7045#false} is VALID [2018-11-23 10:29:07,543 INFO L273 TraceCheckUtils]: 53: Hoare triple {7246#(not (bvslt main_~i~0 ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7045#false} is VALID [2018-11-23 10:29:07,548 INFO L273 TraceCheckUtils]: 52: Hoare triple {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {7246#(not (bvslt main_~i~0 ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,549 INFO L273 TraceCheckUtils]: 51: Hoare triple {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,549 INFO L268 TraceCheckUtils]: 50: Hoare quadruple {7044#true} {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} #119#return; {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,549 INFO L273 TraceCheckUtils]: 49: Hoare triple {7044#true} assume true; {7044#true} is VALID [2018-11-23 10:29:07,549 INFO L273 TraceCheckUtils]: 48: Hoare triple {7044#true} assume !(0bv32 == ~cond); {7044#true} is VALID [2018-11-23 10:29:07,550 INFO L273 TraceCheckUtils]: 47: Hoare triple {7044#true} ~cond := #in~cond; {7044#true} is VALID [2018-11-23 10:29:07,550 INFO L256 TraceCheckUtils]: 46: Hoare triple {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7044#true} is VALID [2018-11-23 10:29:07,550 INFO L273 TraceCheckUtils]: 45: Hoare triple {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} assume !#t~short14;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := 0bv32 == #t~mem13; {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,550 INFO L273 TraceCheckUtils]: 44: Hoare triple {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,579 INFO L273 TraceCheckUtils]: 43: Hoare triple {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {7250#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,580 INFO L273 TraceCheckUtils]: 42: Hoare triple {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,580 INFO L268 TraceCheckUtils]: 41: Hoare quadruple {7044#true} {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} #119#return; {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,581 INFO L273 TraceCheckUtils]: 40: Hoare triple {7044#true} assume true; {7044#true} is VALID [2018-11-23 10:29:07,581 INFO L273 TraceCheckUtils]: 39: Hoare triple {7044#true} assume !(0bv32 == ~cond); {7044#true} is VALID [2018-11-23 10:29:07,581 INFO L273 TraceCheckUtils]: 38: Hoare triple {7044#true} ~cond := #in~cond; {7044#true} is VALID [2018-11-23 10:29:07,581 INFO L256 TraceCheckUtils]: 37: Hoare triple {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7044#true} is VALID [2018-11-23 10:29:07,581 INFO L273 TraceCheckUtils]: 36: Hoare triple {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} assume #t~short14; {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,582 INFO L273 TraceCheckUtils]: 35: Hoare triple {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,613 INFO L273 TraceCheckUtils]: 34: Hoare triple {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} #t~post11 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post11);havoc #t~post11; {7278#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,614 INFO L273 TraceCheckUtils]: 33: Hoare triple {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} havoc #t~mem13;havoc #t~mem12;havoc #t~short14; {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,614 INFO L268 TraceCheckUtils]: 32: Hoare quadruple {7044#true} {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} #119#return; {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,614 INFO L273 TraceCheckUtils]: 31: Hoare triple {7044#true} assume true; {7044#true} is VALID [2018-11-23 10:29:07,615 INFO L273 TraceCheckUtils]: 30: Hoare triple {7044#true} assume !(0bv32 == ~cond); {7044#true} is VALID [2018-11-23 10:29:07,615 INFO L273 TraceCheckUtils]: 29: Hoare triple {7044#true} ~cond := #in~cond; {7044#true} is VALID [2018-11-23 10:29:07,615 INFO L256 TraceCheckUtils]: 28: Hoare triple {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short14 then 1bv32 else 0bv32)); {7044#true} is VALID [2018-11-23 10:29:07,615 INFO L273 TraceCheckUtils]: 27: Hoare triple {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} assume #t~short14; {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,615 INFO L273 TraceCheckUtils]: 26: Hoare triple {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short14 := ~bvsge32(#t~mem12, ~MINVAL~0); {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,616 INFO L273 TraceCheckUtils]: 25: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} ~i~0 := 0bv32; {7306#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,616 INFO L273 TraceCheckUtils]: 24: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,616 INFO L273 TraceCheckUtils]: 23: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} #t~post8 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post8);havoc #t~post8; {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,617 INFO L273 TraceCheckUtils]: 22: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem9;call #t~mem10 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem10, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem10; {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,617 INFO L273 TraceCheckUtils]: 21: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,618 INFO L273 TraceCheckUtils]: 20: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,618 INFO L273 TraceCheckUtils]: 19: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} ~i~0 := 1bv32; {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,619 INFO L273 TraceCheckUtils]: 18: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,620 INFO L273 TraceCheckUtils]: 17: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} #t~post5 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post5);havoc #t~post5; {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,620 INFO L273 TraceCheckUtils]: 16: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} call #t~mem6 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem6, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem6;call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem7; {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,621 INFO L273 TraceCheckUtils]: 15: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,621 INFO L273 TraceCheckUtils]: 14: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,622 INFO L273 TraceCheckUtils]: 13: Hoare triple {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} ~i~0 := 1bv32; {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,622 INFO L273 TraceCheckUtils]: 12: Hoare triple {7374#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7334#(not (bvslt (_ bv3 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:07,642 INFO L273 TraceCheckUtils]: 11: Hoare triple {7378#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7374#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:29:07,643 INFO L273 TraceCheckUtils]: 10: Hoare triple {7378#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem4; {7378#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:29:07,643 INFO L273 TraceCheckUtils]: 9: Hoare triple {7378#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(3bv32, ~i~0), 3bv32))), 4bv32); {7378#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:29:07,644 INFO L273 TraceCheckUtils]: 8: Hoare triple {7388#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 3bv32)); {7378#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))))} is VALID [2018-11-23 10:29:07,668 INFO L273 TraceCheckUtils]: 7: Hoare triple {7044#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 3bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 3bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {7388#(or (not (bvslt (_ bv3 32) ~CELLCOUNT~0)) (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv3 32))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv3 32)))))} is VALID [2018-11-23 10:29:07,669 INFO L273 TraceCheckUtils]: 6: Hoare triple {7044#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {7044#true} is VALID [2018-11-23 10:29:07,669 INFO L273 TraceCheckUtils]: 5: Hoare triple {7044#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {7044#true} is VALID [2018-11-23 10:29:07,669 INFO L256 TraceCheckUtils]: 4: Hoare triple {7044#true} call #t~ret15 := main(); {7044#true} is VALID [2018-11-23 10:29:07,669 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7044#true} {7044#true} #115#return; {7044#true} is VALID [2018-11-23 10:29:07,669 INFO L273 TraceCheckUtils]: 2: Hoare triple {7044#true} assume true; {7044#true} is VALID [2018-11-23 10:29:07,669 INFO L273 TraceCheckUtils]: 1: Hoare triple {7044#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {7044#true} is VALID [2018-11-23 10:29:07,670 INFO L256 TraceCheckUtils]: 0: Hoare triple {7044#true} call ULTIMATE.init(); {7044#true} is VALID [2018-11-23 10:29:07,673 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-11-23 10:29:07,676 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:07,676 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 18 [2018-11-23 10:29:07,677 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2018-11-23 10:29:07,677 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:07,677 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states. [2018-11-23 10:29:08,944 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 95 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:08,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 10:29:08,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 10:29:08,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=219, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:29:08,945 INFO L87 Difference]: Start difference. First operand 144 states and 164 transitions. Second operand 18 states.