java -ea -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc ../../../trunk/examples/toolchains/AutomizerCInline_WitnessPrinter.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf -i ../../../trunk/examples/svcomp/array-tiling/mbpr4_true-unreach-call.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-61f4311 [2018-11-23 10:25:57,303 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:25:57,306 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:25:57,323 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:25:57,324 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:25:57,325 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:25:57,326 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:25:57,328 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:25:57,330 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:25:57,330 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:25:57,331 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:25:57,332 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:25:57,333 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:25:57,334 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:25:57,335 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:25:57,336 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:25:57,337 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:25:57,339 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:25:57,341 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:25:57,343 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:25:57,344 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:25:57,346 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:25:57,348 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:25:57,348 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:25:57,348 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:25:57,350 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:25:57,351 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:25:57,352 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:25:57,352 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:25:57,356 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:25:57,356 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:25:57,357 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:25:57,357 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:25:57,357 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:25:57,361 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:25:57,362 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:25:57,362 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Bitvector.epf [2018-11-23 10:25:57,389 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:25:57,390 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:25:57,391 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:25:57,391 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:25:57,392 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:25:57,392 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:25:57,392 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:25:57,392 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:25:57,392 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:25:57,393 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:25:57,393 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:25:57,393 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:25:57,393 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:25:57,393 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:25:57,394 INFO L133 SettingsManager]: * Use bitvectors instead of ints=true [2018-11-23 10:25:57,394 INFO L133 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2018-11-23 10:25:57,394 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:25:57,394 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:25:57,394 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:25:57,395 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:25:57,395 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:25:57,395 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:25:57,395 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:25:57,395 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:25:57,396 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:25:57,396 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:25:57,396 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:25:57,396 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:25:57,396 INFO L133 SettingsManager]: * Trace refinement strategy=WOLF [2018-11-23 10:25:57,397 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:25:57,397 INFO L133 SettingsManager]: * Command for external solver=cvc4nyu --tear-down-incremental --rewrite-divk --print-success --lang smt [2018-11-23 10:25:57,397 INFO L133 SettingsManager]: * Logic for external solver=AUFBV [2018-11-23 10:25:57,397 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-11-23 10:25:57,442 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:25:57,455 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:25:57,458 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:25:57,460 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:25:57,461 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:25:57,461 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-tiling/mbpr4_true-unreach-call.i [2018-11-23 10:25:57,525 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dc784a6c9/50acb10a7dbb4cf0a3c054d9c61c7302/FLAG31fcd4857 [2018-11-23 10:25:57,992 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:25:57,993 INFO L161 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/array-tiling/mbpr4_true-unreach-call.i [2018-11-23 10:25:58,001 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dc784a6c9/50acb10a7dbb4cf0a3c054d9c61c7302/FLAG31fcd4857 [2018-11-23 10:25:58,363 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/dc784a6c9/50acb10a7dbb4cf0a3c054d9c61c7302 [2018-11-23 10:25:58,373 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:25:58,374 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:25:58,377 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:25:58,378 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:25:58,382 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:25:58,384 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,387 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@76bd2d3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58, skipping insertion in model container [2018-11-23 10:25:58,387 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,398 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:25:58,430 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:25:58,757 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:25:58,763 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:25:58,834 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:25:58,862 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:25:58,862 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58 WrapperNode [2018-11-23 10:25:58,863 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:25:58,864 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:25:58,864 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:25:58,864 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:25:58,875 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,901 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,910 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:25:58,910 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:25:58,910 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:25:58,910 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:25:58,986 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,986 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,993 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:58,993 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:59,041 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:59,051 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:59,054 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... [2018-11-23 10:25:59,057 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:25:59,058 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:25:59,058 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:25:59,058 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:25:59,059 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:25:59,115 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:25:59,115 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:25:59,115 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 10:25:59,116 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2018-11-23 10:25:59,116 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:25:59,116 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:25:59,116 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:25:59,116 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:25:59,116 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-11-23 10:25:59,117 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-11-23 10:25:59,117 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2018-11-23 10:25:59,117 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 10:26:00,338 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:26:00,338 INFO L280 CfgBuilder]: Removed 5 assue(true) statements. [2018-11-23 10:26:00,339 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:26:00 BoogieIcfgContainer [2018-11-23 10:26:00,339 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:26:00,340 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:26:00,340 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:26:00,343 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:26:00,343 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:25:58" (1/3) ... [2018-11-23 10:26:00,344 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7777b42c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:26:00, skipping insertion in model container [2018-11-23 10:26:00,344 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:25:58" (2/3) ... [2018-11-23 10:26:00,345 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7777b42c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:26:00, skipping insertion in model container [2018-11-23 10:26:00,345 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:26:00" (3/3) ... [2018-11-23 10:26:00,347 INFO L112 eAbstractionObserver]: Analyzing ICFG mbpr4_true-unreach-call.i [2018-11-23 10:26:00,356 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:26:00,366 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:26:00,386 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:26:00,421 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:26:00,422 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:26:00,422 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:26:00,423 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:26:00,423 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:26:00,423 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:26:00,423 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:26:00,424 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:26:00,424 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:26:00,444 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states. [2018-11-23 10:26:00,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 10:26:00,451 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:00,452 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:00,454 INFO L423 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:00,460 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:00,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1961398023, now seen corresponding path program 1 times [2018-11-23 10:26:00,465 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:00,466 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:00,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:00,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:00,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:00,582 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:00,671 INFO L256 TraceCheckUtils]: 0: Hoare triple {48#true} call ULTIMATE.init(); {48#true} is VALID [2018-11-23 10:26:00,674 INFO L273 TraceCheckUtils]: 1: Hoare triple {48#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {48#true} is VALID [2018-11-23 10:26:00,675 INFO L273 TraceCheckUtils]: 2: Hoare triple {48#true} assume true; {48#true} is VALID [2018-11-23 10:26:00,675 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {48#true} {48#true} #136#return; {48#true} is VALID [2018-11-23 10:26:00,676 INFO L256 TraceCheckUtils]: 4: Hoare triple {48#true} call #t~ret22 := main(); {48#true} is VALID [2018-11-23 10:26:00,676 INFO L273 TraceCheckUtils]: 5: Hoare triple {48#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {48#true} is VALID [2018-11-23 10:26:00,676 INFO L273 TraceCheckUtils]: 6: Hoare triple {48#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {48#true} is VALID [2018-11-23 10:26:00,677 INFO L273 TraceCheckUtils]: 7: Hoare triple {48#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {48#true} is VALID [2018-11-23 10:26:00,677 INFO L273 TraceCheckUtils]: 8: Hoare triple {48#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {48#true} is VALID [2018-11-23 10:26:00,678 INFO L273 TraceCheckUtils]: 9: Hoare triple {48#true} ~i~0 := 1bv32; {48#true} is VALID [2018-11-23 10:26:00,679 INFO L273 TraceCheckUtils]: 10: Hoare triple {48#true} assume !true; {49#false} is VALID [2018-11-23 10:26:00,679 INFO L273 TraceCheckUtils]: 11: Hoare triple {49#false} ~i~0 := 1bv32; {49#false} is VALID [2018-11-23 10:26:00,680 INFO L273 TraceCheckUtils]: 12: Hoare triple {49#false} assume !true; {49#false} is VALID [2018-11-23 10:26:00,680 INFO L273 TraceCheckUtils]: 13: Hoare triple {49#false} ~i~0 := 1bv32; {49#false} is VALID [2018-11-23 10:26:00,680 INFO L273 TraceCheckUtils]: 14: Hoare triple {49#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {49#false} is VALID [2018-11-23 10:26:00,681 INFO L273 TraceCheckUtils]: 15: Hoare triple {49#false} ~i~0 := 0bv32; {49#false} is VALID [2018-11-23 10:26:00,681 INFO L273 TraceCheckUtils]: 16: Hoare triple {49#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {49#false} is VALID [2018-11-23 10:26:00,682 INFO L273 TraceCheckUtils]: 17: Hoare triple {49#false} assume #t~short21; {49#false} is VALID [2018-11-23 10:26:00,682 INFO L256 TraceCheckUtils]: 18: Hoare triple {49#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {49#false} is VALID [2018-11-23 10:26:00,682 INFO L273 TraceCheckUtils]: 19: Hoare triple {49#false} ~cond := #in~cond; {49#false} is VALID [2018-11-23 10:26:00,683 INFO L273 TraceCheckUtils]: 20: Hoare triple {49#false} assume 0bv32 == ~cond; {49#false} is VALID [2018-11-23 10:26:00,683 INFO L273 TraceCheckUtils]: 21: Hoare triple {49#false} assume !false; {49#false} is VALID [2018-11-23 10:26:00,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:00,689 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:26:00,694 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:26:00,694 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 10:26:00,708 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 22 [2018-11-23 10:26:00,712 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:00,715 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states. [2018-11-23 10:26:00,804 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:00,805 INFO L459 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-11-23 10:26:00,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-11-23 10:26:00,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:26:00,815 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 2 states. [2018-11-23 10:26:01,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:01,144 INFO L93 Difference]: Finished difference Result 78 states and 108 transitions. [2018-11-23 10:26:01,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-11-23 10:26:01,144 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 22 [2018-11-23 10:26:01,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:01,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:26:01,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 108 transitions. [2018-11-23 10:26:01,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2 states. [2018-11-23 10:26:01,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 108 transitions. [2018-11-23 10:26:01,167 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 2 states and 108 transitions. [2018-11-23 10:26:02,259 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:02,272 INFO L225 Difference]: With dead ends: 78 [2018-11-23 10:26:02,273 INFO L226 Difference]: Without dead ends: 39 [2018-11-23 10:26:02,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-11-23 10:26:02,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-11-23 10:26:02,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-11-23 10:26:02,331 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:02,332 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand 39 states. [2018-11-23 10:26:02,333 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 39 states. [2018-11-23 10:26:02,333 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 39 states. [2018-11-23 10:26:02,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:02,339 INFO L93 Difference]: Finished difference Result 39 states and 48 transitions. [2018-11-23 10:26:02,339 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 48 transitions. [2018-11-23 10:26:02,340 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:02,340 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:02,340 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand 39 states. [2018-11-23 10:26:02,340 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 39 states. [2018-11-23 10:26:02,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:02,346 INFO L93 Difference]: Finished difference Result 39 states and 48 transitions. [2018-11-23 10:26:02,346 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 48 transitions. [2018-11-23 10:26:02,347 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:02,347 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:02,347 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:02,347 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:02,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-11-23 10:26:02,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 48 transitions. [2018-11-23 10:26:02,353 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 48 transitions. Word has length 22 [2018-11-23 10:26:02,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:02,354 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 48 transitions. [2018-11-23 10:26:02,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-11-23 10:26:02,354 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 48 transitions. [2018-11-23 10:26:02,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 10:26:02,355 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:02,355 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:02,356 INFO L423 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:02,356 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:02,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1084797805, now seen corresponding path program 1 times [2018-11-23 10:26:02,357 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:02,357 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:02,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:02,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:02,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:02,433 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:02,763 INFO L256 TraceCheckUtils]: 0: Hoare triple {338#true} call ULTIMATE.init(); {338#true} is VALID [2018-11-23 10:26:02,763 INFO L273 TraceCheckUtils]: 1: Hoare triple {338#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {338#true} is VALID [2018-11-23 10:26:02,764 INFO L273 TraceCheckUtils]: 2: Hoare triple {338#true} assume true; {338#true} is VALID [2018-11-23 10:26:02,764 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {338#true} {338#true} #136#return; {338#true} is VALID [2018-11-23 10:26:02,764 INFO L256 TraceCheckUtils]: 4: Hoare triple {338#true} call #t~ret22 := main(); {338#true} is VALID [2018-11-23 10:26:02,765 INFO L273 TraceCheckUtils]: 5: Hoare triple {338#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {338#true} is VALID [2018-11-23 10:26:02,765 INFO L273 TraceCheckUtils]: 6: Hoare triple {338#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {338#true} is VALID [2018-11-23 10:26:02,766 INFO L273 TraceCheckUtils]: 7: Hoare triple {338#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {338#true} is VALID [2018-11-23 10:26:02,766 INFO L273 TraceCheckUtils]: 8: Hoare triple {338#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {338#true} is VALID [2018-11-23 10:26:02,767 INFO L273 TraceCheckUtils]: 9: Hoare triple {338#true} ~i~0 := 1bv32; {338#true} is VALID [2018-11-23 10:26:02,767 INFO L273 TraceCheckUtils]: 10: Hoare triple {338#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {338#true} is VALID [2018-11-23 10:26:02,767 INFO L273 TraceCheckUtils]: 11: Hoare triple {338#true} ~i~0 := 1bv32; {338#true} is VALID [2018-11-23 10:26:02,768 INFO L273 TraceCheckUtils]: 12: Hoare triple {338#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {338#true} is VALID [2018-11-23 10:26:02,768 INFO L273 TraceCheckUtils]: 13: Hoare triple {338#true} ~i~0 := 1bv32; {338#true} is VALID [2018-11-23 10:26:02,768 INFO L273 TraceCheckUtils]: 14: Hoare triple {338#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {338#true} is VALID [2018-11-23 10:26:02,769 INFO L273 TraceCheckUtils]: 15: Hoare triple {338#true} ~i~0 := 0bv32; {338#true} is VALID [2018-11-23 10:26:02,769 INFO L273 TraceCheckUtils]: 16: Hoare triple {338#true} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {338#true} is VALID [2018-11-23 10:26:02,770 INFO L273 TraceCheckUtils]: 17: Hoare triple {338#true} assume #t~short21; {394#|main_#t~short21|} is VALID [2018-11-23 10:26:02,771 INFO L256 TraceCheckUtils]: 18: Hoare triple {394#|main_#t~short21|} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {398#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:02,774 INFO L273 TraceCheckUtils]: 19: Hoare triple {398#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {402#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:02,775 INFO L273 TraceCheckUtils]: 20: Hoare triple {402#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {339#false} is VALID [2018-11-23 10:26:02,775 INFO L273 TraceCheckUtils]: 21: Hoare triple {339#false} assume !false; {339#false} is VALID [2018-11-23 10:26:02,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:02,778 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:26:02,781 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:26:02,782 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:26:02,785 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-11-23 10:26:02,786 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:02,786 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states. [2018-11-23 10:26:02,939 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:02,940 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:26:02,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:26:02,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:26:02,941 INFO L87 Difference]: Start difference. First operand 39 states and 48 transitions. Second operand 5 states. [2018-11-23 10:26:03,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:03,940 INFO L93 Difference]: Finished difference Result 47 states and 56 transitions. [2018-11-23 10:26:03,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:26:03,941 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-11-23 10:26:03,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:03,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:26:03,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 56 transitions. [2018-11-23 10:26:03,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5 states. [2018-11-23 10:26:03,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 56 transitions. [2018-11-23 10:26:03,948 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 56 transitions. [2018-11-23 10:26:04,193 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:04,197 INFO L225 Difference]: With dead ends: 47 [2018-11-23 10:26:04,197 INFO L226 Difference]: Without dead ends: 45 [2018-11-23 10:26:04,198 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:26:04,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-11-23 10:26:04,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2018-11-23 10:26:04,211 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:04,211 INFO L82 GeneralOperation]: Start isEquivalent. First operand 45 states. Second operand 44 states. [2018-11-23 10:26:04,211 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 44 states. [2018-11-23 10:26:04,211 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 44 states. [2018-11-23 10:26:04,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:04,216 INFO L93 Difference]: Finished difference Result 45 states and 54 transitions. [2018-11-23 10:26:04,216 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 54 transitions. [2018-11-23 10:26:04,217 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:04,217 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:04,217 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand 45 states. [2018-11-23 10:26:04,218 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 45 states. [2018-11-23 10:26:04,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:04,222 INFO L93 Difference]: Finished difference Result 45 states and 54 transitions. [2018-11-23 10:26:04,222 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 54 transitions. [2018-11-23 10:26:04,223 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:04,223 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:04,223 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:04,223 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:04,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-11-23 10:26:04,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 53 transitions. [2018-11-23 10:26:04,227 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 53 transitions. Word has length 22 [2018-11-23 10:26:04,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:04,227 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 53 transitions. [2018-11-23 10:26:04,228 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:26:04,228 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 53 transitions. [2018-11-23 10:26:04,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-11-23 10:26:04,229 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:04,229 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:04,229 INFO L423 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:04,230 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:04,230 INFO L82 PathProgramCache]: Analyzing trace with hash -1082950763, now seen corresponding path program 1 times [2018-11-23 10:26:04,230 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:04,231 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:04,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:04,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:04,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:04,331 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:04,417 INFO L256 TraceCheckUtils]: 0: Hoare triple {617#true} call ULTIMATE.init(); {617#true} is VALID [2018-11-23 10:26:04,418 INFO L273 TraceCheckUtils]: 1: Hoare triple {617#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {617#true} is VALID [2018-11-23 10:26:04,418 INFO L273 TraceCheckUtils]: 2: Hoare triple {617#true} assume true; {617#true} is VALID [2018-11-23 10:26:04,419 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {617#true} {617#true} #136#return; {617#true} is VALID [2018-11-23 10:26:04,419 INFO L256 TraceCheckUtils]: 4: Hoare triple {617#true} call #t~ret22 := main(); {617#true} is VALID [2018-11-23 10:26:04,420 INFO L273 TraceCheckUtils]: 5: Hoare triple {617#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {617#true} is VALID [2018-11-23 10:26:04,422 INFO L273 TraceCheckUtils]: 6: Hoare triple {617#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {640#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:26:04,425 INFO L273 TraceCheckUtils]: 7: Hoare triple {640#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {644#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:04,442 INFO L273 TraceCheckUtils]: 8: Hoare triple {644#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {618#false} is VALID [2018-11-23 10:26:04,443 INFO L273 TraceCheckUtils]: 9: Hoare triple {618#false} ~i~0 := 1bv32; {618#false} is VALID [2018-11-23 10:26:04,443 INFO L273 TraceCheckUtils]: 10: Hoare triple {618#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {618#false} is VALID [2018-11-23 10:26:04,443 INFO L273 TraceCheckUtils]: 11: Hoare triple {618#false} ~i~0 := 1bv32; {618#false} is VALID [2018-11-23 10:26:04,444 INFO L273 TraceCheckUtils]: 12: Hoare triple {618#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {618#false} is VALID [2018-11-23 10:26:04,444 INFO L273 TraceCheckUtils]: 13: Hoare triple {618#false} ~i~0 := 1bv32; {618#false} is VALID [2018-11-23 10:26:04,444 INFO L273 TraceCheckUtils]: 14: Hoare triple {618#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {618#false} is VALID [2018-11-23 10:26:04,444 INFO L273 TraceCheckUtils]: 15: Hoare triple {618#false} ~i~0 := 0bv32; {618#false} is VALID [2018-11-23 10:26:04,444 INFO L273 TraceCheckUtils]: 16: Hoare triple {618#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {618#false} is VALID [2018-11-23 10:26:04,445 INFO L273 TraceCheckUtils]: 17: Hoare triple {618#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {618#false} is VALID [2018-11-23 10:26:04,445 INFO L256 TraceCheckUtils]: 18: Hoare triple {618#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {618#false} is VALID [2018-11-23 10:26:04,445 INFO L273 TraceCheckUtils]: 19: Hoare triple {618#false} ~cond := #in~cond; {618#false} is VALID [2018-11-23 10:26:04,446 INFO L273 TraceCheckUtils]: 20: Hoare triple {618#false} assume 0bv32 == ~cond; {618#false} is VALID [2018-11-23 10:26:04,446 INFO L273 TraceCheckUtils]: 21: Hoare triple {618#false} assume !false; {618#false} is VALID [2018-11-23 10:26:04,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:04,448 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:26:04,450 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:26:04,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:26:04,450 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-11-23 10:26:04,451 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:04,451 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states. [2018-11-23 10:26:04,538 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:04,538 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:26:04,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:26:04,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:26:04,539 INFO L87 Difference]: Start difference. First operand 44 states and 53 transitions. Second operand 4 states. [2018-11-23 10:26:05,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:05,450 INFO L93 Difference]: Finished difference Result 80 states and 98 transitions. [2018-11-23 10:26:05,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:26:05,450 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-11-23 10:26:05,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:05,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:26:05,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 88 transitions. [2018-11-23 10:26:05,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. [2018-11-23 10:26:05,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 88 transitions. [2018-11-23 10:26:05,462 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 88 transitions. [2018-11-23 10:26:05,840 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:05,843 INFO L225 Difference]: With dead ends: 80 [2018-11-23 10:26:05,843 INFO L226 Difference]: Without dead ends: 48 [2018-11-23 10:26:05,844 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:26:05,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-11-23 10:26:05,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 45. [2018-11-23 10:26:05,865 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:05,865 INFO L82 GeneralOperation]: Start isEquivalent. First operand 48 states. Second operand 45 states. [2018-11-23 10:26:05,865 INFO L74 IsIncluded]: Start isIncluded. First operand 48 states. Second operand 45 states. [2018-11-23 10:26:05,866 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 45 states. [2018-11-23 10:26:05,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:05,869 INFO L93 Difference]: Finished difference Result 48 states and 58 transitions. [2018-11-23 10:26:05,869 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 58 transitions. [2018-11-23 10:26:05,870 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:05,870 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:05,871 INFO L74 IsIncluded]: Start isIncluded. First operand 45 states. Second operand 48 states. [2018-11-23 10:26:05,871 INFO L87 Difference]: Start difference. First operand 45 states. Second operand 48 states. [2018-11-23 10:26:05,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:05,875 INFO L93 Difference]: Finished difference Result 48 states and 58 transitions. [2018-11-23 10:26:05,875 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 58 transitions. [2018-11-23 10:26:05,876 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:05,876 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:05,876 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:05,876 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:05,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-11-23 10:26:05,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 54 transitions. [2018-11-23 10:26:05,880 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 54 transitions. Word has length 22 [2018-11-23 10:26:05,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:05,880 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 54 transitions. [2018-11-23 10:26:05,880 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:26:05,880 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 54 transitions. [2018-11-23 10:26:05,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-11-23 10:26:05,881 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:05,882 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:05,882 INFO L423 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:05,882 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:05,882 INFO L82 PathProgramCache]: Analyzing trace with hash -1675538566, now seen corresponding path program 1 times [2018-11-23 10:26:05,883 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:05,883 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:05,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:05,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:05,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:05,978 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:06,731 INFO L256 TraceCheckUtils]: 0: Hoare triple {943#true} call ULTIMATE.init(); {943#true} is VALID [2018-11-23 10:26:06,732 INFO L273 TraceCheckUtils]: 1: Hoare triple {943#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {943#true} is VALID [2018-11-23 10:26:06,733 INFO L273 TraceCheckUtils]: 2: Hoare triple {943#true} assume true; {943#true} is VALID [2018-11-23 10:26:06,733 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {943#true} {943#true} #136#return; {943#true} is VALID [2018-11-23 10:26:06,734 INFO L256 TraceCheckUtils]: 4: Hoare triple {943#true} call #t~ret22 := main(); {943#true} is VALID [2018-11-23 10:26:06,734 INFO L273 TraceCheckUtils]: 5: Hoare triple {943#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {943#true} is VALID [2018-11-23 10:26:06,734 INFO L273 TraceCheckUtils]: 6: Hoare triple {943#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {943#true} is VALID [2018-11-23 10:26:06,735 INFO L273 TraceCheckUtils]: 7: Hoare triple {943#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {969#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:26:06,736 INFO L273 TraceCheckUtils]: 8: Hoare triple {969#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {973#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:06,736 INFO L273 TraceCheckUtils]: 9: Hoare triple {973#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {973#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:06,737 INFO L273 TraceCheckUtils]: 10: Hoare triple {973#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {973#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:06,738 INFO L273 TraceCheckUtils]: 11: Hoare triple {973#(and (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {983#(and (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:26:06,753 INFO L273 TraceCheckUtils]: 12: Hoare triple {983#(and (bvsle (bvadd main_~i~0 (_ bv4294967295 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv2 32) main_~i~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {987#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:26:06,754 INFO L273 TraceCheckUtils]: 13: Hoare triple {987#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~i~0 := 1bv32; {991#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:06,755 INFO L273 TraceCheckUtils]: 14: Hoare triple {991#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {944#false} is VALID [2018-11-23 10:26:06,755 INFO L273 TraceCheckUtils]: 15: Hoare triple {944#false} ~i~0 := 1bv32; {944#false} is VALID [2018-11-23 10:26:06,755 INFO L273 TraceCheckUtils]: 16: Hoare triple {944#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {944#false} is VALID [2018-11-23 10:26:06,755 INFO L273 TraceCheckUtils]: 17: Hoare triple {944#false} ~i~0 := 1bv32; {944#false} is VALID [2018-11-23 10:26:06,756 INFO L273 TraceCheckUtils]: 18: Hoare triple {944#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {944#false} is VALID [2018-11-23 10:26:06,756 INFO L273 TraceCheckUtils]: 19: Hoare triple {944#false} ~i~0 := 0bv32; {944#false} is VALID [2018-11-23 10:26:06,756 INFO L273 TraceCheckUtils]: 20: Hoare triple {944#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {944#false} is VALID [2018-11-23 10:26:06,757 INFO L273 TraceCheckUtils]: 21: Hoare triple {944#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {944#false} is VALID [2018-11-23 10:26:06,757 INFO L256 TraceCheckUtils]: 22: Hoare triple {944#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {944#false} is VALID [2018-11-23 10:26:06,758 INFO L273 TraceCheckUtils]: 23: Hoare triple {944#false} ~cond := #in~cond; {944#false} is VALID [2018-11-23 10:26:06,758 INFO L273 TraceCheckUtils]: 24: Hoare triple {944#false} assume 0bv32 == ~cond; {944#false} is VALID [2018-11-23 10:26:06,759 INFO L273 TraceCheckUtils]: 25: Hoare triple {944#false} assume !false; {944#false} is VALID [2018-11-23 10:26:06,761 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:06,761 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:26:08,271 INFO L273 TraceCheckUtils]: 25: Hoare triple {944#false} assume !false; {944#false} is VALID [2018-11-23 10:26:08,271 INFO L273 TraceCheckUtils]: 24: Hoare triple {944#false} assume 0bv32 == ~cond; {944#false} is VALID [2018-11-23 10:26:08,272 INFO L273 TraceCheckUtils]: 23: Hoare triple {944#false} ~cond := #in~cond; {944#false} is VALID [2018-11-23 10:26:08,272 INFO L256 TraceCheckUtils]: 22: Hoare triple {944#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {944#false} is VALID [2018-11-23 10:26:08,272 INFO L273 TraceCheckUtils]: 21: Hoare triple {944#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {944#false} is VALID [2018-11-23 10:26:08,272 INFO L273 TraceCheckUtils]: 20: Hoare triple {944#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {944#false} is VALID [2018-11-23 10:26:08,273 INFO L273 TraceCheckUtils]: 19: Hoare triple {944#false} ~i~0 := 0bv32; {944#false} is VALID [2018-11-23 10:26:08,273 INFO L273 TraceCheckUtils]: 18: Hoare triple {944#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {944#false} is VALID [2018-11-23 10:26:08,273 INFO L273 TraceCheckUtils]: 17: Hoare triple {944#false} ~i~0 := 1bv32; {944#false} is VALID [2018-11-23 10:26:08,273 INFO L273 TraceCheckUtils]: 16: Hoare triple {944#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {944#false} is VALID [2018-11-23 10:26:08,274 INFO L273 TraceCheckUtils]: 15: Hoare triple {944#false} ~i~0 := 1bv32; {944#false} is VALID [2018-11-23 10:26:08,274 INFO L273 TraceCheckUtils]: 14: Hoare triple {1061#(bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {944#false} is VALID [2018-11-23 10:26:08,275 INFO L273 TraceCheckUtils]: 13: Hoare triple {1065#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} ~i~0 := 1bv32; {1061#(bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:26:08,275 INFO L273 TraceCheckUtils]: 12: Hoare triple {1069#(or (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1065#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:26:08,292 INFO L273 TraceCheckUtils]: 11: Hoare triple {1073#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1069#(or (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:26:08,293 INFO L273 TraceCheckUtils]: 10: Hoare triple {1073#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {1073#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:26:08,294 INFO L273 TraceCheckUtils]: 9: Hoare triple {1073#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {1073#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:26:08,309 INFO L273 TraceCheckUtils]: 8: Hoare triple {1083#(forall ((~CELLCOUNT~0 (_ BitVec 32))) (or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1073#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:26:08,310 INFO L273 TraceCheckUtils]: 7: Hoare triple {943#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1083#(forall ((~CELLCOUNT~0 (_ BitVec 32))) (or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:26:08,311 INFO L273 TraceCheckUtils]: 6: Hoare triple {943#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {943#true} is VALID [2018-11-23 10:26:08,311 INFO L273 TraceCheckUtils]: 5: Hoare triple {943#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {943#true} is VALID [2018-11-23 10:26:08,311 INFO L256 TraceCheckUtils]: 4: Hoare triple {943#true} call #t~ret22 := main(); {943#true} is VALID [2018-11-23 10:26:08,312 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {943#true} {943#true} #136#return; {943#true} is VALID [2018-11-23 10:26:08,312 INFO L273 TraceCheckUtils]: 2: Hoare triple {943#true} assume true; {943#true} is VALID [2018-11-23 10:26:08,312 INFO L273 TraceCheckUtils]: 1: Hoare triple {943#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {943#true} is VALID [2018-11-23 10:26:08,312 INFO L256 TraceCheckUtils]: 0: Hoare triple {943#true} call ULTIMATE.init(); {943#true} is VALID [2018-11-23 10:26:08,315 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:08,324 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:26:08,325 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-11-23 10:26:08,325 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-11-23 10:26:08,326 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:08,326 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 12 states. [2018-11-23 10:26:08,605 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:08,606 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 10:26:08,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 10:26:08,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-11-23 10:26:08,606 INFO L87 Difference]: Start difference. First operand 45 states and 54 transitions. Second operand 12 states. [2018-11-23 10:26:10,338 WARN L180 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 11 [2018-11-23 10:26:10,716 WARN L180 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 8 [2018-11-23 10:26:12,174 WARN L180 SmtUtils]: Spent 190.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:26:13,009 WARN L180 SmtUtils]: Spent 291.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2018-11-23 10:26:33,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:33,871 INFO L93 Difference]: Finished difference Result 170 states and 225 transitions. [2018-11-23 10:26:33,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 10:26:33,871 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-11-23 10:26:33,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:33,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:26:33,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 206 transitions. [2018-11-23 10:26:33,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12 states. [2018-11-23 10:26:33,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 206 transitions. [2018-11-23 10:26:33,884 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states and 206 transitions. [2018-11-23 10:26:37,262 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 206 edges. 206 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:37,269 INFO L225 Difference]: With dead ends: 170 [2018-11-23 10:26:37,269 INFO L226 Difference]: Without dead ends: 139 [2018-11-23 10:26:37,276 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=103, Invalid=203, Unknown=0, NotChecked=0, Total=306 [2018-11-23 10:26:37,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-11-23 10:26:37,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 78. [2018-11-23 10:26:37,421 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:37,421 INFO L82 GeneralOperation]: Start isEquivalent. First operand 139 states. Second operand 78 states. [2018-11-23 10:26:37,422 INFO L74 IsIncluded]: Start isIncluded. First operand 139 states. Second operand 78 states. [2018-11-23 10:26:37,422 INFO L87 Difference]: Start difference. First operand 139 states. Second operand 78 states. [2018-11-23 10:26:37,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:37,431 INFO L93 Difference]: Finished difference Result 139 states and 178 transitions. [2018-11-23 10:26:37,431 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 178 transitions. [2018-11-23 10:26:37,433 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:37,433 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:37,433 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand 139 states. [2018-11-23 10:26:37,434 INFO L87 Difference]: Start difference. First operand 78 states. Second operand 139 states. [2018-11-23 10:26:37,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:37,442 INFO L93 Difference]: Finished difference Result 139 states and 178 transitions. [2018-11-23 10:26:37,442 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 178 transitions. [2018-11-23 10:26:37,444 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:37,444 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:37,444 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:37,444 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:37,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-11-23 10:26:37,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 96 transitions. [2018-11-23 10:26:37,448 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 96 transitions. Word has length 26 [2018-11-23 10:26:37,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:37,449 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 96 transitions. [2018-11-23 10:26:37,449 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 10:26:37,449 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 96 transitions. [2018-11-23 10:26:37,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 10:26:37,451 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:37,451 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:37,451 INFO L423 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:37,451 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:37,452 INFO L82 PathProgramCache]: Analyzing trace with hash -1636442583, now seen corresponding path program 1 times [2018-11-23 10:26:37,452 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:37,452 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:37,478 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:37,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:37,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:37,571 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:37,845 INFO L256 TraceCheckUtils]: 0: Hoare triple {1724#true} call ULTIMATE.init(); {1724#true} is VALID [2018-11-23 10:26:37,846 INFO L273 TraceCheckUtils]: 1: Hoare triple {1724#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {1724#true} is VALID [2018-11-23 10:26:37,846 INFO L273 TraceCheckUtils]: 2: Hoare triple {1724#true} assume true; {1724#true} is VALID [2018-11-23 10:26:37,846 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {1724#true} {1724#true} #136#return; {1724#true} is VALID [2018-11-23 10:26:37,846 INFO L256 TraceCheckUtils]: 4: Hoare triple {1724#true} call #t~ret22 := main(); {1724#true} is VALID [2018-11-23 10:26:37,847 INFO L273 TraceCheckUtils]: 5: Hoare triple {1724#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {1724#true} is VALID [2018-11-23 10:26:37,856 INFO L273 TraceCheckUtils]: 6: Hoare triple {1724#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,863 INFO L273 TraceCheckUtils]: 7: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,865 INFO L273 TraceCheckUtils]: 8: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,867 INFO L273 TraceCheckUtils]: 9: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,871 INFO L273 TraceCheckUtils]: 10: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,871 INFO L273 TraceCheckUtils]: 11: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,873 INFO L273 TraceCheckUtils]: 12: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,874 INFO L273 TraceCheckUtils]: 13: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,875 INFO L273 TraceCheckUtils]: 14: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,876 INFO L273 TraceCheckUtils]: 15: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,876 INFO L273 TraceCheckUtils]: 16: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,885 INFO L273 TraceCheckUtils]: 17: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,886 INFO L273 TraceCheckUtils]: 18: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,888 INFO L273 TraceCheckUtils]: 19: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,890 INFO L273 TraceCheckUtils]: 20: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,892 INFO L273 TraceCheckUtils]: 21: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,893 INFO L273 TraceCheckUtils]: 22: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,894 INFO L273 TraceCheckUtils]: 23: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,895 INFO L273 TraceCheckUtils]: 24: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,896 INFO L273 TraceCheckUtils]: 25: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,897 INFO L273 TraceCheckUtils]: 26: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:37,898 INFO L273 TraceCheckUtils]: 27: Hoare triple {1747#(and (= (_ bv1 32) main_~CCCELVOL1~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL1~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {1725#false} is VALID [2018-11-23 10:26:37,898 INFO L273 TraceCheckUtils]: 28: Hoare triple {1725#false} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {1725#false} is VALID [2018-11-23 10:26:37,899 INFO L273 TraceCheckUtils]: 29: Hoare triple {1725#false} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {1725#false} is VALID [2018-11-23 10:26:37,899 INFO L273 TraceCheckUtils]: 30: Hoare triple {1725#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {1725#false} is VALID [2018-11-23 10:26:37,899 INFO L273 TraceCheckUtils]: 31: Hoare triple {1725#false} ~i~0 := 0bv32; {1725#false} is VALID [2018-11-23 10:26:37,899 INFO L273 TraceCheckUtils]: 32: Hoare triple {1725#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {1725#false} is VALID [2018-11-23 10:26:37,900 INFO L273 TraceCheckUtils]: 33: Hoare triple {1725#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {1725#false} is VALID [2018-11-23 10:26:37,900 INFO L256 TraceCheckUtils]: 34: Hoare triple {1725#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {1725#false} is VALID [2018-11-23 10:26:37,900 INFO L273 TraceCheckUtils]: 35: Hoare triple {1725#false} ~cond := #in~cond; {1725#false} is VALID [2018-11-23 10:26:37,901 INFO L273 TraceCheckUtils]: 36: Hoare triple {1725#false} assume 0bv32 == ~cond; {1725#false} is VALID [2018-11-23 10:26:37,901 INFO L273 TraceCheckUtils]: 37: Hoare triple {1725#false} assume !false; {1725#false} is VALID [2018-11-23 10:26:37,904 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 10:26:37,905 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:26:37,907 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:26:37,908 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:26:37,908 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-11-23 10:26:37,908 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:37,909 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:26:38,111 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:38,111 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:26:38,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:26:38,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:26:38,112 INFO L87 Difference]: Start difference. First operand 78 states and 96 transitions. Second operand 3 states. [2018-11-23 10:26:38,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:38,642 INFO L93 Difference]: Finished difference Result 102 states and 123 transitions. [2018-11-23 10:26:38,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:26:38,643 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-11-23 10:26:38,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:38,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:26:38,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 67 transitions. [2018-11-23 10:26:38,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:26:38,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 67 transitions. [2018-11-23 10:26:38,647 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 67 transitions. [2018-11-23 10:26:39,048 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:39,050 INFO L225 Difference]: With dead ends: 102 [2018-11-23 10:26:39,050 INFO L226 Difference]: Without dead ends: 78 [2018-11-23 10:26:39,051 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:26:39,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-11-23 10:26:39,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-11-23 10:26:39,168 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:39,168 INFO L82 GeneralOperation]: Start isEquivalent. First operand 78 states. Second operand 78 states. [2018-11-23 10:26:39,169 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand 78 states. [2018-11-23 10:26:39,169 INFO L87 Difference]: Start difference. First operand 78 states. Second operand 78 states. [2018-11-23 10:26:39,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:39,174 INFO L93 Difference]: Finished difference Result 78 states and 94 transitions. [2018-11-23 10:26:39,175 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 94 transitions. [2018-11-23 10:26:39,175 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:39,175 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:39,175 INFO L74 IsIncluded]: Start isIncluded. First operand 78 states. Second operand 78 states. [2018-11-23 10:26:39,176 INFO L87 Difference]: Start difference. First operand 78 states. Second operand 78 states. [2018-11-23 10:26:39,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:39,184 INFO L93 Difference]: Finished difference Result 78 states and 94 transitions. [2018-11-23 10:26:39,185 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 94 transitions. [2018-11-23 10:26:39,186 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:39,186 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:39,186 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:39,187 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:39,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-11-23 10:26:39,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 94 transitions. [2018-11-23 10:26:39,192 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 94 transitions. Word has length 38 [2018-11-23 10:26:39,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:39,193 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 94 transitions. [2018-11-23 10:26:39,193 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:26:39,193 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 94 transitions. [2018-11-23 10:26:39,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-11-23 10:26:39,194 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:39,194 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:39,194 INFO L423 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:39,194 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:39,196 INFO L82 PathProgramCache]: Analyzing trace with hash -935378005, now seen corresponding path program 1 times [2018-11-23 10:26:39,197 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:39,197 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:39,218 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:39,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:39,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:39,338 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:39,482 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:26:39,523 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:26:39,548 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,587 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,713 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-23 10:26:39,763 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:39,764 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 142 [2018-11-23 10:26:39,792 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,793 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,794 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,806 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 67 [2018-11-23 10:26:39,842 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,843 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,844 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,856 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 47 [2018-11-23 10:26:39,863 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:39,869 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-11-23 10:26:39,872 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,879 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,883 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,887 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,915 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:39,916 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:101, output treesize:14 [2018-11-23 10:26:39,993 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:26:40,002 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,006 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:26:40,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,019 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,043 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,044 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:26 [2018-11-23 10:26:40,056 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:40,056 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_41|, main_~CCCELVOL3~0]. (let ((.cse0 (select |v_#memory_int_41| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv16 32) main_~i~0))) (and (= (store |v_#memory_int_41| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967284 32)) main_~CCCELVOL3~0)) |#memory_int|) (= (_ bv0 32) (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32))) (_ bv4294967291 32))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:26:40,056 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:26:40,126 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:40,127 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 110 [2018-11-23 10:26:40,169 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,175 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-11-23 10:26:40,197 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,198 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,199 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,212 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 49 [2018-11-23 10:26:40,233 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,276 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 25 [2018-11-23 10:26:40,297 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,307 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,311 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,336 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,336 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:85, output treesize:16 [2018-11-23 10:26:40,416 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:26:40,433 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,437 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 41 [2018-11-23 10:26:40,440 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,477 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:26 [2018-11-23 10:26:40,490 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:40,490 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_43|, main_~CCCELVOL2~0]. (let ((.cse0 (select |v_#memory_int_43| |main_~#volArray~0.base|)) (.cse1 (bvmul (_ bv16 32) main_~i~0))) (and (= |#memory_int| (store |v_#memory_int_43| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967288 32)) main_~CCCELVOL2~0))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select .cse0 (bvadd |main_~#volArray~0.offset| .cse1 (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))) [2018-11-23 10:26:40,490 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))) [2018-11-23 10:26:40,518 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:40,519 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 110 [2018-11-23 10:26:40,579 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,584 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-11-23 10:26:40,661 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,662 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,663 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,675 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 49 [2018-11-23 10:26:40,684 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,690 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 25 [2018-11-23 10:26:40,692 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,703 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,706 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,711 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,721 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:85, output treesize:16 [2018-11-23 10:26:40,783 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-11-23 10:26:40,791 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,793 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:40,795 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 54 [2018-11-23 10:26:40,798 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,808 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,832 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:40,833 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-11-23 10:26:40,905 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:40,906 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 117 [2018-11-23 10:26:41,036 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,037 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,038 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,043 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,045 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 73 [2018-11-23 10:26:41,116 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,117 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,119 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,120 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,122 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,123 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,139 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,150 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 88 [2018-11-23 10:26:41,172 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,174 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:41,182 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 62 [2018-11-23 10:26:41,196 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:41,217 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:41,225 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:41,233 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:41,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:41,253 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:94, output treesize:25 [2018-11-23 10:26:41,355 INFO L256 TraceCheckUtils]: 0: Hoare triple {2235#true} call ULTIMATE.init(); {2235#true} is VALID [2018-11-23 10:26:41,356 INFO L273 TraceCheckUtils]: 1: Hoare triple {2235#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2235#true} is VALID [2018-11-23 10:26:41,356 INFO L273 TraceCheckUtils]: 2: Hoare triple {2235#true} assume true; {2235#true} is VALID [2018-11-23 10:26:41,356 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2235#true} {2235#true} #136#return; {2235#true} is VALID [2018-11-23 10:26:41,357 INFO L256 TraceCheckUtils]: 4: Hoare triple {2235#true} call #t~ret22 := main(); {2235#true} is VALID [2018-11-23 10:26:41,357 INFO L273 TraceCheckUtils]: 5: Hoare triple {2235#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2235#true} is VALID [2018-11-23 10:26:41,358 INFO L273 TraceCheckUtils]: 6: Hoare triple {2235#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2258#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,358 INFO L273 TraceCheckUtils]: 7: Hoare triple {2258#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2262#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,359 INFO L273 TraceCheckUtils]: 8: Hoare triple {2262#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2262#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,360 INFO L273 TraceCheckUtils]: 9: Hoare triple {2262#(and (= (_ bv5 32) main_~CCCELVOL4~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,362 INFO L273 TraceCheckUtils]: 10: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,363 INFO L273 TraceCheckUtils]: 11: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,364 INFO L273 TraceCheckUtils]: 12: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,365 INFO L273 TraceCheckUtils]: 13: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,366 INFO L273 TraceCheckUtils]: 14: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,370 INFO L273 TraceCheckUtils]: 15: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,371 INFO L273 TraceCheckUtils]: 16: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,371 INFO L273 TraceCheckUtils]: 17: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,372 INFO L273 TraceCheckUtils]: 18: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,373 INFO L273 TraceCheckUtils]: 19: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,373 INFO L273 TraceCheckUtils]: 20: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,376 INFO L273 TraceCheckUtils]: 21: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,378 INFO L273 TraceCheckUtils]: 22: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,378 INFO L273 TraceCheckUtils]: 23: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,379 INFO L273 TraceCheckUtils]: 24: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,380 INFO L273 TraceCheckUtils]: 25: Hoare triple {2273#(and (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,381 INFO L273 TraceCheckUtils]: 26: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,385 INFO L273 TraceCheckUtils]: 27: Hoare triple {2269#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {2325#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:41,387 INFO L273 TraceCheckUtils]: 28: Hoare triple {2325#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32))) (_ bv4294967291 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {2329#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,387 INFO L273 TraceCheckUtils]: 29: Hoare triple {2329#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {2329#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,388 INFO L273 TraceCheckUtils]: 30: Hoare triple {2329#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2329#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,389 INFO L273 TraceCheckUtils]: 31: Hoare triple {2329#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {2339#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:41,392 INFO L273 TraceCheckUtils]: 32: Hoare triple {2339#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= (_ bv5 32) (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {2343#|main_#t~short21|} is VALID [2018-11-23 10:26:41,395 INFO L273 TraceCheckUtils]: 33: Hoare triple {2343#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {2236#false} is VALID [2018-11-23 10:26:41,395 INFO L256 TraceCheckUtils]: 34: Hoare triple {2236#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {2236#false} is VALID [2018-11-23 10:26:41,395 INFO L273 TraceCheckUtils]: 35: Hoare triple {2236#false} ~cond := #in~cond; {2236#false} is VALID [2018-11-23 10:26:41,395 INFO L273 TraceCheckUtils]: 36: Hoare triple {2236#false} assume 0bv32 == ~cond; {2236#false} is VALID [2018-11-23 10:26:41,395 INFO L273 TraceCheckUtils]: 37: Hoare triple {2236#false} assume !false; {2236#false} is VALID [2018-11-23 10:26:41,401 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:26:41,401 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:26:41,757 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-11-23 10:26:41,814 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2018-11-23 10:26:41,816 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:26:41,847 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:41,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:41,883 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:31 [2018-11-23 10:26:41,910 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:41,911 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) main_~CCCELVOL4~0) |main_~#volArray~0.offset|) main_~MINVAL~0) [2018-11-23 10:26:41,911 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_19, v_prenex_1]. (let ((.cse0 (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (.cse1 (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))) (and (or (bvsge v_arrayElimCell_19 main_~MINVAL~0) .cse0) (or .cse1 (bvsge v_prenex_1 main_~MINVAL~0)) (or (not .cse0) .cse1))) [2018-11-23 10:26:42,080 INFO L273 TraceCheckUtils]: 37: Hoare triple {2236#false} assume !false; {2236#false} is VALID [2018-11-23 10:26:42,080 INFO L273 TraceCheckUtils]: 36: Hoare triple {2236#false} assume 0bv32 == ~cond; {2236#false} is VALID [2018-11-23 10:26:42,080 INFO L273 TraceCheckUtils]: 35: Hoare triple {2236#false} ~cond := #in~cond; {2236#false} is VALID [2018-11-23 10:26:42,081 INFO L256 TraceCheckUtils]: 34: Hoare triple {2236#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {2236#false} is VALID [2018-11-23 10:26:42,081 INFO L273 TraceCheckUtils]: 33: Hoare triple {2343#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {2236#false} is VALID [2018-11-23 10:26:42,082 INFO L273 TraceCheckUtils]: 32: Hoare triple {2374#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {2343#|main_#t~short21|} is VALID [2018-11-23 10:26:42,083 INFO L273 TraceCheckUtils]: 31: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 0bv32; {2374#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,083 INFO L273 TraceCheckUtils]: 30: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,084 INFO L273 TraceCheckUtils]: 29: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,085 INFO L273 TraceCheckUtils]: 28: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,098 INFO L273 TraceCheckUtils]: 27: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,099 INFO L273 TraceCheckUtils]: 26: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,100 INFO L273 TraceCheckUtils]: 25: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 1bv32; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,100 INFO L273 TraceCheckUtils]: 24: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,101 INFO L273 TraceCheckUtils]: 23: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,102 INFO L273 TraceCheckUtils]: 22: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,111 INFO L273 TraceCheckUtils]: 21: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,112 INFO L273 TraceCheckUtils]: 20: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,113 INFO L273 TraceCheckUtils]: 19: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 1bv32; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,113 INFO L273 TraceCheckUtils]: 18: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,113 INFO L273 TraceCheckUtils]: 17: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,114 INFO L273 TraceCheckUtils]: 16: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,129 INFO L273 TraceCheckUtils]: 15: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,129 INFO L273 TraceCheckUtils]: 14: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,130 INFO L273 TraceCheckUtils]: 13: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} ~i~0 := 1bv32; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,130 INFO L273 TraceCheckUtils]: 12: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,131 INFO L273 TraceCheckUtils]: 11: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,131 INFO L273 TraceCheckUtils]: 10: Hoare triple {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,153 INFO L273 TraceCheckUtils]: 9: Hoare triple {2445#(and (or (forall ((v_arrayElimCell_19 (_ BitVec 32))) (bvsge v_arrayElimCell_19 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {2378#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) |main_~#volArray~0.offset|) main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,154 INFO L273 TraceCheckUtils]: 8: Hoare triple {2445#(and (or (forall ((v_arrayElimCell_19 (_ BitVec 32))) (bvsge v_arrayElimCell_19 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {2445#(and (or (forall ((v_arrayElimCell_19 (_ BitVec 32))) (bvsge v_arrayElimCell_19 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:26:42,155 INFO L273 TraceCheckUtils]: 7: Hoare triple {2452#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {2445#(and (or (forall ((v_arrayElimCell_19 (_ BitVec 32))) (bvsge v_arrayElimCell_19 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL4~0 main_~MINVAL~0))} is VALID [2018-11-23 10:26:42,155 INFO L273 TraceCheckUtils]: 6: Hoare triple {2235#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {2452#(bvsge main_~CCCELVOL4~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:42,156 INFO L273 TraceCheckUtils]: 5: Hoare triple {2235#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {2235#true} is VALID [2018-11-23 10:26:42,156 INFO L256 TraceCheckUtils]: 4: Hoare triple {2235#true} call #t~ret22 := main(); {2235#true} is VALID [2018-11-23 10:26:42,156 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {2235#true} {2235#true} #136#return; {2235#true} is VALID [2018-11-23 10:26:42,156 INFO L273 TraceCheckUtils]: 2: Hoare triple {2235#true} assume true; {2235#true} is VALID [2018-11-23 10:26:42,156 INFO L273 TraceCheckUtils]: 1: Hoare triple {2235#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {2235#true} is VALID [2018-11-23 10:26:42,157 INFO L256 TraceCheckUtils]: 0: Hoare triple {2235#true} call ULTIMATE.init(); {2235#true} is VALID [2018-11-23 10:26:42,160 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 10:26:42,163 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:26:42,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7] total 14 [2018-11-23 10:26:42,164 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 38 [2018-11-23 10:26:42,165 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:42,165 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 14 states. [2018-11-23 10:26:42,566 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 65 edges. 65 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:42,566 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 10:26:42,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 10:26:42,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2018-11-23 10:26:42,567 INFO L87 Difference]: Start difference. First operand 78 states and 94 transitions. Second operand 14 states. [2018-11-23 10:26:48,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:48,664 INFO L93 Difference]: Finished difference Result 166 states and 202 transitions. [2018-11-23 10:26:48,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 10:26:48,664 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 38 [2018-11-23 10:26:48,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:26:48,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:26:48,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 127 transitions. [2018-11-23 10:26:48,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14 states. [2018-11-23 10:26:48,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 127 transitions. [2018-11-23 10:26:48,679 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 127 transitions. [2018-11-23 10:26:49,227 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 127 edges. 127 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:49,231 INFO L225 Difference]: With dead ends: 166 [2018-11-23 10:26:49,231 INFO L226 Difference]: Without dead ends: 98 [2018-11-23 10:26:49,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 53 SyntacticMatches, 10 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=145, Invalid=361, Unknown=0, NotChecked=0, Total=506 [2018-11-23 10:26:49,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-11-23 10:26:49,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 80. [2018-11-23 10:26:49,503 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:26:49,503 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand 80 states. [2018-11-23 10:26:49,503 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand 80 states. [2018-11-23 10:26:49,503 INFO L87 Difference]: Start difference. First operand 98 states. Second operand 80 states. [2018-11-23 10:26:49,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:49,507 INFO L93 Difference]: Finished difference Result 98 states and 116 transitions. [2018-11-23 10:26:49,508 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 116 transitions. [2018-11-23 10:26:49,508 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:49,508 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:49,509 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand 98 states. [2018-11-23 10:26:49,509 INFO L87 Difference]: Start difference. First operand 80 states. Second operand 98 states. [2018-11-23 10:26:49,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:26:49,513 INFO L93 Difference]: Finished difference Result 98 states and 116 transitions. [2018-11-23 10:26:49,513 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 116 transitions. [2018-11-23 10:26:49,514 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:26:49,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:26:49,514 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:26:49,514 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:26:49,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-11-23 10:26:49,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 94 transitions. [2018-11-23 10:26:49,517 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 94 transitions. Word has length 38 [2018-11-23 10:26:49,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:26:49,518 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 94 transitions. [2018-11-23 10:26:49,518 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 10:26:49,518 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 94 transitions. [2018-11-23 10:26:49,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 10:26:49,519 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:26:49,520 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:26:49,520 INFO L423 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:26:49,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:26:49,520 INFO L82 PathProgramCache]: Analyzing trace with hash 749050205, now seen corresponding path program 1 times [2018-11-23 10:26:49,521 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:26:49,521 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:26:49,538 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:26:49,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:49,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:26:49,694 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:26:49,818 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:26:49,826 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:26:49,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:49,832 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:49,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:49,851 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-23 10:26:49,903 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:49,904 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 110 [2018-11-23 10:26:49,943 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:49,945 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:49,946 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:49,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 65 [2018-11-23 10:26:49,989 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:49,991 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:49,993 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,006 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 55 [2018-11-23 10:26:50,073 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,120 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 29 [2018-11-23 10:26:50,144 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,275 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,278 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,283 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,295 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,295 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:85, output treesize:18 [2018-11-23 10:26:50,373 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-11-23 10:26:50,383 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,386 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-11-23 10:26:50,390 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,410 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,437 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:16 [2018-11-23 10:26:50,450 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:50,450 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_57|, main_~CCCELVOL2~0]. (let ((.cse0 (select |v_#memory_int_57| |main_~#volArray~0.base|))) (and (= |#memory_int| (store |v_#memory_int_57| |main_~#volArray~0.base| (store .cse0 (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select .cse0 (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))) [2018-11-23 10:26:50,450 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ []. (and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv7 32))) [2018-11-23 10:26:50,504 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:50,505 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 226 [2018-11-23 10:26:50,553 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,555 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,583 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 90 treesize of output 95 [2018-11-23 10:26:50,635 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,643 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,796 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 63 [2018-11-23 10:26:50,809 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,817 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 33 [2018-11-23 10:26:50,822 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,833 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,837 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,842 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:50,858 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:143, output treesize:16 [2018-11-23 10:26:50,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-11-23 10:26:50,979 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,985 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:50,986 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 43 [2018-11-23 10:26:50,989 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,006 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,031 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,032 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:28 [2018-11-23 10:26:51,145 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:26:51,147 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 238 [2018-11-23 10:26:51,207 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,208 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,212 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,213 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,217 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,229 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,250 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 98 treesize of output 157 [2018-11-23 10:26:51,457 WARN L180 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 29 [2018-11-23 10:26:51,462 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,466 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,469 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,477 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,478 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,480 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 55 treesize of output 123 [2018-11-23 10:26:51,729 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,751 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:26:51,778 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 83 [2018-11-23 10:26:51,783 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,806 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,818 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,829 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:26:51,851 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:26:51,852 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:157, output treesize:28 [2018-11-23 10:26:52,235 INFO L256 TraceCheckUtils]: 0: Hoare triple {3015#true} call ULTIMATE.init(); {3015#true} is VALID [2018-11-23 10:26:52,236 INFO L273 TraceCheckUtils]: 1: Hoare triple {3015#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3015#true} is VALID [2018-11-23 10:26:52,236 INFO L273 TraceCheckUtils]: 2: Hoare triple {3015#true} assume true; {3015#true} is VALID [2018-11-23 10:26:52,236 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3015#true} {3015#true} #136#return; {3015#true} is VALID [2018-11-23 10:26:52,236 INFO L256 TraceCheckUtils]: 4: Hoare triple {3015#true} call #t~ret22 := main(); {3015#true} is VALID [2018-11-23 10:26:52,236 INFO L273 TraceCheckUtils]: 5: Hoare triple {3015#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3015#true} is VALID [2018-11-23 10:26:52,237 INFO L273 TraceCheckUtils]: 6: Hoare triple {3015#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,238 INFO L273 TraceCheckUtils]: 7: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,238 INFO L273 TraceCheckUtils]: 8: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,239 INFO L273 TraceCheckUtils]: 9: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,239 INFO L273 TraceCheckUtils]: 10: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,240 INFO L273 TraceCheckUtils]: 11: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,241 INFO L273 TraceCheckUtils]: 12: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,241 INFO L273 TraceCheckUtils]: 13: Hoare triple {3038#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {3060#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,242 INFO L273 TraceCheckUtils]: 14: Hoare triple {3060#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3060#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,245 INFO L273 TraceCheckUtils]: 15: Hoare triple {3060#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {3067#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,247 INFO L273 TraceCheckUtils]: 16: Hoare triple {3067#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,248 INFO L273 TraceCheckUtils]: 17: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,249 INFO L273 TraceCheckUtils]: 18: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,250 INFO L273 TraceCheckUtils]: 19: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,252 INFO L273 TraceCheckUtils]: 20: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,255 INFO L273 TraceCheckUtils]: 21: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,259 INFO L273 TraceCheckUtils]: 22: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,262 INFO L273 TraceCheckUtils]: 23: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,264 INFO L273 TraceCheckUtils]: 24: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,265 INFO L273 TraceCheckUtils]: 25: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,265 INFO L273 TraceCheckUtils]: 26: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,268 INFO L273 TraceCheckUtils]: 27: Hoare triple {3071#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {3105#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,271 INFO L273 TraceCheckUtils]: 28: Hoare triple {3105#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {3109#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,274 INFO L273 TraceCheckUtils]: 29: Hoare triple {3109#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {3109#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,290 INFO L273 TraceCheckUtils]: 30: Hoare triple {3109#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3109#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,292 INFO L273 TraceCheckUtils]: 31: Hoare triple {3109#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,293 INFO L273 TraceCheckUtils]: 32: Hoare triple {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,294 INFO L273 TraceCheckUtils]: 33: Hoare triple {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} assume #t~short21; {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,296 INFO L256 TraceCheckUtils]: 34: Hoare triple {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:26:52,297 INFO L273 TraceCheckUtils]: 35: Hoare triple {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} ~cond := #in~cond; {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:26:52,298 INFO L273 TraceCheckUtils]: 36: Hoare triple {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} assume !(0bv32 == ~cond); {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:26:52,299 INFO L273 TraceCheckUtils]: 37: Hoare triple {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} assume true; {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} is VALID [2018-11-23 10:26:52,300 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {3129#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_1| (_ BitVec 32)) (v_prenex_2 (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (bvadd (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_1|) (_ bv4 32)))))} {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} #140#return; {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,300 INFO L273 TraceCheckUtils]: 39: Hoare triple {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:26:52,301 INFO L273 TraceCheckUtils]: 40: Hoare triple {3119#(and (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {3148#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:26:52,305 INFO L273 TraceCheckUtils]: 41: Hoare triple {3148#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (exists ((v_prenex_2 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_2) (_ bv4294967292 32))))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {3152#|main_#t~short21|} is VALID [2018-11-23 10:26:52,306 INFO L273 TraceCheckUtils]: 42: Hoare triple {3152#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {3016#false} is VALID [2018-11-23 10:26:52,306 INFO L256 TraceCheckUtils]: 43: Hoare triple {3016#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {3016#false} is VALID [2018-11-23 10:26:52,306 INFO L273 TraceCheckUtils]: 44: Hoare triple {3016#false} ~cond := #in~cond; {3016#false} is VALID [2018-11-23 10:26:52,307 INFO L273 TraceCheckUtils]: 45: Hoare triple {3016#false} assume 0bv32 == ~cond; {3016#false} is VALID [2018-11-23 10:26:52,307 INFO L273 TraceCheckUtils]: 46: Hoare triple {3016#false} assume !false; {3016#false} is VALID [2018-11-23 10:26:52,319 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-23 10:26:52,319 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:26:52,770 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:26:52,830 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:26:52,831 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:26:52,858 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:52,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:26:52,898 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:31 [2018-11-23 10:26:52,920 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:26:52,921 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) [2018-11-23 10:26:52,921 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_36, v_prenex_4]. (let ((.cse1 (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) (.cse0 (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)))) (and (or (not .cse0) .cse1) (or .cse1 (bvsge v_arrayElimCell_36 main_~MINVAL~0)) (or (bvsge v_prenex_4 main_~MINVAL~0) .cse0))) [2018-11-23 10:26:53,119 INFO L273 TraceCheckUtils]: 46: Hoare triple {3016#false} assume !false; {3016#false} is VALID [2018-11-23 10:26:53,119 INFO L273 TraceCheckUtils]: 45: Hoare triple {3016#false} assume 0bv32 == ~cond; {3016#false} is VALID [2018-11-23 10:26:53,120 INFO L273 TraceCheckUtils]: 44: Hoare triple {3016#false} ~cond := #in~cond; {3016#false} is VALID [2018-11-23 10:26:53,120 INFO L256 TraceCheckUtils]: 43: Hoare triple {3016#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {3016#false} is VALID [2018-11-23 10:26:53,120 INFO L273 TraceCheckUtils]: 42: Hoare triple {3152#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {3016#false} is VALID [2018-11-23 10:26:53,121 INFO L273 TraceCheckUtils]: 41: Hoare triple {3183#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {3152#|main_#t~short21|} is VALID [2018-11-23 10:26:55,139 INFO L273 TraceCheckUtils]: 40: Hoare triple {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {3183#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:26:55,140 INFO L273 TraceCheckUtils]: 39: Hoare triple {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,141 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {3015#true} {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #140#return; {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,141 INFO L273 TraceCheckUtils]: 37: Hoare triple {3015#true} assume true; {3015#true} is VALID [2018-11-23 10:26:55,141 INFO L273 TraceCheckUtils]: 36: Hoare triple {3015#true} assume !(0bv32 == ~cond); {3015#true} is VALID [2018-11-23 10:26:55,141 INFO L273 TraceCheckUtils]: 35: Hoare triple {3015#true} ~cond := #in~cond; {3015#true} is VALID [2018-11-23 10:26:55,141 INFO L256 TraceCheckUtils]: 34: Hoare triple {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {3015#true} is VALID [2018-11-23 10:26:55,142 INFO L273 TraceCheckUtils]: 33: Hoare triple {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short21; {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,142 INFO L273 TraceCheckUtils]: 32: Hoare triple {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,143 INFO L273 TraceCheckUtils]: 31: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {3187#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,143 INFO L273 TraceCheckUtils]: 30: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,143 INFO L273 TraceCheckUtils]: 29: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,145 INFO L273 TraceCheckUtils]: 28: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,155 INFO L273 TraceCheckUtils]: 27: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,155 INFO L273 TraceCheckUtils]: 26: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,156 INFO L273 TraceCheckUtils]: 25: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 1bv32; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,156 INFO L273 TraceCheckUtils]: 24: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,156 INFO L273 TraceCheckUtils]: 23: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,158 INFO L273 TraceCheckUtils]: 22: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,168 INFO L273 TraceCheckUtils]: 21: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,168 INFO L273 TraceCheckUtils]: 20: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,169 INFO L273 TraceCheckUtils]: 19: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 1bv32; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,170 INFO L273 TraceCheckUtils]: 18: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,170 INFO L273 TraceCheckUtils]: 17: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,172 INFO L273 TraceCheckUtils]: 16: Hoare triple {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,196 INFO L273 TraceCheckUtils]: 15: Hoare triple {3264#(and (or (forall ((v_prenex_4 (_ BitVec 32))) (bvsge v_prenex_4 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {3215#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,197 INFO L273 TraceCheckUtils]: 14: Hoare triple {3264#(and (or (forall ((v_prenex_4 (_ BitVec 32))) (bvsge v_prenex_4 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3264#(and (or (forall ((v_prenex_4 (_ BitVec 32))) (bvsge v_prenex_4 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} is VALID [2018-11-23 10:26:55,216 INFO L273 TraceCheckUtils]: 13: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} ~i~0 := 1bv32; {3264#(and (or (forall ((v_prenex_4 (_ BitVec 32))) (bvsge v_prenex_4 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} is VALID [2018-11-23 10:26:55,225 INFO L273 TraceCheckUtils]: 12: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,239 INFO L273 TraceCheckUtils]: 11: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,248 INFO L273 TraceCheckUtils]: 10: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,248 INFO L273 TraceCheckUtils]: 9: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,249 INFO L273 TraceCheckUtils]: 8: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,249 INFO L273 TraceCheckUtils]: 7: Hoare triple {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,250 INFO L273 TraceCheckUtils]: 6: Hoare triple {3015#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3271#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:26:55,250 INFO L273 TraceCheckUtils]: 5: Hoare triple {3015#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3015#true} is VALID [2018-11-23 10:26:55,250 INFO L256 TraceCheckUtils]: 4: Hoare triple {3015#true} call #t~ret22 := main(); {3015#true} is VALID [2018-11-23 10:26:55,250 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3015#true} {3015#true} #136#return; {3015#true} is VALID [2018-11-23 10:26:55,250 INFO L273 TraceCheckUtils]: 2: Hoare triple {3015#true} assume true; {3015#true} is VALID [2018-11-23 10:26:55,251 INFO L273 TraceCheckUtils]: 1: Hoare triple {3015#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3015#true} is VALID [2018-11-23 10:26:55,251 INFO L256 TraceCheckUtils]: 0: Hoare triple {3015#true} call ULTIMATE.init(); {3015#true} is VALID [2018-11-23 10:26:55,254 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-11-23 10:26:55,256 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:26:55,256 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 17 [2018-11-23 10:26:55,257 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-11-23 10:26:55,257 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:26:55,257 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 17 states. [2018-11-23 10:26:57,696 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 82 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:26:57,696 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 10:26:57,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 10:26:57,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=214, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:26:57,697 INFO L87 Difference]: Start difference. First operand 80 states and 94 transitions. Second operand 17 states. [2018-11-23 10:27:20,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:20,342 INFO L93 Difference]: Finished difference Result 179 states and 208 transitions. [2018-11-23 10:27:20,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 10:27:20,342 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-11-23 10:27:20,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:27:20,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:27:20,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 145 transitions. [2018-11-23 10:27:20,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-11-23 10:27:20,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 145 transitions. [2018-11-23 10:27:20,350 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 15 states and 145 transitions. [2018-11-23 10:27:21,004 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 145 edges. 145 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:21,008 INFO L225 Difference]: With dead ends: 179 [2018-11-23 10:27:21,008 INFO L226 Difference]: Without dead ends: 122 [2018-11-23 10:27:21,009 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 71 SyntacticMatches, 9 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=183, Invalid=519, Unknown=0, NotChecked=0, Total=702 [2018-11-23 10:27:21,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-23 10:27:21,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 111. [2018-11-23 10:27:21,250 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:27:21,250 INFO L82 GeneralOperation]: Start isEquivalent. First operand 122 states. Second operand 111 states. [2018-11-23 10:27:21,251 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand 111 states. [2018-11-23 10:27:21,251 INFO L87 Difference]: Start difference. First operand 122 states. Second operand 111 states. [2018-11-23 10:27:21,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:21,255 INFO L93 Difference]: Finished difference Result 122 states and 136 transitions. [2018-11-23 10:27:21,255 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions. [2018-11-23 10:27:21,256 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:21,256 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:21,256 INFO L74 IsIncluded]: Start isIncluded. First operand 111 states. Second operand 122 states. [2018-11-23 10:27:21,256 INFO L87 Difference]: Start difference. First operand 111 states. Second operand 122 states. [2018-11-23 10:27:21,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:21,261 INFO L93 Difference]: Finished difference Result 122 states and 136 transitions. [2018-11-23 10:27:21,261 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions. [2018-11-23 10:27:21,262 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:21,262 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:21,262 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:27:21,262 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:27:21,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-11-23 10:27:21,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 125 transitions. [2018-11-23 10:27:21,266 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 125 transitions. Word has length 47 [2018-11-23 10:27:21,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:27:21,266 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 125 transitions. [2018-11-23 10:27:21,267 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 10:27:21,267 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 125 transitions. [2018-11-23 10:27:21,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-23 10:27:21,268 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:27:21,268 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:27:21,268 INFO L423 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:27:21,268 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:27:21,268 INFO L82 PathProgramCache]: Analyzing trace with hash 811089819, now seen corresponding path program 1 times [2018-11-23 10:27:21,269 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:27:21,269 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:27:21,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:27:21,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:27:21,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:27:21,382 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:27:21,456 INFO L256 TraceCheckUtils]: 0: Hoare triple {3964#true} call ULTIMATE.init(); {3964#true} is VALID [2018-11-23 10:27:21,456 INFO L273 TraceCheckUtils]: 1: Hoare triple {3964#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {3964#true} is VALID [2018-11-23 10:27:21,457 INFO L273 TraceCheckUtils]: 2: Hoare triple {3964#true} assume true; {3964#true} is VALID [2018-11-23 10:27:21,457 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {3964#true} {3964#true} #136#return; {3964#true} is VALID [2018-11-23 10:27:21,457 INFO L256 TraceCheckUtils]: 4: Hoare triple {3964#true} call #t~ret22 := main(); {3964#true} is VALID [2018-11-23 10:27:21,458 INFO L273 TraceCheckUtils]: 5: Hoare triple {3964#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {3964#true} is VALID [2018-11-23 10:27:21,458 INFO L273 TraceCheckUtils]: 6: Hoare triple {3964#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,459 INFO L273 TraceCheckUtils]: 7: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,459 INFO L273 TraceCheckUtils]: 8: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,460 INFO L273 TraceCheckUtils]: 9: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,461 INFO L273 TraceCheckUtils]: 10: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,462 INFO L273 TraceCheckUtils]: 11: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,462 INFO L273 TraceCheckUtils]: 12: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,463 INFO L273 TraceCheckUtils]: 13: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,464 INFO L273 TraceCheckUtils]: 14: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,465 INFO L273 TraceCheckUtils]: 15: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,465 INFO L273 TraceCheckUtils]: 16: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,466 INFO L273 TraceCheckUtils]: 17: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,467 INFO L273 TraceCheckUtils]: 18: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,468 INFO L273 TraceCheckUtils]: 19: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,468 INFO L273 TraceCheckUtils]: 20: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:21,469 INFO L273 TraceCheckUtils]: 21: Hoare triple {3987#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {3965#false} is VALID [2018-11-23 10:27:21,470 INFO L273 TraceCheckUtils]: 22: Hoare triple {3965#false} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {3965#false} is VALID [2018-11-23 10:27:21,470 INFO L273 TraceCheckUtils]: 23: Hoare triple {3965#false} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {3965#false} is VALID [2018-11-23 10:27:21,470 INFO L273 TraceCheckUtils]: 24: Hoare triple {3965#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3965#false} is VALID [2018-11-23 10:27:21,470 INFO L273 TraceCheckUtils]: 25: Hoare triple {3965#false} ~i~0 := 1bv32; {3965#false} is VALID [2018-11-23 10:27:21,471 INFO L273 TraceCheckUtils]: 26: Hoare triple {3965#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3965#false} is VALID [2018-11-23 10:27:21,471 INFO L273 TraceCheckUtils]: 27: Hoare triple {3965#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {3965#false} is VALID [2018-11-23 10:27:21,471 INFO L273 TraceCheckUtils]: 28: Hoare triple {3965#false} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {3965#false} is VALID [2018-11-23 10:27:21,472 INFO L273 TraceCheckUtils]: 29: Hoare triple {3965#false} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {3965#false} is VALID [2018-11-23 10:27:21,472 INFO L273 TraceCheckUtils]: 30: Hoare triple {3965#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {3965#false} is VALID [2018-11-23 10:27:21,472 INFO L273 TraceCheckUtils]: 31: Hoare triple {3965#false} ~i~0 := 0bv32; {3965#false} is VALID [2018-11-23 10:27:21,473 INFO L273 TraceCheckUtils]: 32: Hoare triple {3965#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {3965#false} is VALID [2018-11-23 10:27:21,473 INFO L273 TraceCheckUtils]: 33: Hoare triple {3965#false} assume #t~short21; {3965#false} is VALID [2018-11-23 10:27:21,473 INFO L256 TraceCheckUtils]: 34: Hoare triple {3965#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {3965#false} is VALID [2018-11-23 10:27:21,474 INFO L273 TraceCheckUtils]: 35: Hoare triple {3965#false} ~cond := #in~cond; {3965#false} is VALID [2018-11-23 10:27:21,474 INFO L273 TraceCheckUtils]: 36: Hoare triple {3965#false} assume !(0bv32 == ~cond); {3965#false} is VALID [2018-11-23 10:27:21,474 INFO L273 TraceCheckUtils]: 37: Hoare triple {3965#false} assume true; {3965#false} is VALID [2018-11-23 10:27:21,474 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {3965#false} {3965#false} #140#return; {3965#false} is VALID [2018-11-23 10:27:21,475 INFO L273 TraceCheckUtils]: 39: Hoare triple {3965#false} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {3965#false} is VALID [2018-11-23 10:27:21,475 INFO L273 TraceCheckUtils]: 40: Hoare triple {3965#false} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {3965#false} is VALID [2018-11-23 10:27:21,475 INFO L273 TraceCheckUtils]: 41: Hoare triple {3965#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {3965#false} is VALID [2018-11-23 10:27:21,475 INFO L273 TraceCheckUtils]: 42: Hoare triple {3965#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {3965#false} is VALID [2018-11-23 10:27:21,475 INFO L256 TraceCheckUtils]: 43: Hoare triple {3965#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {3965#false} is VALID [2018-11-23 10:27:21,476 INFO L273 TraceCheckUtils]: 44: Hoare triple {3965#false} ~cond := #in~cond; {3965#false} is VALID [2018-11-23 10:27:21,476 INFO L273 TraceCheckUtils]: 45: Hoare triple {3965#false} assume 0bv32 == ~cond; {3965#false} is VALID [2018-11-23 10:27:21,476 INFO L273 TraceCheckUtils]: 46: Hoare triple {3965#false} assume !false; {3965#false} is VALID [2018-11-23 10:27:21,478 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-23 10:27:21,479 INFO L312 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2018-11-23 10:27:21,480 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:27:21,481 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:27:21,481 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-11-23 10:27:21,482 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:27:21,482 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states. [2018-11-23 10:27:21,649 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:21,649 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:27:21,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:27:21,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:27:21,650 INFO L87 Difference]: Start difference. First operand 111 states and 125 transitions. Second operand 3 states. [2018-11-23 10:27:22,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:22,130 INFO L93 Difference]: Finished difference Result 149 states and 168 transitions. [2018-11-23 10:27:22,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:27:22,131 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-11-23 10:27:22,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:27:22,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:27:22,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 70 transitions. [2018-11-23 10:27:22,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2018-11-23 10:27:22,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 70 transitions. [2018-11-23 10:27:22,134 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 3 states and 70 transitions. [2018-11-23 10:27:22,408 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:22,411 INFO L225 Difference]: With dead ends: 149 [2018-11-23 10:27:22,411 INFO L226 Difference]: Without dead ends: 108 [2018-11-23 10:27:22,412 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:27:22,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-11-23 10:27:23,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2018-11-23 10:27:23,558 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:27:23,558 INFO L82 GeneralOperation]: Start isEquivalent. First operand 108 states. Second operand 108 states. [2018-11-23 10:27:23,559 INFO L74 IsIncluded]: Start isIncluded. First operand 108 states. Second operand 108 states. [2018-11-23 10:27:23,559 INFO L87 Difference]: Start difference. First operand 108 states. Second operand 108 states. [2018-11-23 10:27:23,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:23,564 INFO L93 Difference]: Finished difference Result 108 states and 119 transitions. [2018-11-23 10:27:23,564 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 119 transitions. [2018-11-23 10:27:23,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:23,564 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:23,564 INFO L74 IsIncluded]: Start isIncluded. First operand 108 states. Second operand 108 states. [2018-11-23 10:27:23,564 INFO L87 Difference]: Start difference. First operand 108 states. Second operand 108 states. [2018-11-23 10:27:23,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:23,567 INFO L93 Difference]: Finished difference Result 108 states and 119 transitions. [2018-11-23 10:27:23,568 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 119 transitions. [2018-11-23 10:27:23,568 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:23,568 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:23,568 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:27:23,568 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:27:23,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-11-23 10:27:23,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 119 transitions. [2018-11-23 10:27:23,572 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 119 transitions. Word has length 47 [2018-11-23 10:27:23,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:27:23,572 INFO L480 AbstractCegarLoop]: Abstraction has 108 states and 119 transitions. [2018-11-23 10:27:23,572 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:27:23,572 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 119 transitions. [2018-11-23 10:27:23,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-11-23 10:27:23,573 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:27:23,573 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:27:23,573 INFO L423 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:27:23,573 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:27:23,573 INFO L82 PathProgramCache]: Analyzing trace with hash -1734374421, now seen corresponding path program 2 times [2018-11-23 10:27:23,574 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:27:23,574 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:27:23,590 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2018-11-23 10:27:23,750 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-11-23 10:27:23,750 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:27:23,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:27:23,800 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:27:23,948 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:27:23,956 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:27:23,960 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:27:23,965 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:23,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:23,988 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-11-23 10:27:24,072 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:27:24,073 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 112 [2018-11-23 10:27:24,134 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,136 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,138 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 67 [2018-11-23 10:27:24,187 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,189 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,191 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,205 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 55 [2018-11-23 10:27:24,217 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,224 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 29 [2018-11-23 10:27:24,232 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,247 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,251 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,273 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:87, output treesize:18 [2018-11-23 10:27:24,341 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-11-23 10:27:24,353 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,355 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,356 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 43 [2018-11-23 10:27:24,360 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:28 [2018-11-23 10:27:24,484 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:27:24,485 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 149 treesize of output 236 [2018-11-23 10:27:24,557 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,559 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,560 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,562 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,564 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,566 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,578 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,593 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 170 [2018-11-23 10:27:24,684 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,686 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,688 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,690 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,692 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,704 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,725 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 127 [2018-11-23 10:27:24,749 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:27:24,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 53 treesize of output 87 [2018-11-23 10:27:24,808 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-11-23 10:27:24,872 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,886 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,899 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:27:24,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:27:24,925 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:155, output treesize:28 [2018-11-23 10:27:25,991 INFO L256 TraceCheckUtils]: 0: Hoare triple {4667#true} call ULTIMATE.init(); {4667#true} is VALID [2018-11-23 10:27:25,991 INFO L273 TraceCheckUtils]: 1: Hoare triple {4667#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4667#true} is VALID [2018-11-23 10:27:25,992 INFO L273 TraceCheckUtils]: 2: Hoare triple {4667#true} assume true; {4667#true} is VALID [2018-11-23 10:27:25,992 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4667#true} {4667#true} #136#return; {4667#true} is VALID [2018-11-23 10:27:25,992 INFO L256 TraceCheckUtils]: 4: Hoare triple {4667#true} call #t~ret22 := main(); {4667#true} is VALID [2018-11-23 10:27:25,992 INFO L273 TraceCheckUtils]: 5: Hoare triple {4667#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4667#true} is VALID [2018-11-23 10:27:25,993 INFO L273 TraceCheckUtils]: 6: Hoare triple {4667#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:25,995 INFO L273 TraceCheckUtils]: 7: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:25,996 INFO L273 TraceCheckUtils]: 8: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:25,997 INFO L273 TraceCheckUtils]: 9: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:25,998 INFO L273 TraceCheckUtils]: 10: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,001 INFO L273 TraceCheckUtils]: 11: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,001 INFO L273 TraceCheckUtils]: 12: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,002 INFO L273 TraceCheckUtils]: 13: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,002 INFO L273 TraceCheckUtils]: 14: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,003 INFO L273 TraceCheckUtils]: 15: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,003 INFO L273 TraceCheckUtils]: 16: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,004 INFO L273 TraceCheckUtils]: 17: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,004 INFO L273 TraceCheckUtils]: 18: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,005 INFO L273 TraceCheckUtils]: 19: Hoare triple {4690#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {4730#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,006 INFO L273 TraceCheckUtils]: 20: Hoare triple {4730#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4730#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,009 INFO L273 TraceCheckUtils]: 21: Hoare triple {4730#(and (= (_ bv3 32) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {4737#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,010 INFO L273 TraceCheckUtils]: 22: Hoare triple {4737#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) (_ bv4294967293 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,011 INFO L273 TraceCheckUtils]: 23: Hoare triple {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,012 INFO L273 TraceCheckUtils]: 24: Hoare triple {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,013 INFO L273 TraceCheckUtils]: 25: Hoare triple {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,014 INFO L273 TraceCheckUtils]: 26: Hoare triple {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,019 INFO L273 TraceCheckUtils]: 27: Hoare triple {4741#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {4757#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,021 INFO L273 TraceCheckUtils]: 28: Hoare triple {4757#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {4761#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,024 INFO L273 TraceCheckUtils]: 29: Hoare triple {4761#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {4761#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,041 INFO L273 TraceCheckUtils]: 30: Hoare triple {4761#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4761#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,043 INFO L273 TraceCheckUtils]: 31: Hoare triple {4761#(and (exists ((main_~i~0 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,044 INFO L273 TraceCheckUtils]: 32: Hoare triple {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,045 INFO L273 TraceCheckUtils]: 33: Hoare triple {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume #t~short21; {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,049 INFO L256 TraceCheckUtils]: 34: Hoare triple {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,050 INFO L273 TraceCheckUtils]: 35: Hoare triple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} ~cond := #in~cond; {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,050 INFO L273 TraceCheckUtils]: 36: Hoare triple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} assume !(0bv32 == ~cond); {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,050 INFO L273 TraceCheckUtils]: 37: Hoare triple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} assume true; {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,051 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} #140#return; {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,052 INFO L273 TraceCheckUtils]: 39: Hoare triple {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,053 INFO L273 TraceCheckUtils]: 40: Hoare triple {4771#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,054 INFO L273 TraceCheckUtils]: 41: Hoare triple {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,055 INFO L273 TraceCheckUtils]: 42: Hoare triple {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short21; {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,059 INFO L256 TraceCheckUtils]: 43: Hoare triple {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,060 INFO L273 TraceCheckUtils]: 44: Hoare triple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} ~cond := #in~cond; {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,060 INFO L273 TraceCheckUtils]: 45: Hoare triple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} assume !(0bv32 == ~cond); {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,060 INFO L273 TraceCheckUtils]: 46: Hoare triple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} assume true; {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} is VALID [2018-11-23 10:27:26,061 INFO L268 TraceCheckUtils]: 47: Hoare quadruple {4781#(exists ((v_prenex_5 (_ BitVec 32)) (|v_main_~#volArray~0.base_BEFORE_CALL_3| (_ BitVec 32))) (and (= (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (bvadd (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))) (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_3|) (_ bv8 32)))))} {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #140#return; {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,065 INFO L273 TraceCheckUtils]: 48: Hoare triple {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:27:26,066 INFO L273 TraceCheckUtils]: 49: Hoare triple {4800#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {4828#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:27:26,069 INFO L273 TraceCheckUtils]: 50: Hoare triple {4828#(and (exists ((v_prenex_5 (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) v_prenex_5) (_ bv4294967292 32))))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv3 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32)))) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {4832#|main_#t~short21|} is VALID [2018-11-23 10:27:26,069 INFO L273 TraceCheckUtils]: 51: Hoare triple {4832#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {4668#false} is VALID [2018-11-23 10:27:26,069 INFO L256 TraceCheckUtils]: 52: Hoare triple {4668#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {4668#false} is VALID [2018-11-23 10:27:26,070 INFO L273 TraceCheckUtils]: 53: Hoare triple {4668#false} ~cond := #in~cond; {4668#false} is VALID [2018-11-23 10:27:26,070 INFO L273 TraceCheckUtils]: 54: Hoare triple {4668#false} assume 0bv32 == ~cond; {4668#false} is VALID [2018-11-23 10:27:26,070 INFO L273 TraceCheckUtils]: 55: Hoare triple {4668#false} assume !false; {4668#false} is VALID [2018-11-23 10:27:26,084 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 7 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-23 10:27:26,084 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:27:26,563 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:27:26,635 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:27:26,637 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:27:26,662 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:27:26,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-11-23 10:27:26,699 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:31 [2018-11-23 10:27:26,720 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:27:26,720 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32)) main_~CCCELVOL2~0) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0) [2018-11-23 10:27:26,720 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_prenex_8, v_arrayElimCell_48]. (let ((.cse0 (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (.cse1 (bvsge main_~CCCELVOL2~0 main_~MINVAL~0))) (and (or (not .cse0) .cse1) (or (bvsge v_prenex_8 main_~MINVAL~0) .cse0) (or (bvsge v_arrayElimCell_48 main_~MINVAL~0) .cse1))) [2018-11-23 10:27:26,917 INFO L273 TraceCheckUtils]: 55: Hoare triple {4668#false} assume !false; {4668#false} is VALID [2018-11-23 10:27:26,917 INFO L273 TraceCheckUtils]: 54: Hoare triple {4668#false} assume 0bv32 == ~cond; {4668#false} is VALID [2018-11-23 10:27:26,918 INFO L273 TraceCheckUtils]: 53: Hoare triple {4668#false} ~cond := #in~cond; {4668#false} is VALID [2018-11-23 10:27:26,918 INFO L256 TraceCheckUtils]: 52: Hoare triple {4668#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {4668#false} is VALID [2018-11-23 10:27:26,918 INFO L273 TraceCheckUtils]: 51: Hoare triple {4832#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {4668#false} is VALID [2018-11-23 10:27:26,919 INFO L273 TraceCheckUtils]: 50: Hoare triple {4863#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {4832#|main_#t~short21|} is VALID [2018-11-23 10:27:28,947 INFO L273 TraceCheckUtils]: 49: Hoare triple {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {4863#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:27:28,948 INFO L273 TraceCheckUtils]: 48: Hoare triple {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:28,949 INFO L268 TraceCheckUtils]: 47: Hoare quadruple {4667#true} {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #140#return; {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:28,949 INFO L273 TraceCheckUtils]: 46: Hoare triple {4667#true} assume true; {4667#true} is VALID [2018-11-23 10:27:28,949 INFO L273 TraceCheckUtils]: 45: Hoare triple {4667#true} assume !(0bv32 == ~cond); {4667#true} is VALID [2018-11-23 10:27:28,949 INFO L273 TraceCheckUtils]: 44: Hoare triple {4667#true} ~cond := #in~cond; {4667#true} is VALID [2018-11-23 10:27:28,949 INFO L256 TraceCheckUtils]: 43: Hoare triple {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {4667#true} is VALID [2018-11-23 10:27:28,950 INFO L273 TraceCheckUtils]: 42: Hoare triple {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short21; {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:28,950 INFO L273 TraceCheckUtils]: 41: Hoare triple {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,964 INFO L273 TraceCheckUtils]: 40: Hoare triple {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {4867#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:27:30,965 INFO L273 TraceCheckUtils]: 39: Hoare triple {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,965 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {4667#true} {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} #140#return; {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,965 INFO L273 TraceCheckUtils]: 37: Hoare triple {4667#true} assume true; {4667#true} is VALID [2018-11-23 10:27:30,966 INFO L273 TraceCheckUtils]: 36: Hoare triple {4667#true} assume !(0bv32 == ~cond); {4667#true} is VALID [2018-11-23 10:27:30,966 INFO L273 TraceCheckUtils]: 35: Hoare triple {4667#true} ~cond := #in~cond; {4667#true} is VALID [2018-11-23 10:27:30,966 INFO L256 TraceCheckUtils]: 34: Hoare triple {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {4667#true} is VALID [2018-11-23 10:27:30,966 INFO L273 TraceCheckUtils]: 33: Hoare triple {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume #t~short21; {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,966 INFO L273 TraceCheckUtils]: 32: Hoare triple {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,967 INFO L273 TraceCheckUtils]: 31: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {4895#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,967 INFO L273 TraceCheckUtils]: 30: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,968 INFO L273 TraceCheckUtils]: 29: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,968 INFO L273 TraceCheckUtils]: 28: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,982 INFO L273 TraceCheckUtils]: 27: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,983 INFO L273 TraceCheckUtils]: 26: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,983 INFO L273 TraceCheckUtils]: 25: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} ~i~0 := 1bv32; {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,984 INFO L273 TraceCheckUtils]: 24: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,984 INFO L273 TraceCheckUtils]: 23: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:30,984 INFO L273 TraceCheckUtils]: 22: Hoare triple {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,006 INFO L273 TraceCheckUtils]: 21: Hoare triple {4954#(and (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (or (forall ((v_prenex_8 (_ BitVec 32))) (bvsge v_prenex_8 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {4923#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv8 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,007 INFO L273 TraceCheckUtils]: 20: Hoare triple {4954#(and (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (or (forall ((v_prenex_8 (_ BitVec 32))) (bvsge v_prenex_8 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4954#(and (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (or (forall ((v_prenex_8 (_ BitVec 32))) (bvsge v_prenex_8 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))))} is VALID [2018-11-23 10:27:31,007 INFO L273 TraceCheckUtils]: 19: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} ~i~0 := 1bv32; {4954#(and (bvsge main_~CCCELVOL2~0 main_~MINVAL~0) (or (forall ((v_prenex_8 (_ BitVec 32))) (bvsge v_prenex_8 main_~MINVAL~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))))} is VALID [2018-11-23 10:27:31,008 INFO L273 TraceCheckUtils]: 18: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,008 INFO L273 TraceCheckUtils]: 17: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,008 INFO L273 TraceCheckUtils]: 16: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,009 INFO L273 TraceCheckUtils]: 15: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,009 INFO L273 TraceCheckUtils]: 14: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,009 INFO L273 TraceCheckUtils]: 13: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} ~i~0 := 1bv32; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,010 INFO L273 TraceCheckUtils]: 12: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,010 INFO L273 TraceCheckUtils]: 11: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,010 INFO L273 TraceCheckUtils]: 10: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,011 INFO L273 TraceCheckUtils]: 9: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,011 INFO L273 TraceCheckUtils]: 8: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,011 INFO L273 TraceCheckUtils]: 7: Hoare triple {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,012 INFO L273 TraceCheckUtils]: 6: Hoare triple {4667#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {4961#(bvsge main_~CCCELVOL2~0 main_~MINVAL~0)} is VALID [2018-11-23 10:27:31,013 INFO L273 TraceCheckUtils]: 5: Hoare triple {4667#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {4667#true} is VALID [2018-11-23 10:27:31,013 INFO L256 TraceCheckUtils]: 4: Hoare triple {4667#true} call #t~ret22 := main(); {4667#true} is VALID [2018-11-23 10:27:31,013 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {4667#true} {4667#true} #136#return; {4667#true} is VALID [2018-11-23 10:27:31,013 INFO L273 TraceCheckUtils]: 2: Hoare triple {4667#true} assume true; {4667#true} is VALID [2018-11-23 10:27:31,014 INFO L273 TraceCheckUtils]: 1: Hoare triple {4667#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {4667#true} is VALID [2018-11-23 10:27:31,014 INFO L256 TraceCheckUtils]: 0: Hoare triple {4667#true} call ULTIMATE.init(); {4667#true} is VALID [2018-11-23 10:27:31,020 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 10:27:31,022 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:27:31,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9] total 19 [2018-11-23 10:27:31,023 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 56 [2018-11-23 10:27:31,023 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:27:31,023 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 19 states. [2018-11-23 10:27:35,518 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 95 edges. 93 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:35,519 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 10:27:35,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 10:27:35,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2018-11-23 10:27:35,519 INFO L87 Difference]: Start difference. First operand 108 states and 119 transitions. Second operand 19 states. [2018-11-23 10:27:56,039 WARN L180 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 25 [2018-11-23 10:27:58,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:58,689 INFO L93 Difference]: Finished difference Result 172 states and 196 transitions. [2018-11-23 10:27:58,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 10:27:58,689 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 56 [2018-11-23 10:27:58,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:27:58,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:27:58,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 108 transitions. [2018-11-23 10:27:58,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-11-23 10:27:58,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 108 transitions. [2018-11-23 10:27:58,695 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states and 108 transitions. [2018-11-23 10:27:59,261 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:27:59,264 INFO L225 Difference]: With dead ends: 172 [2018-11-23 10:27:59,265 INFO L226 Difference]: Without dead ends: 142 [2018-11-23 10:27:59,266 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 88 SyntacticMatches, 6 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 274 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=256, Invalid=866, Unknown=0, NotChecked=0, Total=1122 [2018-11-23 10:27:59,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-11-23 10:27:59,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 124. [2018-11-23 10:27:59,868 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:27:59,868 INFO L82 GeneralOperation]: Start isEquivalent. First operand 142 states. Second operand 124 states. [2018-11-23 10:27:59,868 INFO L74 IsIncluded]: Start isIncluded. First operand 142 states. Second operand 124 states. [2018-11-23 10:27:59,869 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 124 states. [2018-11-23 10:27:59,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:59,874 INFO L93 Difference]: Finished difference Result 142 states and 161 transitions. [2018-11-23 10:27:59,874 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 161 transitions. [2018-11-23 10:27:59,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:59,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:59,875 INFO L74 IsIncluded]: Start isIncluded. First operand 124 states. Second operand 142 states. [2018-11-23 10:27:59,875 INFO L87 Difference]: Start difference. First operand 124 states. Second operand 142 states. [2018-11-23 10:27:59,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:27:59,878 INFO L93 Difference]: Finished difference Result 142 states and 161 transitions. [2018-11-23 10:27:59,879 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 161 transitions. [2018-11-23 10:27:59,879 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:27:59,879 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:27:59,879 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:27:59,879 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:27:59,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-23 10:27:59,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 140 transitions. [2018-11-23 10:27:59,882 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 140 transitions. Word has length 56 [2018-11-23 10:27:59,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:27:59,882 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 140 transitions. [2018-11-23 10:27:59,882 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 10:27:59,882 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 140 transitions. [2018-11-23 10:27:59,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-11-23 10:27:59,883 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:27:59,883 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:27:59,883 INFO L423 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:27:59,884 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:27:59,884 INFO L82 PathProgramCache]: Analyzing trace with hash -2005163949, now seen corresponding path program 3 times [2018-11-23 10:27:59,884 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:27:59,884 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:27:59,900 INFO L101 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2018-11-23 10:28:00,114 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-11-23 10:28:00,114 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:28:00,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:28:00,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:28:00,940 WARN L180 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 8 DAG size of output: 5 [2018-11-23 10:28:01,505 INFO L256 TraceCheckUtils]: 0: Hoare triple {5732#true} call ULTIMATE.init(); {5732#true} is VALID [2018-11-23 10:28:01,505 INFO L273 TraceCheckUtils]: 1: Hoare triple {5732#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5732#true} is VALID [2018-11-23 10:28:01,506 INFO L273 TraceCheckUtils]: 2: Hoare triple {5732#true} assume true; {5732#true} is VALID [2018-11-23 10:28:01,506 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5732#true} {5732#true} #136#return; {5732#true} is VALID [2018-11-23 10:28:01,506 INFO L256 TraceCheckUtils]: 4: Hoare triple {5732#true} call #t~ret22 := main(); {5732#true} is VALID [2018-11-23 10:28:01,507 INFO L273 TraceCheckUtils]: 5: Hoare triple {5732#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5732#true} is VALID [2018-11-23 10:28:01,507 INFO L273 TraceCheckUtils]: 6: Hoare triple {5732#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {5732#true} is VALID [2018-11-23 10:28:01,507 INFO L273 TraceCheckUtils]: 7: Hoare triple {5732#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5758#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:28:01,508 INFO L273 TraceCheckUtils]: 8: Hoare triple {5758#(= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,508 INFO L273 TraceCheckUtils]: 9: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,508 INFO L273 TraceCheckUtils]: 10: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,509 INFO L273 TraceCheckUtils]: 11: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,509 INFO L273 TraceCheckUtils]: 12: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,509 INFO L273 TraceCheckUtils]: 13: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,510 INFO L273 TraceCheckUtils]: 14: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,510 INFO L273 TraceCheckUtils]: 15: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,510 INFO L273 TraceCheckUtils]: 16: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,511 INFO L273 TraceCheckUtils]: 17: Hoare triple {5762#(bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} ~i~0 := 1bv32; {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,511 INFO L273 TraceCheckUtils]: 18: Hoare triple {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,512 INFO L273 TraceCheckUtils]: 19: Hoare triple {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,513 INFO L273 TraceCheckUtils]: 20: Hoare triple {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,514 INFO L273 TraceCheckUtils]: 21: Hoare triple {5790#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {5803#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:28:01,514 INFO L273 TraceCheckUtils]: 22: Hoare triple {5803#(and (bvsle (_ bv1 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv2 32) main_~i~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,515 INFO L273 TraceCheckUtils]: 23: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,515 INFO L273 TraceCheckUtils]: 24: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,516 INFO L273 TraceCheckUtils]: 25: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,517 INFO L273 TraceCheckUtils]: 26: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:01,532 INFO L273 TraceCheckUtils]: 27: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} ~i~0 := 1bv32; {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,533 INFO L273 TraceCheckUtils]: 28: Hoare triple {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,534 INFO L273 TraceCheckUtils]: 29: Hoare triple {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,535 INFO L273 TraceCheckUtils]: 30: Hoare triple {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:01,535 INFO L273 TraceCheckUtils]: 31: Hoare triple {5823#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {5836#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:28:01,535 INFO L273 TraceCheckUtils]: 32: Hoare triple {5836#(and (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv2 32) main_~i~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 33: Hoare triple {5733#false} ~i~0 := 1bv32; {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 34: Hoare triple {5733#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 35: Hoare triple {5733#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 36: Hoare triple {5733#false} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 37: Hoare triple {5733#false} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 38: Hoare triple {5733#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 39: Hoare triple {5733#false} ~i~0 := 0bv32; {5733#false} is VALID [2018-11-23 10:28:01,536 INFO L273 TraceCheckUtils]: 40: Hoare triple {5733#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {5733#false} is VALID [2018-11-23 10:28:01,537 INFO L273 TraceCheckUtils]: 41: Hoare triple {5733#false} assume #t~short21; {5733#false} is VALID [2018-11-23 10:28:01,537 INFO L256 TraceCheckUtils]: 42: Hoare triple {5733#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {5733#false} is VALID [2018-11-23 10:28:01,537 INFO L273 TraceCheckUtils]: 43: Hoare triple {5733#false} ~cond := #in~cond; {5733#false} is VALID [2018-11-23 10:28:01,537 INFO L273 TraceCheckUtils]: 44: Hoare triple {5733#false} assume !(0bv32 == ~cond); {5733#false} is VALID [2018-11-23 10:28:01,537 INFO L273 TraceCheckUtils]: 45: Hoare triple {5733#false} assume true; {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {5733#false} {5733#false} #140#return; {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L273 TraceCheckUtils]: 47: Hoare triple {5733#false} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L273 TraceCheckUtils]: 48: Hoare triple {5733#false} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L273 TraceCheckUtils]: 49: Hoare triple {5733#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L273 TraceCheckUtils]: 50: Hoare triple {5733#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L256 TraceCheckUtils]: 51: Hoare triple {5733#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {5733#false} is VALID [2018-11-23 10:28:01,538 INFO L273 TraceCheckUtils]: 52: Hoare triple {5733#false} ~cond := #in~cond; {5733#false} is VALID [2018-11-23 10:28:01,539 INFO L273 TraceCheckUtils]: 53: Hoare triple {5733#false} assume 0bv32 == ~cond; {5733#false} is VALID [2018-11-23 10:28:01,539 INFO L273 TraceCheckUtils]: 54: Hoare triple {5733#false} assume !false; {5733#false} is VALID [2018-11-23 10:28:01,542 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-23 10:28:01,542 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:28:02,729 INFO L273 TraceCheckUtils]: 54: Hoare triple {5733#false} assume !false; {5733#false} is VALID [2018-11-23 10:28:02,730 INFO L273 TraceCheckUtils]: 53: Hoare triple {5733#false} assume 0bv32 == ~cond; {5733#false} is VALID [2018-11-23 10:28:02,730 INFO L273 TraceCheckUtils]: 52: Hoare triple {5733#false} ~cond := #in~cond; {5733#false} is VALID [2018-11-23 10:28:02,730 INFO L256 TraceCheckUtils]: 51: Hoare triple {5733#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {5733#false} is VALID [2018-11-23 10:28:02,730 INFO L273 TraceCheckUtils]: 50: Hoare triple {5733#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {5733#false} is VALID [2018-11-23 10:28:02,730 INFO L273 TraceCheckUtils]: 49: Hoare triple {5733#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {5733#false} is VALID [2018-11-23 10:28:02,731 INFO L273 TraceCheckUtils]: 48: Hoare triple {5733#false} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {5733#false} is VALID [2018-11-23 10:28:02,731 INFO L273 TraceCheckUtils]: 47: Hoare triple {5733#false} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {5733#false} is VALID [2018-11-23 10:28:02,731 INFO L268 TraceCheckUtils]: 46: Hoare quadruple {5732#true} {5733#false} #140#return; {5733#false} is VALID [2018-11-23 10:28:02,731 INFO L273 TraceCheckUtils]: 45: Hoare triple {5732#true} assume true; {5732#true} is VALID [2018-11-23 10:28:02,732 INFO L273 TraceCheckUtils]: 44: Hoare triple {5732#true} assume !(0bv32 == ~cond); {5732#true} is VALID [2018-11-23 10:28:02,732 INFO L273 TraceCheckUtils]: 43: Hoare triple {5732#true} ~cond := #in~cond; {5732#true} is VALID [2018-11-23 10:28:02,732 INFO L256 TraceCheckUtils]: 42: Hoare triple {5733#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {5732#true} is VALID [2018-11-23 10:28:02,732 INFO L273 TraceCheckUtils]: 41: Hoare triple {5733#false} assume #t~short21; {5733#false} is VALID [2018-11-23 10:28:02,732 INFO L273 TraceCheckUtils]: 40: Hoare triple {5733#false} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {5733#false} is VALID [2018-11-23 10:28:02,732 INFO L273 TraceCheckUtils]: 39: Hoare triple {5733#false} ~i~0 := 0bv32; {5733#false} is VALID [2018-11-23 10:28:02,732 INFO L273 TraceCheckUtils]: 38: Hoare triple {5733#false} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5733#false} is VALID [2018-11-23 10:28:02,733 INFO L273 TraceCheckUtils]: 37: Hoare triple {5733#false} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {5733#false} is VALID [2018-11-23 10:28:02,733 INFO L273 TraceCheckUtils]: 36: Hoare triple {5733#false} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {5733#false} is VALID [2018-11-23 10:28:02,733 INFO L273 TraceCheckUtils]: 35: Hoare triple {5733#false} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {5733#false} is VALID [2018-11-23 10:28:02,733 INFO L273 TraceCheckUtils]: 34: Hoare triple {5733#false} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5733#false} is VALID [2018-11-23 10:28:02,733 INFO L273 TraceCheckUtils]: 33: Hoare triple {5733#false} ~i~0 := 1bv32; {5733#false} is VALID [2018-11-23 10:28:02,733 INFO L273 TraceCheckUtils]: 32: Hoare triple {5972#(bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5733#false} is VALID [2018-11-23 10:28:02,734 INFO L273 TraceCheckUtils]: 31: Hoare triple {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {5972#(bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,734 INFO L273 TraceCheckUtils]: 30: Hoare triple {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,735 INFO L273 TraceCheckUtils]: 29: Hoare triple {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,735 INFO L273 TraceCheckUtils]: 28: Hoare triple {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,735 INFO L273 TraceCheckUtils]: 27: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} ~i~0 := 1bv32; {5976#(bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,736 INFO L273 TraceCheckUtils]: 26: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,736 INFO L273 TraceCheckUtils]: 25: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,736 INFO L273 TraceCheckUtils]: 24: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,737 INFO L273 TraceCheckUtils]: 23: Hoare triple {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,737 INFO L273 TraceCheckUtils]: 22: Hoare triple {6004#(or (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5807#(bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))} is VALID [2018-11-23 10:28:02,738 INFO L273 TraceCheckUtils]: 21: Hoare triple {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {6004#(or (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:28:02,739 INFO L273 TraceCheckUtils]: 20: Hoare triple {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:28:02,739 INFO L273 TraceCheckUtils]: 19: Hoare triple {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:28:02,740 INFO L273 TraceCheckUtils]: 18: Hoare triple {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:28:02,757 INFO L273 TraceCheckUtils]: 17: Hoare triple {5732#true} ~i~0 := 1bv32; {6008#(or (not (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:28:02,757 INFO L273 TraceCheckUtils]: 16: Hoare triple {5732#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 15: Hoare triple {5732#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 14: Hoare triple {5732#true} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 13: Hoare triple {5732#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 12: Hoare triple {5732#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 11: Hoare triple {5732#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 10: Hoare triple {5732#true} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 9: Hoare triple {5732#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {5732#true} is VALID [2018-11-23 10:28:02,758 INFO L273 TraceCheckUtils]: 8: Hoare triple {5732#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L273 TraceCheckUtils]: 7: Hoare triple {5732#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L273 TraceCheckUtils]: 6: Hoare triple {5732#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L273 TraceCheckUtils]: 5: Hoare triple {5732#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L256 TraceCheckUtils]: 4: Hoare triple {5732#true} call #t~ret22 := main(); {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {5732#true} {5732#true} #136#return; {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L273 TraceCheckUtils]: 2: Hoare triple {5732#true} assume true; {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L273 TraceCheckUtils]: 1: Hoare triple {5732#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {5732#true} is VALID [2018-11-23 10:28:02,759 INFO L256 TraceCheckUtils]: 0: Hoare triple {5732#true} call ULTIMATE.init(); {5732#true} is VALID [2018-11-23 10:28:02,762 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-11-23 10:28:02,764 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:28:02,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 13 [2018-11-23 10:28:02,764 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2018-11-23 10:28:02,765 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:28:02,765 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states. [2018-11-23 10:28:03,408 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:03,408 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-23 10:28:03,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-23 10:28:03,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-11-23 10:28:03,409 INFO L87 Difference]: Start difference. First operand 124 states and 140 transitions. Second operand 13 states. [2018-11-23 10:28:07,084 WARN L180 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 8 [2018-11-23 10:28:12,507 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2018-11-23 10:28:17,463 WARN L180 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2018-11-23 10:28:21,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:21,163 INFO L93 Difference]: Finished difference Result 211 states and 236 transitions. [2018-11-23 10:28:21,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 10:28:21,163 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2018-11-23 10:28:21,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:28:21,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 10:28:21,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 161 transitions. [2018-11-23 10:28:21,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2018-11-23 10:28:21,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 161 transitions. [2018-11-23 10:28:21,168 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 13 states and 161 transitions. [2018-11-23 10:28:23,362 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:23,364 INFO L225 Difference]: With dead ends: 211 [2018-11-23 10:28:23,364 INFO L226 Difference]: Without dead ends: 136 [2018-11-23 10:28:23,365 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272 [2018-11-23 10:28:23,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-11-23 10:28:23,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 122. [2018-11-23 10:28:23,710 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:28:23,710 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand 122 states. [2018-11-23 10:28:23,710 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand 122 states. [2018-11-23 10:28:23,710 INFO L87 Difference]: Start difference. First operand 136 states. Second operand 122 states. [2018-11-23 10:28:23,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:23,714 INFO L93 Difference]: Finished difference Result 136 states and 149 transitions. [2018-11-23 10:28:23,715 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 149 transitions. [2018-11-23 10:28:23,715 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:28:23,715 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:28:23,715 INFO L74 IsIncluded]: Start isIncluded. First operand 122 states. Second operand 136 states. [2018-11-23 10:28:23,715 INFO L87 Difference]: Start difference. First operand 122 states. Second operand 136 states. [2018-11-23 10:28:23,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:23,718 INFO L93 Difference]: Finished difference Result 136 states and 149 transitions. [2018-11-23 10:28:23,718 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 149 transitions. [2018-11-23 10:28:23,719 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:28:23,719 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:28:23,719 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:28:23,719 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:28:23,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-11-23 10:28:23,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 136 transitions. [2018-11-23 10:28:23,721 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 136 transitions. Word has length 55 [2018-11-23 10:28:23,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:28:23,722 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 136 transitions. [2018-11-23 10:28:23,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-23 10:28:23,722 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions. [2018-11-23 10:28:23,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-23 10:28:23,722 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:28:23,723 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:28:23,723 INFO L423 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:28:23,723 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:28:23,723 INFO L82 PathProgramCache]: Analyzing trace with hash -2106418915, now seen corresponding path program 4 times [2018-11-23 10:28:23,723 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:28:23,724 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:28:23,740 INFO L101 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-11-23 10:28:23,831 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-11-23 10:28:23,832 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:28:23,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:28:23,863 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:28:23,937 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:28:23,942 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:28:23,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:23,949 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:23,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:23,964 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-11-23 10:28:24,008 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:24,009 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 110 [2018-11-23 10:28:24,045 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,047 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,048 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,060 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 65 [2018-11-23 10:28:24,088 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,090 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,091 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,101 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 53 [2018-11-23 10:28:24,112 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:24,115 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 27 [2018-11-23 10:28:24,119 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:24,127 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:24,131 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:24,134 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:24,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:24,142 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:82, output treesize:13 [2018-11-23 10:28:24,560 INFO L256 TraceCheckUtils]: 0: Hoare triple {6801#true} call ULTIMATE.init(); {6801#true} is VALID [2018-11-23 10:28:24,560 INFO L273 TraceCheckUtils]: 1: Hoare triple {6801#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {6801#true} is VALID [2018-11-23 10:28:24,561 INFO L273 TraceCheckUtils]: 2: Hoare triple {6801#true} assume true; {6801#true} is VALID [2018-11-23 10:28:24,561 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6801#true} {6801#true} #136#return; {6801#true} is VALID [2018-11-23 10:28:24,561 INFO L256 TraceCheckUtils]: 4: Hoare triple {6801#true} call #t~ret22 := main(); {6801#true} is VALID [2018-11-23 10:28:24,561 INFO L273 TraceCheckUtils]: 5: Hoare triple {6801#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {6801#true} is VALID [2018-11-23 10:28:24,561 INFO L273 TraceCheckUtils]: 6: Hoare triple {6801#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,562 INFO L273 TraceCheckUtils]: 7: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,562 INFO L273 TraceCheckUtils]: 8: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,562 INFO L273 TraceCheckUtils]: 9: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,563 INFO L273 TraceCheckUtils]: 10: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,563 INFO L273 TraceCheckUtils]: 11: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,563 INFO L273 TraceCheckUtils]: 12: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,564 INFO L273 TraceCheckUtils]: 13: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} ~i~0 := 1bv32; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,564 INFO L273 TraceCheckUtils]: 14: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,565 INFO L273 TraceCheckUtils]: 15: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,566 INFO L273 TraceCheckUtils]: 16: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,566 INFO L273 TraceCheckUtils]: 17: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,567 INFO L273 TraceCheckUtils]: 18: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,567 INFO L273 TraceCheckUtils]: 19: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} ~i~0 := 1bv32; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,568 INFO L273 TraceCheckUtils]: 20: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,568 INFO L273 TraceCheckUtils]: 21: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,569 INFO L273 TraceCheckUtils]: 22: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,569 INFO L273 TraceCheckUtils]: 23: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,570 INFO L273 TraceCheckUtils]: 24: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} is VALID [2018-11-23 10:28:24,571 INFO L273 TraceCheckUtils]: 25: Hoare triple {6824#(= |main_~#volArray~0.offset| (_ bv0 32))} ~i~0 := 1bv32; {6882#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,571 INFO L273 TraceCheckUtils]: 26: Hoare triple {6882#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6882#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,574 INFO L273 TraceCheckUtils]: 27: Hoare triple {6882#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,575 INFO L273 TraceCheckUtils]: 28: Hoare triple {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {6893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,576 INFO L273 TraceCheckUtils]: 29: Hoare triple {6893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {6893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,577 INFO L273 TraceCheckUtils]: 30: Hoare triple {6893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,578 INFO L273 TraceCheckUtils]: 31: Hoare triple {6893#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)))} ~i~0 := 0bv32; {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,579 INFO L273 TraceCheckUtils]: 32: Hoare triple {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,580 INFO L273 TraceCheckUtils]: 33: Hoare triple {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} assume #t~short21; {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,582 INFO L256 TraceCheckUtils]: 34: Hoare triple {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,583 INFO L273 TraceCheckUtils]: 35: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} ~cond := #in~cond; {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,583 INFO L273 TraceCheckUtils]: 36: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} assume !(0bv32 == ~cond); {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,584 INFO L273 TraceCheckUtils]: 37: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} assume true; {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,585 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #140#return; {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,586 INFO L273 TraceCheckUtils]: 39: Hoare triple {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} is VALID [2018-11-23 10:28:24,587 INFO L273 TraceCheckUtils]: 40: Hoare triple {6903#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,588 INFO L273 TraceCheckUtils]: 41: Hoare triple {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,588 INFO L273 TraceCheckUtils]: 42: Hoare triple {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short21; {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,591 INFO L256 TraceCheckUtils]: 43: Hoare triple {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,591 INFO L273 TraceCheckUtils]: 44: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} ~cond := #in~cond; {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,592 INFO L273 TraceCheckUtils]: 45: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} assume !(0bv32 == ~cond); {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,592 INFO L273 TraceCheckUtils]: 46: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} assume true; {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,593 INFO L268 TraceCheckUtils]: 47: Hoare quadruple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #140#return; {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,594 INFO L273 TraceCheckUtils]: 48: Hoare triple {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,596 INFO L273 TraceCheckUtils]: 49: Hoare triple {6889#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} is VALID [2018-11-23 10:28:24,597 INFO L273 TraceCheckUtils]: 50: Hoare triple {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} is VALID [2018-11-23 10:28:24,598 INFO L273 TraceCheckUtils]: 51: Hoare triple {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} assume #t~short21; {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} is VALID [2018-11-23 10:28:24,600 INFO L256 TraceCheckUtils]: 52: Hoare triple {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,601 INFO L273 TraceCheckUtils]: 53: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} ~cond := #in~cond; {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,601 INFO L273 TraceCheckUtils]: 54: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} assume !(0bv32 == ~cond); {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,602 INFO L273 TraceCheckUtils]: 55: Hoare triple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} assume true; {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} is VALID [2018-11-23 10:28:24,602 INFO L268 TraceCheckUtils]: 56: Hoare quadruple {6913#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_7| (_ BitVec 32))) (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_7|) (_ bv12 32))))} {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} #140#return; {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} is VALID [2018-11-23 10:28:24,603 INFO L273 TraceCheckUtils]: 57: Hoare triple {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} is VALID [2018-11-23 10:28:24,605 INFO L273 TraceCheckUtils]: 58: Hoare triple {6959#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967276 32)))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {6987#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967260 32))) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,607 INFO L273 TraceCheckUtils]: 59: Hoare triple {6987#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967260 32))) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {6987#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967260 32))) (_ bv0 32)))} is VALID [2018-11-23 10:28:24,608 INFO L273 TraceCheckUtils]: 60: Hoare triple {6987#(and (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967260 32))) (_ bv0 32)))} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {6994#|main_#t~short21|} is VALID [2018-11-23 10:28:24,608 INFO L256 TraceCheckUtils]: 61: Hoare triple {6994#|main_#t~short21|} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6998#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:28:24,609 INFO L273 TraceCheckUtils]: 62: Hoare triple {6998#(= (bvadd |__VERIFIER_assert_#in~cond| (_ bv4294967295 32)) (_ bv0 32))} ~cond := #in~cond; {7002#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} is VALID [2018-11-23 10:28:24,609 INFO L273 TraceCheckUtils]: 63: Hoare triple {7002#(= (bvadd __VERIFIER_assert_~cond (_ bv4294967295 32)) (_ bv0 32))} assume 0bv32 == ~cond; {6802#false} is VALID [2018-11-23 10:28:24,609 INFO L273 TraceCheckUtils]: 64: Hoare triple {6802#false} assume !false; {6802#false} is VALID [2018-11-23 10:28:24,620 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 10:28:24,620 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:28:25,436 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-11-23 10:28:25,476 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-11-23 10:28:25,479 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:25,484 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:25,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:25,490 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:7 [2018-11-23 10:28:25,496 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:28:25,496 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (= (_ bv0 32) (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)) (_ bv0 32)) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) [2018-11-23 10:28:25,496 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ []. (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32)) [2018-11-23 10:28:25,613 INFO L273 TraceCheckUtils]: 64: Hoare triple {6802#false} assume !false; {6802#false} is VALID [2018-11-23 10:28:25,634 INFO L273 TraceCheckUtils]: 63: Hoare triple {7012#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} assume 0bv32 == ~cond; {6802#false} is VALID [2018-11-23 10:28:25,647 INFO L273 TraceCheckUtils]: 62: Hoare triple {7016#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} ~cond := #in~cond; {7012#(not (= (_ bv0 32) __VERIFIER_assert_~cond))} is VALID [2018-11-23 10:28:25,662 INFO L256 TraceCheckUtils]: 61: Hoare triple {6994#|main_#t~short21|} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {7016#(not (= |__VERIFIER_assert_#in~cond| (_ bv0 32)))} is VALID [2018-11-23 10:28:25,678 INFO L273 TraceCheckUtils]: 60: Hoare triple {7023#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {6994#|main_#t~short21|} is VALID [2018-11-23 10:28:25,693 INFO L273 TraceCheckUtils]: 59: Hoare triple {7023#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {7023#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:28:25,985 INFO L273 TraceCheckUtils]: 58: Hoare triple {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {7023#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))))} is VALID [2018-11-23 10:28:26,000 INFO L273 TraceCheckUtils]: 57: Hoare triple {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:28:26,009 INFO L268 TraceCheckUtils]: 56: Hoare quadruple {6801#true} {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} #140#return; {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:28:26,010 INFO L273 TraceCheckUtils]: 55: Hoare triple {6801#true} assume true; {6801#true} is VALID [2018-11-23 10:28:26,010 INFO L273 TraceCheckUtils]: 54: Hoare triple {6801#true} assume !(0bv32 == ~cond); {6801#true} is VALID [2018-11-23 10:28:26,010 INFO L273 TraceCheckUtils]: 53: Hoare triple {6801#true} ~cond := #in~cond; {6801#true} is VALID [2018-11-23 10:28:26,010 INFO L256 TraceCheckUtils]: 52: Hoare triple {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6801#true} is VALID [2018-11-23 10:28:26,023 INFO L273 TraceCheckUtils]: 51: Hoare triple {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume #t~short21; {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:28:26,036 INFO L273 TraceCheckUtils]: 50: Hoare triple {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:28:26,358 INFO L273 TraceCheckUtils]: 49: Hoare triple {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {7030#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))))} is VALID [2018-11-23 10:28:26,359 INFO L273 TraceCheckUtils]: 48: Hoare triple {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:28:26,360 INFO L268 TraceCheckUtils]: 47: Hoare quadruple {6801#true} {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} #140#return; {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:28:26,360 INFO L273 TraceCheckUtils]: 46: Hoare triple {6801#true} assume true; {6801#true} is VALID [2018-11-23 10:28:26,360 INFO L273 TraceCheckUtils]: 45: Hoare triple {6801#true} assume !(0bv32 == ~cond); {6801#true} is VALID [2018-11-23 10:28:26,360 INFO L273 TraceCheckUtils]: 44: Hoare triple {6801#true} ~cond := #in~cond; {6801#true} is VALID [2018-11-23 10:28:26,361 INFO L256 TraceCheckUtils]: 43: Hoare triple {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6801#true} is VALID [2018-11-23 10:28:26,361 INFO L273 TraceCheckUtils]: 42: Hoare triple {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume #t~short21; {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:28:26,361 INFO L273 TraceCheckUtils]: 41: Hoare triple {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:28:26,629 INFO L273 TraceCheckUtils]: 40: Hoare triple {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {7058#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv8 32))))} is VALID [2018-11-23 10:28:26,629 INFO L273 TraceCheckUtils]: 39: Hoare triple {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:28:26,630 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {6801#true} {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} #140#return; {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:28:26,630 INFO L273 TraceCheckUtils]: 37: Hoare triple {6801#true} assume true; {6801#true} is VALID [2018-11-23 10:28:26,630 INFO L273 TraceCheckUtils]: 36: Hoare triple {6801#true} assume !(0bv32 == ~cond); {6801#true} is VALID [2018-11-23 10:28:26,630 INFO L273 TraceCheckUtils]: 35: Hoare triple {6801#true} ~cond := #in~cond; {6801#true} is VALID [2018-11-23 10:28:26,631 INFO L256 TraceCheckUtils]: 34: Hoare triple {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {6801#true} is VALID [2018-11-23 10:28:26,631 INFO L273 TraceCheckUtils]: 33: Hoare triple {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} assume #t~short21; {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:28:26,631 INFO L273 TraceCheckUtils]: 32: Hoare triple {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:28:26,632 INFO L273 TraceCheckUtils]: 31: Hoare triple {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} ~i~0 := 0bv32; {7086#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv12 32))))} is VALID [2018-11-23 10:28:26,633 INFO L273 TraceCheckUtils]: 30: Hoare triple {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:28:26,633 INFO L273 TraceCheckUtils]: 29: Hoare triple {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:28:26,634 INFO L273 TraceCheckUtils]: 28: Hoare triple {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:28:26,637 INFO L273 TraceCheckUtils]: 27: Hoare triple {7127#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {7114#(= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32))))} is VALID [2018-11-23 10:28:26,638 INFO L273 TraceCheckUtils]: 26: Hoare triple {7127#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {7127#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:28:26,638 INFO L273 TraceCheckUtils]: 25: Hoare triple {6801#true} ~i~0 := 1bv32; {7127#(= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))} is VALID [2018-11-23 10:28:26,638 INFO L273 TraceCheckUtils]: 24: Hoare triple {6801#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 23: Hoare triple {6801#true} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 22: Hoare triple {6801#true} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 21: Hoare triple {6801#true} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 20: Hoare triple {6801#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 19: Hoare triple {6801#true} ~i~0 := 1bv32; {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 18: Hoare triple {6801#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 17: Hoare triple {6801#true} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {6801#true} is VALID [2018-11-23 10:28:26,639 INFO L273 TraceCheckUtils]: 16: Hoare triple {6801#true} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 15: Hoare triple {6801#true} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 14: Hoare triple {6801#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 13: Hoare triple {6801#true} ~i~0 := 1bv32; {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 12: Hoare triple {6801#true} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 11: Hoare triple {6801#true} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 10: Hoare triple {6801#true} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 9: Hoare triple {6801#true} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {6801#true} is VALID [2018-11-23 10:28:26,640 INFO L273 TraceCheckUtils]: 8: Hoare triple {6801#true} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L273 TraceCheckUtils]: 7: Hoare triple {6801#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L273 TraceCheckUtils]: 6: Hoare triple {6801#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L273 TraceCheckUtils]: 5: Hoare triple {6801#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L256 TraceCheckUtils]: 4: Hoare triple {6801#true} call #t~ret22 := main(); {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {6801#true} {6801#true} #136#return; {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L273 TraceCheckUtils]: 2: Hoare triple {6801#true} assume true; {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L273 TraceCheckUtils]: 1: Hoare triple {6801#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {6801#true} is VALID [2018-11-23 10:28:26,641 INFO L256 TraceCheckUtils]: 0: Hoare triple {6801#true} call ULTIMATE.init(); {6801#true} is VALID [2018-11-23 10:28:26,649 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 6 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 10:28:26,652 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:28:26,652 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 21 [2018-11-23 10:28:26,653 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-11-23 10:28:26,653 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:28:26,654 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 21 states. [2018-11-23 10:28:27,974 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:27,974 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 10:28:27,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 10:28:27,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2018-11-23 10:28:27,975 INFO L87 Difference]: Start difference. First operand 122 states and 136 transitions. Second operand 21 states. [2018-11-23 10:28:38,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:38,607 INFO L93 Difference]: Finished difference Result 161 states and 183 transitions. [2018-11-23 10:28:38,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 10:28:38,607 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-11-23 10:28:38,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:28:38,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:28:38,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 109 transitions. [2018-11-23 10:28:38,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-11-23 10:28:38,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 109 transitions. [2018-11-23 10:28:38,611 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 18 states and 109 transitions. [2018-11-23 10:28:39,381 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 109 edges. 109 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:39,384 INFO L225 Difference]: With dead ends: 161 [2018-11-23 10:28:39,384 INFO L226 Difference]: Without dead ends: 159 [2018-11-23 10:28:39,385 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 104 SyntacticMatches, 7 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 211 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=135, Invalid=677, Unknown=0, NotChecked=0, Total=812 [2018-11-23 10:28:39,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-11-23 10:28:40,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 142. [2018-11-23 10:28:40,177 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:28:40,177 INFO L82 GeneralOperation]: Start isEquivalent. First operand 159 states. Second operand 142 states. [2018-11-23 10:28:40,177 INFO L74 IsIncluded]: Start isIncluded. First operand 159 states. Second operand 142 states. [2018-11-23 10:28:40,177 INFO L87 Difference]: Start difference. First operand 159 states. Second operand 142 states. [2018-11-23 10:28:40,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:40,183 INFO L93 Difference]: Finished difference Result 159 states and 180 transitions. [2018-11-23 10:28:40,183 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 180 transitions. [2018-11-23 10:28:40,184 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:28:40,184 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:28:40,184 INFO L74 IsIncluded]: Start isIncluded. First operand 142 states. Second operand 159 states. [2018-11-23 10:28:40,184 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 159 states. [2018-11-23 10:28:40,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:28:40,189 INFO L93 Difference]: Finished difference Result 159 states and 180 transitions. [2018-11-23 10:28:40,189 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 180 transitions. [2018-11-23 10:28:40,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:28:40,190 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:28:40,190 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:28:40,190 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:28:40,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-11-23 10:28:40,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 160 transitions. [2018-11-23 10:28:40,194 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 160 transitions. Word has length 65 [2018-11-23 10:28:40,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:28:40,195 INFO L480 AbstractCegarLoop]: Abstraction has 142 states and 160 transitions. [2018-11-23 10:28:40,195 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 10:28:40,195 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 160 transitions. [2018-11-23 10:28:40,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-11-23 10:28:40,196 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:28:40,196 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:28:40,196 INFO L423 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:28:40,197 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:28:40,197 INFO L82 PathProgramCache]: Analyzing trace with hash 103654151, now seen corresponding path program 5 times [2018-11-23 10:28:40,197 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:28:40,197 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:28:40,227 INFO L101 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2018-11-23 10:28:40,778 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2018-11-23 10:28:40,779 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:28:40,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:28:40,866 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:28:41,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-11-23 10:28:41,022 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-11-23 10:28:41,025 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,028 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,049 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-11-23 10:28:41,108 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:41,109 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 140 treesize of output 229 [2018-11-23 10:28:41,156 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,157 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,159 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,173 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 113 [2018-11-23 10:28:41,215 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,216 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,217 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,231 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 83 [2018-11-23 10:28:41,246 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,250 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 39 [2018-11-23 10:28:41,254 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,267 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,272 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,277 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,296 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:154, output treesize:27 [2018-11-23 10:28:41,360 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-11-23 10:28:41,368 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,369 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-11-23 10:28:41,371 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,380 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,402 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-11-23 10:28:41,462 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:41,463 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 151 [2018-11-23 10:28:41,524 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,525 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,526 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,527 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,528 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,530 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,548 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 104 [2018-11-23 10:28:41,591 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,592 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,593 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,594 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,595 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,596 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,615 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 88 [2018-11-23 10:28:41,625 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,628 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,636 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 56 [2018-11-23 10:28:41,639 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,659 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,668 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,678 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,694 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:112, output treesize:29 [2018-11-23 10:28:41,771 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-11-23 10:28:41,784 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,788 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,790 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:41,800 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 61 [2018-11-23 10:28:41,810 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,835 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,869 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:41,869 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:41, output treesize:37 [2018-11-23 10:28:41,958 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:41,959 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 162 treesize of output 247 [2018-11-23 10:28:42,048 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,049 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,051 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,053 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,055 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,060 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,066 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,069 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,270 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 105 treesize of output 179 [2018-11-23 10:28:42,383 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,384 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,389 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,395 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,397 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,400 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,406 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,411 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,581 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 2 new quantified variables, introduced 6 case distinctions, treesize of input 62 treesize of output 164 [2018-11-23 10:28:42,609 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,610 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,615 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,617 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,619 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,621 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,627 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,629 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,679 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 8 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 151 [2018-11-23 10:28:42,687 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:42,801 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,803 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,805 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,808 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,810 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,812 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:42,838 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 109 [2018-11-23 10:28:42,844 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:42,894 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:42,912 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:42,929 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:42,960 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:28:42,961 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 2 variables, input treesize:168, output treesize:37 [2018-11-23 10:28:42,972 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:28:42,972 WARN L384 uantifierElimination]: Input elimination task: ∃ [|v_#memory_int_98|, main_~i~0]. (let ((.cse2 (bvmul (_ bv16 32) main_~i~0)) (.cse5 (select |v_#memory_int_98| |main_~#volArray~0.base|))) (and (= |#memory_int| (store |v_#memory_int_98| |main_~#volArray~0.base| (let ((.cse0 (let ((.cse3 (let ((.cse6 (bvadd |main_~#volArray~0.offset| .cse2 (_ bv4294967280 32)))) (store .cse5 .cse6 (select .cse5 .cse6)))) (.cse4 (bvadd |main_~#volArray~0.offset| .cse2 (_ bv4294967284 32)))) (store .cse3 .cse4 (select .cse3 .cse4)))) (.cse1 (bvadd |main_~#volArray~0.offset| .cse2 (_ bv4294967292 32)))) (store .cse0 .cse1 (select .cse0 .cse1))))) (= (select .cse5 (bvadd |main_~#volArray~0.offset| .cse2 (_ bv4294967288 32))) main_~CCCELVOL2~0) (= (bvadd (select .cse5 (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (bvadd (select .cse5 (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))) [2018-11-23 10:28:42,972 WARN L385 uantifierElimination]: ElimStorePlain result: ∃ [main_~i~0]. (let ((.cse0 (select |#memory_int| |main_~#volArray~0.base|))) (and (= (select .cse0 (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv7 32)) (= (select .cse0 (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (select .cse0 (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv7 32)))) [2018-11-23 10:28:43,096 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-11-23 10:28:43,111 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,114 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,118 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,121 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,131 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,158 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 99 [2018-11-23 10:28:43,170 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:43,212 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:43,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:28:43,253 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:54, output treesize:50 [2018-11-23 10:28:43,313 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:43,314 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 233 [2018-11-23 10:28:43,376 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,378 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,380 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,381 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,644 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 97 treesize of output 121 [2018-11-23 10:28:43,717 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,718 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,725 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,726 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,845 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 6 case distinctions, treesize of input 54 treesize of output 104 [2018-11-23 10:28:43,861 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,863 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,865 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,878 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 86 [2018-11-23 10:28:43,885 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:43,951 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,953 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,956 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:43,972 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 61 [2018-11-23 10:28:43,976 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,001 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,010 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,018 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,037 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 2 variables, input treesize:152, output treesize:25 [2018-11-23 10:28:44,151 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-11-23 10:28:44,160 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,162 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,163 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,165 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,166 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 71 [2018-11-23 10:28:44,170 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,187 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-11-23 10:28:44,333 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:44,334 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 128 [2018-11-23 10:28:44,411 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,412 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,413 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,415 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,416 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,417 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,419 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,432 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 113 [2018-11-23 10:28:44,512 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,514 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,515 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,516 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,518 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,519 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,520 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,530 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 94 [2018-11-23 10:28:44,543 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,544 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,546 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,547 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,562 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 97 [2018-11-23 10:28:44,598 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,622 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,633 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,645 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,666 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:107, output treesize:36 [2018-11-23 10:28:44,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 37 [2018-11-23 10:28:44,787 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,789 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,792 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,797 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,805 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,808 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:44,809 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 98 [2018-11-23 10:28:44,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,846 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:44,880 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:52, output treesize:48 [2018-11-23 10:28:44,999 INFO L683 Elim1Store]: detected equality via solver [2018-11-23 10:28:45,000 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 169 treesize of output 252 [2018-11-23 10:28:45,143 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,146 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,148 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,149 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,150 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,151 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,153 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,155 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,162 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,164 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,167 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,170 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,192 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:45,215 INFO L303 Elim1Store]: Index analysis took 103 ms [2018-11-23 10:28:46,400 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 13 disjoint index pairs (out of 15 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 114 treesize of output 238 [2018-11-23 10:28:46,563 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 38 [2018-11-23 10:28:46,608 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,612 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,613 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,617 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,624 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,626 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,629 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,631 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,633 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,635 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,639 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,667 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,694 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,743 INFO L303 Elim1Store]: Index analysis took 174 ms [2018-11-23 10:28:46,895 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 13 disjoint index pairs (out of 15 index pairs), introduced 2 new quantified variables, introduced 6 case distinctions, treesize of input 71 treesize of output 202 [2018-11-23 10:28:46,984 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,986 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,989 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,991 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:46,994 INFO L701 Elim1Store]: detected not equals via solver [2018-11-23 10:28:47,024 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 10 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 155 [2018-11-23 10:28:47,032 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:47,080 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:47,100 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:47,120 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-23 10:28:47,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-23 10:28:47,154 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:175, output treesize:46 [2018-11-23 10:28:47,511 INFO L256 TraceCheckUtils]: 0: Hoare triple {7954#true} call ULTIMATE.init(); {7954#true} is VALID [2018-11-23 10:28:47,512 INFO L273 TraceCheckUtils]: 1: Hoare triple {7954#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {7954#true} is VALID [2018-11-23 10:28:47,512 INFO L273 TraceCheckUtils]: 2: Hoare triple {7954#true} assume true; {7954#true} is VALID [2018-11-23 10:28:47,512 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7954#true} {7954#true} #136#return; {7954#true} is VALID [2018-11-23 10:28:47,513 INFO L256 TraceCheckUtils]: 4: Hoare triple {7954#true} call #t~ret22 := main(); {7954#true} is VALID [2018-11-23 10:28:47,513 INFO L273 TraceCheckUtils]: 5: Hoare triple {7954#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {7954#true} is VALID [2018-11-23 10:28:47,514 INFO L273 TraceCheckUtils]: 6: Hoare triple {7954#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,514 INFO L273 TraceCheckUtils]: 7: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,515 INFO L273 TraceCheckUtils]: 8: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,515 INFO L273 TraceCheckUtils]: 9: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,516 INFO L273 TraceCheckUtils]: 10: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,516 INFO L273 TraceCheckUtils]: 11: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,517 INFO L273 TraceCheckUtils]: 12: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,518 INFO L273 TraceCheckUtils]: 13: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,519 INFO L273 TraceCheckUtils]: 14: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,520 INFO L273 TraceCheckUtils]: 15: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,521 INFO L273 TraceCheckUtils]: 16: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,521 INFO L273 TraceCheckUtils]: 17: Hoare triple {7977#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {8011#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,522 INFO L273 TraceCheckUtils]: 18: Hoare triple {8011#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8011#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,525 INFO L273 TraceCheckUtils]: 19: Hoare triple {8011#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {8018#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= main_~CCCELVOL3~0 (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,528 INFO L273 TraceCheckUtils]: 20: Hoare triple {8018#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= main_~CCCELVOL3~0 (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {8018#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= main_~CCCELVOL3~0 (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,530 INFO L273 TraceCheckUtils]: 21: Hoare triple {8018#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= main_~CCCELVOL3~0 (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {8025#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967268 32))) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,548 INFO L273 TraceCheckUtils]: 22: Hoare triple {8025#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967268 32))) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8025#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967268 32))) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,550 INFO L273 TraceCheckUtils]: 23: Hoare triple {8025#(and (= (_ bv7 32) main_~CCCELVOL3~0) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967268 32))) main_~CCCELVOL3~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {8032#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967268 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,551 INFO L273 TraceCheckUtils]: 24: Hoare triple {8032#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv2 32) main_~i~0) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967268 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,552 INFO L273 TraceCheckUtils]: 25: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,553 INFO L273 TraceCheckUtils]: 26: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,553 INFO L273 TraceCheckUtils]: 27: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,554 INFO L273 TraceCheckUtils]: 28: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,559 INFO L273 TraceCheckUtils]: 29: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {8052#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,561 INFO L273 TraceCheckUtils]: 30: Hoare triple {8052#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {8056#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,562 INFO L273 TraceCheckUtils]: 31: Hoare triple {8056#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {8056#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,563 INFO L273 TraceCheckUtils]: 32: Hoare triple {8056#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8056#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,569 INFO L273 TraceCheckUtils]: 33: Hoare triple {8056#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (exists ((main_~i~0 (_ BitVec 32))) (= (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967288 32))) main_~CCCELVOL2~0)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,570 INFO L273 TraceCheckUtils]: 34: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,571 INFO L273 TraceCheckUtils]: 35: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,571 INFO L273 TraceCheckUtils]: 36: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,572 INFO L273 TraceCheckUtils]: 37: Hoare triple {8036#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 1bv32; {8078#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,589 INFO L273 TraceCheckUtils]: 38: Hoare triple {8078#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8078#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,593 INFO L273 TraceCheckUtils]: 39: Hoare triple {8078#(and (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {8085#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,595 INFO L273 TraceCheckUtils]: 40: Hoare triple {8085#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,596 INFO L273 TraceCheckUtils]: 41: Hoare triple {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,596 INFO L273 TraceCheckUtils]: 42: Hoare triple {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,602 INFO L273 TraceCheckUtils]: 43: Hoare triple {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {8099#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,603 INFO L273 TraceCheckUtils]: 44: Hoare triple {8099#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32)))) (= (_ bv2 32) main_~MINVAL~0))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,604 INFO L273 TraceCheckUtils]: 45: Hoare triple {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,604 INFO L273 TraceCheckUtils]: 46: Hoare triple {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,605 INFO L273 TraceCheckUtils]: 47: Hoare triple {8089#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} ~i~0 := 0bv32; {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,606 INFO L273 TraceCheckUtils]: 48: Hoare triple {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,606 INFO L273 TraceCheckUtils]: 49: Hoare triple {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} assume #t~short21; {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,609 INFO L256 TraceCheckUtils]: 50: Hoare triple {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} is VALID [2018-11-23 10:28:47,610 INFO L273 TraceCheckUtils]: 51: Hoare triple {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} ~cond := #in~cond; {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} is VALID [2018-11-23 10:28:47,611 INFO L273 TraceCheckUtils]: 52: Hoare triple {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} assume !(0bv32 == ~cond); {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} is VALID [2018-11-23 10:28:47,632 INFO L273 TraceCheckUtils]: 53: Hoare triple {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} assume true; {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} is VALID [2018-11-23 10:28:47,646 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {8122#(exists ((|v_main_~#volArray~0.base_BEFORE_CALL_13| (_ BitVec 32))) (and (= (_ bv0 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv12 32))) (= (bvadd (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv4 32)) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |v_main_~#volArray~0.base_BEFORE_CALL_13|) (_ bv20 32)))))} {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #140#return; {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,663 INFO L273 TraceCheckUtils]: 55: Hoare triple {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} is VALID [2018-11-23 10:28:47,673 INFO L273 TraceCheckUtils]: 56: Hoare triple {8112#(and (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv12 32)))) (= main_~i~0 (_ bv0 32)) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (_ bv7 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32)))) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {8085#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:28:47,687 INFO L273 TraceCheckUtils]: 57: Hoare triple {8085#(and (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv20 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv0 32) (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967292 32)))) (= |main_~#volArray~0.offset| (_ bv0 32)) (= (bvadd (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (_ bv4294967289 32)) (_ bv0 32)) (= (_ bv2 32) main_~MINVAL~0) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {8144#|main_#t~short21|} is VALID [2018-11-23 10:28:47,696 INFO L273 TraceCheckUtils]: 58: Hoare triple {8144#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {7955#false} is VALID [2018-11-23 10:28:47,697 INFO L256 TraceCheckUtils]: 59: Hoare triple {7955#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {7955#false} is VALID [2018-11-23 10:28:47,697 INFO L273 TraceCheckUtils]: 60: Hoare triple {7955#false} ~cond := #in~cond; {7955#false} is VALID [2018-11-23 10:28:47,697 INFO L273 TraceCheckUtils]: 61: Hoare triple {7955#false} assume 0bv32 == ~cond; {7955#false} is VALID [2018-11-23 10:28:47,697 INFO L273 TraceCheckUtils]: 62: Hoare triple {7955#false} assume !false; {7955#false} is VALID [2018-11-23 10:28:47,722 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 5 proven. 15 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-11-23 10:28:47,722 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:28:48,758 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-11-23 10:28:48,767 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 27 [2018-11-23 10:28:48,866 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 [2018-11-23 10:28:48,871 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:28:48,875 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 6 [2018-11-23 10:28:48,876 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-23 10:28:48,914 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:28:48,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:28:48,962 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-11-23 10:28:48,962 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:25, output treesize:23 [2018-11-23 10:28:48,991 WARN L383 uantifierElimination]: Trying to double check SDD result, but SMT solver's response was UNKNOWN. [2018-11-23 10:28:48,991 WARN L384 uantifierElimination]: Input elimination task: ∀ [|#memory_int|, |main_~#volArray~0.base|]. (bvsge (select (let ((.cse0 (bvmul (_ bv16 32) main_~i~0))) (store (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4 32)) main_~CCCELVOL3~0)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0) [2018-11-23 10:28:48,991 WARN L385 uantifierElimination]: ElimStorePlain result: ∀ [v_arrayElimCell_89]. (and (let ((.cse0 (bvmul (_ bv16 32) main_~i~0))) (or (= (bvadd |main_~#volArray~0.offset| .cse0 (_ bv4294967284 32)) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) (bvsge v_arrayElimCell_89 main_~MINVAL~0) (= (_ bv0 32) .cse0))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0)) [2018-11-23 10:28:49,149 INFO L273 TraceCheckUtils]: 62: Hoare triple {7955#false} assume !false; {7955#false} is VALID [2018-11-23 10:28:49,149 INFO L273 TraceCheckUtils]: 61: Hoare triple {7955#false} assume 0bv32 == ~cond; {7955#false} is VALID [2018-11-23 10:28:49,150 INFO L273 TraceCheckUtils]: 60: Hoare triple {7955#false} ~cond := #in~cond; {7955#false} is VALID [2018-11-23 10:28:49,150 INFO L256 TraceCheckUtils]: 59: Hoare triple {7955#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {7955#false} is VALID [2018-11-23 10:28:49,150 INFO L273 TraceCheckUtils]: 58: Hoare triple {8144#|main_#t~short21|} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {7955#false} is VALID [2018-11-23 10:28:49,151 INFO L273 TraceCheckUtils]: 57: Hoare triple {8175#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {8144#|main_#t~short21|} is VALID [2018-11-23 10:28:51,167 INFO L273 TraceCheckUtils]: 56: Hoare triple {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {8175#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0))) main_~MINVAL~0)} is UNKNOWN [2018-11-23 10:28:51,170 INFO L273 TraceCheckUtils]: 55: Hoare triple {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,172 INFO L268 TraceCheckUtils]: 54: Hoare quadruple {7954#true} {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} #140#return; {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,172 INFO L273 TraceCheckUtils]: 53: Hoare triple {7954#true} assume true; {7954#true} is VALID [2018-11-23 10:28:51,172 INFO L273 TraceCheckUtils]: 52: Hoare triple {7954#true} assume !(0bv32 == ~cond); {7954#true} is VALID [2018-11-23 10:28:51,172 INFO L273 TraceCheckUtils]: 51: Hoare triple {7954#true} ~cond := #in~cond; {7954#true} is VALID [2018-11-23 10:28:51,172 INFO L256 TraceCheckUtils]: 50: Hoare triple {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {7954#true} is VALID [2018-11-23 10:28:51,173 INFO L273 TraceCheckUtils]: 49: Hoare triple {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume #t~short21; {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,175 INFO L273 TraceCheckUtils]: 48: Hoare triple {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,175 INFO L273 TraceCheckUtils]: 47: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 0bv32; {8179#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv4 32) main_~i~0) (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,177 INFO L273 TraceCheckUtils]: 46: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,177 INFO L273 TraceCheckUtils]: 45: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,180 INFO L273 TraceCheckUtils]: 44: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,189 INFO L273 TraceCheckUtils]: 43: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,190 INFO L273 TraceCheckUtils]: 42: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,191 INFO L273 TraceCheckUtils]: 41: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,193 INFO L273 TraceCheckUtils]: 40: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,204 INFO L273 TraceCheckUtils]: 39: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,208 INFO L273 TraceCheckUtils]: 38: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,208 INFO L273 TraceCheckUtils]: 37: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 1bv32; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,210 INFO L273 TraceCheckUtils]: 36: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,210 INFO L273 TraceCheckUtils]: 35: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,212 INFO L273 TraceCheckUtils]: 34: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,218 INFO L273 TraceCheckUtils]: 33: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,219 INFO L273 TraceCheckUtils]: 32: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,219 INFO L273 TraceCheckUtils]: 31: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,222 INFO L273 TraceCheckUtils]: 30: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,230 INFO L273 TraceCheckUtils]: 29: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,231 INFO L273 TraceCheckUtils]: 28: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,231 INFO L273 TraceCheckUtils]: 27: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} ~i~0 := 1bv32; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,233 INFO L273 TraceCheckUtils]: 26: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,233 INFO L273 TraceCheckUtils]: 25: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,235 INFO L273 TraceCheckUtils]: 24: Hoare triple {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,267 INFO L273 TraceCheckUtils]: 23: Hoare triple {8280#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {8207#(bvsge (select (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,267 INFO L273 TraceCheckUtils]: 22: Hoare triple {8280#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8280#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,280 INFO L273 TraceCheckUtils]: 21: Hoare triple {8287#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {8280#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4294967284 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,281 INFO L273 TraceCheckUtils]: 20: Hoare triple {8287#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {8287#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,305 INFO L273 TraceCheckUtils]: 19: Hoare triple {8294#(and (or (forall ((v_arrayElimCell_89 (_ BitVec 32))) (bvsge v_arrayElimCell_89 main_~MINVAL~0)) (= (_ bv0 32) (bvmul (_ bv16 32) main_~i~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {8287#(bvsge (select (store (select |#memory_int| |main_~#volArray~0.base|) (bvadd |main_~#volArray~0.offset| (bvmul (_ bv16 32) main_~i~0) (_ bv4 32)) main_~CCCELVOL3~0) (bvadd |main_~#volArray~0.offset| (_ bv4 32))) main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,306 INFO L273 TraceCheckUtils]: 18: Hoare triple {8294#(and (or (forall ((v_arrayElimCell_89 (_ BitVec 32))) (bvsge v_arrayElimCell_89 main_~MINVAL~0)) (= (_ bv0 32) (bvmul (_ bv16 32) main_~i~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8294#(and (or (forall ((v_arrayElimCell_89 (_ BitVec 32))) (bvsge v_arrayElimCell_89 main_~MINVAL~0)) (= (_ bv0 32) (bvmul (_ bv16 32) main_~i~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} is VALID [2018-11-23 10:28:51,307 INFO L273 TraceCheckUtils]: 17: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} ~i~0 := 1bv32; {8294#(and (or (forall ((v_arrayElimCell_89 (_ BitVec 32))) (bvsge v_arrayElimCell_89 main_~MINVAL~0)) (= (_ bv0 32) (bvmul (_ bv16 32) main_~i~0)) (= (bvadd (bvmul (_ bv16 32) main_~i~0) (_ bv4294967280 32)) (_ bv0 32))) (bvsge main_~CCCELVOL3~0 main_~MINVAL~0))} is VALID [2018-11-23 10:28:51,308 INFO L273 TraceCheckUtils]: 16: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,308 INFO L273 TraceCheckUtils]: 15: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,310 INFO L273 TraceCheckUtils]: 14: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,310 INFO L273 TraceCheckUtils]: 13: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,312 INFO L273 TraceCheckUtils]: 12: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,312 INFO L273 TraceCheckUtils]: 11: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,314 INFO L273 TraceCheckUtils]: 10: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,314 INFO L273 TraceCheckUtils]: 9: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,316 INFO L273 TraceCheckUtils]: 8: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,316 INFO L273 TraceCheckUtils]: 7: Hoare triple {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,318 INFO L273 TraceCheckUtils]: 6: Hoare triple {7954#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {8301#(bvsge main_~CCCELVOL3~0 main_~MINVAL~0)} is VALID [2018-11-23 10:28:51,318 INFO L273 TraceCheckUtils]: 5: Hoare triple {7954#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {7954#true} is VALID [2018-11-23 10:28:51,318 INFO L256 TraceCheckUtils]: 4: Hoare triple {7954#true} call #t~ret22 := main(); {7954#true} is VALID [2018-11-23 10:28:51,318 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {7954#true} {7954#true} #136#return; {7954#true} is VALID [2018-11-23 10:28:51,318 INFO L273 TraceCheckUtils]: 2: Hoare triple {7954#true} assume true; {7954#true} is VALID [2018-11-23 10:28:51,318 INFO L273 TraceCheckUtils]: 1: Hoare triple {7954#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {7954#true} is VALID [2018-11-23 10:28:51,318 INFO L256 TraceCheckUtils]: 0: Hoare triple {7954#true} call ULTIMATE.init(); {7954#true} is VALID [2018-11-23 10:28:51,325 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-23 10:28:51,327 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:28:51,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 10] total 24 [2018-11-23 10:28:51,328 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 63 [2018-11-23 10:28:51,328 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:28:51,328 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 24 states. [2018-11-23 10:28:54,048 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 97 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:28:54,049 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-11-23 10:28:54,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-11-23 10:28:54,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=453, Unknown=0, NotChecked=0, Total=552 [2018-11-23 10:28:54,049 INFO L87 Difference]: Start difference. First operand 142 states and 160 transitions. Second operand 24 states. [2018-11-23 10:29:01,552 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 41 [2018-11-23 10:29:02,208 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 42 DAG size of output: 29 [2018-11-23 10:29:02,514 WARN L180 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 38 [2018-11-23 10:29:03,489 WARN L180 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 30 [2018-11-23 10:29:04,032 WARN L180 SmtUtils]: Spent 237.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 37 [2018-11-23 10:29:07,895 WARN L180 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 37 [2018-11-23 10:29:09,499 WARN L180 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 44 [2018-11-23 10:29:11,184 WARN L180 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 41 [2018-11-23 10:29:11,557 WARN L180 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 38 [2018-11-23 10:29:12,534 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 45 DAG size of output: 43 [2018-11-23 10:29:13,956 WARN L180 SmtUtils]: Spent 117.00 ms on a formula simplification. DAG size of input: 50 DAG size of output: 36 [2018-11-23 10:29:15,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:15,759 INFO L93 Difference]: Finished difference Result 185 states and 205 transitions. [2018-11-23 10:29:15,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-11-23 10:29:15,759 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 63 [2018-11-23 10:29:15,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:29:15,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:29:15,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 147 transitions. [2018-11-23 10:29:15,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-11-23 10:29:15,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 147 transitions. [2018-11-23 10:29:15,765 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 34 states and 147 transitions. [2018-11-23 10:29:19,189 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 147 edges. 146 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:19,192 INFO L225 Difference]: With dead ends: 185 [2018-11-23 10:29:19,192 INFO L226 Difference]: Without dead ends: 154 [2018-11-23 10:29:19,193 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 88 SyntacticMatches, 15 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 836 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=540, Invalid=2010, Unknown=0, NotChecked=0, Total=2550 [2018-11-23 10:29:19,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-11-23 10:29:19,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 104. [2018-11-23 10:29:19,570 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2018-11-23 10:29:19,570 INFO L82 GeneralOperation]: Start isEquivalent. First operand 154 states. Second operand 104 states. [2018-11-23 10:29:19,570 INFO L74 IsIncluded]: Start isIncluded. First operand 154 states. Second operand 104 states. [2018-11-23 10:29:19,570 INFO L87 Difference]: Start difference. First operand 154 states. Second operand 104 states. [2018-11-23 10:29:19,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:19,575 INFO L93 Difference]: Finished difference Result 154 states and 169 transitions. [2018-11-23 10:29:19,576 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 169 transitions. [2018-11-23 10:29:19,576 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:19,576 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:19,577 INFO L74 IsIncluded]: Start isIncluded. First operand 104 states. Second operand 154 states. [2018-11-23 10:29:19,577 INFO L87 Difference]: Start difference. First operand 104 states. Second operand 154 states. [2018-11-23 10:29:19,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:29:19,581 INFO L93 Difference]: Finished difference Result 154 states and 169 transitions. [2018-11-23 10:29:19,581 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 169 transitions. [2018-11-23 10:29:19,582 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-11-23 10:29:19,582 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2018-11-23 10:29:19,582 INFO L88 GeneralOperation]: Finished isEquivalent. [2018-11-23 10:29:19,582 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2018-11-23 10:29:19,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-23 10:29:19,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 114 transitions. [2018-11-23 10:29:19,585 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 114 transitions. Word has length 63 [2018-11-23 10:29:19,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:29:19,585 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 114 transitions. [2018-11-23 10:29:19,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-11-23 10:29:19,585 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 114 transitions. [2018-11-23 10:29:19,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-23 10:29:19,586 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:29:19,587 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:29:19,587 INFO L423 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:29:19,587 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:29:19,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1729512491, now seen corresponding path program 6 times [2018-11-23 10:29:19,588 INFO L223 ckRefinementStrategy]: Switched to mode CVC4_FPBP [2018-11-23 10:29:19,588 INFO L69 tionRefinementEngine]: Using refinement strategy WolfRefinementStrategy No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/cvc4nyu Starting monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4nyu --tear-down-incremental --print-success --lang smt --rewrite-divk [2018-11-23 10:29:19,615 INFO L101 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2018-11-23 10:29:20,237 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-11-23 10:29:20,238 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2018-11-23 10:29:20,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:29:20,312 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:29:20,906 WARN L180 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:21,213 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-11-23 10:29:21,505 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:21,817 WARN L180 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-11-23 10:29:22,188 WARN L180 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:22,211 INFO L256 TraceCheckUtils]: 0: Hoare triple {9103#true} call ULTIMATE.init(); {9103#true} is VALID [2018-11-23 10:29:22,211 INFO L273 TraceCheckUtils]: 1: Hoare triple {9103#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {9103#true} is VALID [2018-11-23 10:29:22,211 INFO L273 TraceCheckUtils]: 2: Hoare triple {9103#true} assume true; {9103#true} is VALID [2018-11-23 10:29:22,212 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9103#true} {9103#true} #136#return; {9103#true} is VALID [2018-11-23 10:29:22,212 INFO L256 TraceCheckUtils]: 4: Hoare triple {9103#true} call #t~ret22 := main(); {9103#true} is VALID [2018-11-23 10:29:22,212 INFO L273 TraceCheckUtils]: 5: Hoare triple {9103#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {9103#true} is VALID [2018-11-23 10:29:22,212 INFO L273 TraceCheckUtils]: 6: Hoare triple {9103#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {9126#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} is VALID [2018-11-23 10:29:22,213 INFO L273 TraceCheckUtils]: 7: Hoare triple {9126#(bvsgt ~CELLCOUNT~0 (_ bv1 32))} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,213 INFO L273 TraceCheckUtils]: 8: Hoare triple {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,214 INFO L273 TraceCheckUtils]: 9: Hoare triple {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,214 INFO L273 TraceCheckUtils]: 10: Hoare triple {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,215 INFO L273 TraceCheckUtils]: 11: Hoare triple {9130#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {9143#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} is VALID [2018-11-23 10:29:22,215 INFO L273 TraceCheckUtils]: 12: Hoare triple {9143#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,216 INFO L273 TraceCheckUtils]: 13: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~i~0 := 1bv32; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,216 INFO L273 TraceCheckUtils]: 14: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,217 INFO L273 TraceCheckUtils]: 15: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,218 INFO L273 TraceCheckUtils]: 16: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,219 INFO L273 TraceCheckUtils]: 17: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,220 INFO L273 TraceCheckUtils]: 18: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,220 INFO L273 TraceCheckUtils]: 19: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~i~0 := 1bv32; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,221 INFO L273 TraceCheckUtils]: 20: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,222 INFO L273 TraceCheckUtils]: 21: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,223 INFO L273 TraceCheckUtils]: 22: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,224 INFO L273 TraceCheckUtils]: 23: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,225 INFO L273 TraceCheckUtils]: 24: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,226 INFO L273 TraceCheckUtils]: 25: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~i~0 := 1bv32; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,226 INFO L273 TraceCheckUtils]: 26: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,227 INFO L273 TraceCheckUtils]: 27: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,228 INFO L273 TraceCheckUtils]: 28: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,229 INFO L273 TraceCheckUtils]: 29: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,230 INFO L273 TraceCheckUtils]: 30: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,231 INFO L273 TraceCheckUtils]: 31: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~i~0 := 0bv32; {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,232 INFO L273 TraceCheckUtils]: 32: Hoare triple {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,233 INFO L273 TraceCheckUtils]: 33: Hoare triple {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume #t~short21; {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,234 INFO L256 TraceCheckUtils]: 34: Hoare triple {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,234 INFO L273 TraceCheckUtils]: 35: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~cond := #in~cond; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,235 INFO L273 TraceCheckUtils]: 36: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !(0bv32 == ~cond); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,236 INFO L273 TraceCheckUtils]: 37: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume true; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,237 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #140#return; {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,238 INFO L273 TraceCheckUtils]: 39: Hoare triple {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,238 INFO L273 TraceCheckUtils]: 40: Hoare triple {9205#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= main_~i~0 (_ bv0 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,240 INFO L273 TraceCheckUtils]: 41: Hoare triple {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,240 INFO L273 TraceCheckUtils]: 42: Hoare triple {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} assume #t~short21; {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,241 INFO L256 TraceCheckUtils]: 43: Hoare triple {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,242 INFO L273 TraceCheckUtils]: 44: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~cond := #in~cond; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,243 INFO L273 TraceCheckUtils]: 45: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !(0bv32 == ~cond); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,244 INFO L273 TraceCheckUtils]: 46: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume true; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,245 INFO L268 TraceCheckUtils]: 47: Hoare quadruple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #140#return; {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,245 INFO L273 TraceCheckUtils]: 48: Hoare triple {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} is VALID [2018-11-23 10:29:22,246 INFO L273 TraceCheckUtils]: 49: Hoare triple {9233#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))) (= (bvadd main_~i~0 (_ bv4294967295 32)) (_ bv0 32)))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,247 INFO L273 TraceCheckUtils]: 50: Hoare triple {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,248 INFO L273 TraceCheckUtils]: 51: Hoare triple {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume #t~short21; {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,249 INFO L256 TraceCheckUtils]: 52: Hoare triple {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,250 INFO L273 TraceCheckUtils]: 53: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~cond := #in~cond; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,251 INFO L273 TraceCheckUtils]: 54: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !(0bv32 == ~cond); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,252 INFO L273 TraceCheckUtils]: 55: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume true; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,252 INFO L268 TraceCheckUtils]: 56: Hoare quadruple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #140#return; {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,253 INFO L273 TraceCheckUtils]: 57: Hoare triple {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,254 INFO L273 TraceCheckUtils]: 58: Hoare triple {9261#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (= (_ bv2 32) main_~i~0) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,255 INFO L273 TraceCheckUtils]: 59: Hoare triple {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,256 INFO L273 TraceCheckUtils]: 60: Hoare triple {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume #t~short21; {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,257 INFO L256 TraceCheckUtils]: 61: Hoare triple {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,258 INFO L273 TraceCheckUtils]: 62: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} ~cond := #in~cond; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,259 INFO L273 TraceCheckUtils]: 63: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !(0bv32 == ~cond); {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,259 INFO L273 TraceCheckUtils]: 64: Hoare triple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume true; {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,260 INFO L268 TraceCheckUtils]: 65: Hoare quadruple {9147#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #140#return; {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,261 INFO L273 TraceCheckUtils]: 66: Hoare triple {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,262 INFO L273 TraceCheckUtils]: 67: Hoare triple {9289#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (bvadd main_~i~0 (_ bv4294967293 32)) (_ bv0 32)) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9317#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv4 32) main_~i~0) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:22,282 INFO L273 TraceCheckUtils]: 68: Hoare triple {9317#(and (= (_ bv0 32) (bvsrem ~CELLCOUNT~0 (_ bv4 32))) (= (_ bv4 32) main_~i~0) (bvsgt ~CELLCOUNT~0 (_ bv1 32)) (not (bvsle (_ bv2 32) (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9104#false} is VALID [2018-11-23 10:29:22,282 INFO L273 TraceCheckUtils]: 69: Hoare triple {9104#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {9104#false} is VALID [2018-11-23 10:29:22,283 INFO L256 TraceCheckUtils]: 70: Hoare triple {9104#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9104#false} is VALID [2018-11-23 10:29:22,283 INFO L273 TraceCheckUtils]: 71: Hoare triple {9104#false} ~cond := #in~cond; {9104#false} is VALID [2018-11-23 10:29:22,283 INFO L273 TraceCheckUtils]: 72: Hoare triple {9104#false} assume 0bv32 == ~cond; {9104#false} is VALID [2018-11-23 10:29:22,283 INFO L273 TraceCheckUtils]: 73: Hoare triple {9104#false} assume !false; {9104#false} is VALID [2018-11-23 10:29:22,299 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 16 proven. 35 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-23 10:29:22,300 INFO L316 TraceCheckSpWp]: Computing backward predicates... [2018-11-23 10:29:24,623 INFO L273 TraceCheckUtils]: 73: Hoare triple {9104#false} assume !false; {9104#false} is VALID [2018-11-23 10:29:24,623 INFO L273 TraceCheckUtils]: 72: Hoare triple {9104#false} assume 0bv32 == ~cond; {9104#false} is VALID [2018-11-23 10:29:24,623 INFO L273 TraceCheckUtils]: 71: Hoare triple {9104#false} ~cond := #in~cond; {9104#false} is VALID [2018-11-23 10:29:24,624 INFO L256 TraceCheckUtils]: 70: Hoare triple {9104#false} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9104#false} is VALID [2018-11-23 10:29:24,624 INFO L273 TraceCheckUtils]: 69: Hoare triple {9104#false} assume !#t~short21;call #t~mem20 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := 0bv32 == #t~mem20; {9104#false} is VALID [2018-11-23 10:29:24,624 INFO L273 TraceCheckUtils]: 68: Hoare triple {9351#(not (bvslt main_~i~0 ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9104#false} is VALID [2018-11-23 10:29:24,626 INFO L273 TraceCheckUtils]: 67: Hoare triple {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9351#(not (bvslt main_~i~0 ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,626 INFO L273 TraceCheckUtils]: 66: Hoare triple {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,627 INFO L268 TraceCheckUtils]: 65: Hoare quadruple {9103#true} {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} #140#return; {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,627 INFO L273 TraceCheckUtils]: 64: Hoare triple {9103#true} assume true; {9103#true} is VALID [2018-11-23 10:29:24,627 INFO L273 TraceCheckUtils]: 63: Hoare triple {9103#true} assume !(0bv32 == ~cond); {9103#true} is VALID [2018-11-23 10:29:24,627 INFO L273 TraceCheckUtils]: 62: Hoare triple {9103#true} ~cond := #in~cond; {9103#true} is VALID [2018-11-23 10:29:24,627 INFO L256 TraceCheckUtils]: 61: Hoare triple {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9103#true} is VALID [2018-11-23 10:29:24,628 INFO L273 TraceCheckUtils]: 60: Hoare triple {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} assume #t~short21; {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,628 INFO L273 TraceCheckUtils]: 59: Hoare triple {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,653 INFO L273 TraceCheckUtils]: 58: Hoare triple {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9355#(not (bvslt (bvadd main_~i~0 (_ bv1 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,654 INFO L273 TraceCheckUtils]: 57: Hoare triple {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,654 INFO L268 TraceCheckUtils]: 56: Hoare quadruple {9103#true} {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} #140#return; {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,654 INFO L273 TraceCheckUtils]: 55: Hoare triple {9103#true} assume true; {9103#true} is VALID [2018-11-23 10:29:24,654 INFO L273 TraceCheckUtils]: 54: Hoare triple {9103#true} assume !(0bv32 == ~cond); {9103#true} is VALID [2018-11-23 10:29:24,655 INFO L273 TraceCheckUtils]: 53: Hoare triple {9103#true} ~cond := #in~cond; {9103#true} is VALID [2018-11-23 10:29:24,655 INFO L256 TraceCheckUtils]: 52: Hoare triple {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9103#true} is VALID [2018-11-23 10:29:24,655 INFO L273 TraceCheckUtils]: 51: Hoare triple {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} assume #t~short21; {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,655 INFO L273 TraceCheckUtils]: 50: Hoare triple {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,696 INFO L273 TraceCheckUtils]: 49: Hoare triple {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9383#(not (bvslt (bvadd main_~i~0 (_ bv2 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,696 INFO L273 TraceCheckUtils]: 48: Hoare triple {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,697 INFO L268 TraceCheckUtils]: 47: Hoare quadruple {9103#true} {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} #140#return; {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,697 INFO L273 TraceCheckUtils]: 46: Hoare triple {9103#true} assume true; {9103#true} is VALID [2018-11-23 10:29:24,697 INFO L273 TraceCheckUtils]: 45: Hoare triple {9103#true} assume !(0bv32 == ~cond); {9103#true} is VALID [2018-11-23 10:29:24,697 INFO L273 TraceCheckUtils]: 44: Hoare triple {9103#true} ~cond := #in~cond; {9103#true} is VALID [2018-11-23 10:29:24,697 INFO L256 TraceCheckUtils]: 43: Hoare triple {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9103#true} is VALID [2018-11-23 10:29:24,698 INFO L273 TraceCheckUtils]: 42: Hoare triple {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} assume #t~short21; {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,698 INFO L273 TraceCheckUtils]: 41: Hoare triple {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,722 INFO L273 TraceCheckUtils]: 40: Hoare triple {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} #t~post18 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post18);havoc #t~post18; {9411#(not (bvslt (bvadd main_~i~0 (_ bv3 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,722 INFO L273 TraceCheckUtils]: 39: Hoare triple {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} havoc #t~mem20;havoc #t~mem19;havoc #t~short21; {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,723 INFO L268 TraceCheckUtils]: 38: Hoare quadruple {9103#true} {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} #140#return; {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,723 INFO L273 TraceCheckUtils]: 37: Hoare triple {9103#true} assume true; {9103#true} is VALID [2018-11-23 10:29:24,723 INFO L273 TraceCheckUtils]: 36: Hoare triple {9103#true} assume !(0bv32 == ~cond); {9103#true} is VALID [2018-11-23 10:29:24,723 INFO L273 TraceCheckUtils]: 35: Hoare triple {9103#true} ~cond := #in~cond; {9103#true} is VALID [2018-11-23 10:29:24,723 INFO L256 TraceCheckUtils]: 34: Hoare triple {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} call __VERIFIER_assert((if #t~short21 then 1bv32 else 0bv32)); {9103#true} is VALID [2018-11-23 10:29:24,724 INFO L273 TraceCheckUtils]: 33: Hoare triple {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} assume #t~short21; {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,724 INFO L273 TraceCheckUtils]: 32: Hoare triple {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} assume !!~bvslt32(~i~0, ~CELLCOUNT~0);call #t~mem19 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~i~0)), 4bv32);#t~short21 := ~bvsge32(#t~mem19, ~MINVAL~0); {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,724 INFO L273 TraceCheckUtils]: 31: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} ~i~0 := 0bv32; {9439#(not (bvslt (bvadd main_~i~0 (_ bv4 32)) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,725 INFO L273 TraceCheckUtils]: 30: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,725 INFO L273 TraceCheckUtils]: 29: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} #t~post14 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post14);havoc #t~post14; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,726 INFO L273 TraceCheckUtils]: 28: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} call #t~mem15 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem15, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem15;call #t~mem16 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem16, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem16;call #t~mem17 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem17, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem17; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,726 INFO L273 TraceCheckUtils]: 27: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !~bvsge32(~CCCELVOL1~0, ~MINVAL~0);call write~intINTTYPE4(0bv32, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,727 INFO L273 TraceCheckUtils]: 26: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,727 INFO L273 TraceCheckUtils]: 25: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} ~i~0 := 1bv32; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,728 INFO L273 TraceCheckUtils]: 24: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,728 INFO L273 TraceCheckUtils]: 23: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} #t~post10 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post10);havoc #t~post10; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,729 INFO L273 TraceCheckUtils]: 22: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} call #t~mem11 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem11, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem11;call #t~mem12 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem12, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem12;call #t~mem13 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem13, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem13; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,729 INFO L273 TraceCheckUtils]: 21: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume ~bvsge32(~CCCELVOL2~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL2~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,730 INFO L273 TraceCheckUtils]: 20: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,730 INFO L273 TraceCheckUtils]: 19: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} ~i~0 := 1bv32; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,731 INFO L273 TraceCheckUtils]: 18: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,731 INFO L273 TraceCheckUtils]: 17: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} #t~post6 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post6);havoc #t~post6; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,732 INFO L273 TraceCheckUtils]: 16: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} call #t~mem7 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);call write~intINTTYPE4(#t~mem7, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32);havoc #t~mem7;call #t~mem8 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem8, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem8;call #t~mem9 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem9, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem9; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,732 INFO L273 TraceCheckUtils]: 15: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume ~bvsge32(~CCCELVOL3~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL3~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,733 INFO L273 TraceCheckUtils]: 14: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,733 INFO L273 TraceCheckUtils]: 13: Hoare triple {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} ~i~0 := 1bv32; {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,734 INFO L273 TraceCheckUtils]: 12: Hoare triple {9525#(or (not (bvslt (_ bv4 32) ~CELLCOUNT~0)) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} assume !~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9467#(not (bvslt (_ bv4 32) ~CELLCOUNT~0))} is VALID [2018-11-23 10:29:24,752 INFO L273 TraceCheckUtils]: 11: Hoare triple {9529#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)))} #t~post2 := ~i~0;~i~0 := ~bvadd32(1bv32, #t~post2);havoc #t~post2; {9525#(or (not (bvslt (_ bv4 32) ~CELLCOUNT~0)) (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32))))} is VALID [2018-11-23 10:29:24,753 INFO L273 TraceCheckUtils]: 10: Hoare triple {9529#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)))} call #t~mem3 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);call write~intINTTYPE4(#t~mem3, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 3bv32))), 4bv32);havoc #t~mem3;call #t~mem4 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);call write~intINTTYPE4(#t~mem4, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 2bv32))), 4bv32);havoc #t~mem4;call #t~mem5 := read~intINTTYPE4(~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);call write~intINTTYPE4(#t~mem5, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 1bv32))), 4bv32);havoc #t~mem5; {9529#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:24,753 INFO L273 TraceCheckUtils]: 9: Hoare triple {9529#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)))} assume ~bvsge32(~CCCELVOL4~0, ~MINVAL~0);call write~intINTTYPE4(~CCCELVOL4~0, ~#volArray~0.base, ~bvadd32(~#volArray~0.offset, ~bvmul32(4bv32, ~bvsub32(~bvmul32(4bv32, ~i~0), 4bv32))), 4bv32); {9529#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:24,754 INFO L273 TraceCheckUtils]: 8: Hoare triple {9539#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} assume !!~bvsle32(~i~0, ~bvsdiv32(~CELLCOUNT~0, 4bv32)); {9529#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)))} is VALID [2018-11-23 10:29:24,773 INFO L273 TraceCheckUtils]: 7: Hoare triple {9103#true} assume !(0bv32 != ~bvsrem32(~CELLCOUNT~0, 4bv32));assume 0bv32 != (if 0bv32 == ~bvsrem32(~CELLCOUNT~0, 4bv32) then 1bv32 else 0bv32);~i~0 := 1bv32; {9539#(or (bvsle (bvadd main_~i~0 (_ bv1 32)) (bvsdiv ~CELLCOUNT~0 (_ bv4 32))) (not (bvslt (_ bv4 32) ~CELLCOUNT~0)) (not (bvsle main_~i~0 (bvsdiv ~CELLCOUNT~0 (_ bv4 32)))))} is VALID [2018-11-23 10:29:24,774 INFO L273 TraceCheckUtils]: 6: Hoare triple {9103#true} assume ~bvsgt32(~CELLCOUNT~0, 1bv32);~MINVAL~0 := 2bv32;havoc ~i~0;call ~#volArray~0.base, ~#volArray~0.offset := #Ultimate.alloc(~bvmul32(4bv32, ~CELLCOUNT~0));~CCCELVOL4~0 := 5bv32;~CCCELVOL3~0 := 7bv32;~CCCELVOL2~0 := 3bv32;~CCCELVOL1~0 := 1bv32; {9103#true} is VALID [2018-11-23 10:29:24,774 INFO L273 TraceCheckUtils]: 5: Hoare triple {9103#true} ~CELLCOUNT~0 := #t~nondet1;havoc #t~nondet1; {9103#true} is VALID [2018-11-23 10:29:24,774 INFO L256 TraceCheckUtils]: 4: Hoare triple {9103#true} call #t~ret22 := main(); {9103#true} is VALID [2018-11-23 10:29:24,774 INFO L268 TraceCheckUtils]: 3: Hoare quadruple {9103#true} {9103#true} #136#return; {9103#true} is VALID [2018-11-23 10:29:24,774 INFO L273 TraceCheckUtils]: 2: Hoare triple {9103#true} assume true; {9103#true} is VALID [2018-11-23 10:29:24,774 INFO L273 TraceCheckUtils]: 1: Hoare triple {9103#true} #NULL.base, #NULL.offset := 0bv32, 0bv32;#valid := #valid[0bv32 := 0bv1];~CELLCOUNT~0 := 0bv32; {9103#true} is VALID [2018-11-23 10:29:24,774 INFO L256 TraceCheckUtils]: 0: Hoare triple {9103#true} call ULTIMATE.init(); {9103#true} is VALID [2018-11-23 10:29:24,780 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 16 proven. 35 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2018-11-23 10:29:24,783 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-23 10:29:24,783 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-11-23 10:29:24,783 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 74 [2018-11-23 10:29:24,784 INFO L84 Accepts]: Finished accepts. word is accepted. [2018-11-23 10:29:24,784 INFO L86 InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 20 states. [2018-11-23 10:29:26,011 INFO L119 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2018-11-23 10:29:26,011 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 10:29:26,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 10:29:26,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2018-11-23 10:29:26,012 INFO L87 Difference]: Start difference. First operand 104 states and 114 transitions. Second operand 20 states. [2018-11-23 10:29:29,847 WARN L180 SmtUtils]: Spent 158.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 10:29:30,311 WARN L180 SmtUtils]: Spent 147.00 ms on a formula simplification that was a NOOP. DAG size: 11